riscv
/
coriolis
mirror of https://gitlab.lip6.fr/vlsi-eda/coriolis.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Capacitor Layout in progress

This commit is contained in:
Stephanie Youssef 2008-07-23 12:17:18 +00:00
parent 192328e833
commit de784342d6
5 changed files with 175 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
chamsin/etc/technology.hcmos9.dtr.xml
View File

@ -38,5 +38,20 @@
<rule name="aluCapMIMWidth" value="1.0" ref="M-41.1"/>
<rule name="aluCapMIMSpace" value="1.0" ref="M-41.2"/>
<rule name="aluCapMIMVIA6Enclosure" value="0.7" ref="M-41.3"/>
</physical_rules>
<rule name="aluCapMIMTopMIM6Enclosure" value="0.3" ref="M-41.6"/>
<rule name="aluCapMIMBotMIM6Enclosure" value="0.3" ref="M-41.7"/>
<!-- physical rules for TOPMIM6 -->
<rule name="topPlateMIMminWidth" value="3.5" ref="M-97.1"/>
<rule name="topPlateMIMSpacing" value="3.5" ref="M-97.2"/>
<rule name="topPlateMIMBotEnclosure" value="0.5" ref="M-97.6"/>
<rule name="topPlateMIMBotmimContact" value="2.0" ref="M-97.8"/>
<!-- physical rules for BOTMIM6 -->
<rule name="botPlateMIMWidth" value="4.5" ref="M-96.1"/>
<rule name="botPlateMIMSpacing" value="2.5" ref="M-96.2"/>
<rule name="botPlateMIMViaEnclosure" value="0.3" ref="M-96.3"/>
</physical_rules>
</technology>

147
chamsin/src/analogic/Capacitor.cpp
View File

@ -1,13 +1,14 @@
#include "hurricane/DataBase.h"
#include "hurricane/Technology.h"
#include "hurricane/Pad.h"
#include "hurricane/UpdateSession.h"
#include "hurricane/DataBase.h"
using namespace Hurricane;
#include "AEnv.h"
#include "ATechnology.h"
#include "Capacitor.h"
namespace {
Layer* getLayer(Technology* technology, const string& layerStr) {
Layer* layer = technology->getLayer(layerStr);
if (!layer) {
@ -22,27 +23,39 @@ Pad* createPad(Technology* technology, Net* net, const string& layerName) {
Pad* pad = Pad::create(net, layer, emptyBox);
return pad;
}
}
//Déclaration des deux armatures:
//*******************************
const Name Capacitor::BottomPlateName("BOTTOMPLATE");
const Name Capacitor::TopPlateName("TOPPLATE");
//la mise des valeurs initials:
//c'est le Constructeur:
//*********************
Capacitor::Capacitor(Library* library, const Name& name):
AnalogComponent(library, name),
_bottomPlate(NULL), _topPlate(NULL),
_l(0), _w(0)
_l(0), _w(0),
_topPlate10(NULL),
_topPlate20(NULL),_topPlate30(NULL),
_bottomPlate00(NULL)
{}
//Déclaration de la library:
//*************************
Capacitor* Capacitor::create(Library* library, const Name& name) {
Capacitor* capacitor = new Capacitor(library, name);
capacitor->_postCreate();
return capacitor;
}
//création des signaux et des noeuds:
//***********************************
void Capacitor::_postCreate() {
Inherit::_postCreate();
@ -54,5 +67,123 @@ void Capacitor::_postCreate() {
_topPlate = Net::create(this, TopPlateName);
_topPlate->setExternal(true);
_topPlate20 = createPad(technology, _topPlate, "cut6");
_topPlate10 = createPad(technology, _topPlate, "topmim6");
_topPlate20 = createPad(technology, _topPlate, "padopen");
_topPlate30 = createPad(technology, _topPlate, "alucap");
_bottomPlate00 = createPad(technology, _bottomPlate, "botmim6");
}
//la fonction updateLayout
//qui met en oeuvre de nouvau les parametres du capa
//au cas ou il y a n' importe auel changement
//******************************************
void Capacitor::updateLayout() {
DataBase* db = DataBase::getDB();
if (!db) {
throw Error("Error : no DataBase");
}
Technology* techno = db->getTechnology();
if (!techno) {
throw Error("Error : no Technology");
}
ATechnology* atechno = AEnv::getATechnology();
//**Pour topPlate20 -> PADOPEN-MIM
//********************************
DbU::Unit widthCut6 = atechno->getPhysicalRule("padOpenMIMWidth")->getValue();
DbU::Unit spacingCut6 = atechno->getPhysicalRule("padOpenMIMSpace")->getValue();
DbU::Unit enclosureCut6 = atechno->getPhysicalRule("padOpenMIMMETAL6Enclosure")->getValue();
//**Pour topPlate30 -> ALUCAP-MIM
//*******************************
DbU::Unit widthAluCap = atechno->getPhysicalRule("aluCapMIMWidth")->getValue();
DbU::Unit enclosureVia6 = atechno->getPhysicalRule("aluCapMIMVIA6Enclosure")->getValue();
//DbU::Unit distanceAlucapTopmin = atechno->getPhysicalRule("aluCapMIMDistance")->getValue();
DbU::Unit enclosureTopMim = atechno->getPhysicalRule("aluCapMIMTopMIM6Enclosure")->getValue();
DbU::Unit enclosureBotMim = atechno->getPhysicalRule("aluCapMIMBotMIM6Enclosure")->getValue();
//DbU::Unit distanceAluc = atechno->getPhysicalRule("minAlucapDistance")->getValue();
//**Pour topPlate10 -> TOPMIM6
//****************************
DbU::Unit widthTopmim = atechno->getPhysicalRule("topPlateMIMminWidth")->getValue();
DbU::Unit spacingTopmim = atechno->getPhysicalRule("topPlateMIMSpacing")->getValue();
DbU::Unit enclosureByBotmimTopmim = atechno->getPhysicalRule("topPlateMIMBotEnclosure")->getValue();
//DbU::Unit enclosureVia6Topmim = atechno->getPhysicalRule("minViaEnclosure")->getValue();
DbU::Unit enclosureBotmimContact = atechno->getPhysicalRule("topPlateMIMBotmimContact")->getValue();
//**Pour BottomPlate -> BOTMIM6
//*****************************
DbU::Unit widthBotmim = atechno->getPhysicalRule("botPlateMIMWidth")->getValue();
DbU::Unit spacingBotmim = atechno->getPhysicalRule("botPlateMIMSpacing")->getValue();
DbU::Unit enclosureVia6Botmim = atechno->getPhysicalRule("botPlateMIMViaEnclosure")->getValue();
UpdateSession::open();
DbU::setStringMode(1);
//*les Box*//
//*********//
//topPlate 10:
//l'armature haute est le reference
//car la valeur du capa corespond au W et L de l'armature haute
//*************************************************************
DbU::Unit x10 = 0;
DbU::Unit y10 = 0;
DbU::Unit dx10 = _l;
DbU::Unit dy10 = _w;
Box box10(x10, y10, x10 + dx10, y10 + dy10);
_topPlate10->setBoundingBox(box10);
//topPlate 30:
//***********
DbU::Unit x30 = enclosureTopMim;
DbU::Unit y30 = enclosureTopMim;
DbU::Unit dx30 = _l -(2 * enclosureTopMim);
DbU::Unit dy30 = _w -(2 * enclosureTopMim) ;
Box box30(x30, y30, x30 + dx30, y30 + dy30);
_topPlate30->setBoundingBox(box30);
//topPlate 20:
//***********
DbU::Unit x20 = enclosureTopMim + enclosureVia6 ;
DbU::Unit y20 = enclosureTopMim + enclosureVia6 ;
DbU::Unit dx20 = _l -(2 * enclosureTopMim)-(2 * enclosureVia6 );
DbU::Unit dy20 = _w -(2 * enclosureTopMim)-(2 * enclosureVia6 );
Box box20(x20, y20, x20 + dx20, y20 + dy20);
_topPlate20->setBoundingBox(box20);
//bottomPlate 00:
//**************
DbU::Unit x00 = 0 - enclosureByBotmimTopmim;
DbU::Unit y00 = 0 - enclosureByBotmimTopmim;
DbU::Unit dx00 = _l + (2 * enclosureByBotmimTopmim);
DbU::Unit dy00 = _w + (2 * enclosureByBotmimTopmim);
Box box00(x00, y00, x00 + dx00, y00 + dy00);
_bottomPlate00->setBoundingBox(box00);
UpdateSession::close();
}
Record* Capacitor::_getRecord() const {
Record* record = Inherit::_getRecord();
if (record) {
record->add(getSlot("BottomPlate", _bottomPlate));
record->add(getSlot("TopPlate", _topPlate));
record->add(getSlot("L", &_l));
record->add(getSlot("W", &_w));
record->add(getSlot("TopPlate20", _topPlate20));
record->add(getSlot("TopPlate30", _topPlate30));
record->add(getSlot("TopPlate10", _topPlate10));
record->add(getSlot("BottomPlate00", _bottomPlate00));
}
return record;
}

10
chamsin/src/analogic/Capacitor.h
View File

@ -9,7 +9,12 @@ class Capacitor : public AnalogComponent {
static const Name TopPlateName;
static Capacitor* create(Library* library, const Name& name);
void updateLayout();
void setW(DbU::Unit value) { _w = value; updateLayout(); }
void setL(DbU::Unit value) { _l = value; updateLayout(); }
virtual Record* _getRecord() const;
protected:
void _postCreate();
@ -18,7 +23,10 @@ class Capacitor : public AnalogComponent {
Net* _topPlate;
DbU::Unit _l;
DbU::Unit _w;
Pad *_topPlate20;
Pad* _topPlate10;
Pad* _topPlate20;
Pad* _topPlate30;
Pad* _bottomPlate00;
Capacitor(Library* library, const Name& name);
};

6
chamsin/src/tests/CMakeLists.txt
View File

@ -8,9 +8,9 @@ include_directories(${HURRICANE_INCLUDE_DIR} ${HURRICANE_GRAPHICAL_INCLUDE_DIR}
${CHAMSIN_SOURCE_DIR}/src/analogic ${CHAMSIN_SOURCE_DIR}/src/device)
add_executable(transview TransistorViewer.cpp ${MOC_TRANSISTOR} TransistorTest.cpp)
add_executable(capview CapacitorViewer.cpp ${MOC_CAPACITOR} CapacitorTest.cpp)
add_executable(capaview CapacitorViewer.cpp ${MOC_CAPACITOR} CapacitorTest.cpp)
target_link_libraries(transview atechnology analogic ${HURRICANE_LIBRARIES} ${HURRICANE_GRAPHICAL_LIBRARIES} ${QT_LIBRARIES})
target_link_libraries(capview atechnology analogic ${HURRICANE_LIBRARIES} ${HURRICANE_GRAPHICAL_LIBRARIES} ${QT_LIBRARIES})
target_link_libraries(capaview atechnology analogic ${HURRICANE_LIBRARIES} ${HURRICANE_GRAPHICAL_LIBRARIES} ${QT_LIBRARIES})
install(TARGETS transview capview DESTINATION /bin)
install(TARGETS transview capaview DESTINATION /bin)

16
chamsin/src/tests/CapacitorViewer.cpp
View File

@ -18,14 +18,14 @@ CapacitorViewer::CapacitorViewer(Library* library) {
exit(56);
}
DbU::Unit capacitorMinL = 0;
DbU::Unit capacitorMaxL = 0;
DbU::Unit capacitorMinW = 0;
DbU::Unit capacitorMaxW = 0;
DbU::Unit capacitorMinL = aTechnology->getPhysicalRule("topPlateMIMminWidth")->getValue();
DbU::Unit capacitorMaxL = 10 * capacitorMinL;
DbU::Unit capacitorMinW = aTechnology->getPhysicalRule("topPlateMIMminWidth")->getValue();
DbU::Unit capacitorMaxW = 10 * capacitorMinW;
_capacitor = Capacitor::create(library, Name("TEST"));
//_capacitor->setL(capacitorMinL);
//_capacitor->setW(capacitorMinW);
_capacitor->setL(capacitorMinL);
_capacitor->setW(capacitorMinW);
_cellWidget = new CellWidget;
_cellWidget->setCell(_capacitor);
_cellWidget->fitToContents();
@ -56,11 +56,11 @@ CapacitorViewer::CapacitorViewer(Library* library) {
}
void CapacitorViewer::wvalueChanged(int value) {
//_capacitor->setW(value);
_capacitor->setW(value);
_cellWidget->redraw();
}
void CapacitorViewer::lvalueChanged(int value) {
//_capacitor->setL(value);
_capacitor->setL(value);
_cellWidget->redraw();
}