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coriolis
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* ./stratus: 

- Change: Busses are now created in "downto" order instead of "to".
This commit is contained in:
Jean-Paul Chaput 2012-11-16 12:56:08 +00:00
parent 8d7ad312c9
commit da88363881
3 changed files with 5 additions and 3 deletions
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2
stratus1/doc/stratus/man_new.tex
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@ -6,5 +6,5 @@
\item{A \verb-Stimuli- method permits to generate stimuli for simulation.} \item{A \verb-Stimuli- method permits to generate stimuli for simulation.}
\item{Thanks to the \verb-Stimuli- method, a testbench can now automatically be generated either in Alliance PAT format or standard VHDL.} \item{Thanks to the \verb-Stimuli- method, a testbench can now automatically be generated either in Alliance PAT format or standard VHDL.}
\item{The \verb-Simul- method of the class \verb-Model- permits to simulate either with the Alliance's simulator \verb-asimut- or a standard VHDL simulator (\verb-ghdl-).} \item{The \verb-Simul- method of the class \verb-Model- permits to simulate either with the Alliance's simulator \verb-asimut- or a standard VHDL simulator (\verb-ghdl-).}
\begin{end} \end{itemize}

1
stratus1/src/stratus/st_model.py
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@ -467,6 +467,7 @@ class Model :
if EDITOR: if EDITOR:
EDITOR.setCell ( self._hur_cell ) EDITOR.setCell ( self._hur_cell )
EDITOR.fit () EDITOR.fit ()
if stopLevel > 0:
Breakpoint.stop ( stopLevel, message ) Breakpoint.stop ( stopLevel, message )
##### Save : in order to create the output files ##### ##### Save : in order to create the output files #####

3
stratus1/src/stratus/st_net.py
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@ -919,7 +919,8 @@ class net :
if self._arity == 1 : if self._arity == 1 :
self.hur_net ( self._name, 0 ) self.hur_net ( self._name, 0 )
else : else :
for i in range ( self._ind, self._arity+self._ind ) : self.hur_net ( self._name + "(" + str(i) + ")", i ) for i in range ( self._ind+self._arity, self._ind, -1 ):
self.hur_net ( '%s(%d)' % (self._name,i), i )
##### hur_net one by one ##### ##### hur_net one by one #####
def hur_net ( self, name, ind ) : def hur_net ( self, name, ind ) :