From bc295bda3181886be53aeaa817806084fe1db1d8 Mon Sep 17 00:00:00 2001
From: Damien Dupuis <alliance-users@asim.lip6.fr>
Date: Tue, 6 Apr 2010 14:32:40 +0000
Subject: [PATCH]     Adding new technology support = freePDK45 (this will be
 used to generate openAccess files since it is the only design kit we've got
 that is compliant with Cadence 6.x)

---
 crlcore/etc/CMakeLists.txt               | 13 ++++++-----
 crlcore/etc/technology.freePDK45.s2r.xml | 29 ++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 6 deletions(-)
 create mode 100644 crlcore/etc/technology.freePDK45.s2r.xml

diff --git a/crlcore/etc/CMakeLists.txt b/crlcore/etc/CMakeLists.txt
index 721d286b..dc8a475c 100644
--- a/crlcore/etc/CMakeLists.txt
+++ b/crlcore/etc/CMakeLists.txt
@@ -1,6 +1,7 @@
- install ( FILES   environment.alliance.xml   DESTINATION /share/etc ) 
- install ( FILES   technology.symbolic.xml    DESTINATION /share/etc ) 
- install ( FILES   technology.hcmos9.s2r.xml  DESTINATION /share/etc ) 
- install ( FILES   technology.cmos065.s2r.xml DESTINATION /share/etc ) 
- install ( FILES   technology.fake.s2r.xml    DESTINATION /share/etc ) 
- install ( FILES   display.xml                DESTINATION /share/etc ) 
+ install ( FILES   environment.alliance.xml     DESTINATION /share/etc ) 
+ install ( FILES   technology.symbolic.xml      DESTINATION /share/etc ) 
+ install ( FILES   technology.hcmos9.s2r.xml    DESTINATION /share/etc ) 
+ install ( FILES   technology.cmos065.s2r.xml   DESTINATION /share/etc ) 
+ install ( FILES   technology.freePDK45.s2r.xml DESTINATION /share/etc ) 
+ install ( FILES   technology.fake.s2r.xml      DESTINATION /share/etc ) 
+ install ( FILES   display.xml                  DESTINATION /share/etc ) 
diff --git a/crlcore/etc/technology.freePDK45.s2r.xml b/crlcore/etc/technology.freePDK45.s2r.xml
new file mode 100644
index 00000000..f19e13a3
--- /dev/null
+++ b/crlcore/etc/technology.freePDK45.s2r.xml
@@ -0,0 +1,29 @@
+<?xml version="1.0"?>
+<technology>
+  <real>
+    <name>freePDK45</name>
+    <grid value="0.0025" unit="micron"/>
+    <gridsperlambda value="24"/>
+    <layers>
+      <!-- Non routing layers -->
+      <processlayer symbolic="nWell"    real="NW"    gdsII="3" />
+      <processlayer symbolic="nImplant" real="NP"    gdsII="26"/>
+      <processlayer symbolic="pImplant" real="PP"    gdsII="25"/>
+      <processlayer symbolic="active"   real="OD"    gdsII="6" />
+      <processlayer symbolic="poly"     real="PO"    gdsII="17"/>
+      <!-- Routing layers -->
+      <processlayer symbolic="cut0"     real="CO"    gdsII="30"/>
+      <processlayer symbolic="metal1"   real="M1"    gdsII="31"/>
+      <processlayer symbolic="cut1"     real="VIA1X" gdsII="51"/>
+      <processlayer symbolic="metal2"   real="M2X"   gdsII="32"/>
+      <processlayer symbolic="cut2"     real="VIA2X" gdsII="52"/>
+      <processlayer symbolic="metal3"   real="M3X"   gdsII="33"/>
+      <processlayer symbolic="cut3"     real="VIA3X" gdsII="53"/>
+      <processlayer symbolic="metal4"   real="M4X"   gdsII="34"/>
+      <processlayer symbolic="cut4"     real="VIA4X" gdsII="54"/>
+      <processlayer symbolic="metal5"   real="M5X"   gdsII="35"/>
+      <processlayer symbolic="cut5"     real="VIA5X" gdsII="55"/>
+      <processlayer symbolic="metal6"   real="M6X"   gdsII="36"/>
+    </layers>
+  </real>
+</technology>