diff --git a/vlsisapd/examples/CMakeLists.txt b/vlsisapd/examples/CMakeLists.txt index 4d1996a5..c0754817 100644 --- a/vlsisapd/examples/CMakeLists.txt +++ b/vlsisapd/examples/CMakeLists.txt @@ -1,10 +1,5 @@ ADD_SUBDIRECTORY(cif) ADD_SUBDIRECTORY(agds) -if( IS_DIRECTORY dtr ) - ADD_SUBDIRECTORY(dtr) -endif( IS_DIRECTORY dtr ) -if( IS_DIRECTORY openChams ) - ADD_SUBDIRECTORY(openChams) -endif( IS_DIRECTORY openChams ) +ADD_SUBDIRECTORY(dtr) ADD_SUBDIRECTORY(liberty) ADD_SUBDIRECTORY(spice) diff --git a/vlsisapd/examples/openChams/CMakeLists.txt b/vlsisapd/examples/openChams/CMakeLists.txt deleted file mode 100644 index 8e866eba..00000000 --- a/vlsisapd/examples/openChams/CMakeLists.txt +++ /dev/null @@ -1,8 +0,0 @@ -ADD_SUBDIRECTORY(cplusplus) -ADD_SUBDIRECTORY(python) - -SET ( XML_FILES inverter.xml - buffer.xml - ) - -INSTALL ( FILES ${XML_FILES} DESTINATION share/doc/coriolis2/examples/vlsisapd/openChams ) diff --git a/vlsisapd/examples/openChams/buffer.xml b/vlsisapd/examples/openChams/buffer.xml deleted file mode 100644 index 6cf15eb0..00000000 --- a/vlsisapd/examples/openChams/buffer.xml +++ /dev/null @@ -1,92 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/vlsisapd/examples/openChams/cplusplus/CMakeLists.txt b/vlsisapd/examples/openChams/cplusplus/CMakeLists.txt deleted file mode 100644 index 446fd8d3..00000000 --- a/vlsisapd/examples/openChams/cplusplus/CMakeLists.txt +++ /dev/null @@ -1,8 +0,0 @@ -INCLUDE_DIRECTORIES ( ${VLSISAPD_SOURCE_DIR}/src/openChams/src ${LIBXML2_INCLUDE_DIR}) -ADD_EXECUTABLE ( driveOpenChams driveOpenChams.cpp ) -ADD_EXECUTABLE ( parseOpenChams parseOpenChams.cpp ) -TARGET_LINK_LIBRARIES ( driveOpenChams openChams ${LIBXML_LIBRARIES}) # 'driveOpenChams' is the name of the executable and 'openChams' the name of the target library in openChams/src/CMakeLists.txt -TARGET_LINK_LIBRARIES ( parseOpenChams openChams ${LIBXML_LIBRARIES}) -INSTALL ( TARGETS driveOpenChams parseOpenChams DESTINATION share/doc/coriolis2/examples/vlsisapd/openChams ) -INSTALL ( FILES driveOpenChams.cpp parseOpenChams.cpp DESTINATION share/doc/coriolis2/examples/vlsisapd/openChams ) -INSTALL ( FILES cmake.ex DESTINATION share/doc/coriolis2/examples/vlsisapd/openChams RENAME CMakeLists.txt ) diff --git a/vlsisapd/examples/openChams/cplusplus/cmake.ex b/vlsisapd/examples/openChams/cplusplus/cmake.ex deleted file mode 100644 index 05ba8aa5..00000000 --- a/vlsisapd/examples/openChams/cplusplus/cmake.ex +++ /dev/null @@ -1,18 +0,0 @@ -PROJECT(PARSEDRIVEOPENCHAMS) - -CMAKE_MINIMUM_REQUIRED(VERSION 2.4.0) - -SET(CMAKE_MODULE_PATH "$ENV{VLSISAPD_USER_TOP}/share/cmake/Modules" - "$ENV{VLSISAPD_TOP}/share/cmake/Modules" - ) - -FIND_PACKAGE(VLSISAPD REQUIRED) -FIND_PACKAGE(Libxml2 REQUIRED) - -IF(OPENCHAMS_FOUND) - INCLUDE_DIRECTORIES(${OPENCHAMS_INCLUDE_DIR} ${LIBXML2_INCLUDE_DIR}) - ADD_EXECUTABLE(driveOpenChams driveOpenChams.cpp) - ADD_EXECUTABLE(parseOpenChams parseOpenChams.cpp) - TARGET_LINK_LIBRARIES(driveOpenChams ${OPENCHAMS_LIBRARY} ${LIBXML2_LIBRARIES}) - TARGET_LINK_LIBRARIES(parseOpenChams ${OPENCHAMS_LIBRARY} ${LIBXML2_LIBRARIES}) -ENDIF(OPENCHAMS_FOUND) diff --git a/vlsisapd/examples/openChams/cplusplus/driveOpenChams.cpp b/vlsisapd/examples/openChams/cplusplus/driveOpenChams.cpp deleted file mode 100644 index 31bdfac6..00000000 --- a/vlsisapd/examples/openChams/cplusplus/driveOpenChams.cpp +++ /dev/null @@ -1,125 +0,0 @@ -#include -using namespace std; - -#include "vlsisapd/openChams/Circuit.h" -#include "vlsisapd/openChams/Netlist.h" -#include "vlsisapd/openChams/Instance.h" -#include "vlsisapd/openChams/Device.h" -#include "vlsisapd/openChams/Transistor.h" -#include "vlsisapd/openChams/Net.h" -#include "vlsisapd/openChams/Schematic.h" -#include "vlsisapd/openChams/Sizing.h" -#include "vlsisapd/openChams/Operator.h" -#include "vlsisapd/openChams/Layout.h" -#include "vlsisapd/openChams/Node.h" -#include "vlsisapd/openChams/Port.h" -#include "vlsisapd/openChams/Wire.h" - -int main(int argc, char * argv[]) { - OpenChams::Circuit* circuit = new OpenChams::Circuit(OpenChams::Name("design"), OpenChams::Name("myTech")); - // value parameters - circuit->addParameter(OpenChams::Name("temp"), "27.0" ); - circuit->addParameter(OpenChams::Name("Vdd") , "1.2" ); - circuit->addParameter(OpenChams::Name("Vss") , "0.0" ); - circuit->addParameter(OpenChams::Name("L") , "0.1e-6"); - circuit->addParameter(OpenChams::Name("Ids") , "30e-6" ); - circuit->addParameter(OpenChams::Name("Veg") , "0.12" ); - // equation parameters - circuit->addParameter(OpenChams::Name("complex"), "myEq"); - - // netlist - OpenChams::Netlist* netlist = circuit->createNetlist(); - // instances - // nmos1 - OpenChams::Device* inst_nmos1 = netlist->addDevice(OpenChams::Name("nmos1"), OpenChams::Name("Transistor"), 1, OpenChams::Name("NMOS"), true); - inst_nmos1->addConnector(OpenChams::Name("G")); - inst_nmos1->addConnector(OpenChams::Name("S")); - inst_nmos1->addConnector(OpenChams::Name("D")); - OpenChams::Transistor* tr_nmos1 = inst_nmos1->addTransistor(OpenChams::Name("m1")); - tr_nmos1->setGate (OpenChams::Name("G")); // the name of the connector of inst_nmos1 - tr_nmos1->setSource(OpenChams::Name("S")); - tr_nmos1->setDrain (OpenChams::Name("D")); - tr_nmos1->setBulk (OpenChams::Name("S")); - // pmos1 - OpenChams::Device* inst_pmos1 = netlist->addDevice(OpenChams::Name("pmos1"), OpenChams::Name("Transistor"), 2, OpenChams::Name("PMOS"), true); - inst_pmos1->addConnector(OpenChams::Name("G")); - inst_pmos1->addConnector(OpenChams::Name("S")); - inst_pmos1->addConnector(OpenChams::Name("D")); - OpenChams::Transistor* tr_pmos1 = inst_pmos1->addTransistor(OpenChams::Name("m1")); - tr_pmos1->setGate (OpenChams::Name("G")); // the name of the connector of inst_pmos1 - tr_pmos1->setSource(OpenChams::Name("S")); - tr_pmos1->setDrain (OpenChams::Name("D")); - tr_pmos1->setBulk (OpenChams::Name("S")); - // nets - OpenChams::Net* _vdd = netlist->addNet(OpenChams::Name("vdd"), OpenChams::Name("power") , true); - OpenChams::Net* _vss = netlist->addNet(OpenChams::Name("vss"), OpenChams::Name("ground") , true); - OpenChams::Net* _in = netlist->addNet(OpenChams::Name("in" ), OpenChams::Name("logical"), true); - OpenChams::Net* _out = netlist->addNet(OpenChams::Name("out"), OpenChams::Name("logical"), true); - _vdd->connectTo(OpenChams::Name("pmos1"), OpenChams::Name("S")); - _vss->connectTo(OpenChams::Name("nmos1"), OpenChams::Name("S")); - _in->connectTo (OpenChams::Name("nmos1"), OpenChams::Name("G")); - _in->connectTo (OpenChams::Name("pmos1"), OpenChams::Name("G")); - _out->connectTo(OpenChams::Name("nmos1"), OpenChams::Name("D")); - _out->connectTo(OpenChams::Name("pmos1"), OpenChams::Name("D")); - - // schematic - OpenChams::Schematic* schematic = circuit->createSchematic(); - schematic->addInstance(OpenChams::Name("nmos1"), 2490, 2600, OpenChams::Name("ID")); - schematic->addInstance(OpenChams::Name("pmos1"), 2490, 2300, OpenChams::Name("ID")); - _vdd->addPort(OpenChams::Name("inV"), 0, 2490, 2100, OpenChams::Name("ID")); - OpenChams::Wire* wVdd = _vdd->addWire(); - wVdd->setStartPoint(OpenChams::Name("pmos1"), OpenChams::Name("S")); - wVdd->setEndPoint (0); - _vss->addPort(OpenChams::Name("inV"), 0, 2490, 2800, OpenChams::Name("MY")); - OpenChams::Wire* wVss = _vss->addWire(); - wVss->setStartPoint(OpenChams::Name("nmos1"), OpenChams::Name("S")); - wVss->setEndPoint (0); - _in->addPort(OpenChams::Name("inH"), 0, 2190, 2500, OpenChams::Name("ID")); - OpenChams::Wire* wIn = _in->addWire(); - wIn->setStartPoint(OpenChams::Name("pmos1"), OpenChams::Name("G")); - wIn->setEndPoint (OpenChams::Name("nmos1"), OpenChams::Name("G")); - OpenChams::Wire* wIn1 = _in->addWire(); - wIn1->setStartPoint(0); - wIn1->setEndPoint (OpenChams::Name("pmos1"), OpenChams::Name("G")); - _out->addPort(OpenChams::Name("outH"), 0, 2600, 2500, OpenChams::Name("ID")); - OpenChams::Wire* wOut = _out->addWire(); - wOut->setStartPoint(OpenChams::Name("pmos1"), OpenChams::Name("D")); - wOut->setEndPoint (OpenChams::Name("nmos1"), OpenChams::Name("D")); - OpenChams::Wire* wOut1 = _out->addWire(); - wOut1->setStartPoint(OpenChams::Name("nmos1"), OpenChams::Name("D")); - wOut1->setEndPoint (0); - - // sizing - OpenChams::Sizing* sizing = circuit->createSizing(); - OpenChams::Operator* op_pmos1 = sizing->addOperator(OpenChams::Name("pmos1"), OpenChams::Name("OPVG(Veg)"), OpenChams::Name("BSIM3V3")); - op_pmos1->addConstraint(OpenChams::Name("Temp"), OpenChams::Name("design"), OpenChams::Name("temp")); - op_pmos1->addConstraint(OpenChams::Name("Ids") , OpenChams::Name("design"), OpenChams::Name("Ids") ); - op_pmos1->addConstraint(OpenChams::Name("L") , OpenChams::Name("design"), OpenChams::Name("L") ); - op_pmos1->addConstraint(OpenChams::Name("Veg") , OpenChams::Name("design"), OpenChams::Name("Veg") ); - op_pmos1->addConstraint(OpenChams::Name("Vd") , OpenChams::Name("design"), OpenChams::Name("Vdd") , 0.5); - op_pmos1->addConstraint(OpenChams::Name("Vs") , OpenChams::Name("design"), OpenChams::Name("Vdd") ); - OpenChams::Operator* op_nmos1 = sizing->addOperator(OpenChams::Name("nmos1"), OpenChams::Name("OPW(Vg,Vs)"), OpenChams::Name("BSIM3V3")); - op_nmos1->addConstraint(OpenChams::Name("Temp"), OpenChams::Name("design"), OpenChams::Name("temp")); - op_nmos1->addConstraint(OpenChams::Name("Ids") , OpenChams::Name("design"), OpenChams::Name("Ids" )); - op_nmos1->addConstraint(OpenChams::Name("L") , OpenChams::Name("design"), OpenChams::Name("L" )); - op_nmos1->addConstraint(OpenChams::Name("Vs") , OpenChams::Name("design"), OpenChams::Name("Vdd" )); - op_nmos1->addConstraint(OpenChams::Name("Vg") , OpenChams::Name("pmos1") , OpenChams::Name("Vg" )); - op_nmos1->addConstraint(OpenChams::Name("Vd") , OpenChams::Name("pmos1") , OpenChams::Name("Vd" )); - op_nmos1->addConstraint(OpenChams::Name("another"), OpenChams::Name("myEq"), -2.5 ); - // layout - OpenChams::Layout* layout = circuit->createLayout(); - layout->addInstance(OpenChams::Name("pmos1"), OpenChams::Name("Common transistor")); - layout->addInstance(OpenChams::Name("nmos1"), OpenChams::Name("Rotate transistor")); - // create hbtree - OpenChams::Group* g1 = new OpenChams::Group("g1"); // default position is NONE and default parent is NULL - g1->setAlign(OpenChams::Group::VERTICAL); - OpenChams::Bloc* b1 = new OpenChams::Bloc("nmos1", OpenChams::Node::NONE, g1); - g1->setRootNode(b1); // b1 is root node of group g1 - OpenChams::Bloc* b2 = new OpenChams::Bloc("pmos1", OpenChams::Node::TOP, b1); - b1->setTop(b2); // b2 is on top of b1 - layout->setHBTreeRoot(g1); // g1 is the root of the tree - - circuit->writeToFile("./myInverter.xml"); - return 0; -} - diff --git a/vlsisapd/examples/openChams/cplusplus/parseOpenChams.cpp b/vlsisapd/examples/openChams/cplusplus/parseOpenChams.cpp deleted file mode 100644 index b2ad46fb..00000000 --- a/vlsisapd/examples/openChams/cplusplus/parseOpenChams.cpp +++ /dev/null @@ -1,231 +0,0 @@ -#include -#include -#include -#include -using namespace std; - -#include "vlsisapd/openChams/Circuit.h" -#include "vlsisapd/openChams/Name.h" -#include "vlsisapd/openChams/Parameters.h" -#include "vlsisapd/openChams/Netlist.h" -#include "vlsisapd/openChams/Instance.h" -#include "vlsisapd/openChams/Device.h" -#include "vlsisapd/openChams/Net.h" -#include "vlsisapd/openChams/Transistor.h" -#include "vlsisapd/openChams/Schematic.h" -#include "vlsisapd/openChams/Sizing.h" -#include "vlsisapd/openChams/Operator.h" -#include "vlsisapd/openChams/Layout.h" -#include "vlsisapd/openChams/Node.h" -#include "vlsisapd/openChams/Port.h" -#include "vlsisapd/openChams/Wire.h" -#include "vlsisapd/openChams/OpenChamsException.h" - -void printHBTree(OpenChams::Node* node, unsigned indent) { - if (!node) return; // since we pass nnode->getRight and node-getTop without checking for NULL - for (unsigned i = 0 ; i < indent ; i++) { - cerr << " |"; - } - string pos = ""; - switch(node->getPosition()) { - case OpenChams::Node::TOP: - pos = "top"; - break; - case OpenChams::Node::RIGHT: - pos = "right"; - break; - default: - break; - } - OpenChams::Bloc* bloc = dynamic_cast(node); - if (bloc) { - cerr << " bloc: " << bloc->getName().getString() << " - " << pos << endl; - printHBTree(bloc->getTop() , indent+1); - printHBTree(bloc->getRight(), indent+1); - return; - } - OpenChams::Group* group = dynamic_cast(node); - if (group) { - string align = "none"; - switch(group->getAlign()) { - case OpenChams::Group::VERTICAL: - align = "vertical"; - break; - case OpenChams::Group::HORIZONTAL: - align = "horizontal"; - break; - default: - break; - } - cerr << " group: " << group->getName().getString() << " - " << pos << " - align: " << align << " - isolated: " << group->isIsolated() << " - paired: " << group->isPaired() << endl; - printHBTree(group->getRootNode(), indent+1); - printHBTree(group->getTop() , indent+1); - printHBTree(group->getRight() , indent+1); - return; - } - cerr << "[ERROR] printHBTree: node is nor a bloc nor a group !" << endl; - return; -} - -int main(int argc, char * argv[]) { - string file = ""; - if (argc == 1) - file = "./inverter.xml"; - else if (argc == 2) - file = argv[1]; - else { - cerr << "Usage: openChamsParser [filename]" << endl; - exit(1); - } - - OpenChams::Circuit* circuit = NULL; - try { - circuit = OpenChams::Circuit::readFromFile(file); - } catch (OpenChams::OpenChamsException& e) { - cerr << e.what() << endl; - exit(48); - } - - cerr << circuit->getName().getString() << endl; - cerr << " + parameters" << endl; - OpenChams::Parameters params = circuit->getParameters(); - if (!params.isEmpty()) { - for (map::const_iterator it = params.getValues().begin() ; it != params.getValues().end() ; ++it) { - cerr << " | | " << ((*it).first).getString() << " : " << (*it).second << endl; - } - } - cerr << " + netlist" << endl; - cerr << " | + instances" << endl; - OpenChams::Netlist* netlist = circuit->getNetlist(); - if (netlist && !netlist->hasNoInstances()) { - for (size_t i = 0 ; i < netlist->getInstances().size() ; i++) { - OpenChams::Instance* inst = netlist->getInstances()[i]; - OpenChams::Device* dev = NULL; - if (dynamic_cast(inst)) { - dev = static_cast(inst); - cerr << " | | + " << dev->getName().getString() << " : " << dev->getModel().getString() << " - " << dev->getOrder() << " - " << dev->getMosType().getString() << " - " << (dev->isSourceBulkConnected()?"true":"false") << endl; - } else { - cerr << " | | + " << inst->getName().getString() << " : " << inst->getModel().getString() << " - " << inst->getOrder() << endl; - } - cerr << " | | | + connectors" << endl; - for (map::const_iterator cit = inst->getConnectors().begin() ; cit != inst->getConnectors().end() ; ++cit) { - if ((*cit).second) - cerr << " | | | | " << ((*cit).first).getString() << " : " << ((*cit).second)->getName().getString() << endl; - else - cerr << " | | | | " << ((*cit).first).getString() << endl; // no net connected ! - } - if (dev) { - cerr << " | | | + transistors" << endl; - for (size_t j = 0 ; j < dev->getTransistors().size() ; j++) { - OpenChams::Transistor* tr = dev->getTransistors()[j]; - cerr << " | | | | name: " << tr->getName().getString() << " - gate: " << tr->getGate().getString() << " - source: " << tr->getSource().getString() << " - drain: " << tr->getDrain().getString() << " - bulk: " << tr->getBulk().getString() << endl; - } - } - } - } - cerr << " | + nets" << endl; - bool schematicNet = false; // define wether net sections are needed in schematic section - if (!netlist->hasNoNets()) { - for (size_t i = 0 ; i < netlist->getNets().size() ; i++) { - OpenChams::Net* net = netlist->getNets()[i]; - cerr << " | | + " << net->getName().getString() << " : " << net->getType().getString() << " - " << (net->isExternal()?"true":"false") << endl; - cerr << " | | | + connections" << endl; - for (size_t j = 0 ; j < net->getConnections().size() ; j++) { - OpenChams::Net::Connection* connect = net->getConnections()[j]; - cerr << " | | | | " << connect->getInstanceName().getString() << "." << connect->getConnectorName().getString() << endl; - } - if (!net->hasNoPorts() || !net->hasNoWires()) - schematicNet = true; - } - } - OpenChams::Schematic* schematic = circuit->getSchematic(); - if (schematic && !schematic->hasNoInstances()) { - cerr << " + schematic" << endl; - for (map::const_iterator sit = schematic->getInstances().begin() ; sit != schematic->getInstances().end() ; ++sit) { - OpenChams::Schematic::Infos* inf = (*sit).second; - cerr << " | + instance: name: " << ((*sit).first).getString() << " - x: " << inf->getX() << " - y: " << inf->getY() << " - orientation: " << inf->getOrientation().getString() << endl; - } - if (schematicNet) { - for (size_t i = 0 ; i < netlist->getNets().size() ; i++) { - OpenChams::Net* net = netlist->getNets()[i]; - cerr << " | + net name: " << net->getName().getString() << endl; - if (!net->hasNoPorts()) { - for (size_t j = 0 ; j < net->getPorts().size() ; j++) { - OpenChams::Port* port = net->getPorts()[j]; - cerr << " | | + port type: " << port->getType().getString() << " - idx: " << port->getIndex() << " - x: " << port->getX() << " - y: " << port->getY() << " - orientation: " << port->getOrientation().getString() << endl; - } - } - if (!net->hasNoWires()) { - for (size_t j = 0 ; j < net->getWires().size() ; j++) { - OpenChams::Wire* wire = net->getWires()[j]; - cerr << " | | + wire "; - OpenChams::WirePoint* start = wire->getStartPoint(); - if (dynamic_cast(start)) { - OpenChams::InstancePoint* iP = static_cast(start); - cerr << "<" << iP->getName().getString() << "," << iP->getPlug().getString() << "> "; - } else if (dynamic_cast(start)) { - OpenChams::PortPoint* pP = static_cast(start); - cerr << "<" << pP->getIndex() << "> "; - } - for (size_t k = 0 ; k < wire->getIntermediatePoints().size() ; k++) { - OpenChams::IntermediatePoint* iP = wire->getIntermediatePoints()[k]; - cerr << "<" << iP->getX() << "," << iP->getY() << "> "; - } - OpenChams::WirePoint* end = wire->getEndPoint(); - if (dynamic_cast(end)) { - OpenChams::InstancePoint* iP = static_cast(end); - cerr << "<" << iP->getName().getString() << "," << iP->getPlug().getString() << "> "; - } else if (dynamic_cast(end)) { - OpenChams::PortPoint* pP = static_cast(end); - cerr << "<" << pP->getIndex() << "> "; - } - cerr << endl; - } - } - - } - } - - } - OpenChams::Sizing* sizing = circuit->getSizing(); - if (sizing) { - cerr << " + sizing" << endl; - if (!sizing->hasNoOperators()) { - for (map::const_iterator oit = sizing->getOperators().begin() ; oit != sizing->getOperators().end() ; ++oit) { - OpenChams::Operator* op = (*oit).second; - cerr << " | + instance name: " << ((*oit).first).getString() << " - operator: " << op->getName().getString() << " - simulModel: " << op->getSimulModel().getString() << endl; - if (!op->hasNoConstraints()) { - for (map::const_iterator cit = op->getConstraints().begin() ; cit != op->getConstraints().end() ; ++cit) { - OpenChams::Operator::Constraint* cstr = (*cit).second; - cerr << " | | + param: " << ((*cit).first).getString() << " - ref: " << cstr->getRef().getString() << " - refParam: " << cstr->getRefParam().getString() << " - factor: " << cstr->getFactor() << endl; - } - } - } - } - // To update to the new equations. - // if (!sizing->hasNoEquations()) { - // cerr << " | + equations" << endl; - // for (map::const_iterator eit = sizing->getEquations().begin() ; eit != sizing->getEquations().end() ; ++eit) { - // cerr << " | | " << ((*eit).first).getString() << " : " << (*eit).second << endl; - // } - // } - } - OpenChams::Layout* layout = circuit->getLayout(); - if (layout) { - if (!layout->hasNoInstance()) { - cerr << " + layout" << endl; - for (map::const_iterator lit = layout->getInstances().begin() ; lit != layout->getInstances().end() ; ++lit) { - cerr << " | | instance name: " << ((*lit).first).getString() << " - style: " << ((*lit).second).getString() << endl; - } - } - OpenChams::Node* root = layout->getHBTreeRoot(); - if (root) { - cerr << " | + hbtree" << endl; - printHBTree(root, 2); - } - } - - - return 0; -} - diff --git a/vlsisapd/examples/openChams/inverter.xml b/vlsisapd/examples/openChams/inverter.xml deleted file mode 100644 index 49247179..00000000 --- a/vlsisapd/examples/openChams/inverter.xml +++ /dev/null @@ -1,130 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/vlsisapd/examples/openChams/python/CMakeLists.txt b/vlsisapd/examples/openChams/python/CMakeLists.txt deleted file mode 100644 index 6c430c43..00000000 --- a/vlsisapd/examples/openChams/python/CMakeLists.txt +++ /dev/null @@ -1 +0,0 @@ -INSTALL ( FILES driveOpenChams.py parseOpenChams.py DESTINATION share/doc/coriolis2/examples/vlsisapd/openChams ) diff --git a/vlsisapd/examples/openChams/python/driveOpenChams.py b/vlsisapd/examples/openChams/python/driveOpenChams.py deleted file mode 100644 index 95bcf9b2..00000000 --- a/vlsisapd/examples/openChams/python/driveOpenChams.py +++ /dev/null @@ -1,104 +0,0 @@ -from OPENCHAMS import * - -circuit = Circuit(Name("design"), Name("myTech")) -# value parameters -circuit.addParameter(Name("temp"), 27.0 ) -circuit.addParameter(Name("Vdd") , 1.2 ) -circuit.addParameter(Name("Vss") , 0.0 ) -circuit.addParameter(Name("L") , 0.1e-6) -circuit.addParameter(Name("Ids") , 30e-6 ) -circuit.addParameter(Name("Veg") , 0.12 ) -# equation parameters -circuit.addParameter(Name("complex"), "myEq") - -# netlist : -netlist = circuit.createNetlist() -# instances -# nmos1 -inst_nmos1 = netlist.addDevice("nmos1", "Transistor", 1, "NMOS", True) -inst_nmos1.addConnector("G") -inst_nmos1.addConnector("S") -inst_nmos1.addConnector("D") -tr_nmos1 = inst_nmos1.addTransistor("m1") -tr_nmos1.gate = "G" # the name of the connector of inst_nmos1 -tr_nmos1.source = "S" -tr_nmos1.drain = "D" -tr_nmos1.bulk = "S" -# pmos1 -inst_pmos1 = netlist.addDevice("pmos1", "Transistor", 2, "PMOS", True) -inst_pmos1.addConnector("G") -inst_pmos1.addConnector("S") -inst_pmos1.addConnector("D") -tr_pmos1 = inst_pmos1.addTransistor("m1") -tr_pmos1.gate = "G" # the name of the connector of inst_pmos1 -tr_pmos1.source = "S" -tr_pmos1.drain = "D" -tr_pmos1.bulk = "S" -# nets -_vdd = netlist.addNet("vdd", "power" , True) -_vss = netlist.addNet("vss", "ground" , True) -_in = netlist.addNet("in" , "logical", True) -_out = netlist.addNet("out", "logical", True) -_vdd.connectTo("pmos1", "S") -_vss.connectTo("nmos1", "S") -_in.connectTo ("nmos1", "G") -_in.connectTo ("pmos1", "G") -_out.connectTo("nmos1", "D") -_out.connectTo("pmos1", "D") -# schematic -schematic = circuit.createSchematic() -schematic.addInstance("nmos1", 2490, 2600, "ID") -schematic.addInstance("pmos1", 2490, 2300, "ID") -_vdd.addPort("inV" , 0, 2490, 2100, "ID") -_vss.addPort("inV" , 0, 2490, 2800, "MY") -_in.addPort ("inH" , 0, 2190, 2500, "ID") -_out.addPort("outH", 0, 2600, 2500, "ID") -wireVdd = _vdd.addWire() -wireVdd.setStartPoint("pmos1", "S") -wireVdd.setEndPoint(0) -wireVss = _vss.addWire() -wireVss.setStartPoint("nmos1", "S") -wireVss.setEndPoint(0) -wireIn0 = _in.addWire() -wireIn1 = _in.addWire() -wireIn0.setStartPoint("pmos1", "G") -wireIn0.setEndPoint ("nmos1", "G") -wireIn1.setStartPoint(0) -wireIn1.setEndPoint ("pmos1", "G") -wireOut0 = _out.addWire() -wireOut1 = _out.addWire() -wireOut0.setStartPoint("pmos1", "D") -wireOut0.setEndPoint ("nmos1", "D") -wireOut1.setStartPoint("nmos1", "D") -wireOut1.setEndPoint (0) -# sizing -sizing = circuit.createSizing() -op_pmos1 = sizing.addOperator("pmos1", "OPVG(Veg)" , "BSIM3V3") -op_pmos1.addConstraint("Temp", "design", "temp") -op_pmos1.addConstraint("Ids" , "design", "Ids" ) -op_pmos1.addConstraint("L" , "design", "L" ) -op_pmos1.addConstraint("Veg" , "design", "Veg" ) -op_pmos1.addConstraint("Vd" , "design", "Vdd", 0.5) -op_pmos1.addConstraint("Vs" , "design", "Vdd" ) -op_nmos1 = sizing.addOperator("nmos1", "OPW(Vg,Vs)", "BSIM3V3") -op_nmos1.addConstraint("Temp", "design", "temp") -op_nmos1.addConstraint("Ids" , "design", "Ids" ) -op_nmos1.addConstraint("L" , "design", "L" ) -op_nmos1.addConstraint("Vs" , "design", "Vdd" ) -op_nmos1.addConstraint("Vg" , "pmos1" , "Vg" ) -op_nmos1.addConstraint("Vd" , "pmos1" , "Vd" ) -op_nmos1.addConstraint("another", "myEq", -2.5 ) -# layout -layout = circuit.createLayout() -layout.addInstance("pmos1", "Common transistor") -layout.addInstance("nmos1", "Rotate transistor") -# create hbtree -g1 = Group("g1") -g1.align = Group.Align.VERTICAL -b1 = Bloc("nmos1", Node.Position.NONE, g1) -g1.rootNode = b1 -b2 = Bloc("pmos1", Node.Position.TOP, b1) -b1.top = b2 -layout.hbTreeRoot = g1 - -circuit.writeToFile("./myInverter.xml") diff --git a/vlsisapd/examples/openChams/python/parseOpenChams.py b/vlsisapd/examples/openChams/python/parseOpenChams.py deleted file mode 100644 index 9917da8c..00000000 --- a/vlsisapd/examples/openChams/python/parseOpenChams.py +++ /dev/null @@ -1,120 +0,0 @@ -import sys - -from OPENCHAMS import * - -def printHBTree(node, indent): - if node == None: - return - for i in range(indent): - print " |", - if isinstance(node, Bloc): - print " bloc:", node.getName(), "-", node.getPosition() - printHBTree(node.top , indent+1) - printHBTree(node.right, indent+1) - return - if isinstance(node, Group): - print " group:", node.getName(), "-", node.getPosition(), "-", node.align, "-", node.isolated, "-", node.paired - printHBTree(node.rootNode, indent+1) - printHBTree(node.top , indent+1) - printHBTree(node.right , indent+1) - return - -def printContents(circuit): - print circuit.name - # circuit parameters - print " + parameters" - for param in circuit.parameters.getValues(): - print " | |", param.key, ":", param.value - for param in circuit.parameters.getEqValues(): - print " | |", param.key, ":", param.value - # netlist - print " + netlist" - # instances - print " | + instances" - for instance in circuit.netlist.getInstances(): - if isinstance(instance, Device): - print " | | +", instance.name, ":", instance.model, instance.order, instance.mosType, instance.sourceBulkConnected - else: - print " | | +", instance.name, ":", instance.model, instance.order - print " | | | + connectors" - for conn in instance.getConnectors(): - print " | | | |", conn.key, ":", conn.value.name - if isinstance(instance, Device): - print " | | | + transistors" - for tr in instance.getTransistors(): - print " | | | | name:", tr.name, "- gate:", tr.gate, "- source:", tr.source, "- drain:", tr.drain, "- bulk:", tr.bulk - # nets - print " | + nets" - schematicNet = False - for net in circuit.netlist.getNets(): - print " | | +", net.name, ":", net.type, net.external - print " | | | + connections" - for conn in net.getConnections(): - print " | | | | %s.%s"%(conn.instanceName, conn.connectorName) - if not net.hasNoPorts() or not net.hasNoWires(): - schematicNet = True - # schematic - if (circuit.schematic): - print " + schematic" - for instance in circuit.schematic.getInstances(): - print " | + instance name:", instance.key, "- x:", instance.value.x, "- y:", instance.value.y, "- orientation:", instance.value.orientation - if schematicNet: - for net in circuit.netlist.getNets(): - if net.hasNoPorts() and net.hasNoWires(): - continue - print " | + net name:", net.name - for port in net.getPorts(): - print " | | + port type:", port.type, "- idx:", port.index, "- x:", port.x, "- y:", port.y, "- orientation:", port.orientation - for wire in net.getWires(): - if isinstance(wire.startPoint, InstancePoint): - print " | | + wire <" + wire.startPoint.name.getString() + "," + wire.startPoint.plug.getString() +">" - elif isinstance(wire.startPoint, PortPoint): - print " | | + wire <" + str(wire.startPoint.index) + ">" - else: - print " - - UNKNOWN START POINT" - for point in wire.getIntermediatePoints(): - print " | | <" + str(point.x) + "," + str(point.y) + ">" - if isinstance(wire.endPoint, InstancePoint): - print " | | <" + wire.endPoint.name.getString() + "," + wire.endPoint.plug.getString() +">" - elif isinstance(wire.endPoint, PortPoint): - print " | | <" + str(wire.endPoint.index) + ">" - else: - print " - - UNKNOWN END POINT" - # sizing - if (circuit.sizing): - print " + sizing" - for op in circuit.sizing.getOperators(): - print " | + instance name:", op.key, "- operator:", op.value.name, "- simulModel:", op.value.simulModel - for constraint in op.value.getConstraints(): - print " | | + param:", constraint.key, "- ref:", constraint.value.ref, "- refParam:", constraint.value.refParam, "- factor:", constraint.value.factor - print " | + equations" - for eq in circuit.sizing.getEquations(): - print " | |", eq.key, ":", eq.value - # layout - if (circuit.layout): - print " + layout" - for inst in circuit.layout.getInstances(): - print " | | instance name:", inst.key, "- style:", inst.value - if circuit.layout.hbTreeRoot != None: - print " | + hbtree" - printHBTree(circuit.layout.hbTreeRoot, 2) - -def usage(): - print "usage:", sys.argv[0], "[filename]" - sys.exit(48) - -def main(): - if len(sys.argv) == 1: - filename = "./inverter.xml" - elif len(sys.argv) == 2: - filename = sys.argv[1] - else: - usage() - - circuit = Circuit.readFromFile(filename) - printContents(circuit) - - -if __name__ == "__main__": - main() - diff --git a/vlsisapd/src/CMakeLists.txt b/vlsisapd/src/CMakeLists.txt index d84266d9..94c61eb7 100644 --- a/vlsisapd/src/CMakeLists.txt +++ b/vlsisapd/src/CMakeLists.txt @@ -1,15 +1,8 @@ ADD_SUBDIRECTORY(utilities) ADD_SUBDIRECTORY(agds) ADD_SUBDIRECTORY(cif) -IF(IS_DIRECTORY ${VLSISAPD_SOURCE_DIR}/src/openChams) - ADD_SUBDIRECTORY(openChams) -ENDIF(IS_DIRECTORY ${VLSISAPD_SOURCE_DIR}/src/openChams) -IF(IS_DIRECTORY ${VLSISAPD_SOURCE_DIR}/src/dtr) - ADD_SUBDIRECTORY(dtr) -ENDIF(IS_DIRECTORY ${VLSISAPD_SOURCE_DIR}/src/dtr) -IF(IS_DIRECTORY ${VLSISAPD_SOURCE_DIR}/src/spice) - ADD_SUBDIRECTORY(spice) -ENDIF(IS_DIRECTORY ${VLSISAPD_SOURCE_DIR}/src/spice) +ADD_SUBDIRECTORY(dtr) +ADD_SUBDIRECTORY(spice) ADD_SUBDIRECTORY(bookshelf) ADD_SUBDIRECTORY(configuration) ADD_SUBDIRECTORY(liberty) diff --git a/vlsisapd/src/openChams/CMakeLists.txt b/vlsisapd/src/openChams/CMakeLists.txt deleted file mode 100644 index 4b7537b5..00000000 --- a/vlsisapd/src/openChams/CMakeLists.txt +++ /dev/null @@ -1 +0,0 @@ -ADD_SUBDIRECTORY(src) diff --git a/vlsisapd/src/openChams/src/CMakeLists.txt b/vlsisapd/src/openChams/src/CMakeLists.txt deleted file mode 100644 index 0d86e749..00000000 --- a/vlsisapd/src/openChams/src/CMakeLists.txt +++ /dev/null @@ -1,70 +0,0 @@ -INCLUDE_DIRECTORIES( ${VLSISAPD_SOURCE_DIR}/src/openChams/src - ${LIBXML2_INCLUDE_DIR} - ${Boost_INCLUDE_DIRS} - ${PYTHON_INCLUDE_PATH} - ${HURRICANE_INCLUDE_DIR} - ) - -SET ( hpps vlsisapd/openChams/Circuit.h - vlsisapd/openChams/Netlist.h - vlsisapd/openChams/Instance.h - vlsisapd/openChams/Device.h - vlsisapd/openChams/Net.h - vlsisapd/openChams/Operator.h - vlsisapd/openChams/Parameters.h - vlsisapd/openChams/Schematic.h - vlsisapd/openChams/SimulModel.h - vlsisapd/openChams/Sizing.h - vlsisapd/openChams/Layout.h - vlsisapd/openChams/Node.h - vlsisapd/openChams/Transistor.h - vlsisapd/openChams/Port.h - vlsisapd/openChams/Wire.h - vlsisapd/openChams/OpenChamsException.h - vlsisapd/openChams/Equation.h - vlsisapd/openChams/HighLevelCstr.h - vlsisapd/openChams/NRCCstr.h - vlsisapd/openChams/DDP.h - vlsisapd/openChams/DesignerCstrOC.h - vlsisapd/openChams/SlicingTree.h - ) -SET ( cpps Circuit.cpp - Netlist.cpp - Instance.cpp - Device.cpp - Net.cpp - Operator.cpp - Parameters.cpp - Schematic.cpp - SimulModel.cpp - Sizing.cpp - Layout.cpp - Node.cpp - Transistor.cpp - Wire.cpp - Equation.cpp - HighLevelCstr.cpp - NRCCstr.cpp - DDP.cpp - DesignerCstrOC.cpp - SlicingTree.cpp - ) - SET ( pycpps PyOpenChams.cpp - ) - - ADD_LIBRARY(openChams ${cpps}) - TARGET_LINK_LIBRARIES(openChams ${LIBXML2_LIBRARIES}) - SET_TARGET_PROPERTIES(openChams PROPERTIES VERSION 1.0 SOVERSION 1) - INSTALL(TARGETS openChams DESTINATION lib${LIB_SUFFIX} ) - - IF(Boost_FOUND) - ADD_LIBRARY(pyOPENCHAMS MODULE ${pycpps}) - SET_TARGET_PROPERTIES(pyOPENCHAMS PROPERTIES - OUTPUT_NAME "OPENCHAMS" - PREFIX "" - ) - TARGET_LINK_LIBRARIES(pyOPENCHAMS openChams ${LIBXML2_LIBRARIES} ${Boost_LIBRARIES} ${PYTHON_LIBRARIES}) - INSTALL(TARGETS pyOPENCHAMS DESTINATION ${PYTHON_SITE_PACKAGES}) - ENDIF(Boost_FOUND) - - INSTALL(FILES ${hpps} DESTINATION include/vlsisapd/openChams) diff --git a/vlsisapd/src/openChams/src/Circuit.cpp b/vlsisapd/src/openChams/src/Circuit.cpp deleted file mode 100644 index 04b3a2d2..00000000 --- a/vlsisapd/src/openChams/src/Circuit.cpp +++ /dev/null @@ -1,1827 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2009-2018, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | Eric Lao | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Circuit.cpp" | -// +-----------------------------------------------------------------+ - -#include -#include -#include -#include -#include -using namespace std; - -#include - -#include "vlsisapd/openChams/Circuit.h" -#include "vlsisapd/openChams/Netlist.h" -#include "vlsisapd/openChams/Instance.h" -#include "vlsisapd/openChams/Device.h" -#include "vlsisapd/openChams/Net.h" -#include "vlsisapd/openChams/Schematic.h" -#include "vlsisapd/openChams/SimulModel.h" -#include "vlsisapd/openChams/Sizing.h" -#include "vlsisapd/openChams/Layout.h" -#include "vlsisapd/openChams/Node.h" -#include "vlsisapd/openChams/Transistor.h" -#include "vlsisapd/openChams/Operator.h" -#include "vlsisapd/openChams/Port.h" -#include "vlsisapd/openChams/Wire.h" -#include "vlsisapd/openChams/OpenChamsException.h" -#include "vlsisapd/openChams/Equation.h" -#include "vlsisapd/openChams/HighLevelCstr.h" -#include "vlsisapd/openChams/NRCCstr.h" -#include "vlsisapd/openChams/DDP.h" -#include "vlsisapd/openChams/DesignerCstrOC.h" - - -namespace OpenChams { - - - void tokenize ( const string& value, vector& tokens ) - { - string work; - - // First: remove all white spaces. - for ( size_t i=0 ; i 1 ) - tokens.push_back ( work.substr(tokenStart,tokenLength-1) ); - tokenStart = i+1; - tokenLength = 0; - } - } - if ( tokenLength > 1 ) - tokens.push_back ( work.substr(tokenStart,tokenLength-1) ); - } - - - bool headCompare ( const char* keyword, const string& token ) - { - const string skeyword (keyword); - if ( skeyword.empty() or token.empty() ) return false; - return (skeyword.compare(0,token.size(),token) == 0); - } - - - bool stringAsBool ( const string& s ) - { - string lower(s); - boost::algorithm::to_lower(lower); - - if ( headCompare("true" ,lower) or headCompare("1",lower) ) return true; - if ( headCompare("false",lower) or headCompare("0",lower) ) return false; - cerr << "[WARNING] Unknown booleean value <" << s << "> (treated as false)."<< endl; - return false; - } - - - long stringAsDirection ( const string& s ) - { - vector tokens; - tokenize(s,tokens); - - long directions = 0; - for ( size_t i=0 ; i (ignored)."<< endl; - } - - return directions; - } - - - string asStringBool ( bool b ) - { - return (b) ? "true" : "false"; - } - - - string asStringDirection ( long l ) - { - const char* directionNames[4] = { "west", "east", "south", "north" }; - - string directions; - for ( size_t i=0 ; i<4 ; ++i ) { - if ( l & (1<getInstanceName() < c2->getInstanceName(); } - - - bool InstanceNameSort(const Instance* i1, const Instance* i2) - { return i1->getName() < i2->getName(); } - - - bool NetNameSort(const Net* n1, const Net* n2) - { return n1->getName() < n2->getName(); } - - - // USEFUL // - void Circuit::check_uppercase(string& str, vector& compares, string message) - { - transform(str.begin(), str.end(), str.begin(), ::toupper); - bool equal = false; - for (size_t i = 0 ; i < compares.size() ; i++) { - if (str == compares[i]) { - equal = true; - } - } - if (!equal) { - throw OpenChamsException(message); - } - } - - - void Circuit::check_lowercase(string& str, vector& compares, string message) - { - transform(str.begin(), str.end(), str.begin(), ::tolower); - bool equal = false; - for (size_t i = 0 ; i < compares.size() ; i++) { - if (str == compares[i]) { - equal = true; - } - } - if (!equal) { - throw OpenChamsException(message); - } - } - - - void Circuit::addSimulModel(unsigned id, SimulModel::Base base, SimulModel::Version version, std::string filePath) - { - SimulModel* sim = new SimulModel(id, base, version, filePath); - map::iterator it = _simulModels.find(id); - if (it != _simulModels.end()) - throw OpenChamsException("[ERROR] Cannot define two SimulModels' models with the same ID."); - _simulModels[id] = sim; - } - - - string Circuit::readParameter(xmlNode* node, const xmlChar*& value) { - xmlChar* paramNameC = xmlGetProp(node, (xmlChar*)"name"); - value = xmlGetProp(node, (xmlChar*)"value"); - if (!paramNameC or !value) - throw OpenChamsException("[ERROR] 'parameter' node must have 'name' and 'value' properties."); - - return string((const char*)paramNameC); - } - - - string Circuit::readConnector(xmlNode* node) - { - xmlChar* connectorNameC = xmlGetProp(node, (xmlChar*)"name"); - if (!connectorNameC) - throw OpenChamsException("[ERROR] 'connector' node must have 'name' property."); - - return string((const char*)connectorNameC); - } - - - // CIRCUIT // - void Circuit::readSubCircuitsPaths(xmlNode* node) - { - if (readSubCircuitsPathsDone) { - cerr << "[WARNING] Only one 'subCircuitsPaths' node is allowed in circuit, others will be ignored." << endl; - return; - } - if (node->type == XML_ELEMENT_NODE && node->children) { - for (xmlNode* pathNode = node->children ; pathNode ; pathNode = pathNode->next) { - if (pathNode->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(pathNode->name, (xmlChar*)"path")) { - xmlChar* pathC = xmlGetProp(pathNode, (xmlChar*)"path"); - if (pathC) { - string path((const char*)pathC); - if (path[0] != '/') { // this is not an absolute path - path = _absolutePath+"/"+path; - } - _subCircuitsPaths.push_back(path); - } else { - throw OpenChamsException("[ERROR] 'path' node must have 'path' property."); - } - } else { - cerr << "[WARNING] Only 'path' nodes are allowed under 'subCircuitsPaths' node." << endl; - return; - } - } - } - } - readSubCircuitsPathsDone = true; - } - - void Circuit::readCircuitParameters(xmlNode* node) { - //cerr << "Circuit::readCircuitParameters()" << endl; - - if (readCircuitParametersDone) { - cerr << "[WARNING] Only one 'parameters' node is allowed in circuit, others will be ignored." << endl; - return; - } - if (node->type == XML_ELEMENT_NODE && node->children) { - for (xmlNode* paramNode = node->children ; paramNode ; paramNode = paramNode->next) { - if (paramNode->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(paramNode->name, (xmlChar*)"parameter")) { - const xmlChar* value = NULL; - string paramName = readParameter(paramNode, value); - if (paramName.empty()) return; // error - addParameter(paramName, (const char*)value); - } else { - cerr << "[WARNING] Only 'parameter' and 'parameterEq' nodes are allowed under 'parameters' node." << endl; - return; - } - } - } - } - readCircuitParametersDone = true; - } - - void Circuit::readSimulModels(xmlNode* node) { - if (readSimulModelsDone) { - cerr << "[WARNING] Only one 'simulModels' node is allowed in circuit, others will be ignored." << endl; - return; - } - if (node->type == XML_ELEMENT_NODE && node->children) { - for (xmlNode* modelNode = node->children ; modelNode ; modelNode = modelNode->next) { - if (modelNode->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(modelNode->name, (xmlChar*)"model")) { - const xmlChar* mIdC = xmlGetProp(modelNode, (xmlChar*)"id"); - const xmlChar* mBaseC = xmlGetProp(modelNode, (xmlChar*)"base"); - const xmlChar* mVersionC = xmlGetProp(modelNode, (xmlChar*)"version"); - const xmlChar* mFilePathC = xmlGetProp(modelNode, (xmlChar*)"filePath"); - if (mIdC && mBaseC && mVersionC && mFilePathC) { - unsigned id = stringAs(mIdC); - SimulModel::Base base = SimulModel::BSIM3V3; - string mBase((const char*)mBaseC); - string baseComp[3] = { "BSIM3V3", "BSIM4", "PSP" }; - vector baseComps(baseComp, baseComp+3); - check_uppercase(mBase, baseComps, "[ERROR] SimulModels models' base property must be \"BSIM3V3\", \"BSIM4\" or \"PSP\"."); - if (mBase == "BSIM3V3") { - base = SimulModel::BSIM3V3; - } else if (mBase == "BSIM4") { - base = SimulModel::BSIM4; - } else if (mBase == "PSP") { - base = SimulModel::PSP; - } else { - throw OpenChamsException("[ERROR] SimulModels models' base property must be \"BSIM3V3\", \"BSIM4\" or \"PSP\" (check_uppercase should have filtered that)."); - return; - } - SimulModel::Version version = SimulModel::UNDEFINED; - string mVersion((const char*)mVersionC); - string verComp[4] = { "UNDEFINED", "SVT", "HVT", "LVT" }; - vector verComps(verComp, verComp+4); - check_uppercase(mVersion, verComps, "[ERROR] SimulModels model's version property must be \"UNDEFINED\", \"SVT\", \"HVT\" or \"LVT\"."); - if (mVersion == "UNDEFINED") { - version = SimulModel::UNDEFINED; - } else if (mVersion == "SVT") { - version = SimulModel::SVT; - } else if (mVersion == "HVT") { - version = SimulModel::HVT; - } else if (mVersion == "LVT") { - version = SimulModel::LVT; - } else { - throw OpenChamsException("[ERROR] SimulModels models' version property must be \"UNDEFINED\", \"SVT\", \"HVT\" or \"LVT\" (check_uppercase should have filtered that)."); - return; - } - string filePath((const char*)mFilePathC); - addSimulModel(id, base, version, filePath); - // Ce simuModel DOIT être rataché au circuit !!! - } else { - throw OpenChamsException("[ERROR] 'model' node must have 'id', 'base', 'version' and 'filePath' properties."); - } - } else { - cerr << "[WARNING] Only 'model' nodes are allowed under 'simulModels' node." << endl; - return; - } - } - } - } - readSimulModelsDone = true; - } - - // NETLIST // - void Circuit::readNetList(xmlNode* node) { - if (readNetListDone) { - cerr << "[WARNING] Only one 'netlist' node is allowed in circuit, others will be ignored." << endl; - return; - } - Netlist* netlist = new Netlist(this); - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"instances")) { - readInstances(node, netlist); - } else if (xmlStrEqual(node->name, (xmlChar*)"nets")) { - readNets(node, netlist); - } else { - cerr << "[WARNING] Only 'instances' and 'nets' nodes are allowed in 'netlist', others will be ignored." << endl; - } - } - } - readNetListDone = true; - _netlist = netlist; - } - - // INSTANCES // - void Circuit::readInstances(xmlNode* node, Netlist* netlist) { - //cerr << " Circuit::readInstances()" << endl; - - if (readInstancesDone) { - cerr << "[WARNING] Only one 'instances' node is allowed in 'netlist', others will be ignored." << endl; - return; - } - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"instance")) { - readInstance(node, netlist); - } else { - cerr << "[WARNING] Only 'instance' nodes are allowed in 'instances', others will be ignored." << endl; - } - } - } - readInstancesDone = true; - } - - Instance* Circuit::readInstance(xmlNode* node, Netlist* netlist) { - xmlChar* iNameC = xmlGetProp(node, (xmlChar*)"name"); - xmlChar* iModelC = xmlGetProp(node, (xmlChar*)"model"); - xmlChar* iOrderC = xmlGetProp(node, (xmlChar*)"order"); - xmlChar* iMOSC = xmlGetProp(node, (xmlChar*)"mostype"); - xmlChar* iSBCC = xmlGetProp(node, (xmlChar*)"sourceBulkConnected"); - Instance* inst = NULL; - if (iNameC && iModelC && iOrderC && iMOSC && iSBCC) { // this is a device - const std::string& instanceName((const char*)iNameC); - const std::string& modelName((const char*)iModelC); - unsigned order = stringAs(iOrderC); - string mosStr((const char*)iMOSC); - string mosComp[2] = {"NMOS", "PMOS"}; - vector mosComps (mosComp, mosComp+2); - check_uppercase(mosStr, mosComps, "[ERROR] In 'instance', 'mostype' property must be 'NMOS' or 'PMOS'."); - string sourceBulkStr((const char*)iSBCC); - string sbcComp[4] = {"true", "false", "on", "off"}; - vector sbcComps(sbcComp, sbcComp+4); - check_lowercase(sourceBulkStr, sbcComps, "[ERROR] In 'instance', 'sourceBulkConnected' property must be 'true', 'false', 'on' or 'off'."); - bool sourceBulkConnected = ((sourceBulkStr == "true") || (sourceBulkStr == "on")) ? true : false; - inst = (Instance*)netlist->addDevice(instanceName, modelName, order, mosStr, sourceBulkConnected); - - //cerr << " - " << instanceName << " of model " << modelName << endl; - } else if (iNameC && iModelC && iOrderC && !iMOSC && !iSBCC) { // this is a subcircuit - const std::string& instanceName((const char*)iNameC); - const std::string& modelName((const char*)iModelC); - unsigned order = stringAs(iOrderC); - inst = netlist->addInstance(instanceName, modelName, order); - - //cerr << " - " << instanceName << " of model " << modelName << endl; - } else { - throw OpenChamsException("[ERROR] 'instance' node must have ('name', 'model' and 'order') or ('name', 'model', 'order', 'mostype' and 'sourceBulkConnected') properties."); - //return inst; - } - - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"connectors")) { - readInstanceConnectors(node, inst); - } else if (xmlStrEqual(node->name, (xmlChar*)"parameters")) { - readInstanceParameters(node, inst); - } else if (xmlStrEqual(node->name, (xmlChar*)"transistors")) { - if (!dynamic_cast(inst)) - throw OpenChamsException("[ERROR] Only device 'instance' (with 'mostype' and 'sourceBulkConnected' properties) can have 'transistors' section."); - readInstanceTransistors(node, static_cast(inst)); - } else { - //cerr << "[WARNING] Only 'parameters' node is allowed in 'instance', others will be ignored." << endl; - cerr << "[WARNING] Only 'conectors', 'transistors' and 'parameters' nodes are allowed in 'instance', others will be ignored." << endl; - } - } - } - return inst; - } - - void Circuit::readInstanceConnectors(xmlNode* node, Instance* inst) { - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"connector")) { - string connectorName = readConnector(node); - if (connectorName.empty()) return; // error - inst->addConnector(connectorName); - } - } - } - } - - void Circuit::readInstanceParameters(xmlNode* node, Instance* inst) { - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"parameter")) { - const xmlChar* value = NULL; - string paramName = readParameter(node, value); - if (paramName.empty()) return; // error - inst->addParameter(paramName, (const char*)value); - } else { - cerr << "[WARNING] Only 'parameter' and 'parameterEq' nodes are allowed under 'instance' node." << endl; - return; - } - } - } - } - - void Circuit::readInstanceTransistors(xmlNode* node, Device* dev) { - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"transistor")) { - readTransistor(node, dev); - } else { - cerr << "[WARNING] Only 'transistor' nodes are allowed in 'transistors', others will be ignored." << endl; - } - - } - } - } - - void Circuit::readTransistor(xmlNode* node, Device* dev) { - xmlChar* tNameC = xmlGetProp(node, (xmlChar*)"name"); - Transistor* trans = NULL; - if (tNameC) { - const std::string& tName((const char*)tNameC); - trans = dev->addTransistor(tName); - } else { - throw OpenChamsException("[ERROR] 'transistor' node must have 'name' property."); - //return inst; - } - - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"connection")) { - readTransistorConnection(node, trans); - } else if (xmlStrEqual(node->name, (xmlChar*)"parameters")) { - cerr << "Transistor parameters NOT SUPPORTED YET" << endl; - } else { - cerr << "[WARNING] Only 'conectors', 'transistors' and 'parameters' nodes are allowed in 'instance', others will be ignored." << endl; - } - } - } - } - - void Circuit::readTransistorConnection(xmlNode* node, Transistor* trans) { - xmlChar* gateC = xmlGetProp(node, (xmlChar*)"gate"); - xmlChar* sourceC = xmlGetProp(node, (xmlChar*)"source"); - xmlChar* drainC = xmlGetProp(node, (xmlChar*)"drain"); - xmlChar* bulkC = xmlGetProp(node, (xmlChar*)"bulk"); - if (gateC && sourceC && drainC && bulkC) { - const std::string& gateN ((const char*)gateC); - const std::string& sourceN((const char*)sourceC); - const std::string& drainN ((const char*)drainC); - const std::string& bulkN ((const char*)bulkC); - trans->setGate(gateN); - trans->setSource(sourceN); - trans->setDrain(drainN); - trans->setBulk(bulkN); - } else { - throw OpenChamsException("[ERROR] 'connection' node must have 'gate', 'source', 'drain' and 'bulk' properties."); - } - - } - - // NETS // - void Circuit::readNets(xmlNode* node, Netlist* netlist) { - if (readNetsDone) { - cerr << "[WARNING] Only one 'nets' node is allowed in 'netlist', others will be ignored." << endl; - return; - } - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"net")) { - readNet(node, netlist); - } else { - cerr << "[WARNING] Only 'net' nodes are allowed in 'nets', others will be ignored." << endl; - } - } - } - readNetsDone = true; - } - - Net* Circuit::readNet(xmlNode* node, Netlist* netlist) { - xmlChar* nNameC = xmlGetProp(node, (xmlChar*)"name"); - xmlChar* nTypeC = xmlGetProp(node, (xmlChar*)"type"); - xmlChar* nExternC = xmlGetProp(node, (xmlChar*)"isExternal"); - Net* net = NULL; - if (nNameC && nTypeC && nExternC) { - const std::string& netName((const char*)nNameC); - string typeStr((const char*)nTypeC); - string typeComp[3] = {"power", "ground", "logical"}; - vector typeComps(typeComp, typeComp+3); - check_lowercase(typeStr, typeComps, "[ERROR] In 'net', 'type' must be 'power', 'ground' or 'logical'."); - string externStr((const char*)nExternC); - string extComp[4] = {"true", "false", "on", "off"}; - vector extComps(extComp, extComp+4); - check_lowercase(externStr, extComps, "[ERROR] In 'net', 'isExternal' must be 'true', 'false', 'on' or 'off'."); - bool isExternal = ((externStr == "true") || (externStr == "on")) ? true : false; - net = netlist->addNet(netName, typeStr, isExternal); - } else { - throw OpenChamsException("[ERROR] 'net' node must have 'name', 'type' and 'isExternal' properties."); - //return net; - } - - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"connector")) { - readNetConnector(node, net); - } else { - cerr << "[WARNING] Only 'connector' nodes are allowed in 'net', others will be ignored." << endl; - return NULL; - } - } - } - return net; - } - - void Circuit::readNetConnector(xmlNode* node, Net* net) { - xmlChar* instanceNameC = xmlGetProp(node, (xmlChar*)"instance"); - xmlChar* connectorNameC = xmlGetProp(node, (xmlChar*)"name"); - if (instanceNameC && connectorNameC) { - const std::string& iName((const char*)instanceNameC); - const std::string& cName((const char*)connectorNameC); - Instance* inst = net->getNetlist()->getInstance(iName); - if (!inst) { - string error("[ERROR] no instance named \""); - error += iName; - error += "\" in connector of net \""; - error += net->getName(); - error += "\"."; - throw OpenChamsException(error); - //return; - } - //inst->connect(cName, net->getName()); - net->connectTo(iName, cName); - } else { - throw OpenChamsException("[ERROR] 'connector' node must have 'instance' and 'name' properties (for net)."); - } - } - - // SCHEMATIC // - void Circuit::readSchematic(xmlNode* node) { - if (readSchematicDone) { - cerr << "[WARNING] Only one 'schematic' node is allowed in circuit, others will be ignored." << endl; - return; - } - - Schematic* schematic = new Schematic(this); - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"instance")) { - readInstanceSchematic(node, schematic); - } else if (xmlStrEqual(node->name, (xmlChar*)"net")) { - readNetSchematic(node, this); - } else { - cerr << "[WARNING] Only 'instance' and 'nets' nodes are allowed in 'schematic', others will be ignored." << endl; - } - } - } - readSchematicDone = true; - _schematic = schematic; - } - - void Circuit::readInstanceSchematic(xmlNode* node, Schematic* schematic) { - xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name"); - xmlChar* xC = xmlGetProp(node, (xmlChar*)"x"); - xmlChar* yC = xmlGetProp(node, (xmlChar*)"y"); - xmlChar* orientC = xmlGetProp(node, (xmlChar*)"orient"); - if (nameC && xC && yC && orientC) { - const std::string& iName((const char*)nameC); - double x = stringAs((const char*)xC); - double y = stringAs((const char*)yC); - string orientStr((const char*)orientC); - string orientComp[8] = {"ID", "R1", "R2", "R3", "MX", "XR", "MY", "YR"}; - vector orientComps (orientComp, orientComp+8); - check_uppercase(orientStr, orientComps, "[ERROR] In 'schematic'.'instance', 'orient' must be 'ID', 'R1', 'R2', 'R3', 'MX', 'XR', 'MY' or 'YR'."); - schematic->addInstance(iName, x, y, orientStr); - } else { - throw OpenChamsException("[ERROR] 'instance' node in 'schematic' must have 'name', 'x', 'y' and 'orient' properties."); - } - } - - void Circuit::readNetSchematic(xmlNode* node, Circuit* circuit) { - xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name"); - if (nameC) { - const std::string& nName((const char*)nameC); - Net* net = circuit->getNetlist()->getNet(nName); - if (!net) { - string error ("[ERROR] In 'schematic' section cannot specify wires for net "); - error += nName; - error += " since it has not been defined in netlist section."; - throw OpenChamsException(error); - } - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"port")) { - readPortSchematic(node, net); - } else if (xmlStrEqual(node->name, (xmlChar*)"wire")) { - readWireSchematic(node, net); - } else { - cerr << "[WARNING] Only 'port' and 'wire' nodes are allowed in 'schematic'.'net', others will be ignored." << endl; - } - } - } - } else { - throw OpenChamsException("[ERROR] 'net' node in schematic must have 'name' property."); - } - } - - void Circuit::readPortSchematic(xmlNode* node, Net* net) { - xmlChar* typeC = xmlGetProp(node, (xmlChar*)"type"); - xmlChar* idxC = xmlGetProp(node, (xmlChar*)"idx"); - xmlChar* xC = xmlGetProp(node, (xmlChar*)"x"); - xmlChar* yC = xmlGetProp(node, (xmlChar*)"y"); - xmlChar* orientC = xmlGetProp(node, (xmlChar*)"orient"); - if (typeC && idxC && xC && yC && orientC) { - const std::string& pType((const char*)typeC); - unsigned idx = stringAs(idxC); - double x = stringAs(xC); - double y = stringAs(yC); - string orientStr((const char*)orientC); - string orientComp[8] = {"ID", "R1", "R2", "R3", "MX", "XR", "MY", "YR"}; - vector orientComps (orientComp, orientComp+8); - check_uppercase(orientStr, orientComps, "[ERROR] In 'schematic'.'port', 'orient' must be 'ID', 'R1', 'R2', 'R3', 'MX', 'XR', 'MY' or 'YR'."); - net->addPort(pType, idx, x, y, orientStr); - } else { - throw OpenChamsException("[ERROR] 'schematic'.'port' must have 'type', 'idx', 'x', 'y' and 'orient' properties."); - } - } - - void Circuit::readWireSchematic(xmlNode* node, Net* net) { - Wire* wire = net->addWire(); - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"connector")) { - xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name"); - xmlChar* plugC = xmlGetProp(node, (xmlChar*)"plug"); - xmlChar* idxC = xmlGetProp(node, (xmlChar*)"idx"); - if (nameC && plugC) { - const std::string& name((const char*)nameC); - const std::string& plug((const char*)plugC); - if (!wire->getStartPoint()) { - wire->setStartPoint(name, plug); - } else if (!wire->getEndPoint()) { - wire->setEndPoint(name, plug); - } else { - throw OpenChamsException("[ERROR] In 'schematic' a 'wire' must have exactly 2 connectors (not more)."); - } - } else if (idxC) { - unsigned idx = stringAs(idxC); - if (!wire->getStartPoint()) { - wire->setStartPoint(idx); - } else if (!wire->getEndPoint()) { - wire->setEndPoint(idx); - } else { - throw OpenChamsException("[ERROR] In 'schematic' a 'wire' must have exactly 2 connectors (not more)."); - } - - } else { - throw OpenChamsException("[ERROR] 'schematic'.'net'.'connector' node must have 'name' & 'plug' OR 'idx' properties. "); - } - } else if (xmlStrEqual(node->name, (xmlChar*)"point")) { - xmlChar* xC = xmlGetProp(node, (xmlChar*)"x"); - xmlChar* yC = xmlGetProp(node, (xmlChar*)"y"); - if (xC && yC) { - double x = stringAs(xC); - double y = stringAs(yC); - wire->addIntermediatePoint(x, y); // check is done inside the method (start/end points) - } else { - throw OpenChamsException("[ERROR] 'schematic'.'net'.'point' node must have 'x' and 'y' properties."); - } - } else { - cerr << "[WARNING] Only 'connector' and 'points' nodes are allowed in 'schematic'.'net'.'wire', others will be ignored." << endl; - } - } - } - } - - // SIZING // - void Circuit::readSizing(xmlNode* node) { - if (readSizingDone) { - cerr << "[WARNING] Only one 'sizing' node is allowed in circuit, others will be ignored." << endl; - return; - } - - Sizing* sizing = new Sizing(this); - //cerr << "** S ** " << node->name << ": " << node->type << endl; - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"instance")) { - readInstanceSizing(node, sizing); - } else if (xmlStrEqual(node->name, (xmlChar*)"equations")) { - readEquations(node, sizing); - } else { - cerr << "[WARNING] Only 'instance' and 'equations' nodes are allowed in 'sizing', others will be ignored." << endl; - } - } - } - readSizingDone = true; - _sizing = sizing; - } - - void Circuit::readInstanceSizing(xmlNode* node, Sizing* sizing) { - xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name"); - xmlChar* operatorC = xmlGetProp(node, (xmlChar*)"operator"); - xmlChar* simulModC = xmlGetProp(node, (xmlChar*)"simulModel"); - if (nameC && operatorC && simulModC) { - const std::string& iName ((const char*)nameC); - string opStr ((const char*)operatorC); - transform(opStr.begin(), opStr.end(), opStr.begin(), ::toupper); - const std::string& opName (opStr); - const std::string& simulMod((const char*)simulModC); - Operator* op = sizing->addOperator(iName, opName, simulMod); - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"constraint")) { - readConstraint(node, op); - } else { - cerr << "[WARNING] Only 'constraint' nodes are allowed in 'instance' of 'sizing', others will be ignored." << endl; - } - } - } - - } else { - throw OpenChamsException("[ERROR] 'instance' node in 'sizing' must have 'name', 'operator' and 'simulModel' properties."); - } - } - - void Circuit::readConstraint(xmlNode* node, Operator* op) { - // attributes of constraint may be : - // param ref refParam [factor] - // param refEquation [factor] - xmlChar* paramC = xmlGetProp(node, (xmlChar*)"param"); - xmlChar* refC = xmlGetProp(node, (xmlChar*)"ref"); - xmlChar* refParamC = xmlGetProp(node, (xmlChar*)"refParam"); - xmlChar* refEqC = xmlGetProp(node, (xmlChar*)"refEquation"); - xmlChar* factorC = xmlGetProp(node, (xmlChar*)"factor"); - if (paramC && refC && refParamC) { - const std::string& param ((const char*)paramC); - const std::string& ref ((const char*)refC); - const std::string& refParam ((const char*)refParamC); - double factor = 1.0; - if (factorC) { - factor = stringAs(factorC); - } - op->addConstraint(param, ref, refParam, factor); - } else if (paramC && refEqC) { - const std::string& param ((const char*)paramC); - const std::string& refEq ((const char*)refEqC); - double factor = 1.0; - if (factorC) { - factor = stringAs(factorC); - } - op->addConstraint(param, refEq, factor); - } else { - throw OpenChamsException("[ERROR] 'constraint' node must have 'param, ref, refParam, [factor]' or 'param, refEq, [factor]' properties."); - } - } - - void Circuit::readEquations(xmlNode* node, Sizing* sizing) { - xmlNode* child = node->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"cstr_circuit_level")) - readEquation_CircuitLevel(node, sizing); - else if (xmlStrEqual(node->name, (xmlChar*)"nrc_cstr")) - readEquation_NRC(node, sizing); - else if (xmlStrEqual(node->name, (xmlChar*)"ddps")) - readEquation_DDPs(node, sizing); - else if (xmlStrEqual(node->name, (xmlChar*)"cstr_designer")) - readEquation_DesignerCstr(node, sizing); - else { - throw OpenChamsException("[ERROR] 'cstr_circuit_level', 'nrc_cstr' and 'ddps' nodes are allowed in 'equations'."); - } - } - } - } - - void Circuit::readEquation_CircuitLevel(xmlNode* node, Sizing* sizing) { - if (node->type == XML_ELEMENT_NODE && node->children) { - for (xmlNode* eqNode = node->children ; eqNode ; eqNode = eqNode->next) { - if (eqNode->type == XML_ELEMENT_NODE && xmlStrEqual(eqNode->name, (xmlChar*)"cstr_cl")) { - xmlChar* nameC = xmlGetProp(eqNode, (xmlChar*)"name"); - xmlChar* equationC = xmlGetProp(eqNode, (xmlChar*)"equation"); - if (nameC && equationC) { - const std::string& eName ((const char*)nameC); - string eqStr ((const char*)equationC); - HighLevelCstr* equation = new HighLevelCstr(); - equation->addEquation(eqStr); - sizing->addEquation(eName, (Equation*)(equation)); - } - else - throw OpenChamsException("[ERROR] 'cstr_cl' node in 'equations' must have 'name' and 'equation' properties."); - } - } - } - } - - void Circuit::readEquation_DesignerCstr(xmlNode* node, Sizing* sizing) { - if (node->type == XML_ELEMENT_NODE && node->children) { - for (xmlNode* eqNode = node->children ; eqNode ; eqNode = eqNode->next) { - if (eqNode->type == XML_ELEMENT_NODE && xmlStrEqual(eqNode->name, (xmlChar*)"cstr_dsg")) { - xmlChar* nameC = xmlGetProp(eqNode, (xmlChar*)"name"); - xmlChar* equationC = xmlGetProp(eqNode, (xmlChar*)"equation"); - if (nameC && equationC) { - const std::string& eName ((const char*)nameC); - string eqStr ((const char*)equationC); - DesignerCstrOC* equation = new DesignerCstrOC(); - equation->addEquation(eqStr); - sizing->addEquation(eName, (Equation*)(equation)); - } - else - throw OpenChamsException("[ERROR] 'cstr_dsg' node in 'equations' must have 'name' and 'equation' properties."); - } - } - } - } - - void Circuit::readEquation_NRC(xmlNode* node, Sizing* sizing) { - // cerr << "NRC not yet managed" << endl; - - if (node->type == XML_ELEMENT_NODE && node->children) { - for (xmlNode* eqNode = node->children ; eqNode ; eqNode = eqNode->next) { - if (eqNode->type == XML_ELEMENT_NODE && xmlStrEqual(eqNode->name, (xmlChar*)"nrc")) { - xmlChar* nameC = xmlGetProp(eqNode, (xmlChar*)"name"); - xmlChar* paramC = xmlGetProp(eqNode, (xmlChar*)"param"); - xmlChar* equationC = xmlGetProp(eqNode, (xmlChar*)"equation"); - if (nameC && equationC && paramC) { - const std::string& eName ((const char*)nameC); - string eqStr ((const char*)equationC); - string paramStr ((const char*)paramC); - NRCCstr* equation = new NRCCstr(paramStr); - equation->addEquation(eqStr); - sizing->addEquation(eName, (Equation*)(equation)); - } - else - throw OpenChamsException("[ERROR] 'nrc' node in 'nrc_cstr' must have 'name', 'param' and 'equation' properties."); - } - } - } - - } - - void Circuit::readEquation_DDPs(xmlNode* node, Sizing* sizing) { - // cerr << "DDP not yet managed" << endl; - - if (node->type == XML_ELEMENT_NODE && node->children) { - for (xmlNode* eqNode = node->children ; eqNode ; eqNode = eqNode->next) { - if (eqNode->type == XML_ELEMENT_NODE && xmlStrEqual(eqNode->name, (xmlChar*)"ddp_i")) { - xmlChar* nameC = xmlGetProp(eqNode, (xmlChar*)"name"); - if (nameC) { - const std::string& eName ((const char*)nameC); - DDP* equation = new DDP(); - for(xmlNode* eqNode2 = eqNode->children ; eqNode2 ; eqNode2 = eqNode2->next) { - if (eqNode2->type == XML_ELEMENT_NODE && xmlStrEqual(eqNode2->name, (xmlChar*)"ddp_eq")) { - xmlChar* equationC = xmlGetProp(eqNode2, (xmlChar*)"equation"); - if (equationC) { - string eqStr ((const char*)equationC); - equation->addEquation(eqStr); - } - } - } - sizing->addEquation(eName, (Equation*)(equation)); - } - else - throw OpenChamsException("[ERROR] 'ddp_i' node in 'ddps' must have 'name' property."); - } - } - } - - } - - // ************************************************************************************* - - // LAYOUT // - void Circuit::readLayout(xmlNode* node) { - if (readLayoutDone) { - cerr << "[WARNING] Only one 'layout' node is allowed in circuit, others will be ignored." << endl; - return; - } - - Layout* layout = new Layout(this); - xmlNode* child = node->children; - //cerr << "** L ** " << node->name << ": " << node->type << endl; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"instance")) { - readInstanceLayout(node, layout); - } else if (xmlStrEqual(node->name, (xmlChar*)"hbtree")) { - readHBTree(node, layout); - } else { - cerr << "[WARNING] Only 'instance' and 'hbtree' nodes are allowed in 'layout' section, others will be ignored." << endl; - } - } - } - readLayoutDone = true; - _layout = layout; - } - - void Circuit::readInstanceLayout(xmlNode* node, Layout* layout) { - xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name"); - xmlChar* styleC = xmlGetProp(node, (xmlChar*)"style"); - if (nameC && styleC) { - const std::string& iName ((const char*)nameC); - const std::string& styleName ((const char*)styleC); - layout->addInstance(iName, styleName); - } else { - throw OpenChamsException("[ERROR] 'instance' node in 'layout' must have 'name' and 'style' properties."); - } - } - - void Circuit::readHBTree(xmlNode* node, Layout* layout) { - // HBTree node can have only one child (group or bloc) - xmlNode* child = node->children; - if (child->type == XML_ELEMENT_NODE) { - // create root node - // thanks to readNodeOrBloc - Node* root = readNodeOrBloc(child); - // save root node in layout - layout->setHBTreeRoot(root); - } - } - - Node* Circuit::readNodeOrBloc(xmlNode* node, Node* parent) { - // 1 - create Node based on xmlNode* passed as argument - if (node->type == XML_ELEMENT_NODE) { - bool isAGroup = xmlStrEqual(node->name, (xmlChar*)"group"); - xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name"); - xmlChar* posiC = xmlGetProp(node, (xmlChar*)"position"); - if (!nameC) - throw OpenChamsException("[ERROR] 'bloc' and 'group' nodes in 'hbtree' must have at least a 'name' property."); - Node* nodeOC = NULL; - const std::string& name ((const char*)nameC); - Node::Position pos = Node::NONE; - if (posiC) { - string posStr ((const char*)posiC); - if (posStr == "right") pos = Node::RIGHT; - else if (posStr == "top") pos = Node::TOP; - else throw OpenChamsException("[ERROR] 'position' property of 'bloc' and 'group' nodes must be 'right' or 'top'."); - } - if (isAGroup) { - Group* groupOC = new Group(name, pos, parent); - xmlChar* isolatC = xmlGetProp(node, (xmlChar*)"isolation"); - xmlChar* alignC = xmlGetProp(node, (xmlChar*)"align"); - xmlChar* pairedC = xmlGetProp(node, (xmlChar*)"paired"); - if (isolatC) { - string isolation ((const char*)isolatC); - if (isolation == "true") groupOC->setIsolated(true); - else if (isolation == "false") groupOC->setIsolated(false); - else throw OpenChamsException("[ERROR] 'isolation' property of 'group' node must be 'true' or 'false'."); - } - if (alignC) { - string align ((const char*)alignC); - Group::Align galign = Group::NONE; - if (align == "vertical") galign = Group::VERTICAL; - else if (align == "horizontal") galign = Group::HORIZONTAL; - else throw OpenChamsException("[ERROR] 'align' property of 'group' node must be 'vertical' or 'horizontal'."); - groupOC->setAlign(galign); - } - if (pairedC) { - string paired ((const char*)pairedC); - if (paired == "true") groupOC->setPaired(true); - else if (paired == "false") groupOC->setPaired(false); - else throw OpenChamsException("[ERROR] 'paired' property of 'group' node must be 'true' or 'false'."); - } - nodeOC = groupOC; - } else { - nodeOC = new Bloc(name, pos, parent); - } - // 2 - for each children (up to 2) readNodeOrBloc - for (xmlNode* child = node->children; child; child = child->next) { - if (child->type == XML_ELEMENT_NODE) { - Node* childOC = readNodeOrBloc(child, nodeOC); - // 3 - add to returned Node* to current Node* as right or top children (based on its position) - switch(childOC->getPosition()) { - case Node::RIGHT: - nodeOC->setRight(childOC); - break; - case Node::TOP: - nodeOC->setTop(childOC); - break; - case Node::NONE: - if (!isAGroup) - throw OpenChamsException("[ERROR] a 'bloc' or 'group' without position is only allowed directly under a 'group'."); - Group* groupOC = dynamic_cast(nodeOC); - groupOC->setRootNode(childOC); - } - } - } - // 4 - return current Node - return nodeOC; - } - return NULL; - } - - void Circuit::setAbsolutePath(const string filePath) { - if (filePath[0] == '/') - _absolutePath = filePath; - else { - _absolutePath = string(getenv("PWD"))+"/"+filePath; - } - size_t found = _absolutePath.find_last_of("/"); - _absolutePath = _absolutePath.substr(0, found); - } - - - // SLICINGTREE // - void Circuit::readSlicingTree(xmlNode* node) { - if (readSlicingTreeDone) { - cerr << "[WARNING] Only one 'slicingtree' is allowed in circuit, others will be ignored." << endl; - return; - } - _slicingtree = readSlicingNode(node); - readSlicingTreeDone = true; - } - - SlicingNode* Circuit::readSlicingNode(xmlNode* xnode, SlicingNode* slicingNode) { - SlicingNode* snode = NULL; - - xmlNode* child = xnode->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name , (xmlChar*)"vertical" )) { - snode = createVerticalSlicingNode (node, slicingNode); - } else if (xmlStrEqual(node->name , (xmlChar*)"horizontal")) { - snode = createHorizontalSlicingNode(node, slicingNode); - } else if (xmlStrEqual(node->name , (xmlChar*)"device" )) { - snode = createDeviceSlicingNode (node, slicingNode); - } else if (xmlStrEqual(node->name , (xmlChar*)"routing" )) { - snode = createRoutingSlicingNode (node, slicingNode); - } else if (!xmlStrEqual(node->name, (xmlChar*)"comment" )) { - cerr << "[WARNING] Unknown " << node->name << " node in 'slicingtree' section, it will be ignored." << endl; - } - } - } - return snode; - } - - VSlicingNode* Circuit::createVerticalSlicingNode (xmlNode* xnode, SlicingNode* slicingNode) { - VSlicingNode* vnode = VSlicingNode::create(slicingNode); - - xmlNode* child = xnode->children; - for (xmlNode* node = child; node; node = node->next) { - if (xmlStrEqual(node->name , (xmlChar*)"parameters")) { - setHVParameters(node, vnode); - } else if (xmlStrEqual(node->name, (xmlChar*)"symmetries")) { - setHVSymmetries(node, vnode); - } else if (xmlStrEqual(node->name, (xmlChar*)"children" )) { - addChildren(node, vnode); - } else if (!xmlStrEqual(node->name,(xmlChar*)"comment" )) { - cerr << "[WARNING] Unknown " << node->name << " node in 'vertical' section, it will be ignored." << endl; - } - } - return vnode; - } - - HSlicingNode* Circuit::createHorizontalSlicingNode (xmlNode* xnode, SlicingNode* slicingNode) { - HSlicingNode* hnode = HSlicingNode::create(slicingNode); - - xmlNode* child = xnode->children; - for (xmlNode* node = child; node; node = node->next) { - if (xmlStrEqual(node->name, (xmlChar*)"children")) { - addChildren(node, hnode); - } else if (xmlStrEqual(node->name , (xmlChar*)"parameters")) { - setHVParameters(node, hnode); - } else if (xmlStrEqual(node->name , (xmlChar*)"symmetries")) { - setHVSymmetries(node, hnode); - } else if (!xmlStrEqual(node->name, (xmlChar*)"comment" )){ - cerr << "[WARNING] Unknown " << node->name << " node in 'horizontal' section, it will be ignored." << endl; - } - } - return hnode; - } - - void Circuit::addChildren (xmlNode* xnode, HVSlicingNode* hvnode) { - xmlNode* child = xnode->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name , (xmlChar*)"vertical" )) { - hvnode->push_back(createVerticalSlicingNode (node, hvnode)); - } else if (xmlStrEqual(node->name , (xmlChar*)"horizontal")) { - hvnode->push_back(createHorizontalSlicingNode(node, hvnode)); - } else if (xmlStrEqual(node->name , (xmlChar*)"device" )) { - hvnode->push_back(createDeviceSlicingNode (node, hvnode)); - } else if (xmlStrEqual(node->name , (xmlChar*)"routing" )) { - hvnode->push_back(createRoutingSlicingNode (node, hvnode)); - } else if (!xmlStrEqual(node->name, (xmlChar*)"comment" )){ - cerr << "[WARNING] Unknown " << node->name << " node in 'slicingtree' section, it will be ignored." << endl; - } - } - } - } - - void Circuit::setHVParameters (xmlNode* xnode, HVSlicingNode* hvnode) { - bool toleranceRatioHSet = false; - bool toleranceRatioWSet = false; - bool toleranceBandHSet = false; - bool toleranceBandWSet = false; - - xmlNode* child = xnode->children; - for (xmlNode* node = child; node; node = node->next) { - xmlChar* typeC = xmlGetProp(node, (xmlChar*)"type"); - - if (typeC) { - string type ((const char*)typeC); - - if (type == "alignment") { - xmlChar* alignmentC = xmlGetProp(node, (xmlChar*)"alignment"); - if (alignmentC){ - string alignment ((const char*)alignmentC); - hvnode->setAlignment(alignment); - } - } else if (type == "toleranceBandH") { - xmlChar* toleranceBandHC = xmlGetProp(node, (xmlChar*)"toleranceBandH"); - if (toleranceBandHC){ - string toleranceBandH ((const char*)toleranceBandHC); - hvnode->setToleranceBandH(toleranceBandH); - toleranceBandHSet = true; - } - } else if (type == "toleranceBandW") { - xmlChar* toleranceBandWC = xmlGetProp(node, (xmlChar*)"toleranceBandW"); - if (toleranceBandWC){ - string toleranceBandW ((const char*)toleranceBandWC); - hvnode->setToleranceBandW(toleranceBandW); - toleranceBandWSet = true; - } - } else if (type == "toleranceRatioH") { - xmlChar* toleranceRatioHC = xmlGetProp(node, (xmlChar*)"toleranceRatioH"); - if (toleranceRatioHC){ - string toleranceRatioH ((const char*)toleranceRatioHC); - hvnode->setToleranceRatioH(toleranceRatioH); - toleranceRatioHSet = true; - } - } else if (type == "toleranceRatioW") { - xmlChar* toleranceRatioWC = xmlGetProp(node, (xmlChar*)"toleranceRatioW"); - if (toleranceRatioWC){ - string toleranceRatioW ((const char*)toleranceRatioWC); - hvnode->setToleranceRatioW(toleranceRatioW); - toleranceRatioWSet = true; - } - } else if (!xmlStrEqual(node->name, (xmlChar*)"comment" )){ - cerr << "[WARNING] Unknown " << node->name << " node in 'HVparameters' section, it will be ignored." << endl; - } - } - } - - if (!hvnode->isRoot()){ - if (!toleranceRatioHSet){ - hvnode->setToleranceRatioH(hvnode->getParent()->getToleranceRatioH()); - } - if (!toleranceRatioWSet){ - hvnode->setToleranceRatioW(hvnode->getParent()->getToleranceRatioW()); - } - if (!toleranceBandHSet){ - hvnode->setToleranceBandH(hvnode->getParent()->getToleranceBandH()); - } - if (!toleranceBandWSet){ - hvnode->setToleranceBandW(hvnode->getParent()->getToleranceBandW()); - } - } - } - - void Circuit::setHVSymmetries (xmlNode* xnode, HVSlicingNode* hvnode) { - xmlNode* child = xnode->children; - for (xmlNode* node = child; node; node = node->next) { - xmlChar* sourceC = xmlGetProp(node, (xmlChar*)"source"); - xmlChar* targetC = xmlGetProp(node, (xmlChar*)"target"); - if ((sourceC)&&(targetC)) { - string source ((const char*)sourceC); - string target ((const char*)targetC); - hvnode->addSymmetry(source, target); - } else if (!xmlStrEqual(node->name, (xmlChar*)"comment" )){ - cerr << "[WARNING] Unknown " << node->name << " node in 'HVsymmetries' section, it will be ignored." << endl; - } - } - } - - DSlicingNode* Circuit::createDeviceSlicingNode (xmlNode* xnode, SlicingNode* slicingNode) { - DSlicingNode* dnode = NULL; - - xmlChar* instanceNameC = xmlGetProp(xnode, (xmlChar*)"instance"); - if (instanceNameC){ - string instanceName ((const char*)instanceNameC); - dnode = DSlicingNode::create( instanceName, slicingNode ); - - xmlNode* child = xnode->children; - for (xmlNode* node = child; node; node = node->next) { - xmlChar* typeC = xmlGetProp(node, (xmlChar*)"type"); - if (typeC) { - string type ((const char*)typeC); - - if (type == "alignment") { - xmlChar* alignmentC = xmlGetProp(node, (xmlChar*)"alignment"); - if (alignmentC){ - string alignment ((const char*)alignmentC); - dnode->setAlignment(alignment); - } - } else if (type == "preset") { - xmlChar* presetC = xmlGetProp(node, (xmlChar*)"preset"); - if (presetC){ - string preset ((const char*)presetC); - dnode->setPreset(preset); - } - } else if (type == "nfing") { - xmlChar* nfingC = xmlGetProp(node, (xmlChar*)"nfing"); - if (nfingC){ - string nfing ((const char*)nfingC); - dnode->setNFing(nfing); - } - } else if (type == "x") { - xmlChar* xC = xmlGetProp(node, (xmlChar*)"x"); - if (xC){ - string x ((const char*)xC); - dnode->setX(x); - } - } else if (type == "y") { - xmlChar* yC = xmlGetProp(node, (xmlChar*)"y"); - if (yC){ - string y ((const char*)yC); - dnode->setY(y); - } - } else if (type == "nodeSets") { - xmlChar* startC = xmlGetProp(node, (xmlChar*)"start"); - xmlChar* stepC = xmlGetProp(node, (xmlChar*)"step"); - xmlChar* countC = xmlGetProp(node, (xmlChar*)"count"); - if ( (startC) && (stepC) && (countC) ){ - string start ((const char*)startC); - string step ((const char*)stepC); - string count ((const char*)countC); - dnode->setStart(start); - dnode->setStep (step); - dnode->setCount(count); - } - } else - cerr << "[WARNING] Unknown " << type << " type in 'device/parameter' section, it will be ignored." << endl; - } else if (!xmlStrEqual(node->name, (xmlChar*)"comment" )){ - cerr << "[WARNING] Unknown " << node->name << " node in 'device' section, it will be ignored." << endl; - } - } - } - return dnode; - } - - RSlicingNode* Circuit::createRoutingSlicingNode (xmlNode* xnode, SlicingNode* slicingNode) { - RSlicingNode* rnode = NULL; - xmlChar* valueC = xmlGetProp(xnode, (xmlChar*)"value"); - if (valueC){ - string value ((const char*)valueC); - rnode = RSlicingNode::create(value, slicingNode); - } - return rnode; - } - - Circuit* Circuit::readFromFile(const string filePath) { - LIBXML_TEST_VERSION; - Circuit* cir = NULL; - - xmlDoc* doc = xmlReadFile(filePath.c_str(), NULL, XML_PARSE_NOBLANKS); - if (doc == NULL) { - string error ("[ERROR] Failed to parse: "); - error += filePath; - throw OpenChamsException(error); - //return NULL; - } - xmlNode* rootElement = xmlDocGetRootElement(doc); - if (rootElement->type == XML_ELEMENT_NODE && xmlStrEqual(rootElement->name, (xmlChar*)"circuit")) { - xmlChar* circuitNameC = xmlGetProp(rootElement, (xmlChar*)"name"); - xmlChar* technoNameC = xmlGetProp(rootElement, (xmlChar*)"techno"); - - if (circuitNameC && technoNameC) { - const std::string& circuitName ((const char*)circuitNameC); - const std::string& technoName ((const char*)technoNameC); - cir = new Circuit(circuitName, technoName); - } else { - throw OpenChamsException("[ERROR] 'circuit' node must have 'name' and 'techno' properties."); - return NULL; - } - cir->setAbsolutePath(filePath); - - xmlNode* child = rootElement->children; - for (xmlNode* node = child; node; node = node->next) { - if (node->type == XML_ELEMENT_NODE) { - if (xmlStrEqual(node->name, (xmlChar*)"subCircuitsPaths")) { - cir->readSubCircuitsPaths(node); - } - else if (xmlStrEqual(node->name, (xmlChar*)"parameters")) { - cir->readCircuitParameters(node); - } - else if (xmlStrEqual(node->name, (xmlChar*)"simulModels")) { - cir->readSimulModels(node); - } - else if (xmlStrEqual(node->name, (xmlChar*)"netlist")) { - cir->readNetList(node); - } - else if (xmlStrEqual(node->name, (xmlChar*)"schematic")) { - cir->readSchematic(node); - } - else if (xmlStrEqual(node->name, (xmlChar*)"sizing")) { - cir->readSizing(node); - } - else if (xmlStrEqual(node->name, (xmlChar*)"layout")) { - cir->readLayout(node); - } - else if (xmlStrEqual(node->name, (xmlChar*)"slicingtree")) { - cir->readSlicingTree(node); - } - else { - string error("[ERROR] Unknown section "); - error += string((const char*)node->name); - error += " in circuit description."; - throw OpenChamsException(error); - return NULL; - } - } - } - } - if (!readNetListDone) { - throw OpenChamsException("[ERROR] no section was found in parsed file !"); - } - return cir; - } - - Netlist* Circuit::createNetlist() { - if (_netlist) - throw OpenChamsException("[ERROR] Cannot create two netlists in one circuit."); - - _netlist = new Netlist(this); - if (!_netlist) - throw OpenChamsException("[ERROR] Cannot create netlist."); - - return _netlist; - } - - Schematic* Circuit::createSchematic() { - if (_schematic) - throw OpenChamsException("[ERROR] Cannot create two scheamtics in one circuit."); - - _schematic = new Schematic(this); - if (!_schematic) - throw OpenChamsException("[ERROR] Cannot create schematic."); - - return _schematic; - } - - Sizing* Circuit::createSizing() { - if (_sizing) - throw OpenChamsException("[ERROR] Cannot create two sizings in one circuit."); - - _sizing = new Sizing(this); - if (!_sizing) - throw OpenChamsException("[ERROR] Cannot create sizing."); - - return _sizing; - } - - Layout* Circuit::createLayout() { - if (_layout) - throw OpenChamsException("[ERROR] Cannot create two layouts in one circuit."); - - _layout = new Layout(this); - if (!_layout) - throw OpenChamsException("[ERROR] Cannot create layout."); - - return _layout; - } - - void Circuit::setSlicingTree( SlicingNode* slicingtree ) { - if (_slicingtree) - throw OpenChamsException("[ERROR] Cannot create two slicing trees in one circuit."); - - _slicingtree = slicingtree; - if (!_slicingtree) - throw OpenChamsException("[ERROR] Cannot create slicingtree."); - - } - - void Circuit::driveHBTree(ofstream& file, Node* node, unsigned indent) { - if (!node) return; - for (unsigned i = 0 ; i < indent ; i++) - file << " "; - string pos = ""; - switch(node->getPosition()) { - case OpenChams::Node::TOP: - pos = "top"; - break; - case OpenChams::Node::RIGHT: - pos = "right"; - break; - default: - break; - } - - Bloc* bloc = dynamic_cast(node); - if (bloc) { - file << "getName() << "\""; - if (pos != "") - file << " position=\"" << pos << "\""; - if (bloc->getTop() == NULL && bloc->getRight() == NULL) - file << "/>" << endl; - else { - file << ">" << endl; - driveHBTree(file, bloc->getTop() , indent+1); - driveHBTree(file, bloc->getRight(), indent+1); - for (unsigned i = 0 ; i < indent ; i++) - file << " "; - file << "" << endl; - } - return; - } - Group* group = dynamic_cast(node); - if (group) { - string align = ""; - switch(group->getAlign()) { - case OpenChams::Group::VERTICAL: - align = "vertical"; - break; - case OpenChams::Group::HORIZONTAL: - align = "horizontal"; - break; - default: - break; - } - file << "getName() << "\""; - if (pos != "") file << " position=\"" << pos << "\""; - if (align != "") file << " align=\"" << align << "\""; - if (group->isIsolated()) file << " isolated=\"true\""; - if (group->isPaired()) file << " paired=\"true\""; - file << ">" << endl; - driveHBTree(file, group->getRootNode(), indent+1); - driveHBTree(file, group->getTop() , indent+1); - driveHBTree(file, group->getRight() , indent+1); - for (unsigned i = 0 ; i < indent ; i++) - file << " "; - file << "" << endl; - return; - } - } - - void Circuit::driveSlicingTree(ofstream& file, SlicingNode* snode, unsigned indent) { - if (!snode) return; - for (unsigned i = 0 ; i < indent ; i++){ file << " "; } - file << "" << endl; - - snode->toXML(file, indent+1); - - for (unsigned i = 0 ; i < indent ; i++){ file << " "; } - file << "" << endl; - } - - bool Circuit::writeToFile(string filePath) { - ofstream file; - file.open(filePath.c_str()); - if (!file.is_open()) { - string error("[ERROR] Cannot open file "); - error += filePath; - error += " for writing."; - throw OpenChamsException(error); - } - // checks before do anything - if (!_netlist) { - //cerr << "no netlist" << endl; cerr.flush(); - throw OpenChamsException("[ERROR] Cannot writeToFile since no netlist is defined !"); - //return false; - } - if (_netlist->hasNoInstances()) { - //cerr << "no instances" << endl; cerr.flush(); - throw OpenChamsException("[ERROR] Cannot writeToFile since no instance is defined in netlist !"); - //return false; - } - if (_netlist->hasNoNets()) { - //cerr << "no nets" << endl; cerr.flush(); - throw OpenChamsException("[ERROR] Cannot writeToFile since no net is defined in netlist !"); - //return false; - } - - file << "" << endl - << "" << endl; - if (_subCircuitsPaths.size() != 0) { - file << " " << endl; - for (size_t i = 0 ; i < _subCircuitsPaths.size() ; i++ ) { - file << " " << endl; - } - file << " " << endl; - } - if (!_params.isEmpty()) { - file << " " << endl; - for (map::const_iterator it = _params.getValues().begin() ; it != _params.getValues().end() ; ++it) { - file << " " << endl; - } - //cerr << "_params.getValues().size() = " << _params.getValues().size() << endl; - file << " " << endl; - } - file << " " << endl - << " " << endl; - vector instances = _netlist->getInstances(); - sort(instances.begin(), instances.end(), InstanceNameSort); // sort based on instances' names - for (vector::iterator it = instances.begin() ; it != instances.end() ; ++it) { - Instance* inst = (*it); - Device* dev = dynamic_cast(inst); - if (inst->hasNoConnectors()) { - string error("[ERROR] Cannot writeToFile since instance ("); - error += inst->getName(); - error += ") has no connectors !"; - throw OpenChamsException(error); - //return false; - } - if (dev && dev->hasNoTransistors()) { - string error("[ERROR] Cannot writeToFile since device instance ("); - error += dev->getName(); - error += ") has no transistors !"; - throw OpenChamsException(error); - } - if (dev) { - string sourceBulkStr = (dev->isSourceBulkConnected()) ? "True" : "False"; - file << " getName() << "\" model=\"" << dev->getModel() << "\" mostype=\"" << dev->getMosType() << "\" sourceBulkConnected=\"" << sourceBulkStr << "\" order=\"" << dev->getOrder() << "\">" << endl; - } else { - file << " getName() << "\" model=\"" << inst->getModel() << "\" order=\"" << inst->getOrder() << "\">" << endl; - } - file << " " << endl; - for (map::const_iterator it = inst->getConnectors().begin() ; it != inst->getConnectors().end() ; ++it) { - file << " " << endl; - } - file << " " << endl; - if (dev) { - file << " " << endl; - for (vector::const_iterator it = dev->getTransistors().begin() ; it != dev->getTransistors().end() ; ++it ) { - Transistor* tr = (*it); - file << " getName() << "\">" << endl - << " getGate() << "\" source=\"" << tr->getSource() << "\" drain=\"" << tr->getDrain() << "\" bulk=\"" << tr->getBulk() << "\"/>" << endl - << " " << endl; - } - file << " " << endl; - } - if (!inst->getParameters().isEmpty()) { - Parameters params = inst->getParameters(); - file << " " << endl; - for (map::const_iterator it = params.getValues().begin() ; it != params.getValues().end() ; ++it) { - file << " " << endl; - } - file << " " << endl; - } - file << " " << endl; - } - file << " " << endl - << " " << endl; - bool schematicNets = false; // to know if net sections in schematic are needed - vector nets = _netlist->getNets(); - sort(nets.begin(), nets.end(), NetNameSort); // sort based on nets' names - for (vector::iterator it = nets.begin() ; it != nets.end() ; ++it) { - Net* net = (*it); - if (net->hasNoConnections()) { - string error("[ERROR] Cannot writeToFile since net ("); - error += net->getName(); - error += ") has no connectors !"; - throw OpenChamsException(error); - //return false; - } - if (!net->hasNoPorts() || !net->hasNoWires()) - schematicNets = true; - string externStr = (net->isExternal()) ? "True" : "False"; - file << " getName() << "\" type=\"" << net->getType() << "\" isExternal=\"" << externStr << "\">" << endl; - vector connections = net->getConnections(); - sort(connections.begin(), connections.end(), ConnectionsSort); - for (vector::iterator it = connections.begin() ; it != connections.end() ; ++it) { - file << " getInstanceName() << "\" name=\"" << (*it)->getConnectorName() << "\"/>" << endl; - } - file << " " << endl; - } - file << " " << endl; - file << " " << endl; - if (_schematic && !_schematic->hasNoInstances()) { - file << " " << endl; - for (map::const_iterator it = _schematic->getInstances().begin() ; it != _schematic->getInstances().end(); ++it ) { - Schematic::Infos* infos = (*it).second; - file << " getX() << "\" y=\"" << infos->getY() << "\" orient=\"" << infos->getOrientation() << "\"/>" << endl; - } - if (schematicNets) { - for (size_t i = 0 ; i < nets.size() ; i++) { - Net* net = nets[i]; - if (net->hasNoPorts() && net->hasNoWires()) - continue; - file << " getName() << "\">" << endl; - for (size_t j = 0 ; j < net->getPorts().size() ; j++) { - Port* port = net->getPorts()[j]; - if (!port) - continue; - file << " getType() << "\" idx=\"" << port->getIndex() << "\" x=\"" << port->getX() << "\" y=\"" << port->getY() << "\" orient=\"" << port->getOrientation() << "\"/>" << endl; - } - for (size_t j = 0 ; j < net->getWires().size() ; j++) { - Wire* wire = net->getWires()[j]; - file << " " << endl; - WirePoint* start = wire->getStartPoint(); - WirePoint* end = wire->getEndPoint(); - // start point - if (dynamic_cast(start)) { - InstancePoint* iP = static_cast(start); - file << " getName() << "\" plug=\"" << iP->getPlug() << "\"/>" << endl; - } else if (dynamic_cast(start)) { - PortPoint* pP = static_cast(start); - file << " getIndex() << "\"/>" << endl; - } else { - throw OpenChamsException("[ERROR] Wire start point is nor an InstancePoint nor a PortPoint."); - } - // intermediate points - for (size_t k = 0 ; k < wire->getIntermediatePoints().size() ; k++) { - IntermediatePoint* iP = wire->getIntermediatePoints()[k]; - file << " getX() << "\" y=\"" << iP->getY() << "\"/>" << endl; - } - // end point - if (dynamic_cast(end)) { - InstancePoint* iP = static_cast(end); - file << " getName() << "\" plug=\"" << iP->getPlug() << "\"/>" << endl; - } else if (dynamic_cast(end)) { - PortPoint* pP = static_cast(end); - file << " getIndex() << "\"/>" << endl; - } else { - throw OpenChamsException("[ERROR] Wire end point is nor an InstancePoint nor a PortPoint."); - } - file << " " << endl; - } - file << " " << endl; - } - } - file << " " << endl; - } - - // SIZING (modified by Farakh) *************************************************************** - if(_sizing && (!_sizing->hasNoOperators() || !_sizing->hasNoEquations()) ) - file << " " << endl; - if (_sizing && !_sizing->hasNoOperators()) { - // file << " " << endl; - for (map::const_iterator it = _sizing->getOperators().begin() ; it != _sizing->getOperators().end() ; ++it) { - Operator* op = (*it).second; - string opName = op->getName(); - transform(opName.begin(), opName.end(), opName.begin(), ::toupper); - file << " getSimulModel() << "\">" << endl; - if (!op->hasNoConstraints()) { - for (map::const_iterator cit = op->getConstraints().begin() ; cit != op->getConstraints().end() ; ++cit) { - Operator::Constraint* cn = (*cit).second; - const std::string& ref = cn->getRef(); - if (ref.empty()) { - file << " getRefParam() << "\" factor=\"" << cn->getFactor() << "\"/>" << endl; - } else { - file << " getRef() << "\" refParam=\"" << cn->getRefParam() << "\" factor=\"" << cn->getFactor() << "\"/>" << endl; - } - } - } - file << " " << endl; - } - } - // EQUATIONS - if (_sizing && !_sizing->hasNoEquations()) { - file << " " << endl; - // for (map::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it) - // file << " " << endl; - file << " " << endl; - for(map::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it) { - if(dynamic_cast((*it).second)) - file << " getEquationStr()[0] << "\"/>" << endl; - } - file << " " << endl; - - file << " " << endl; - for(map::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it) { - if(dynamic_cast((*it).second)) - file << " getEquationStr()[0] << "\"/>" << endl; - } - file << " " << endl; - - file << " " << endl; - for(map::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it) { - if(dynamic_cast((*it).second)) { - NRCCstr* nrcCstr = (NRCCstr*)((*it).second); - file << " getVoltage() << "\" equation=\"" << (*it).second->getEquationStr()[0] << "\"/>" << endl; - } - } - file << " " << endl; - - file << " " << endl; - for(map::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it) { - if(dynamic_cast((*it).second)) { - file << " " << endl; - for(map::const_iterator it2 = (*it).second->getEquationStr().begin(); it2!=(*it).second->getEquationStr().end(); ++it2) - file << " " << endl; - file << " " << endl; - } - } - file << " " << endl; - - - file << " " << endl; - } - if(_sizing && (!_sizing->hasNoOperators() || !_sizing->hasNoEquations()) ) - file << " " << endl; - // ******************************************************************************************* - if (_layout) { - file << " " << endl; - if (!_layout->hasNoInstance()) { - for (map::const_iterator it = _layout->getInstances().begin() ; it != _layout->getInstances().end() ; ++it) { - file << " " << endl; - } - } - if (Node* root = _layout->getHBTreeRoot()) { - file << " " << endl; - driveHBTree(file, root, 3); - file << " " << endl; - } - file << " " << endl; - } - // ******************************************************************************************* - - if (_slicingtree) { - driveSlicingTree(file, _slicingtree, 1); - } - - - - file << "" << endl; - file.close(); - return true; - } - -} - diff --git a/vlsisapd/src/openChams/src/DDP.cpp b/vlsisapd/src/openChams/src/DDP.cpp deleted file mode 100644 index d7222572..00000000 --- a/vlsisapd/src/openChams/src/DDP.cpp +++ /dev/null @@ -1,32 +0,0 @@ -/* - * DDP.cpp - * openChams - * - * Created by Farakh JAVID on 25/10/2011. - * Copyright 2010 UPMC / LIP6. All rights reserved. - * - */ - -#include -#include - -using namespace std; - -#include "vlsisapd/openChams/DDP.h" - -namespace OpenChams { - DDP::DDP() - : Equation() - {} - - // This function prints all equations - void DDP::printEquations() { - map::iterator it; - cerr << "Printing equations of a DDP : " << endl; - for(it=_equations.begin(); it!=_equations.end(); ++it) { - cerr << (*it).first << "\t" << (*it).second << endl; - } - } - - -} // namespace diff --git a/vlsisapd/src/openChams/src/DesignerCstrOC.cpp b/vlsisapd/src/openChams/src/DesignerCstrOC.cpp deleted file mode 100644 index f77937c1..00000000 --- a/vlsisapd/src/openChams/src/DesignerCstrOC.cpp +++ /dev/null @@ -1,31 +0,0 @@ -/* - * DesignerCstrOC.cpp - * openChams - * - * Created by Farakh JAVID on 25/10/2011. - * Copyright 2010 UPMC / LIP6. All rights reserved. - * - */ - -#include -#include - -using namespace std; - -#include "vlsisapd/openChams/DesignerCstrOC.h" - -namespace OpenChams { - DesignerCstrOC::DesignerCstrOC() - : Equation() - {} - - // This function prints all equations - void DesignerCstrOC::printEquations() { - map::iterator it; - cerr << "Printing equations of a DesignerCstrOC : " << endl; - for(it=_equations.begin(); it!=_equations.end(); ++it) { - cerr << (*it).first << "\t" << (*it).second << endl; - } - } - -} // namespace diff --git a/vlsisapd/src/openChams/src/Device.cpp b/vlsisapd/src/openChams/src/Device.cpp deleted file mode 100644 index ca80933b..00000000 --- a/vlsisapd/src/openChams/src/Device.cpp +++ /dev/null @@ -1,58 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Device.cpp" | -// +-----------------------------------------------------------------+ - - -#include -using namespace std; - -#include "vlsisapd/openChams/Device.h" -#include "vlsisapd/openChams/Netlist.h" -#include "vlsisapd/openChams/Transistor.h" -#include "vlsisapd/openChams/OpenChamsException.h" - -namespace OpenChams { - - - Device::Device ( const string& name - , const string& model - , unsigned order - , const string& mosType - , bool sourceBulkConnected - , Netlist* netlist ) - : Instance (name,model,order,netlist) - , _mosType (mosType) - , _sourceBulkConnected(sourceBulkConnected) - , _trans () - { } - - - Device::~Device () - { } - - - Transistor* Device::addTransistor ( const string& name ) - { - Transistor* tr = new Transistor(name, this); - if (!tr) - throw OpenChamsException("[ERROR] Cannot create transistor."); - - _trans.push_back(tr); - return tr; - } - - -} // OpenChams namespace - diff --git a/vlsisapd/src/openChams/src/Equation.cpp b/vlsisapd/src/openChams/src/Equation.cpp deleted file mode 100644 index bf56eacb..00000000 --- a/vlsisapd/src/openChams/src/Equation.cpp +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Equation.cpp - * openChams - * - * Created by Farakh JAVID on 25/10/2011. - * Copyright 2010 UPMC / LIP6. All rights reserved. - * - */ - -#include -using namespace std; - -#include "vlsisapd/openChams/Equation.h" - -namespace OpenChams { - Equation::Equation() - : _equations() - // , _paramsInEquation() - {} - - void Equation::addEquation(std::string eq) { - _equations[_equations.size()] = eq; - } - -} // namespace diff --git a/vlsisapd/src/openChams/src/HighLevelCstr.cpp b/vlsisapd/src/openChams/src/HighLevelCstr.cpp deleted file mode 100644 index a7e622ff..00000000 --- a/vlsisapd/src/openChams/src/HighLevelCstr.cpp +++ /dev/null @@ -1,31 +0,0 @@ -/* - * HighLevelCstr.cpp - * openChams - * - * Created by Farakh JAVID on 25/10/2011. - * Copyright 2010 UPMC / LIP6. All rights reserved. - * - */ - -#include -#include - -using namespace std; - -#include "vlsisapd/openChams/HighLevelCstr.h" - -namespace OpenChams { - HighLevelCstr::HighLevelCstr() - : Equation() - {} - - // This function prints all equations - void HighLevelCstr::printEquations() { - map::iterator it; - cerr << "Printing equations of a HighLevelCstr : " << endl; - for(it=_equations.begin(); it!=_equations.end(); ++it) { - cerr << (*it).first << "\t" << (*it).second << endl; - } - } - -} // namespace diff --git a/vlsisapd/src/openChams/src/Instance.cpp b/vlsisapd/src/openChams/src/Instance.cpp deleted file mode 100644 index f25f76b3..00000000 --- a/vlsisapd/src/openChams/src/Instance.cpp +++ /dev/null @@ -1,86 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Instance.cpp" | -// +-----------------------------------------------------------------+ - - -#include -using namespace std; - -#include "vlsisapd/openChams/Instance.h" -#include "vlsisapd/openChams/Netlist.h" -#include "vlsisapd/openChams/Net.h" -#include "vlsisapd/openChams/OpenChamsException.h" - - -namespace OpenChams { - - Instance::Instance(const string& name, const string& model, unsigned order, Netlist* netlist) - : _name(name) - , _model(model) - , _order(order) - , _netlist(netlist) - , _params() - , _netMap() - { } - - - Instance::~Instance () - { } - - - void Instance::addConnector(const string& name) - { - // si name n'est pas déjà présent dans la map on ajoute name, NULL (pas de net) - map::iterator it = _netMap.find(name); - if (it == _netMap.end()) { - _netMap[name] = NULL; - } - else { - string error("[ERROR] The same instance cannot have several connectors with same name ("); - error += name; - error += ")."; - throw OpenChamsException(error); - } - } - - - void Instance::connect(const string& connectorName, const string& netName) - { - // si connectorName n'est pas déjà présent dans la map : - // on cherche le net associé a netName dans la netlist (getNet(const string&)) - // on ajoute cName, net a la map - map::iterator it = _netMap.find(connectorName); - if (it != _netMap.end()) { - Net* net = _netlist->getNet(netName); - if (!net) { - string error("[ERROR] While connecting instance : net ("); - error += netName; - error += ") does not exist."; - throw OpenChamsException(error); - } - else - _netMap[connectorName] = net; - } - else { - string error("[ERROR] While connecting instance : connector ("); - error += connectorName; - error += ") does not exist."; - throw OpenChamsException(error); - } - } - - -} // OpenChams namespace. - diff --git a/vlsisapd/src/openChams/src/Layout.cpp b/vlsisapd/src/openChams/src/Layout.cpp deleted file mode 100644 index 90f10274..00000000 --- a/vlsisapd/src/openChams/src/Layout.cpp +++ /dev/null @@ -1,47 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2008-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Layout.cpp" | -// +-----------------------------------------------------------------+ - - -#include "vlsisapd/openChams/Layout.h" -#include "vlsisapd/openChams/Circuit.h" -#include "vlsisapd/openChams/OpenChamsException.h" -using namespace std; - - -namespace OpenChams { - - - Layout::Layout ( Circuit* circuit ) - : _circuit (circuit) - , _hbTreeRoot(NULL) - , _instances () - { } - - - void Layout::addInstance ( const string& name, const string& style ) - { - map::iterator it = _instances.find(name); - if (it != _instances.end()) { - string error("[ERROR] Cannot set several instances with the same name in 'layout' ("); - error += name; - error += ")."; - throw OpenChamsException(error); - } - _instances[name] = style; - } - - -} // OpenChams namespace. diff --git a/vlsisapd/src/openChams/src/NRCCstr.cpp b/vlsisapd/src/openChams/src/NRCCstr.cpp deleted file mode 100644 index abcc6fef..00000000 --- a/vlsisapd/src/openChams/src/NRCCstr.cpp +++ /dev/null @@ -1,33 +0,0 @@ -/* - * NRCCstr.cpp - * openChams - * - * Created by Farakh JAVID on 25/10/2011. - * Copyright 2010 UPMC / LIP6. All rights reserved. - * - */ - -#include -#include - -using namespace std; - -#include "vlsisapd/openChams/NRCCstr.h" - -namespace OpenChams { - NRCCstr::NRCCstr(string controlVoltage) - : Equation() - , _controlVoltage(controlVoltage) - {} - - // This function prints all equations - void NRCCstr::printEquations() { - map::iterator it; - cerr << "Printing equations of a NRCCstr : " << endl; - cerr << "Control voltage = " << _controlVoltage << endl; - for(it=_equations.begin(); it!=_equations.end(); ++it) { - cerr << (*it).first << "\t" << (*it).second << endl; - } - } - -} // namespace diff --git a/vlsisapd/src/openChams/src/Net.cpp b/vlsisapd/src/openChams/src/Net.cpp deleted file mode 100644 index 017d76f8..00000000 --- a/vlsisapd/src/openChams/src/Net.cpp +++ /dev/null @@ -1,84 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Net.cpp" | -// +-----------------------------------------------------------------+ - - -#include "vlsisapd/openChams/Net.h" -#include "vlsisapd/openChams/Instance.h" -#include "vlsisapd/openChams/Netlist.h" -#include "vlsisapd/openChams/Port.h" -#include "vlsisapd/openChams/Wire.h" -#include "vlsisapd/openChams/OpenChamsException.h" - -using namespace std; - - -namespace OpenChams { - - - Net::Net(const std::string& netName, const std::string& typeName, bool isExternal, Netlist* netlist) - : _name (netName) - , _typeName (typeName) - , _isExternal (isExternal) - , _netlist (netlist) - , _connections() - , _ports () - , _wires () - { } - - - void Net::connectTo(const std::string& instanceName, const std::string& connectorName) - { - _connections.push_back(new Net::Connection(instanceName, connectorName)); - Instance* inst = _netlist->getInstance(instanceName); - if (!inst) { - string error ("[ERROR] While connecting net "); - error += _name; - error += " to instance "; - error += instanceName; - error += ": instance does not exist in netlist !"; - throw OpenChamsException(error); - } else { - inst->connect(connectorName, _name); - } - } - - - Port* Net::addPort(const std::string& type, unsigned idx, double x, double y, const std::string& orient) - { - while (_ports.size() <= idx) - _ports.push_back(NULL); - if (_ports[idx]) - throw OpenChamsException("[ERROR] Net::addPort: cannot add port since another one with the same id already exists."); - _ports[idx] = new Port(type, idx, x, y, orient); - - return _ports[idx]; - } - - - Wire* Net::addWire() { - Wire* w = new Wire(); - _wires.push_back(w); - return w; - } - - - Net::Connection::Connection(const std::string& instanceName, const std::string& connectorName) - : _instanceName (instanceName) - , _connectorName(connectorName) - { } - - -} // OpenChams namespace. diff --git a/vlsisapd/src/openChams/src/Netlist.cpp b/vlsisapd/src/openChams/src/Netlist.cpp deleted file mode 100644 index bd48f6ea..00000000 --- a/vlsisapd/src/openChams/src/Netlist.cpp +++ /dev/null @@ -1,118 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Netlist.cpp" | -// +-----------------------------------------------------------------+ - - -#include -#include -using namespace std; - -#include "vlsisapd/openChams/Netlist.h" -#include "vlsisapd/openChams/Instance.h" -#include "vlsisapd/openChams/Device.h" -#include "vlsisapd/openChams/Net.h" -#include "vlsisapd/openChams/Circuit.h" -#include "vlsisapd/openChams/OpenChamsException.h" - - -namespace OpenChams { - - - Netlist::Netlist(Circuit* circuit) - : _circuit(circuit) - { } - - - Instance* Netlist::addInstance(const std::string& name, const std::string& model, unsigned order) - { - for (vector::iterator it = _instances.begin() ; it != _instances.end() ; ++it) { - if ((*it)->getName() == name) { - string error("[ERROR] Cannot define two instances with the same name in netlist ("); - error += name; - error += ")."; - throw OpenChamsException(error); - } - } - Instance* inst = new Instance(name, model, order, this); - if (!inst) - throw OpenChamsException("[ERROR] Cannot create instance."); - _instances.push_back(inst); - - return inst; - } - - - Device* Netlist::addDevice(const std::string& name, const std::string& model, unsigned order, const std::string& mosType, bool sourceBulkConnected) - { - for (vector::iterator it = _instances.begin() ; it != _instances.end() ; ++it) { - if ((*it)->getName() == name) { - string error("[ERROR] Cannot define two instances with the same name in netlist ("); - error += name; - error += ")."; - throw OpenChamsException(error); - } - } - Device* dev = new Device(name, model, order, mosType, sourceBulkConnected, this); - if (!dev) - throw OpenChamsException("[ERROR] Cannot create device."); - _instances.push_back(dev); - - return dev; - } - - - Net* Netlist::addNet(const std::string& name, const std::string& type, bool external) - { - for (vector::iterator it = _nets.begin() ; it != _nets.end() ; ++it ) { - if ((*it)->getName() == name) { - string error("[ERROR] Cannot define two nets with the same name in netlist ("); - error += name; - error += ")."; - throw OpenChamsException(error); - } - } - Net* net = new Net(name, type, external, this); - if (!net) - throw OpenChamsException("[ERROR] Cannot create net."); - - _nets.push_back(net); - - return net; - } - - - Instance* Netlist::getInstance(const std::string& instanceName) - { - for (size_t i = 0 ; i < _instances.size() ; ++i) { - if (_instances[i]->getName() == instanceName) { - return _instances[i]; - } - } - return NULL; - } - - - Net* Netlist::getNet(const std::string& netName) { - for (size_t i = 0; i < _nets.size(); ++i) { - if (_nets[i]->getName() == netName) { - return _nets[i]; - } - } - return NULL; - } - - -} // OpenChams namespace. - diff --git a/vlsisapd/src/openChams/src/Node.cpp b/vlsisapd/src/openChams/src/Node.cpp deleted file mode 100644 index 1dc76867..00000000 --- a/vlsisapd/src/openChams/src/Node.cpp +++ /dev/null @@ -1,47 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2011-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Node.cpp" | -// +-----------------------------------------------------------------+ - - -#include "vlsisapd/openChams/Node.h" -using namespace std; - - -namespace OpenChams { - - - Node::Node(const string& nodeName, Position pos, Node* parent) - : _name (nodeName) - , _position(pos) - , _parent (parent) - , _right (NULL) - , _top (NULL) - { } - - - Bloc::Bloc(const string& blocName, Position pos, Node* parent) - : Node(blocName,pos,parent) - { } - - - Group::Group(const string& groupName, Position pos, Node* parent) - : Node(groupName,pos,parent) - , _isolated(false) - , _paired(false) - , _align(Group::NONE) - { } - - -} // OpenChams namespace. diff --git a/vlsisapd/src/openChams/src/Operator.cpp b/vlsisapd/src/openChams/src/Operator.cpp deleted file mode 100644 index 95ee1c3e..00000000 --- a/vlsisapd/src/openChams/src/Operator.cpp +++ /dev/null @@ -1,76 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Operator.cpp" | -// +-----------------------------------------------------------------+ - - -#include -using namespace std; - -#include "vlsisapd/openChams/Operator.h" -#include "vlsisapd/openChams/OpenChamsException.h" - - -namespace OpenChams { - - - Operator::Operator(const string& operatorName, const string& simulModel) - : _name (operatorName) - , _simulModel(simulModel) - { } - - - void Operator::addConstraint(const string& paramName, const string& ref, const string& refParam) - { addConstraint(paramName, ref, refParam, 1.0); } - - - void Operator::addConstraint(const string& paramName, const string& ref, const string& refParam, double factor) - { - map::iterator it = _constraints.find(paramName); - if (it != _constraints.end()) { - string error("[ERROR] Cannot set two constraints for the same parameter ("); - error += paramName; - error += ")."; - throw OpenChamsException(error); - } - _constraints[paramName] = new Operator::Constraint(ref, refParam, factor); - } - - - void Operator::addConstraint(const string& paramName, const string& refEquation) - { addConstraint(paramName, refEquation, 1.0); } - - - void Operator::addConstraint(const string& paramName, const string& refEquation, double factor) - { - map::iterator it = _constraints.find(paramName); - if (it != _constraints.end()) { - string error("[ERROR] Cannot set two constraints for the same parameter ("); - error += paramName; - error += ")."; - throw OpenChamsException(error); - } - _constraints[paramName] = new Operator::Constraint("", refEquation, factor); - } - - - Operator::Constraint::Constraint(const string& ref, const string& refParam, double factor) - : _ref (ref) - , _refParam(refParam) - , _factor (factor) - { } - - -} // OpenChams namespace. - diff --git a/vlsisapd/src/openChams/src/Parameters.cpp b/vlsisapd/src/openChams/src/Parameters.cpp deleted file mode 100644 index 6ed37012..00000000 --- a/vlsisapd/src/openChams/src/Parameters.cpp +++ /dev/null @@ -1,53 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2009-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Parameters.cpp" | -// +-----------------------------------------------------------------+ - - -#include -using namespace std; - -#include "vlsisapd/openChams/Parameters.h" -#include "vlsisapd/openChams/OpenChamsException.h" - -namespace OpenChams { - - - void Parameters::addParameter ( const string& name, const string& value ) - { - map::iterator it = _params.find(name); - if ( it != _params.end() ) { - string error("[ERROR] Cannot addParameter "); - error += name; - error += " because it already exists !"; - throw OpenChamsException(error); - } - _params[name] = value; - } - - - const string& Parameters::getValue ( const string& name ) - { - map::iterator it = _params.find(name); - if (it == _params.end()) { - string error("[ERROR] No parameters named "); - error += name; - throw OpenChamsException(error); - } - return (*it).second; - } - - -} // OpenChams namespace. - diff --git a/vlsisapd/src/openChams/src/PyOpenChams.cpp b/vlsisapd/src/openChams/src/PyOpenChams.cpp deleted file mode 100644 index aaa8462c..00000000 --- a/vlsisapd/src/openChams/src/PyOpenChams.cpp +++ /dev/null @@ -1,385 +0,0 @@ - -#include -#include -using namespace boost::python; - -#include "vlsisapd/openChams/Parameters.h" -#include "vlsisapd/openChams/Transistor.h" -#include "vlsisapd/openChams/Instance.h" -#include "vlsisapd/openChams/Device.h" -#include "vlsisapd/openChams/Net.h" -#include "vlsisapd/openChams/Netlist.h" -#include "vlsisapd/openChams/Schematic.h" -#include "vlsisapd/openChams/Operator.h" -#include "vlsisapd/openChams/SimulModel.h" -#include "vlsisapd/openChams/Sizing.h" -#include "vlsisapd/openChams/Layout.h" -#include "vlsisapd/openChams/Node.h" -#include "vlsisapd/openChams/Circuit.h" -#include "vlsisapd/openChams/Port.h" -#include "vlsisapd/openChams/Wire.h" -#include "vlsisapd/openChams/OpenChamsException.h" -#include "vlsisapd/openChams/PySTLMapWrapper.h" -using namespace std; - -namespace OpenChams { - -void translator(OpenChamsException const& e) { - PyErr_SetString(PyExc_UserWarning, e.what()); -} - -BOOST_PYTHON_MODULE(OPENCHAMS) { - // map wrapping for OpenChams::Parameters - STL_MAP_WRAPPING(std::string, std::string, "ValuesMap") - // class OpenChams::Parameters - class_("Parameters", init<>()) - // accessors - .def("getValue" , &Parameters::getValue, return_value_policy()) - .def("isEmpty" , &Parameters::isEmpty ) - // modifiers - .def("addParameter", static_cast(&Parameters::addParameter)) - // stl containers - .def("getValues" , &Parameters::getValues , return_value_policy()) - ; - - { //this scope is used to define Base as a subenum of SimulModel - // class OpenChams::SimulModel - scope simMod = class_("SimulModel", init()) - // properties - .add_property("id" , &SimulModel::getId ) - .add_property("base" , &SimulModel::getBase ) - .add_property("version" , &SimulModel::getVersion ) - .add_property("filePath", &SimulModel::getFilePath) - ; - - enum_("Base") - .value("BSIM3V3", SimulModel::BSIM3V3) - .value("BSIM4" , SimulModel::BSIM4 ) - .value("PSP" , SimulModel::PSP ) - ; - - enum_("Version") - .value("UNDEFINED", SimulModel::UNDEFINED) - .value("SVT" , SimulModel::SVT ) - .value("HVT" , SimulModel::HVT ) - .value("LVT" , SimulModel::LVT ) - ; - } - - // class OpenChams::Transistor - class_("Transistor", init()) - // properties - .add_property("name" , make_function(&Transistor::getName ,return_value_policy()), &Transistor::setName ) - .add_property("gate" , make_function(&Transistor::getGate ,return_value_policy()), &Transistor::setGate ) - .add_property("source" , make_function(&Transistor::getSource,return_value_policy()), &Transistor::setSource) - .add_property("drain" , make_function(&Transistor::getDrain ,return_value_policy()), &Transistor::setDrain ) - .add_property("bulk" , make_function(&Transistor::getBulk ,return_value_policy()), &Transistor::setBulk ) - .add_property("parameters", &Transistor::getParameters ) // no setter => params will be readonly - // modifiers - .def("addParameter", static_cast(&Transistor::addParameter)) - .def("addParameter", static_cast(&Transistor::addParameter)) - ; - - // map wrapping and vector_indexing for OpenChams::Instance - STL_MAP_WRAPPING_PTR(std::string, Net*, "ConnectorsMap") - // class OpenChams::Instance - class_("Instance", init()) - // properties - .add_property("name" , make_function(&Instance::getName ,return_value_policy())) - .add_property("model" , make_function(&Instance::getModel,return_value_policy())) - .add_property("order" , &Instance::getOrder ) - .add_property("parameters" , &Instance::getParameters ) - .add_property("netlist" , make_function(&Instance::getNetlist ,return_value_policy())) //make_function since we need to specify a return value policy - // accessors - .def("hasNoConnectors" , &Instance::hasNoConnectors ) - // modifiers - .def("addConnector" , &Instance::addConnector ) - .def("connect" , &Instance::connect ) - .def("addParameter" , static_cast(&Transistor::addParameter)) - .def("addParameter" , static_cast(&Transistor::addParameter)) - // stl containers - .def("getConnectors" , &Instance::getConnectors , return_internal_reference<>()) - ; - - // vector_indexing for OpenChams::Device - class_ >("TransistorsVector") - .def(vector_indexing_suite, true>()) - ; - // class OpenChams::Device - class_ >("Device", init()) - // properties - .add_property("mosType" , make_function(&Device::getMosType,return_value_policy()) ) - .add_property("sourceBulkConnected", &Device::isSourceBulkConnected) - // accessors - .def("hasNoTransistors", &Device::hasNoTransistors) - // modifiers - .def("addTransistor", &Device::addTransistor, return_value_policy()) - // stl containers - .def("getTransistors", &Device::getTransistors, return_internal_reference<>()) - ; - - // class OpenChams::Port - class_("Port", init()) - // properties - .add_property("type" , make_function(&Port::getType,return_value_policy())) - .add_property("index" , &Port::getIndex ) - .add_property("x" , &Port::getX ) - .add_property("y" , &Port::getY ) - .add_property("orientation", make_function(&Port::getOrientation,return_value_policy())) - ; - - // class OpenChams::WirePoint - class_("WirePoint", init<>()) - ; - // class OpenChams::InstancePoint - class_ >("InstancePoint", init()) - // properties - .add_property("name", make_function(&InstancePoint::getName, return_value_policy())) - .add_property("plug", make_function(&InstancePoint::getPlug, return_value_policy())) - ; - // class OpenChams::PortPoint - class_ >("PortPoint", init()) - // properties - .add_property("index", &PortPoint::getIndex) - ; - // class OpenChams::IntermediatePoint - class_ >("IntermediatePoint", init()) - // properties - .add_property("x", &IntermediatePoint::getX) - .add_property("y", &IntermediatePoint::getY) - ; - - // vector_indexing for OpenChams::Wire - class_ >("IntermediatePointsVector") - .def(vector_indexing_suite, true>()) - ; - // class OpenChams::Wire - class_("Wire", init<>()) - // properties - .add_property("startPoint", make_function(&Wire::getStartPoint, return_value_policy())) - .add_property("endPoint" , make_function(&Wire::getEndPoint , return_value_policy())) - // accessors - .def("hasNoIntermediatePoints", &Wire::hasNoIntermediatePoints) - // modifiers - .def("setStartPoint" , static_cast(&Wire::setStartPoint)) - .def("setStartPoint" , static_cast(&Wire::setStartPoint)) - .def("setEndPoint" , static_cast(&Wire::setEndPoint)) - .def("setEndPoint" , static_cast(&Wire::setEndPoint)) - .def("addIntermediatePoint", &Wire::addIntermediatePoint) - // stl containers - .def("getIntermediatePoints" , &Wire::getIntermediatePoints, return_internal_reference<>()) - ; - - // vector_indexing for OpenChams::Net - class_ >("ConnectionsVector") - .def(vector_indexing_suite, true>()) - ; - class_ >("PortsVector") - .def(vector_indexing_suite, true>()) - ; - class_ >("WiresVector") - .def(vector_indexing_suite, true>()) - ; - { //this scope is used to define Connection as a subclass of Net - // class OpenChams::Net - scope netScope = class_("Net", init()) - // properties - .add_property("name" , make_function(&Net::getName ,return_value_policy())) - .add_property("type" , make_function(&Net::getType ,return_value_policy())) - .add_property("external", &Net::isExternal) - .add_property("netlist" , make_function(&Net::getNetlist, return_value_policy())) - // accessors - .def("hasNoConnections", &Net::hasNoConnections) - .def("hasNoPorts" , &Net::hasNoPorts ) - .def("hasNoWires" , &Net::hasNoWires ) - // modifiers - .def("connectTo" , &Net::connectTo ) - .def("addPort" , &Net::addPort, return_value_policy()) - .def("addWire" , &Net::addWire, return_value_policy()) - // stl containers - .def("getConnections", &Net::getConnections, return_internal_reference<>()) - .def("getPorts" , &Net::getPorts , return_internal_reference<>()) - .def("getWires" , &Net::getWires , return_internal_reference<>()) - ; - - // class OpenChams::Net::Connection - class_("Connection", init()) - .add_property("instanceName" , make_function(&Net::Connection::getInstanceName ,return_value_policy())) - .add_property("connectorName", make_function(&Net::Connection::getConnectorName,return_value_policy())) - ; - } // end netScope - - // vector_indexing for OpenChams::Netlist - class_ >("InstancesVector") - .def(vector_indexing_suite, true>()) - ; - class_ >("NetsVector") - .def(vector_indexing_suite, true>()) - ; - // class OpenChams::Netlist - class_("Netlist", init()) - // accessors - .def("hasNoInstances", &Netlist::hasNoInstances) - .def("hasNoNets" , &Netlist::hasNoNets ) - .def("getInstance" , make_function(&Netlist::getInstance , return_value_policy())) - .def("getNet" , make_function(&Netlist::getNet , return_value_policy())) - // modifiers - .def("addInstance" , &Netlist::addInstance, return_value_policy()) - .def("addDevice" , &Netlist::addDevice , return_value_policy()) - .def("addNet" , &Netlist::addNet , return_value_policy()) - // stl containers - .def("getInstances" , &Netlist::getInstances, return_internal_reference<>()) - .def("getNets" , &Netlist::getNets , return_internal_reference<>()) - ; - - // map wrapping for OpenChams::Schematic - STL_MAP_WRAPPING_PTR(std::string, Schematic::Infos*, "SchematicInstancesMap") - { // this scope is used to define Infos as a subclass of Schematic - // class OpenChams::Schematic - scope schematicScope = class_("Schematic", init()) - // accessors - .def("hasNoInstances", &Schematic::hasNoInstances) - // modifiers - .def("addInstance" , &Schematic::addInstance) - // stl containers - .def("getInstances" , &Schematic::getInstances, return_internal_reference<>()) - ; - - // class OpenChams::Schematic::Infos - class_("Infos", init()) - .add_property("x" , &Schematic::Infos::getX ) - .add_property("y" , &Schematic::Infos::getY ) - .add_property("orientation", make_function(&Schematic::Infos::getOrientation,return_value_policy())) - ; - } // end schematicScope - - // map wrapping for OpenChams::Operator - STL_MAP_WRAPPING_PTR(std::string, Operator::Constraint*, "ConstraintsMap") - { // this scope is used to define Constraint as a subclass of Operator - // class OpenChams::Operator - scope operatorScope = class_("Operator", init()) - // properties - .add_property("name" , make_function(&Operator::getName , return_value_policy())) - .add_property("simulModel", make_function(&Operator::getSimulModel, return_value_policy())) - // accessors - .def("hasNoConstraints", &Operator::hasNoConstraints) - // modifiers - .def("addConstraint", static_cast(&Operator::addConstraint)) - .def("addConstraint", static_cast(&Operator::addConstraint)) - .def("addConstraint", static_cast(&Operator::addConstraint)) - .def("addConstraint", static_cast(&Operator::addConstraint)) - // stl containers - .def("getConstraints", &Operator::getConstraints, return_internal_reference<>()) - ; - - // class OpenChams::Operator::Constraint - class_("Constraint", init()) - .add_property("ref" , make_function(&Operator::Constraint::getRef , return_value_policy())) - .add_property("refParam", make_function(&Operator::Constraint::getRefParam, return_value_policy())) - .add_property("factor" , &Operator::Constraint::getFactor ) - ; - } // end operatorScope - - /* - // map wrapping for OpenChams::Sizing - STL_MAP_WRAPPING_PTR(std::string, Operator*, "OperatorsMap") - // class OpenChams::Sizing - class_("Sizing", init()) - // accessors - .def("hasNoEquations", &Sizing::hasNoEquations) - .def("hasNoOperators", &Sizing::hasNoOperators) - // modifiers - .def("addEquation", &Sizing::addEquation) - .def("addOperator", &Sizing::addOperator, return_value_policy()) - // stl containers - .def("getEquations", &Sizing::getEquations, return_internal_reference<>()) - .def("getOperators", &Sizing::getOperators, return_internal_reference<>()) - ; - */ - - // map wrapping for OpenChams::Layout - STL_MAP_WRAPPING(std::string, std::string, "LayoutInstancesMap") - // class OpenChams::Layout - class_("Layout", init()) - // properties - .add_property("hbTreeRoot", make_function(&Layout::getHBTreeRoot, return_value_policy()), &Layout::setHBTreeRoot) - // accessors - .def("hasNoInstance", &Layout::hasNoInstance) - // modifiers - .def("addInstance", &Layout::addInstance) - // stl containers - .def("getInstances", &Layout::getInstances, return_internal_reference<>()) - ; - - class_("Circuit", init()) - // properties - .add_property("name" , make_function(&Circuit::getName ,return_value_policy())) - .add_property("techno" , make_function(&Circuit::getTechno ,return_value_policy())) - .add_property("parameters" , &Circuit::getParameters ) - .add_property("netlist" , make_function(&Circuit::getNetlist , return_value_policy())) - .add_property("schematic" , make_function(&Circuit::getSchematic, return_value_policy())) - .add_property("sizing" , make_function(&Circuit::getSizing , return_value_policy())) - .add_property("layout" , make_function(&Circuit::getLayout , return_value_policy())) - // accessors - .def("getValue", &Circuit::getValue, return_value_policy() ) - // modifiers - .def("createNetlist" , &Circuit::createNetlist , return_value_policy()) - .def("createSchematic", &Circuit::createSchematic, return_value_policy()) - .def("createSizing" , &Circuit::createSizing , return_value_policy()) - .def("createLayout" , &Circuit::createLayout , return_value_policy()) - .def("addParameter", static_cast(&Circuit::addParameter)) - .def("addParameter", static_cast(&Circuit::addParameter)) - // others - .def("readFromFile", &Circuit::readFromFile, return_value_policy()) - .staticmethod("readFromFile") - .def("writeToFile" , &Circuit::writeToFile) - ; - - { //this scope is used to define Position as a subenum of Node - // class OpenChams::Node - scope nod = class_("Node", no_init) - // properties - .add_property("top" , make_function(&Node::getTop , return_value_policy()), &Node::setTop ) - .add_property("right", make_function(&Node::getRight, return_value_policy()), &Node::setRight) - // accessors - .def("getName" , &Node::getName , return_value_policy()) - .def("getPosition", &Node::getPosition) - .def("getParent" , &Node::getParent , return_value_policy()) - .def("isRoot" , &Node::isRoot ) - ; - - enum_("Position") - .value("NONE" , Node::NONE ) - .value("RIGHT", Node::RIGHT) - .value("TOP" , Node::TOP ) - .export_values() - ; - } // end of node scope - - // class OpenChams::Bloc - class_ >("Bloc", init >()) - ; - - { // this scope is used to define Align as a subenum of Group - // class OpenChams::Group - scope grou = class_ >("Group", init >()) - .add_property("rootNode", make_function(&Group::getRootNode, return_value_policy()), &Group::setRootNode) - .add_property("isolated", &Group::isIsolated, &Group::setIsolated) - .add_property("paired" , &Group::isPaired , &Group::setPaired ) - .add_property("align" , &Group::getAlign , &Group::setAlign ) - ; - - enum_("Align") - .value("NONE" , Group::NONE ) - .value("VERTICAL" , Group::VERTICAL ) - .value("HORIZONTAL", Group::HORIZONTAL) - ; - } // end of group scope - - // OpenChamsException translator - register_exception_translator(translator) - ; -} - - -} // OpenChams namespace. diff --git a/vlsisapd/src/openChams/src/Schematic.cpp b/vlsisapd/src/openChams/src/Schematic.cpp deleted file mode 100644 index 5e088708..00000000 --- a/vlsisapd/src/openChams/src/Schematic.cpp +++ /dev/null @@ -1,52 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC 2010-2018, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Schematic.cpp" | -// +-----------------------------------------------------------------+ - - -#include "vlsisapd/openChams/Schematic.h" -#include "vlsisapd/openChams/OpenChamsException.h" -using namespace std; - -namespace OpenChams { - - - Schematic::Schematic (Circuit* circuit ) - : _circuit(circuit) - { } - - - void Schematic::addInstance ( const string& instanceName - , double x - , double y - , const string& orient ) - { - map::iterator it = _instances.find(instanceName); - if (it != _instances.end()) { - string error("[ERROR] Cannot set same instance twice in 'schematic' ("); - error += instanceName; - error += ")."; - throw OpenChamsException(error); - } - _instances[instanceName] = new Schematic::Infos(x, y, orient); - } - - Schematic::Infos::Infos(double x, double y, const string& orient) - : _x (x) - , _y (y) - , _orient(orient) - {} - - -} // OpenChams namespace. diff --git a/vlsisapd/src/openChams/src/SimulModel.cpp b/vlsisapd/src/openChams/src/SimulModel.cpp deleted file mode 100644 index 2eca20b9..00000000 --- a/vlsisapd/src/openChams/src/SimulModel.cpp +++ /dev/null @@ -1,20 +0,0 @@ -/* - * SimulModel.cpp - * openChams - * - * Created by damien dupuis on 06/07/10. - * Copyright 2010 UPMC / LIP6. All rights reserved. - * - */ - - -#include "vlsisapd/openChams/SimulModel.h" - -namespace OpenChams { -SimulModel::SimulModel(unsigned id, SimulModel::Base base, SimulModel::Version version, std::string filePath) - : _id(id) - , _base(base) - , _version(version) - , _filePath(filePath) {} - -} // namespace diff --git a/vlsisapd/src/openChams/src/Sizing.cpp b/vlsisapd/src/openChams/src/Sizing.cpp deleted file mode 100644 index 508fde89..00000000 --- a/vlsisapd/src/openChams/src/Sizing.cpp +++ /dev/null @@ -1,66 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Sizing.cpp" | -// +-----------------------------------------------------------------+ - - - -#include "vlsisapd/openChams/Sizing.h" -#include "vlsisapd/openChams/Circuit.h" -#include "vlsisapd/openChams/Operator.h" -#include "vlsisapd/openChams/Equation.h" -#include "vlsisapd/openChams/OpenChamsException.h" -using namespace std; - - -namespace OpenChams { - - - Sizing::Sizing ( Circuit* circuit ) - : _circuit(circuit) - { } - - - Operator* Sizing::addOperator ( const string& instanceName - , const string& operatorName - , const string& simulModel ) - { - map::iterator it = _operators.find(instanceName); - if (it != _operators.end()) { - string error("[ERROR] Cannot set same instance twice in 'sizing' ("); - error += instanceName; - error += ")."; - throw OpenChamsException(error); - } - Operator* op = new Operator(operatorName, simulModel); - _operators[instanceName] = op; - return op; - } - - - void Sizing::addEquation ( const string& equationName, Equation* equation) - { - map::iterator it = _equations.find(equationName); - if (it != _equations.end()) { - string error("[ERROR] Cannot set several equations with the same name in 'sizing' ("); - error += equationName; - error += ")."; - throw OpenChamsException(error); - } - _equations[equationName] = equation; - } - - -} // OpenChams namespace - diff --git a/vlsisapd/src/openChams/src/SlicingTree.cpp b/vlsisapd/src/openChams/src/SlicingTree.cpp deleted file mode 100644 index fdc7dc10..00000000 --- a/vlsisapd/src/openChams/src/SlicingTree.cpp +++ /dev/null @@ -1,1088 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2008-2018, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Eric Lao | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./SlicingTree.cpp" | -// +-----------------------------------------------------------------+ - - -#include "vlsisapd/openChams/SlicingTree.h" - -using namespace std; - -namespace OpenChams { - -// -----------------------------------------------------------------------------------------------// -// Class : SlicingNode -// -----------------------------------------------------------------------------------------------// - - - void printList( list liste ) - { - for ( list::const_iterator it = liste.begin(); it != liste.end(); it++ ){ - (*it)->print(); - } - } - - SlicingNode::SlicingNode( SlicingNode* parent ) - { - _parent = parent; - _alignment = UnknownAlignment; - } - - - void SlicingNode::setParent ( SlicingNode* parent ) - { - _parent = parent; - } - - - SlicingNode* SlicingNode::getParent () const - { - return _parent; - } - - - void SlicingNode::setAlignment ( std::string alignment ) - { - if (!_parent){ - if ( alignment == "AlignRight" ){ _alignment = AlignRight ; } - else if ( alignment == "AlignLeft" ){ _alignment = AlignLeft ; } - else if ( alignment == "AlignCenter" ){ _alignment = AlignCenter ; } - else if ( alignment == "AlignTop" ){ _alignment = AlignTop ; } - else { _alignment = UnknownAlignment; } - } else { - if (_parent->getType() == HorizontalSNode ){ - if ( alignment == "AlignRight" ){ _alignment = AlignRight ; } - else if ( alignment == "AlignCenter" ){ _alignment = AlignCenter ; } - else { _alignment = AlignLeft ; } - } else if ( _parent->getType() == VerticalSNode ){ - if ( alignment == "AlignCenter" ){ _alignment = AlignCenter ; } - else if ( alignment == "AlignTop" ){ _alignment = AlignTop ; } - else { _alignment = AlignBottom ; } - } else { _alignment = UnknownAlignment; } - } - } - - - string SlicingNode::alignmentToString () const - { - string salignment = ""; - if ( _alignment == AlignRight ){ salignment = "AlignRight" ; } - else if ( _alignment == AlignLeft ){ salignment = "AlignLeft" ; } - else if ( _alignment == AlignCenter ){ salignment = "AlignCenter" ; } - else if ( _alignment == AlignTop ){ salignment = "AlignTop" ; } - else { salignment = "UnknownAlignment"; } - return salignment; - } - - - bool SlicingNode::checkInitialPlacement( int& cpt ) const - { - bool initialPlacement = false; - if ( cpt < 2 ){ initialPlacement = true; } - return initialPlacement; - } - - - list SlicingNode::getLeaves() const - { - return list(); - } - - -// Error Methods - std::string SlicingNode::getInstanceName () const - { - cerr << "Error(std::string SlicingNode::getInstanceName ()): Instance name is used in Device only." << endl; - return ""; - } - - - unsigned int SlicingNode::getAlignment () const - { - cerr << "Error(unsigned int SlicingNode::getAlignment ()): No Alignment in Routing Node." << endl; - return UnknownAlignment; - } - - - bool SlicingNode::getPreset () const - { - cerr << "Error(bool SlicingNode::getPreset ()): Preset is used in Device only." << endl; - return false; - } - - - double SlicingNode::getX () const - { - cerr << "Error(double SlicingNode::getX ()): X is used in Device only." << endl; - return 0; - } - - - double SlicingNode::getY () const - { - cerr << "Error(double SlicingNode::getY ()): Y is used in Device only." << endl; - return 0; - } - - - int SlicingNode::getNFing () const - { - cerr << "Error(int SlicingNode::getNFing ()): Nfing is used in Device only." << endl; - return 1; - } - - - double SlicingNode::getStart () const - { - cerr << "Error(double SlicingNode::getStart ()): Start is used in Device only." << endl; - return 0; - } - - - double SlicingNode::getStep () const - { - cerr << "Error(double SlicingNode::getStep ()): Step is used in Device only." << endl; - return 0; - } - - - double SlicingNode::getCount () const - { - cerr << "Error(double SlicingNode::getCount ()): Step is used in Device only." << endl; - return 0; - } - - - void SlicingNode::setInstanceName ( std::string instanceName ) - { - cerr << "Error(void SlicingNode::setInstanceName ( std::string instanceName )): Instance name is used in Device only." << endl; - } - - - void SlicingNode::setPreset ( std::string preset ) - { - cerr << "Error(void SlicingNode::setPreset ( std::string preset )): Preset is used in Device only." << endl; - } - - - void SlicingNode::setX ( std::string x ) - { - cerr << "Error(void SlicingNode::setX ( std::string x )): X is used in Device only." << endl; - } - - - void SlicingNode::setY ( std::string y ) - { - cerr << "Error(void SlicingNode::setY ( std::string y )): Y is used in Device only." << endl; - } - - - void SlicingNode::setNFing ( std::string nfing ) - { - cerr << "Error(void SlicingNode::setNFing ( std::string nfing )): NFing is used in Device only." << endl; - } - - - void SlicingNode::setStart ( std::string start ) - { - cerr << "Error(void SlicingNode::setStart ( std::string start )): Start is used in Device only." << endl; - } - - - void SlicingNode::setStep ( std::string step ) - { - cerr << "Error(void SlicingNode::setStep ( std::string step )): Step is used in Device only." << endl; - } - - - void SlicingNode::setCount ( std::string count ) - { - cerr << "Error(void SlicingNode::setCount ( std::string count )): Count is used in Device only." << endl; - } - - - void SlicingNode::setPreset ( bool preset ) - { - cerr << "Error(void SlicingNode::setPreset ( bool preset )): Preset is used in Device only." << endl; - } - - - void SlicingNode::setX ( double x ) - { - cerr << "Error(void SlicingNode::setX ( double x )): X is used in Device only." << endl; - } - - - void SlicingNode::setY ( double y ) - { - cerr << "Error(void SlicingNode::setY ( double y )): Y is used in Device only." << endl; - } - - - void SlicingNode::setNFing ( int nfing ) - { - cerr << "Error(void SlicingNode::setNFing ( int nfing )): NFing is used in Device only." << endl; - } - - - void SlicingNode::setStart ( double start ) - { - cerr << "Error(void SlicingNode::setStart ( double start )): Start is used in Device only." << endl; - } - - - void SlicingNode::setStep ( double step ) - { - cerr << "Error(void SlicingNode::setStep ( double step )): Step is used in Device only." << endl; - } - - - void SlicingNode::setCount ( double count ) - { - cerr << "Error(void SlicingNode::setCount ( double count )): Count is used in Device only." << endl; - } - - - double SlicingNode::getToleranceRatioH () const - { - cerr << "Error(double SlicingNode::getToleranceRatioH ()): Tolerances are used in Horizontal or Vertical Node only." << endl; - return 0; - } - - - const vector SlicingNode::getChildren () const - { - cerr << "Error(const vector SlicingNode::getChildren () const): Children are used in Horizontal or Vertical Node only." << endl; - return vector(); - } - - - const list > SlicingNode::getSymmetries () const - { - cerr << "Error(list > SlicingNode::getSymmetries () const): Symmetries are used in Horizontal or Vertical Node only." << endl; - return list >(); - } - - - double SlicingNode::getToleranceRatioW () const - { - cerr << "Error(double SlicingNode::getToleranceRatioW ()): Tolerances are used in Horizontal or Vertical Node only." << endl; - return 0; - } - - - double SlicingNode::getToleranceBandH () const - { - cerr << "Error(double SlicingNode::getToleranceBandH ()): Tolerances are used in Horizontal or Vertical Node only." << endl; - return 0; - } - - - double SlicingNode::getToleranceBandW () const - { - cerr << "Error(double SlicingNode::getToleranceBandW ()): Tolerances are used in Horizontal or Vertical Node only." << endl; - return 0; - } - - - void SlicingNode::setToleranceRatioH ( std::string value ) - { - cerr << "Error(void SlicingNode::setToleranceRatioH ( std::string value )): Tolerances are used in Horizontal or Vertical Node only." << endl; - } - - - void SlicingNode::setToleranceRatioW ( std::string value ) - { - cerr << "Error(void SlicingNode::setToleranceRatioW ( std::string value )): Tolerances are used in Horizontal or Vertical Node only." << endl; - } - - - void SlicingNode::setToleranceBandH ( std::string value ) - { - cerr << "Error(void SlicingNode::setToleranceBandH ( std::string value )): Tolerances are used in Horizontal or Vertical Node only." << endl; - } - - - void SlicingNode::setToleranceBandW ( std::string value ) - { - cerr << "Error(void SlicingNode::setToleranceBandW ( std::string value )): Tolerances are used in Horizontal or Vertical Node only." << endl; - - } - - - void SlicingNode::setToleranceRatioH ( double value ) - { - cerr << "Error(void SlicingNode::setToleranceRatioH ( double value )): Tolerances are used in Horizontal or Vertical Node only." << endl; - } - - - void SlicingNode::setToleranceRatioW ( double value ) - { - cerr << "Error(void SlicingNode::setToleranceRatioW ( double value )): Tolerances are used in Horizontal or Vertical Node only." << endl; - } - - - void SlicingNode::setToleranceBandH ( double value ) - { - cerr << "Error(void SlicingNode::setToleranceBandH ( double value )): Tolerances are used in Horizontal or Vertical Node only." << endl; - } - - - void SlicingNode::setToleranceBandW ( double value ) - { - cerr << "Error(void SlicingNode::setToleranceBandW ( double value )): Tolerances are used in Horizontal or Vertical Node only." << endl; - - } - - - void SlicingNode::push_back ( SlicingNode* node ) - { - cerr << "Error(void SlicingNode::push_back ( SlicingNode* node )): Children are used in Horizontal or Vertical Node only." << endl; - } - - - void SlicingNode::addSymmetry ( std::string source, std::string target ) - { - cerr << "Error(void SlicingNode::addSymmetry ( std::string source, std::string target )): Symmetries are used in Horizontal or Vertical Node only." << endl; - } - - - void SlicingNode::addSymmetry ( int source, int target ) - { - cerr << "Error(void SlicingNode::addSymmetry ( int source, int target )): Symmetries are used in Horizontal or Vertical Node only." << endl; - } - - - double SlicingNode::getValue () const - { - cerr << "Error(double SlicingNode::getValue ()): Value is used in Routing Node only." << endl; - return 0; - } - - - void SlicingNode::setValue ( std::string value ) - { - cerr << "Error(void SlicingNode::setValue ( std::string value )): Value is used in Routing Node only." << endl; - } - - - string SlicingNode::presetToString () const - { - cerr << "Error(string SlicingNode::presetToString () const): Preset is used in Device only." << endl; - return ""; - } - - - string SlicingNode::xToString () const - { - cerr << "Error(string SlicingNode::xToString () const): X is used in Device only." << endl; - return ""; - } - - - string SlicingNode::yToString () const - { - cerr << "Error(string SlicingNode::yToString () const): Y is used in Device only." << endl; - return ""; - } - - - string SlicingNode::nfingToString () const - { - cerr << "Error(string SlicingNode::nfingToString () const): NFing is used in Device only." << endl; - return ""; - } - - - string SlicingNode::startToString () const - { - cerr << "Error(string SlicingNode::startToString () const): Start is used in Device only." << endl; - return ""; - } - - - string SlicingNode::stepToString () const - { - cerr << "Error(string SlicingNode::stepToString () const): Step is used in Device only." << endl; - return ""; - } - - - string SlicingNode::countToString () const - { - cerr << "Error(string SlicingNode::countToString () const): Count is used in Device only." << endl; - return ""; - } - - - string SlicingNode::valueToString () const - { - cerr << "Error(string SlicingNode::valueToString () const): Value is used in Routing Node only." << endl; - return ""; - } - - - string SlicingNode::toleranceRatioHToString () const - { - cerr << "Error(string SlicingNode::toleranceRatioHToString () const): Tolerances are used in Horizontal or Vertical Node only." << endl; - return ""; - } - - - string SlicingNode::toleranceRatioWToString () const - { - cerr << "Error(double SlicingNode::getToleranceRatioW ()): Tolerances are used in Horizontal or Vertical Node only." << endl; - return ""; - } - - - string SlicingNode::toleranceBandHToString () const - { - cerr << "Error(string SlicingNode::toleranceBandHToString () const): Tolerances are used in Horizontal or Vertical Node only." << endl; - return ""; - } - - - string SlicingNode::toleranceBandWToString () const - { - cerr << "Error(string SlicingNode::toleranceBandWToString () const): Tolerances are used in Horizontal or Vertical Node only." << endl; - return ""; - } - - bool SlicingNode::hasSameParentToleranceRatioH () const - { - cerr << "Error(bool SlicingNode::hasSameParentToleranceRatioH () const): Tolerances are used in Horizontal or Vertical Node only." << endl; - return false; - } - - - bool SlicingNode::hasSameParentToleranceRatioW () const - { - cerr << "Error(bool SlicingNode::hasSameParentToleranceRatioW () const): Tolerances are used in Horizontal or Vertical Node only." << endl; - return false; - } - - - bool SlicingNode::hasSameParentToleranceBandH () const - { - cerr << "Error(bool SlicingNode::hasSameParentToleranceBandH () const): Tolerances are used in Horizontal or Vertical Node only." << endl; - return false; - } - - - bool SlicingNode::hasSameParentToleranceBandW () const - { - cerr << "Error(bool SlicingNode::hasSameParentToleranceBandW () const): Tolerances are used in Horizontal or Vertical Node only." << endl; - return false; - } - - -// -----------------------------------------------------------------------------------------------// -// Class : DSlicingNode -// -----------------------------------------------------------------------------------------------// - - - DSlicingNode::DSlicingNode( std::string instanceName, SlicingNode* parent ): SlicingNode(parent) - { - _instanceName = instanceName; - _alignment = UnknownAlignment; - _preset = false; - _x = 0; - _y = 0; - _nfing = 0; - _start = 0; - _step = 0; - _count = 0; - } - - void DSlicingNode::setInstanceName( std::string instanceName ) - { - _instanceName = instanceName; - } - - - void DSlicingNode::setPreset( std::string preset ) - { - if ( preset == "true" ){ _preset = true ; } - else { _preset = false; } - } - - - void DSlicingNode::setX( std::string x ) - { - std::string::size_type sz; - _x = stof(x, &sz); - } - - - void DSlicingNode::setY( std::string y ) - { - std::string::size_type sz; - _y = stof(y, &sz); - } - - - void DSlicingNode::setNFing( std::string nfing ) - { - std::string::size_type sz; - _nfing = stoi(nfing, &sz); - } - - - void DSlicingNode::setStart( std::string start ) - { - std::string::size_type sz; - _start = stod(start, &sz); - } - - - void DSlicingNode::setStep( std::string step ) - { - std::string::size_type sz; - _step = stod(step, &sz); - } - - - void DSlicingNode::setCount( std::string count ) - { - std::string::size_type sz; - _count = stod(count, &sz); - } - - - void DSlicingNode::print() const - { - cerr << "instance : " << _instanceName << endl; - - if (_parent != NULL){ - unsigned int type = _parent->getType(); - if ( type == HorizontalSNode ){ cerr << "Parent : Type: HorizontalSNode" ; } - else if ( type == VerticalSNode ){ cerr << "Parent : Type: VerticalSNode" ; } - else { cerr << "Parent : Type: UnknownType"; } - cerr << ", trh: " << _parent->getToleranceRatioH(); - cerr << ", trw: " << _parent->getToleranceRatioW(); - cerr << ", tbh: " << _parent->getToleranceBandH(); - cerr << ", tbw: " << _parent->getToleranceBandW(); - cerr << endl; - } else { - cerr << "Parent : None " << endl; - } - - if ( _alignment == AlignLeft ){ cerr << "alignment: AlignLeft" << endl; } - else if ( _alignment == AlignRight ){ cerr << "alignment: AlignRight" << endl; } - else if ( _alignment == AlignCenter ){ cerr << "alignment: AlignCenter" << endl; } - else if ( _alignment == AlignTop ){ cerr << "alignment: AlignTop" << endl; } - else if ( _alignment == AlignBottom ){ cerr << "alignment: AlignBottom" << endl; } - else { cerr << "alignment: Unknown" << endl; } - cerr << "preset : " << _preset << endl; - cerr << "x : " << _x << endl; - cerr << "y : " << _y << endl; - cerr << "nfing : " << _nfing << endl; - cerr << "start : " << _start << endl; - cerr << "step : " << _step << endl; - cerr << "count : " << _count << endl; - cerr << "type : Device" << endl; - cerr << endl; - } - - - void DSlicingNode::toXML ( ofstream& file, unsigned indent ) - { - for (unsigned i = 0 ; i < indent ; i++){ file << " "; } - file << "" << endl; - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - if (_preset){ - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - } - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - for (unsigned i = 0 ; i < indent ; i++){ file << " "; } - file << "" << endl; - } - - - bool DSlicingNode::checkInitialPlacement ( int& cpt ) const - { - bool initialPlacement = false; - if ( cpt < 2 ){ - if ( (_x == 0) && (_y == 0) ){ - cpt++; - if ( cpt < 2 ) { initialPlacement = true; } - } - else { initialPlacement = true; } - } - return initialPlacement; - } - - -// -----------------------------------------------------------------------------------------------// -// Class : HVSlicingNode -// -----------------------------------------------------------------------------------------------// - - - HVSlicingNode::HVSlicingNode( SlicingNode* parent ): SlicingNode( parent ) - { - _alignment = UnknownAlignment; - _toleranceRatioH = 0; - _toleranceRatioW = 0; - _toleranceBandH = 0; - _toleranceBandW = 0; - _symmetries = list > (); - _children = vector (); - } - - - void HVSlicingNode::setToleranceRatioH( std::string value ) - { - std::string::size_type sz; - _toleranceRatioH = stof(value, &sz); - } - - - void HVSlicingNode::setToleranceRatioW( std::string value ) - { - std::string::size_type sz; - _toleranceRatioW = stof(value, &sz); - } - - - void HVSlicingNode::setToleranceBandH( std::string value ) - { - std::string::size_type sz; - _toleranceBandH = stof(value, &sz); - } - - - void HVSlicingNode::setToleranceBandW( std::string value ) - { - std::string::size_type sz; - _toleranceBandW = stof(value, &sz); - } - - - void HVSlicingNode::setToleranceRatioH( double value ) - { - _toleranceRatioH = value; - } - - - void HVSlicingNode::setToleranceRatioW( double value ) - { - _toleranceRatioW = value; - } - - - void HVSlicingNode::setToleranceBandH( double value ) - { - _toleranceBandH = value; - } - - - void HVSlicingNode::setToleranceBandW( double value ) - { - _toleranceBandW = value; - } - - - void HVSlicingNode::push_back( SlicingNode* node ) - { - if (node != NULL){ - node->setParent(this); - _children.push_back(node); - } - } - - - void HVSlicingNode::addSymmetry( string source, string target ) - { - std::string::size_type sz; - int isource = stoi(source, &sz); - int itarget = stoi(target, &sz); - _symmetries.push_back(pair(isource, itarget)); - } - - - void HVSlicingNode::addSymmetry( int source, int target ) - { - _symmetries.push_back(pair(source, target)); - } - - - void HVSlicingNode::recursiveDestroy() - { - for (std::vector::iterator it = _children.begin(); it != _children.end(); it++){ - (*it)->recursiveDestroy(); - } - delete(this); - } - - - void HVSlicingNode::print() const - { - if ( _alignment == AlignLeft ){ cerr << "alignment: AlignLeft" << endl; } - else if ( _alignment == AlignRight ){ cerr << "alignment: AlignRight" << endl; } - else if ( _alignment == AlignCenter ){ cerr << "alignment: AlignCenter" << endl; } - else if ( _alignment == AlignTop ){ cerr << "alignment: AlignTop" << endl; } - else if ( _alignment == AlignBottom ){ cerr << "alignment: AlignBottom" << endl; } - else { cerr << "alignment: Unknown" << endl; } - cerr << "tRatioH : " << _toleranceRatioH << endl; - cerr << "tRatioW : " << _toleranceRatioW << endl; - cerr << "tBandH : " << _toleranceBandH << endl; - cerr << "tBandW : " << _toleranceBandW << endl; - } - - - bool HVSlicingNode::hasSameParentToleranceRatioH () const - { - bool same = false; - if (_parent){ - same = (_toleranceRatioH == _parent->getToleranceRatioH()); - } - return same; - } - - - bool HVSlicingNode::hasSameParentToleranceRatioW () const - { - bool same = false; - if (_parent){ - same = (_toleranceRatioW == _parent->getToleranceRatioW()); - } - return same; - } - - - bool HVSlicingNode::hasSameParentToleranceBandH () const - { - bool same = false; - if (_parent){ - same = (_toleranceBandH == _parent->getToleranceBandH()); - } - return same; - } - - - bool HVSlicingNode::hasSameParentToleranceBandW () const - { - bool same = false; - if (_parent){ - same = (_toleranceBandW == _parent->getToleranceBandW()); - } - return same; - } - - - bool HVSlicingNode::checkInitialPlacement( int& cpt ) const - { - bool initialPlacement = false; - if (cpt < 2){ - initialPlacement = true; - for (vector::const_iterator it = _children.begin(); it != _children.end(); it++){ - if (cpt < 2){ initialPlacement = (*it)->checkInitialPlacement(cpt); } - } - } - return initialPlacement; - } - - - list HVSlicingNode::getLeaves () const - { - list leaves = list(); - for (vector::const_iterator it = _children.begin(); it != _children.end(); it++){ - if ( ((*it)->getType() == DeviceSNode) || ((*it)->getType() == RoutingSNode) ){ - leaves.push_back((*it)); - } else { - leaves.splice(leaves.end(), (*it)->getLeaves()); - } - } - return leaves; - } - - -// -----------------------------------------------------------------------------------------------// -// Class : HSlicingNode -// -----------------------------------------------------------------------------------------------// - - - HSlicingNode::HSlicingNode( SlicingNode* parent ): HVSlicingNode(parent) - { - _alignment = AlignLeft; - } - - - void HSlicingNode::print() const - { - cerr << "type : Horizontal " << endl; - - if (_parent != NULL){ - unsigned int type = _parent->getType(); - if ( type == HorizontalSNode ){ cerr << "Parent : Type: HorizontalSNode" ; } - else if ( type == VerticalSNode ){ cerr << "Parent : Type: VerticalSNode" ; } - else { cerr << "Parent : Type: UnknownType"; } - cerr << ", trh: " << _parent->getToleranceRatioH(); - cerr << ", trw: " << _parent->getToleranceRatioW(); - cerr << ", tbh: " << _parent->getToleranceBandH(); - cerr << ", tbw: " << _parent->getToleranceBandW(); - cerr << endl; - } else { - cerr << "Parent : None " << endl; - } - HVSlicingNode::print(); - - for (list >::const_iterator it1 = _symmetries.begin(); it1 != _symmetries.end(); it1++){ - cerr << "Symmetrie: (" << (*it1).first << " - " << (*it1).second << ")" << endl; - } - cerr << endl; - - for(vector::const_iterator it = _children.begin(); it != _children.end(); it++ ){ - (*it)->print(); - } - cerr << endl; - } - - - void HSlicingNode::toXML ( ofstream& file, unsigned indent ) - { - for (unsigned i = 0 ; i < indent ; i++){ file << " "; } - file << "" << endl; - - // Parameters - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - - if (!hasSameParentToleranceRatioH ()){ - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - } - - if (!hasSameParentToleranceRatioW ()){ - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - } - - if (!hasSameParentToleranceBandH ()){ - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - } - - if (!hasSameParentToleranceBandW ()){ - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - } - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - // Symmetries - if (!_symmetries.empty()){ - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - for ( std::list >::const_iterator it = _symmetries.begin(); it != _symmetries.end(); it++ ){ - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - } - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - } - - // Children - if (!_children.empty()){ - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - for (std::vector::const_iterator it2 = _children.begin(); it2 != _children.end(); it2++){ - (*it2)->toXML(file, indent+2); - } - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - } - - for (unsigned i = 0 ; i < indent ; i++){ file << " "; } - file << "" << endl; - } - - -// -----------------------------------------------------------------------------------------------// -// Class : VSlicingNode -// -----------------------------------------------------------------------------------------------// - - - VSlicingNode::VSlicingNode( SlicingNode* parent ): HVSlicingNode(parent) - { - _alignment = AlignBottom; - } - - - void VSlicingNode::print() const - { - cerr << "type : Vertical " << endl; - - if (_parent != NULL){ - unsigned int type = _parent->getType(); - if ( type == HorizontalSNode ){ cerr << "Parent : Type: HorizontalSNode" ; } - else if ( type == VerticalSNode ){ cerr << "Parent : Type: VerticalSNode" ; } - else { cerr << "Parent : Type: UnknownType"; } - cerr << ", trh: " << _parent->getToleranceRatioH(); - cerr << ", trw: " << _parent->getToleranceRatioW(); - cerr << ", tbh: " << _parent->getToleranceBandH(); - cerr << ", tbw: " << _parent->getToleranceBandW(); - cerr << endl; - } else { - cerr << "Parent : None " << endl; - } - HVSlicingNode::print(); - - for (list >::const_iterator it1 = _symmetries.begin(); it1 != _symmetries.end(); it1++){ - cerr << "Symmetrie: (" << (*it1).first << " - " << (*it1).second << ")" << endl; - } - cerr << endl; - - for(vector::const_iterator it = _children.begin(); it != _children.end(); it++ ){ - (*it)->print(); - } - cerr << endl; - } - - - void VSlicingNode::toXML ( ofstream& file, unsigned indent ) - { - for (unsigned i = 0 ; i < indent ; i++){ file << " "; } - file << "" << endl; - - // Parameters - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - - if (!hasSameParentToleranceRatioH ()){ - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - } - - if (!hasSameParentToleranceRatioW ()){ - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - } - - if (!hasSameParentToleranceBandH ()){ - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - } - - if (!hasSameParentToleranceBandW ()){ - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - } - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - // Symmetries - if (!_symmetries.empty()){ - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - for ( std::list >::const_iterator it = _symmetries.begin(); it != _symmetries.end(); it++ ){ - for (unsigned i = 0 ; i < indent+2 ; i++){ file << " "; } - file << "" << endl; - } - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - } - - // Children - if (!_children.empty()){ - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - - for (std::vector::const_iterator it2 = _children.begin(); it2 != _children.end(); it2++){ - (*it2)->toXML(file, indent+2); - } - - for (unsigned i = 0 ; i < indent+1 ; i++){ file << " "; } - file << "" << endl; - } - - for (unsigned i = 0 ; i < indent ; i++){ file << " "; } - file << "" << endl; - } - - -// -----------------------------------------------------------------------------------------------// -// Class : RSlicingNode -// -----------------------------------------------------------------------------------------------// - - - RSlicingNode::RSlicingNode( std::string value, SlicingNode* parent ): SlicingNode(parent) - { - std::string::size_type sz; - _value = stof(value, &sz); - } - - - RSlicingNode::RSlicingNode( double value, SlicingNode* parent ): SlicingNode(parent) - { - _value = value; - } - - - void RSlicingNode::setValue( string value ) - { - std::string::size_type sz; - _value = stof(value, &sz); - } - - - void RSlicingNode::print() const - { - cerr << "type : Routing " << endl; - cerr << "value : " << _value << endl; - cerr << endl; - } - - - void RSlicingNode::toXML ( ofstream& file, unsigned indent ) - { - for (unsigned i = 0 ; i < indent ; i++){ file << " "; } - file << "" << endl; - } - -} // OpenChams namespace diff --git a/vlsisapd/src/openChams/src/Transistor.cpp b/vlsisapd/src/openChams/src/Transistor.cpp deleted file mode 100644 index beb78276..00000000 --- a/vlsisapd/src/openChams/src/Transistor.cpp +++ /dev/null @@ -1,71 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Transistor.cpp" | -// +-----------------------------------------------------------------+ - - -#include -using namespace std; - -#include "vlsisapd/openChams/Transistor.h" -#include "vlsisapd/openChams/Instance.h" -#include "vlsisapd/openChams/Net.h" -#include "vlsisapd/openChams/OpenChamsException.h" - - -namespace OpenChams { - - - Transistor::Transistor(const std::string& name, Instance* instance) - : _name (name) - , _gate ("") - , _source ("") - , _drain ("") - , _bulk ("") - , _instance(instance) - { } - - - void Transistor::setGate(const std::string& gate) - { if (checkConnector(gate)) _gate = gate; } - - - void Transistor::setSource(const std::string& source) - { if (checkConnector(source)) _source = source; } - - void Transistor::setDrain(const std::string& drain) - { if (checkConnector(drain)) _drain = drain; } - - - void Transistor::setBulk(const std::string& bulk) - { if (checkConnector(bulk)) _bulk = bulk; } - - - bool Transistor::checkConnector(const std::string& name) - { - map::const_iterator it = _instance->getConnectors().find(name); - if (it != _instance->getConnectors().end()) {// si le connecteur existe bien - return true; - } else { - string error("[ERROR] Instance "); - error += _instance->getName(); - error += " has no connector named "; - error += name; - error += "."; - throw OpenChamsException(error); - } - } - - -} // OpenChams namespace. diff --git a/vlsisapd/src/openChams/src/Wire.cpp b/vlsisapd/src/openChams/src/Wire.cpp deleted file mode 100644 index 591e9914..00000000 --- a/vlsisapd/src/openChams/src/Wire.cpp +++ /dev/null @@ -1,76 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2011-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Module : "./Wire.cpp" | -// +-----------------------------------------------------------------+ - - -#include "vlsisapd/openChams/Wire.h" -#include "vlsisapd/openChams/OpenChamsException.h" -using namespace std; - -namespace OpenChams { - - - void Wire::setStartPoint(const string& name, const string& plug) - { - if (_start) - throw OpenChamsException("[ERROR] Wire::setStartPoint: cannot set start point since it has already been set."); - - _start = new InstancePoint(name, plug); - } - - - void Wire::setStartPoint(unsigned idx) - { - if (_start) - throw OpenChamsException("[ERROR] Wire::setStartPoint: cannot set start point since it has already been set."); - - _start = new PortPoint(idx); - } - - - void Wire::setEndPoint(const string& name, const string& plug) - { - if (!_start) - throw OpenChamsException("[ERROR] Wire::setEndPoint: cannot set end point since start point has not been set."); - if (_end) - throw OpenChamsException("[ERROR] Wire::setEndPoint: cannot set end point since it has already been set."); - - _end = new InstancePoint(name, plug); - } - - - void Wire::setEndPoint(unsigned idx) - { - if (!_start) - throw OpenChamsException("[ERROR] Wire::setEndPoint: cannot set end point since start point has not been set."); - if (_end) - throw OpenChamsException("[ERROR] Wire::setEndPoint: cannot set end point since it has already been set."); - - _end = new PortPoint(idx); - } - - - void Wire::addIntermediatePoint(double x, double y) - { - if (!_start) - throw OpenChamsException("[ERROR] Wire::addIntermediatePoint: cannot add point since start point has not been set."); - if (_end) - throw OpenChamsException("[ERROR] Wire::addIntermediatePoint: cannot add point since end point has already been set."); - - _inters.push_back(new IntermediatePoint(x, y)); - } - - -} // OpenChams namespace. diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Circuit.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Circuit.h deleted file mode 100644 index 718d6dab..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Circuit.h +++ /dev/null @@ -1,195 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2009-2018, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | Eric Lao | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Circuit.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_CIRCUIT_H__ -#define __OPENCHAMS_CIRCUIT_H__ - -#include -#include -#include - -#include -#include - -#include "vlsisapd/openChams/Parameters.h" -#include "vlsisapd/openChams/SimulModel.h" -#include "vlsisapd/openChams/SlicingTree.h" - - -namespace OpenChams { - - class Netlist; - class Instance; - class Device; - class Net; - class Schematic; - class Sizing; - class Transistor; - class Operator; - class Layout; - class Node; - - class Circuit { - public: - Circuit ( const std::string&, const std::string& techno ); - // Accessors. - inline const std::string& getName (); - inline const std::string& getTechno (); - inline const std::string& getValue ( const std::string& ); - inline Netlist* getNetlist (); - inline Schematic* getSchematic (); - inline Sizing* getSizing (); - inline Layout* getLayout (); - inline void addParameter ( const std::string&, const char* ); - inline void addParameter ( const std::string&, const std::string& ); - inline Parameters getParameters (); - inline void addSubCircuitPath ( std::string ); - inline std::vector& getSubCircuitPaths (); - inline SlicingNode* getSlicingTree (); - // Mutators. - void addSimulModel ( unsigned - , SimulModel::Base - , SimulModel::Version - , std::string ); - inline void setSizing ( Sizing* ); - inline void setLayout ( Layout* ); - Netlist* createNetlist (); - Schematic* createSchematic (); - Sizing* createSizing (); - Layout* createLayout (); - void setSlicingTree ( SlicingNode* slicingtree ); - void driveHBTree ( std::ofstream&, Node*, unsigned ); - void driveSlicingTree ( std::ofstream&, SlicingNode*, unsigned ); - bool writeToFile ( std::string filePath ); - static Circuit* readFromFile ( const std::string filePath ); - - private: - // Internal methods (XML parser). - std::string readParameter ( xmlNode*, const xmlChar*& ); - std::string readParameterEq ( xmlNode*, std::string& ); - std::string readConnector ( xmlNode* ); - void readSubCircuitsPaths ( xmlNode* ); - void readCircuitParameters ( xmlNode* ); - void readSimulModels ( xmlNode* ); - void readNetList ( xmlNode* ); - void readInstances ( xmlNode*, Netlist* ); - Instance* readInstance ( xmlNode*, Netlist* ); - void readInstanceParameters ( xmlNode*, Instance* ); - void readInstanceConnectors ( xmlNode*, Instance* ); - void readInstanceTransistors ( xmlNode*, Device* ); - void readTransistor ( xmlNode*, Device* ); - void readTransistorConnection ( xmlNode*, Transistor* ); - void readNets ( xmlNode*, Netlist* ); - Net* readNet ( xmlNode*, Netlist* ); - void readNetConnector ( xmlNode*, Net* ); - void readSchematic ( xmlNode* ); - void readInstanceSchematic ( xmlNode*, Schematic* ); - void readNetSchematic ( xmlNode*, Circuit* ); - void readPortSchematic ( xmlNode*, Net* ); - void readWireSchematic ( xmlNode*, Net* ); - void readSizing ( xmlNode* ); - void readInstanceSizing ( xmlNode*, Sizing* ); - void readConstraint ( xmlNode*, Operator* ); - // Equation related XML methods. - void readEquations ( xmlNode*, Sizing* ); - void readEquation_CircuitLevel ( xmlNode*, Sizing* ); - void readEquation_NRC ( xmlNode*, Sizing* ); - void readEquation_DDPs ( xmlNode*, Sizing* ); - void readEquation_DesignerCstr ( xmlNode*, Sizing* ); - // Layout related XML methods. - void readLayout ( xmlNode* ); - void readInstanceLayout ( xmlNode*, Layout* ); - void readHBTree ( xmlNode*, Layout* ); - Node* readNodeOrBloc ( xmlNode*, Node* parent = NULL ); - void setAbsolutePath ( const std::string filePath ); - // Slicingtree related XML methods. - void readSlicingTree ( xmlNode* ); - SlicingNode* readSlicingNode ( xmlNode* xnode, SlicingNode* slicingNode = NULL ); - VSlicingNode* createVerticalSlicingNode ( xmlNode* xnode, SlicingNode* slicingNode = NULL ); - HSlicingNode* createHorizontalSlicingNode ( xmlNode* xnode, SlicingNode* slicingNode = NULL ); - DSlicingNode* createDeviceSlicingNode ( xmlNode* xnode, SlicingNode* slicingNode = NULL ); - RSlicingNode* createRoutingSlicingNode ( xmlNode* xnode, SlicingNode* slicingNode = NULL ); - void addChildren ( xmlNode*, HVSlicingNode* ); - void setHVParameters ( xmlNode*, HVSlicingNode* ); - void setHVSymmetries ( xmlNode*, HVSlicingNode* ); - - // Utilities methods. - void check_uppercase ( std::string& str, std::vector& compares, std::string message ); - void check_lowercase ( std::string& str, std::vector& compares, std::string message ); - - private: - std::string _name; - std::string _absolutePath; - std::string _techno; - Parameters _params; - Netlist* _netlist; - Schematic* _schematic; - Sizing* _sizing; - Layout* _layout; - std::vector _subCircuitsPaths; - std::map _simulModels; - SlicingNode* _slicingtree; - }; - - - inline const std::string& Circuit::getName () { return _name; } - inline const std::string& Circuit::getTechno () { return _techno; } - inline const std::string& Circuit::getValue (const std::string& name) { return _params.getValue(name); } - inline Netlist* Circuit::getNetlist () { return _netlist; } - inline Schematic* Circuit::getSchematic () { return _schematic; } - inline Sizing* Circuit::getSizing () { return _sizing; } - inline Layout* Circuit::getLayout () { return _layout; } - inline void Circuit::addParameter (const std::string& name, const char* value) { _params.addParameter(name, value); } - inline void Circuit::addParameter (const std::string& name, const std::string& value) { _params.addParameter(name, value); } - inline Parameters Circuit::getParameters () { return _params; } - inline void Circuit::addSubCircuitPath (std::string path) { _subCircuitsPaths.push_back(path); } - inline std::vector& Circuit::getSubCircuitPaths () { return _subCircuitsPaths; } - inline SlicingNode* Circuit::getSlicingTree () { return _slicingtree; } - - template - inline std::string asString ( T value ) - { std::ostringstream output; output << value; return output.str(); } - - - std::string asStringBool ( bool ); - std::string asStringDirection ( long ); - - - template - inline T stringAs ( const char* str ) - { T value; std::istringstream input(str); input >> value; return value; } - - - template - inline T stringAs ( const xmlChar* str ) - { T value; std::istringstream input((const char*)str); input >> value; return value; } - - - template - inline T stringAs ( const std::string& str ) - { return stringAs(str.c_str()); } - - - bool stringAsBool ( const std::string& ); - long stringAsDirection ( const std::string& ); - - -} // namespace OpenChams. - -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/DDP.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/DDP.h deleted file mode 100644 index d27ada63..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/DDP.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * DDP.h - * openChams - * - * Created by Farakh JAVID on 25/10/2011. - * Copyright 2008-2010 UPMC / LIP6. All rights reserved. - * - */ - -#ifndef __OPENCHAMS_DDP_H__ -#define __OPENCHAMS_DDP_H__ - -#include "vlsisapd/openChams/Equation.h" - -namespace OpenChams { - class DDP : public Equation { - public: - DDP(); - - virtual void printEquations(); - }; - -} // namespace -#endif diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/DesignerCstrOC.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/DesignerCstrOC.h deleted file mode 100644 index 6b538601..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/DesignerCstrOC.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * DesignerCstrOC.h - * openChams - * - * Created by Farakh JAVID on 25/10/2011. - * Copyright 2008-2010 UPMC / LIP6. All rights reserved. - * - */ - -#ifndef __OPENCHAMS_DESIGNERCSTROC_H__ -#define __OPENCHAMS_DESIGNERCSTROC_H__ - -#include "vlsisapd/openChams/Equation.h" - -namespace OpenChams { - class DesignerCstrOC : public Equation { - public: - DesignerCstrOC(); - - virtual void printEquations(); - }; - -} // namespace -#endif diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Device.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Device.h deleted file mode 100644 index 93f36ae0..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Device.h +++ /dev/null @@ -1,65 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Instance.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_DEVICE_H__ -#define __OPENCHAMS_DEVICE_H__ - -#include -#include - -#include "vlsisapd/openChams/Instance.h" -#include "vlsisapd/openChams/Parameters.h" - - -namespace OpenChams { - - class Netlist; - class Transistor; - - - class Device : public Instance { - public: - Device ( const std::string& name - , const std::string& model - , unsigned order - , const std::string& mosType - , bool sourceBulkConnected - , Netlist* ); - virtual ~Device (); - inline const std::string& getMosType (); - inline bool isSourceBulkConnected (); - // Pour parcourir les transistors - inline bool hasNoTransistors (); - inline const std::vector& getTransistors (); - Transistor* addTransistor (const std::string&); - - private: - std::string _mosType; - bool _sourceBulkConnected; - std::vector _trans; - }; - - - inline const std::string& Device::getMosType () { return _mosType; }; - inline bool Device::isSourceBulkConnected() { return _sourceBulkConnected; }; - inline bool Device::hasNoTransistors () { return (_trans.size() == 0)? true : false; }; - inline const std::vector& Device::getTransistors () { return _trans; }; - -} // namespace -#endif - - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Equation.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Equation.h deleted file mode 100644 index 624fea54..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Equation.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Equation.h - * openChams - * - * Created by Farakh JAVID on 25/10/2011. - * Copyright 2008-2010 UPMC / LIP6. All rights reserved. - * - */ - -#ifndef __OPENCHAMS_EQUATION_H__ -#define __OPENCHAMS_EQUATION_H__ - -#include -#include -//using namespace std; - -namespace OpenChams { - class Equation { - public: - Equation(); - - void addEquation(std::string eq); - inline std::map& getEquationStr(); - virtual void printEquations() = 0; - - protected: - std::map _equations; // this map contains the equation(s) - // std::vector _paramsInEquation; // - }; - - inline std::map& Equation::getEquationStr() {return _equations;} - -} // namespace -#endif diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/HighLevelCstr.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/HighLevelCstr.h deleted file mode 100644 index 4233eeda..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/HighLevelCstr.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * HighLevelCstr.h - * openChams - * - * Created by Farakh JAVID on 25/10/2011. - * Copyright 2008-2010 UPMC / LIP6. All rights reserved. - * - */ - -#ifndef __OPENCHAMS_HIGHLEVELCSTR_H__ -#define __OPENCHAMS_HIGHLEVELCSTR_H__ - -#include "vlsisapd/openChams/Equation.h" - -namespace OpenChams { - class HighLevelCstr : public Equation { - public: - HighLevelCstr(); - - virtual void printEquations(); - }; - -} // namespace -#endif diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Instance.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Instance.h deleted file mode 100644 index 7141681f..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Instance.h +++ /dev/null @@ -1,76 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Instance.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_INSTANCE_H__ -#define __OPENCHAMS_INSTANCE_H__ - -#include -#include -#include - -#include "vlsisapd/openChams/Parameters.h" - - -namespace OpenChams { - - class Netlist; - class Net; - - class Instance { - public: - Instance (const std::string& name, const std::string& model, unsigned, Netlist*); - virtual ~Instance (); - - void addConnector (const std::string&); - void connect (const std::string& connectorName, const std::string& netName); - - inline void addParameter (const std::string&, const char* ); - inline void addParameter (const std::string&, const std::string& ); - inline const std::string& getName () const; - inline const std::string& getModel () const; - inline unsigned getOrder (); - inline Netlist* getNetlist (); - inline Parameters getParameters (); - inline bool hasNoConnectors (); - inline const std::map& - getConnectors (); - - private: - std::string _name; - std::string _model; - unsigned _order; - Netlist* _netlist; - Parameters _params; - std::map _netMap; - }; - - - inline void Instance::addParameter (const std::string& name, const char* value) { _params.addParameter(name,value); }; - inline void Instance::addParameter (const std::string& name, const std::string& value) { _params.addParameter(name,value); }; - inline const std::string& Instance::getName () const { return _name; }; - inline const std::string& Instance::getModel () const { return _model; }; - inline unsigned Instance::getOrder () { return _order; }; - inline Netlist* Instance::getNetlist () { return _netlist; }; - inline Parameters Instance::getParameters () { return _params; }; - inline bool Instance::hasNoConnectors () { return _netMap.empty(); }; - inline const std::map& Instance::getConnectors () { return _netMap; }; - - -} // OpenChams namespace. - -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Layout.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Layout.h deleted file mode 100644 index 501d1859..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Layout.h +++ /dev/null @@ -1,55 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2008-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Layout.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_LAYOUT_H__ -#define __OPENCHAMS_LAYOUT_H__ - -#include -#include - - -namespace OpenChams { - - class Circuit; - class Node; - - - class Layout { - public: - Layout (Circuit*); - void addInstance (const std::string& name, const std::string& style); - inline bool hasNoInstance (); - inline Node* getHBTreeRoot (); - inline void setHBTreeRoot (Node*); - inline const std::map& getInstances(); - private: - Circuit* _circuit; - Node* _hbTreeRoot; - std::map _instances; // device name <-> style (name) - }; - - - inline bool Layout::hasNoInstance () { return _instances.empty(); }; - inline Node* Layout::getHBTreeRoot () { return _hbTreeRoot; } - inline void Layout::setHBTreeRoot (Node* root) { _hbTreeRoot = root; } - inline const std::map& Layout::getInstances() { return _instances; } - - -} // namespace - -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/NRCCstr.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/NRCCstr.h deleted file mode 100644 index 8cdf0602..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/NRCCstr.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * NRCCstr.h - * openChams - * - * Created by Farakh JAVID on 25/10/2011. - * Copyright 2008-2010 UPMC / LIP6. All rights reserved. - * - */ - -#ifndef __OPENCHAMS_NRCCSTR_H__ -#define __OPENCHAMS_NRCCSTR_H__ - -#include "vlsisapd/openChams/Equation.h" - -namespace OpenChams { - class NRCCstr : public Equation { - public: - NRCCstr(string controlVoltage); - - inline void setVoltage(std::string s); - inline std::string getVoltage(); - - virtual void printEquations(); - - private: - std::string _controlVoltage; - }; - - inline void NRCCstr::setVoltage(std::string s) {_controlVoltage = s;} - inline std::string NRCCstr::getVoltage() {return _controlVoltage;} - -} // namespace -#endif diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Net.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Net.h deleted file mode 100644 index f6bf3754..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Net.h +++ /dev/null @@ -1,89 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Net.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_NET_H__ -#define __OPENCHAMS_NET_H__ - -#include -#include - - -namespace OpenChams { - - class Netlist; - class Port; - class Wire; - - class Net { - public: - class Connection { - public: - Connection (const std::string& instanceName, const std::string& connectorName); - inline const std::string& getInstanceName () const; - inline const std::string& getConnectorName() const; - private: - std::string _instanceName; - std::string _connectorName; - }; - - public: - Net (const std::string& netName, const std::string& typeName, bool, Netlist*); - void connectTo (const std::string& instanceName, const std::string& connectorName); - inline const std::string& getName () const; - inline const std::string& getType (); - inline bool isExternal (); - inline Netlist* getNetlist (); - inline bool hasNoConnections (); - inline const std::vector& getConnections(); - // schematic relative methods - Port* addPort (const std::string& type, unsigned idx, double x, double y, const std::string& orient); - Wire* addWire (); - inline bool hasNoPorts (); - inline const std::vector& getPorts (); - inline bool hasNoWires (); - inline const std::vector& getWires (); - - private: - std::string _name; - std::string _typeName; - bool _isExternal; - Netlist* _netlist; - std::vector _connections; // - // schematic relative members - std::vector _ports; - std::vector _wires; - }; - - -inline const std::string& Net::getName () const { return _name; } -inline const std::string& Net::getType () { return _typeName; } -inline bool Net::isExternal () { return _isExternal; } -inline Netlist* Net::getNetlist () { return _netlist; } -inline bool Net::hasNoConnections() { return (_connections.size() == 0)? true : false; } -inline const std::vector& Net::getConnections() { return _connections; } -inline bool Net::hasNoPorts () { return (_ports.size() == 0)? true : false; } -inline const std::vector& Net::getPorts () { return _ports; } -inline bool Net::hasNoWires () { return (_wires.size() == 0)? true : false; } -inline const std::vector& Net::getWires () { return _wires; } - - -inline const std::string& Net::Connection::getInstanceName () const { return _instanceName; }; -inline const std::string& Net::Connection::getConnectorName() const { return _connectorName; }; - -} // namespace -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Netlist.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Netlist.h deleted file mode 100644 index 5b180b88..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Netlist.h +++ /dev/null @@ -1,61 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Netlist.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_NETLIST_H__ -#define __OPENCHAMS_NETLIST_H__ - -#include - -namespace OpenChams { - - class Instance; - class Device; - class Net; - class Circuit; - - - class Netlist { - public: - Netlist (Circuit*); - Instance* addInstance (const std::string& name, const std::string& model, unsigned); - Device* addDevice (const std::string& name, const std::string& model, unsigned, const std::string& mosType, bool); - Net* addNet (const std::string& name, const std::string& type , bool); - Instance* getInstance (const std::string&); - Net* getNet (const std::string&); - inline bool hasNoInstances (); - inline bool hasNoNets (); - inline const std::vector& getInstances (); - inline const std::vector& getNets (); - inline Circuit* getCircuit (); - private: - Circuit* _circuit; - std::vector _instances; - std::vector _nets; - }; - - - inline bool Netlist::hasNoInstances() { return _instances.empty(); } - inline bool Netlist::hasNoNets () { return _nets.empty(); } - inline const std::vector& Netlist::getInstances () { return _instances; } - inline const std::vector& Netlist::getNets () { return _nets; } - inline Circuit* Netlist::getCircuit () { return _circuit; } - - -} // OpenChams namespace. - -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Node.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Node.h deleted file mode 100644 index 5d0e8bd9..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Node.h +++ /dev/null @@ -1,101 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2011-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Node.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_NODE_H__ -#define __OPENCHAMS_NODE_H__ - -#include - - -namespace OpenChams { - - - class Node { - public: - enum Position { NONE=0, RIGHT=1, TOP=2 }; - public: - inline const std::string& getName () const; - inline Position getPosition () const; - inline Node* getParent (); - inline Node* getRight (); - inline Node* getTop (); - inline bool isRoot (); - inline void setRight (Node*); - inline void setTop (Node*); - protected: - Node (const std::string& nodeName, Position pos, Node* parent); - virtual ~Node () {}; - private: - std::string _name; - Position _position; - Node* _parent; - Node* _right; - Node* _top; - }; - - - inline const std::string& Node::getName () const { return _name; } - inline Node::Position Node::getPosition() const { return _position; } - inline Node* Node::getParent () { return _parent; } - inline Node* Node::getRight () { return _right; } - inline Node* Node::getTop () { return _top; } - inline bool Node::isRoot () { return _parent == NULL; } - inline void Node::setRight (Node* right) { _right = right; } - inline void Node::setTop (Node* top) { _top = top; } - - - class Bloc : public Node { - public: - Bloc(const std::string& blocName, Position pos=Node::NONE, Node* parent=NULL); - }; - - - class Group : public Node { - public: - enum Align { NONE=0 , VERTICAL=1 , HORIZONTAL=2 }; - public: - Group (const std::string& groupName, Position pos=Node::NONE, Node* parent=NULL); - inline void setRootNode (Node*); - inline void setIsolated (bool); - inline void setPaired (bool); - inline void setAlign (Align); - inline Node* getRootNode (); - inline bool isIsolated (); - inline bool isPaired (); - inline Align getAlign (); - private: - Node* _root; - bool _isolated; - bool _paired; - Align _align; - }; - - - inline void Group::setRootNode(Node* root) { _root = root; } - inline void Group::setIsolated(bool isolated) { _isolated = isolated; } - inline void Group::setPaired (bool paired) { _paired = paired; } - inline void Group::setAlign (Group::Align align) { _align = align; } - inline Node* Group::getRootNode() { return _root; } - inline bool Group::isIsolated () { return _isolated; } - inline bool Group::isPaired () { return _paired; } - inline Group::Align Group::getAlign () { return _align; } - - -} // OpenChams namespace. - -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/OpenChamsException.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/OpenChamsException.h deleted file mode 100644 index 0a5639f8..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/OpenChamsException.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * OpenChamsException.h - * openChams - * - * Created by damien dupuis on 20/01/10. - * Copyright 2010 UPMC / LIP6. All rights reserved. - * - */ - -#ifndef __OPENCHAMS_EXCEPTION_NET_H__ -#define __OPENCHAMS_EXCEPTION_NET_H__ - -#include -#include - -namespace OpenChams { -class OpenChamsException { - public: - OpenChamsException(const std::string& what) throw() : _what(what) {} - virtual const char* what() const throw() { return _what.c_str(); } - virtual ~OpenChamsException() throw() {} - - private: - std::string _what; -}; -} // namespace -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Operator.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Operator.h deleted file mode 100644 index 76a788d7..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Operator.h +++ /dev/null @@ -1,74 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Operator.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_OPERATOR_H__ -#define __OPENCHAMS_OPERATOR_H__ - -#include - - -namespace OpenChams { - - - class Operator { - - public: - class Constraint { - public: - Constraint ( const std::string& ref - , const std::string& refParam - , double factor ); - inline const std::string& getRef (); - inline const std::string& getRefParam (); - inline double getFactor (); - private: - std::string _ref; - std::string _refParam; - double _factor; - }; - - public: - Operator (const std::string& operatorName, const std::string& simulModel); - void addConstraint (const std::string& paramName, const std::string& ref, const std::string& refParam); - void addConstraint (const std::string& paramName, const std::string& ref, const std::string& refParam, double factor); - void addConstraint (const std::string& paramName, const std::string& refEquation); - void addConstraint (const std::string& paramName, const std::string& refEquation, double factor); - inline const std::string& getName (); - inline const std::string& getSimulModel (); - inline bool hasNoConstraints (); - inline const std::map& getConstraints(); - private: - std::string _name; - std::string _simulModel; - std::map _constraints; - }; - - - inline const std::string& Operator::getName () { return _name; }; - inline const std::string& Operator::getSimulModel () { return _simulModel; }; - inline bool Operator::hasNoConstraints () { return _constraints.empty(); }; - inline const std::map& Operator::getConstraints() { return _constraints; }; - - inline const std::string& Operator::Constraint::getRef () { return _ref; }; - inline const std::string& Operator::Constraint::getRefParam () { return _refParam; }; - inline double Operator::Constraint::getFactor () { return _factor; }; - - -} // namespace - -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Parameters.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Parameters.h deleted file mode 100644 index 4f96a87d..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Parameters.h +++ /dev/null @@ -1,48 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2008-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Parameters.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_PARAMETERS_H__ -#define __OPENCHAMS_PARAMETERS_H__ - -#include -#include - -namespace OpenChams { - - - class Parameters { - public: - inline Parameters (); - inline bool isEmpty (); - const std::string& getValue (const std::string&); - inline const std::map& getValues (); - void addParameter (const std::string&, const std::string&); - - private: - std::map _params; - }; - - - inline Parameters::Parameters () { } - inline bool Parameters::isEmpty () { return (_params.size() == 0); } - inline const std::map& Parameters::getValues () { return _params; }; - - -} // OpenChams namespace. - -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Port.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Port.h deleted file mode 100644 index 7b5bab36..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Port.h +++ /dev/null @@ -1,68 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2011-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Port.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_PORT_H__ -#define __OPENCHAMS_PORT_H__ - - -namespace OpenChams { - - - class Port { - public: - inline Port ( const std::string& type - , unsigned idx - , double x - , double y - , const std::string& orient ); - inline ~Port (); - inline const std::string& getType () const; - inline unsigned getIndex () const; - inline double getX () const; - inline double getY () const; - inline const std::string& getOrientation() const; - private: - std::string _type; - unsigned _idx; - double _x; - double _y; - std::string _orient; -}; - - - inline Port::Port (const std::string& type - , unsigned idx - , double x - , double y - , const std::string& orient) - : _type(type), _idx(idx), _x(x), _y(y), _orient(orient) - { } - - inline Port::~Port () - { } - - inline const std::string& Port::getType () const { return _type; } - inline unsigned Port::getIndex () const { return _idx; } - inline double Port::getX () const { return _x; } - inline double Port::getY () const { return _y; } - inline const std::string& Port::getOrientation() const { return _orient; } - - -} // OpenChams namespace. - -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/PySTLMapWrapper.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/PySTLMapWrapper.h deleted file mode 100644 index 1007b72b..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/PySTLMapWrapper.h +++ /dev/null @@ -1,87 +0,0 @@ -#include - -#include - -namespace OpenChams { -// since we want to wrap std::map with cimple pointers (no boost::shared_ptr), -// we cannot use map_indexing_suite which has not the right return_value_policy. -// std::maps with no points value are wrapped using map_indexing_suite technique. -// -// This templated map_item struct is intended to be used for 'manual' wrapping: -template -struct map_item { - typedef std::map Map; - - static Val get(Map & self, const Key idx) { - if (self.find(idx) == self.end()) { - PyErr_SetString(PyExc_KeyError,"Map key not found"); - throw_error_already_set(); - } - return self[idx]; - } - - static void set(Map& self, const Key idx, const Val val) { self[idx]=val; } - static void del(Map& self, const Key n) { self.erase(n); } - static bool in (Map const& self, const Key n) { return self.find(n) != self.end(); } - - static list keys(Map const& self) { - list t; - for(typename Map::const_iterator it = self.begin() ; it!=self.end() ; ++it) - t.append(it->first); - return t; - } - - static list values(Map const& self) { - list t; - for(typename Map::const_iterator it=self.begin(); it!=self.end(); ++it) - t.append(it->second); - return t; - } - - static list items(Map const& self) { - list t; - for(typename Map::const_iterator it=self.begin(); it!=self.end(); ++it) - t.append( make_tuple(it->first, it->second) ); - return t; - } -}; - -#define STL_MAP_WRAPPING_PTR(KEY_TYPE, VALUE_TYPE, PYTHON_TYPE_NAME) \ - class_ >((std::string(PYTHON_TYPE_NAME)+std::string("DATA")).c_str()) \ - .def_readonly ("key" , &std::pair::first ) \ - .def_readwrite("value", &std::pair::second) \ - ; \ - class_ >(PYTHON_TYPE_NAME) \ - .def("__len__" , &std::map::size) \ - .def("__iter__" , boost::python::iterator, return_internal_reference<> >()) \ - .def("__getitem__" , &map_item().get, return_internal_reference<>()) \ - .def("__setitem__" , &map_item().set ) \ - .def("__delitem__" , &map_item().del ) \ - .def("__contains__", &map_item().in ) \ - .def("clear" , &std::map::clear ) \ - .def("has_key" , &map_item().in ) \ - .def("keys" , &map_item().keys ) \ - .def("values" , &map_item().values) \ - .def("items" , &map_item().items ) \ - ; - -#define STL_MAP_WRAPPING(KEY_TYPE, VALUE_TYPE, PYTHON_TYPE_NAME) \ - class_ >((std::string(PYTHON_TYPE_NAME)+std::string("DATA")).c_str()) \ - .def_readonly ("key" , &std::pair::first ) \ - .def_readwrite("value", &std::pair::second) \ - ; \ - class_ >(PYTHON_TYPE_NAME) \ - .def("__len__" , &std::map::size) \ - .def("__iter__" , boost::python::iterator, return_internal_reference<> >()) \ - .def("__getitem__" , &map_item().get ) \ - .def("__setitem__" , &map_item().set ) \ - .def("__delitem__" , &map_item().del ) \ - .def("__contains__", &map_item().in ) \ - .def("clear" , &std::map::clear ) \ - .def("has_key" , &map_item().in ) \ - .def("keys" , &map_item().keys ) \ - .def("values" , &map_item().values) \ - .def("items" , &map_item().items ) \ - ; - -} // namespace diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Schematic.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Schematic.h deleted file mode 100644 index 77e4e3b5..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Schematic.h +++ /dev/null @@ -1,67 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC 2010-2018, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Schematic.h" | -// +-----------------------------------------------------------------+ - - -#ifndef VLSISAPD_OPENCHAMS_SCHEMATIC_H -#define VLSISAPD_OPENCHAMS_SCHEMATIC_H - -#include -#include - -namespace OpenChams { - - class Circuit; - - - class Schematic { - - public: - class Infos { - public: - Infos (double x, double y, const std::string& orient); - inline double getX (); - inline double getY (); - inline const std::string& getOrientation(); - private: - double _x; - double _y; - std::string _orient; - }; - - public: - Schematic ( Circuit* ); - void addInstance ( const std::string& instanceName - , double x - , double y - , const std::string& orient ); - inline bool hasNoInstances (); - inline const std::map& getInstances(); - private: - Circuit* _circuit; - std::map _instances; -}; - -inline bool Schematic::hasNoInstances() { return _instances.empty(); }; -inline const std::map& Schematic::getInstances () { return _instances; }; - -inline double Schematic::Infos::getX () { return _x; }; -inline double Schematic::Infos::getY () { return _y; }; -inline const std::string& Schematic::Infos::getOrientation() { return _orient; }; - - -} // OpenChams namespace. - -#endif diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/SimulModel.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/SimulModel.h deleted file mode 100644 index 17ce9381..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/SimulModel.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * SimulModel.h - * openChams - * - * Created by damien dupuis on 06/07/10. - * Copyright 2010 UPMC / LIP6. All rights reserved. - * - */ - -#ifndef __OPENCHAMS_SIMULMODEL_H__ -#define __OPENCHAMS_SIMULMODEL_H__ - -#include - - -namespace OpenChams { -class SimulModel { - public: - enum Base { BSIM3V3=0, - BSIM4=1, - PSP=2 - }; - enum Version { UNDEFINED=0, - SVT=1, - HVT=2, - LVT=3 - }; - - SimulModel(unsigned, Base, Version, std::string); - - inline unsigned getId() const; - inline Base getBase(); - inline Version getVersion(); - inline std::string getFilePath(); - - private: - unsigned _id; - Base _base; - Version _version; - std::string _filePath; -}; - -inline unsigned SimulModel::getId() const { return _id; }; -inline SimulModel::Base SimulModel::getBase() { return _base; }; -inline SimulModel::Version SimulModel::getVersion() { return _version; }; -inline std::string SimulModel::getFilePath() { return _filePath;}; - -} // namespace -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Sizing.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Sizing.h deleted file mode 100644 index 1bcc5e85..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Sizing.h +++ /dev/null @@ -1,64 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Sizing.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_SIZING_H__ -#define __OPENCHAMS_SIZING_H__ - -#include -#include - -namespace OpenChams { - - class Circuit; - class Operator; - class Equation; -//class HighLevelCstr; -//class NRCCstr; -//class DDP; - - - class Sizing { - public: - Sizing ( Circuit* ); - Operator* addOperator ( const std::string& instanceName - , const std::string& operatorName - , const std::string& simulModel); - // void addEquation ( const std::string& equationName, HighLevelCstr* ); - // void addEquation ( const std::string& equationName, NRCCstr* ); - // void addEquation ( const std::string& equationName, DDP* ); - void addEquation ( const std::string& equationName, Equation* ); - inline bool hasNoOperators (); - inline bool hasNoEquations (); - inline const std::map& getOperators(); - inline const std::map& getEquations(); - private: - Circuit* _circuit; - std::map _operators; // instanceName <-> operator - std::map _equations; // equationName <-> equation (string) - }; - - - inline bool Sizing::hasNoOperators() { return _operators.empty(); }; - inline bool Sizing::hasNoEquations() { return _equations.empty(); }; - inline const std::map& Sizing::getOperators() { return _operators; }; - inline const std::map& Sizing::getEquations() { return _equations; }; - - -} // OpenChams namespace - -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/SlicingTree.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/SlicingTree.h deleted file mode 100644 index eb271dab..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/SlicingTree.h +++ /dev/null @@ -1,394 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2008-2018, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Eric Lao | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/SlicingTree.h" | -// +-----------------------------------------------------------------+ - -#ifndef __OPENCHAMS_SLICINGTREE_H__ -#define __OPENCHAMS_SLICINGTREE_H__ - -#include -#include -#include -#include -#include -#include - - -namespace OpenChams { - - enum Flags { UnknownType = 1 << 0 - , HorizontalSNode = 1 << 1 - , VerticalSNode = 1 << 2 - , DeviceSNode = 1 << 3 - , RoutingSNode = 1 << 4 - , UnknownAlignment = 1 << 5 - , AlignLeft = 1 << 6 - , AlignRight = 1 << 7 - , AlignCenter = 1 << 8 - , AlignTop = 1 << 9 - , AlignBottom = 1 << 10 - }; - -// -----------------------------------------------------------------------------------------------// -// Class : SlicingNode -// -----------------------------------------------------------------------------------------------// - - - class SlicingNode - { - public: - SlicingNode( SlicingNode* parent = NULL ); - virtual ~SlicingNode(){}; - - public: - virtual unsigned int getType () const { return UnknownType; } - virtual void print () const {}; - inline void recursiveDestroy (); - void setParent ( SlicingNode* parent ); - SlicingNode* getParent () const; - inline bool isRoot () const; - virtual void setAlignment ( std::string alignment ); - std::string alignmentToString() const; - //Error Methods - virtual std::string getInstanceName () const; - virtual unsigned int getAlignment () const; - virtual bool getPreset () const; - virtual double getX () const; - virtual double getY () const; - virtual int getNFing () const; - virtual double getStart () const; - virtual double getStep () const; - virtual double getCount () const; - - virtual void setInstanceName ( std::string instanceName ); - virtual void setPreset ( std::string preset ); - virtual void setX ( std::string x ); - virtual void setY ( std::string y ); - virtual void setNFing ( std::string nfing ); - virtual void setStart ( std::string start ); - virtual void setStep ( std::string step ); - virtual void setCount ( std::string count ); - - virtual void setPreset ( bool preset ); - virtual void setX ( double x ); - virtual void setY ( double y ); - virtual void setNFing ( int nfing ); - virtual void setStart ( double start ); - virtual void setStep ( double step ); - virtual void setCount ( double count ); - - virtual const std::vector getChildren () const; - virtual const std::list > getSymmetries () const; - - virtual double getToleranceRatioH() const; - virtual double getToleranceRatioW() const; - virtual double getToleranceBandH () const; - virtual double getToleranceBandW () const; - - virtual void setToleranceRatioH( std::string value ); - virtual void setToleranceRatioW( std::string value ); - virtual void setToleranceBandH ( std::string value ); - virtual void setToleranceBandW ( std::string value ); - - virtual void setToleranceRatioH( double value ); - virtual void setToleranceRatioW( double value ); - virtual void setToleranceBandH ( double value ); - virtual void setToleranceBandW ( double value ); - - virtual void push_back ( SlicingNode* node ); - virtual void addSymmetry ( std::string source, std::string target ); - virtual void addSymmetry ( int source, int target ); - virtual double getValue () const; - virtual void setValue ( std::string value ); - virtual void toXML ( std::ofstream& file, unsigned indent ){}; - - virtual std::string presetToString () const; - virtual std::string xToString () const; - virtual std::string yToString () const; - virtual std::string nfingToString () const; - virtual std::string startToString () const; - virtual std::string stepToString () const; - virtual std::string countToString () const; - virtual std::string valueToString () const; - - virtual std::string toleranceRatioHToString() const; - virtual std::string toleranceRatioWToString() const; - virtual std::string toleranceBandHToString () const; - virtual std::string toleranceBandWToString () const; - - virtual bool hasSameParentToleranceRatioH () const; - virtual bool hasSameParentToleranceRatioW () const; - virtual bool hasSameParentToleranceBandH () const; - virtual bool hasSameParentToleranceBandW () const; - - virtual bool checkInitialPlacement( int& cpt ) const; - virtual std::list getLeaves () const; - - protected: - SlicingNode* _parent; - unsigned int _alignment; - }; - - inline void SlicingNode::recursiveDestroy(){ delete(this); } - inline bool SlicingNode::isRoot () const { return (_parent == NULL); } - - -// -----------------------------------------------------------------------------------------------// -// Class : DeviceSNode -// -----------------------------------------------------------------------------------------------// - - - class DSlicingNode : public SlicingNode - { - private: - DSlicingNode( std::string instanceName, SlicingNode* parent = NULL ); - ~DSlicingNode(){}; - - public: - inline static DSlicingNode* create ( std::string instanceName, SlicingNode* parent = NULL ); - inline std::string getInstanceName () const; - inline unsigned int getAlignment () const; - inline bool getPreset () const; - inline double getX () const; - inline double getY () const; - inline int getNFing () const; - inline double getStart () const; - inline double getStep () const; - inline double getCount () const; - inline unsigned int getType () const; - - void setInstanceName ( std::string instanceName ); - void setPreset ( std::string preset ); - void setX ( std::string x ); - void setY ( std::string y ); - void setNFing ( std::string nfing ); - void setStart ( std::string start ); - void setStep ( std::string step ); - void setCount ( std::string count ); - - inline void setPreset ( bool preset ); - inline void setX ( double x ); - inline void setY ( double y ); - inline void setNFing ( int nfing ); - inline void setStart ( double start ); - inline void setStep ( double step ); - inline void setCount ( double count ); - - void print () const; - void toXML ( std::ofstream& file, unsigned indent ); - inline std::string presetToString () const; - inline std::string xToString () const; - inline std::string yToString () const; - inline std::string nfingToString () const; - inline std::string startToString () const; - inline std::string stepToString () const; - inline std::string countToString () const; - - bool checkInitialPlacement ( int& cpt ) const; - - private: - std::string _instanceName; - bool _preset; - double _x; - double _y; - int _nfing; - double _start; - double _step; - double _count; - }; - - inline DSlicingNode* DSlicingNode::create ( std::string instanceName, SlicingNode* parent ){ return new DSlicingNode( instanceName ); } - inline std::string DSlicingNode::getInstanceName () const { return _instanceName ; } - inline unsigned int DSlicingNode::getAlignment () const { return _alignment ; } - inline bool DSlicingNode::getPreset () const { return _preset ; } - inline double DSlicingNode::getX () const { return _x ; } - inline double DSlicingNode::getY () const { return _y ; } - inline int DSlicingNode::getNFing () const { return _nfing ; } - inline double DSlicingNode::getStart () const { return _start ; } - inline double DSlicingNode::getStep () const { return _step ; } - inline double DSlicingNode::getCount () const { return _count ; } - inline unsigned int DSlicingNode::getType () const { return DeviceSNode ; } - - inline void DSlicingNode::setPreset ( bool preset ) { _preset = preset; } - inline void DSlicingNode::setX ( double x ) { _x = x ; } - inline void DSlicingNode::setY ( double y ) { _y = y ; } - inline void DSlicingNode::setNFing ( int nfing ) { _nfing = nfing ; } - inline void DSlicingNode::setStart ( double start ) { _start = start ; } - inline void DSlicingNode::setStep ( double step ) { _step = step ; } - inline void DSlicingNode::setCount ( double count ) { _count = count ; } - - inline std::string DSlicingNode::presetToString () const { return _preset ? "true" : "false"; } - inline std::string DSlicingNode::xToString () const { return std::to_string(_x ); } - inline std::string DSlicingNode::yToString () const { return std::to_string(_y ); } - inline std::string DSlicingNode::nfingToString () const { return std::to_string(_nfing); } - inline std::string DSlicingNode::startToString () const { return std::to_string(_start); } - inline std::string DSlicingNode::stepToString () const { return std::to_string(_step ); } - inline std::string DSlicingNode::countToString () const { return std::to_string(_count); } - -// -----------------------------------------------------------------------------------------------// -// Class : HVSlicingNode -// -----------------------------------------------------------------------------------------------// - - - class HVSlicingNode : public SlicingNode - { - protected: - HVSlicingNode( SlicingNode* parent = NULL ); - virtual ~HVSlicingNode(){}; - - public: - inline unsigned int getAlignment () const; - inline double getToleranceRatioH() const; - inline double getToleranceRatioW() const; - inline double getToleranceBandH () const; - inline double getToleranceBandW () const; - - inline const std::vector getChildren () const; - inline const std::list > getSymmetries() const; - - void setToleranceRatioH( std::string value ); - void setToleranceRatioW( std::string value ); - void setToleranceBandH ( std::string value ); - void setToleranceBandW ( std::string value ); - - void setToleranceRatioH( double value ); - void setToleranceRatioW( double value ); - void setToleranceBandH ( double value ); - void setToleranceBandW ( double value ); - - void push_back ( SlicingNode* node ); - void addSymmetry ( std::string source, std::string target ); - void addSymmetry ( int source, int target ); - void recursiveDestroy (); - void print () const; - - inline std::string toleranceRatioHToString () const; - inline std::string toleranceRatioWToString () const; - inline std::string toleranceBandHToString () const; - inline std::string toleranceBandWToString () const; - - bool hasSameParentToleranceRatioH () const; - bool hasSameParentToleranceRatioW () const; - bool hasSameParentToleranceBandH () const; - bool hasSameParentToleranceBandW () const; - - bool checkInitialPlacement ( int& cpt ) const; - std::list getLeaves () const; - - protected: - double _toleranceRatioH; - double _toleranceRatioW; - double _toleranceBandH; - double _toleranceBandW; - std::list > _symmetries; - std::vector _children; - }; - - inline unsigned int HVSlicingNode::getAlignment () const { return _alignment ; } - inline double HVSlicingNode::getToleranceRatioH() const { return _toleranceRatioH; } - inline double HVSlicingNode::getToleranceRatioW() const { return _toleranceRatioW; } - inline double HVSlicingNode::getToleranceBandH () const { return _toleranceBandH ; } - inline double HVSlicingNode::getToleranceBandW () const { return _toleranceBandW ; } - - inline const std::vector HVSlicingNode::getChildren () const { return _children ; } - inline const std::list > HVSlicingNode::getSymmetries() const { return _symmetries ; } - - inline std::string HVSlicingNode::toleranceRatioHToString() const { return std::to_string(_toleranceRatioH); } - inline std::string HVSlicingNode::toleranceRatioWToString() const { return std::to_string(_toleranceRatioW); } - inline std::string HVSlicingNode::toleranceBandHToString () const { return std::to_string(_toleranceBandH); } - inline std::string HVSlicingNode::toleranceBandWToString () const { return std::to_string(_toleranceBandW); } - - -// -----------------------------------------------------------------------------------------------// -// Class : HSlicingNode -// -----------------------------------------------------------------------------------------------// - - - class HSlicingNode: public HVSlicingNode - { - private: - HSlicingNode( SlicingNode* parent = NULL ); - ~HSlicingNode(){}; - - public: - inline static HSlicingNode* create ( SlicingNode* parent = NULL ); - inline unsigned int getType () const; - void print () const; - void toXML ( std::ofstream& file, unsigned indent ); - }; - - inline HSlicingNode* HSlicingNode::create ( SlicingNode* parent ){ return new HSlicingNode(parent); } - inline unsigned int HSlicingNode::getType() const { return HorizontalSNode ; } - - -// -----------------------------------------------------------------------------------------------// -// Class : VSlicingNode -// -----------------------------------------------------------------------------------------------// - - - class VSlicingNode: public HVSlicingNode - { - private: - VSlicingNode( SlicingNode* parent = NULL ); - ~VSlicingNode(){}; - - public: - inline static VSlicingNode* create ( SlicingNode* parent = NULL ); - inline unsigned int getType () const; - void print () const; - void toXML ( std::ofstream& file, unsigned indent ); - }; - - inline VSlicingNode* VSlicingNode::create ( SlicingNode* parent ){ return new VSlicingNode(parent); } - inline unsigned int VSlicingNode::getType() const { return VerticalSNode ; } - - -// -----------------------------------------------------------------------------------------------// -// Class : RoutingSNode -// -----------------------------------------------------------------------------------------------// - - - class RSlicingNode: public SlicingNode - { - private: - RSlicingNode( std::string value, SlicingNode* parent = NULL ); - RSlicingNode( double value, SlicingNode* parent = NULL ); - ~RSlicingNode(){}; - - public: - inline static RSlicingNode* create ( std::string value, SlicingNode* parent = NULL ); - inline static RSlicingNode* create ( double value, SlicingNode* parent = NULL ); - inline void recursiveDestroy (); - inline double getValue () const; - void setValue ( std::string value ); - inline unsigned int getType () const; - void print () const; - void setAlignment ( std::string alignment) {}; - void toXML ( std::ofstream& file, unsigned indent ); - inline std::string valueToString () const; - - private: - double _value; - }; - - inline RSlicingNode* RSlicingNode::create ( std::string value, SlicingNode* parent ){ return new RSlicingNode( value, parent ); } - inline RSlicingNode* RSlicingNode::create ( double value, SlicingNode* parent ){ return new RSlicingNode( value, parent ); } - inline double RSlicingNode::getValue () const{ return _value ; } - inline unsigned int RSlicingNode::getType () const{ return RoutingSNode; } - inline std::string RSlicingNode::valueToString () const { return std::to_string(_value); } - - -} // OpenChams namespace - -#endif diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Transistor.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Transistor.h deleted file mode 100644 index d11f63c3..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Transistor.h +++ /dev/null @@ -1,75 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2010-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Transistor.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_TRANSISTOR_H__ -#define __OPENCHAMS_TRANSISTOR_H__ - -#include - -#include "vlsisapd/openChams/Parameters.h" - - -namespace OpenChams { - - class Instance; - class Net; - - - class Transistor { - public: - Transistor (const std::string&, Instance*); - inline void addParameter (const std::string&, const char*); - inline void addParameter (const std::string&, const std::string&); - inline Parameters getParameters (); - inline void setName (const std::string&); - inline const std::string& getName (); - inline const std::string& getGate (); - inline const std::string& getSource (); - inline const std::string& getDrain (); - inline const std::string& getBulk (); - void setGate (const std::string&); - void setSource (const std::string&); - void setDrain (const std::string&); - void setBulk (const std::string&); - private: - bool checkConnector (const std::string&); - private: - std::string _name; - std::string _gate; // le nom du connecteur de _instance auquel la gate est reliée - std::string _source; // le nom du connecteur de _instance auquel la source est reliée - std::string _drain; // le nom du connecteur de _instance auquel le drain est relié - std::string _bulk; // le nom du connecteur de _instance auquel le bulk est relié - Instance* _instance; - Parameters _params; - }; - - - inline void Transistor::addParameter (const std::string& name, const char* value) { _params.addParameter(name,value); }; - inline void Transistor::addParameter (const std::string& name, const std::string& value) { _params.addParameter(name,value); }; - inline Parameters Transistor::getParameters () { return _params; }; - inline void Transistor::setName (const std::string& name) { _name = name; }; - inline const std::string& Transistor::getName () { return _name; }; - inline const std::string& Transistor::getGate () { return _gate; }; - inline const std::string& Transistor::getSource () { return _source; }; - inline const std::string& Transistor::getDrain () { return _drain; }; - inline const std::string& Transistor::getBulk () { return _bulk; }; - - -} // OpenChams namespace. - -#endif - diff --git a/vlsisapd/src/openChams/src/vlsisapd/openChams/Wire.h b/vlsisapd/src/openChams/src/vlsisapd/openChams/Wire.h deleted file mode 100644 index dd7d84aa..00000000 --- a/vlsisapd/src/openChams/src/vlsisapd/openChams/Wire.h +++ /dev/null @@ -1,124 +0,0 @@ - -// -*- C++ -*- -// -// This file is part of the VLSI SAPD Software. -// Copyright (c) UPMC/LIP6 2011-2012, All Rights Reserved -// -// +-----------------------------------------------------------------+ -// | V L S I S A P D | -// | OpenChams Circuit Data Base | -// | | -// | Author : Damien Dupuis | -// | E-mail : Jean-Paul.Chaput@lip6.fr | -// | =============================================================== | -// | C++ Header : "./vlsisapd/openChams/Wire.h" | -// +-----------------------------------------------------------------+ - - -#ifndef __OPENCHAMS_WIRE_H__ -#define __OPENCHAMS_WIRE_H__ - -#include -#include - - -namespace OpenChams { - - - class WirePoint { - public: - WirePoint() {} - virtual ~WirePoint() {}; - }; - - - class InstancePoint: public WirePoint { - public: - inline InstancePoint (const std::string& name, const std::string& plug); - inline virtual ~InstancePoint (); - inline const std::string& getName (); - inline const std::string& getPlug (); - private: - std::string _name; - std::string _plug; - }; - - - class PortPoint: public WirePoint { - public: - inline PortPoint (unsigned idx); - inline virtual ~PortPoint (); - inline unsigned getIndex (); - private: - unsigned _idx; - }; - - - class IntermediatePoint: public WirePoint { - - public: - inline IntermediatePoint (double x, double y); - inline virtual ~IntermediatePoint (); - inline double getX (); - inline double getY (); - private: - double _x; - double _y; - }; - - - class Wire { - public: - inline Wire (); - inline ~Wire (); - // Accessors - inline WirePoint* getStartPoint (); - inline WirePoint* getEndPoint (); - inline bool hasNoIntermediatePoints(); - inline const std::vector& getIntermediatePoints(); - // Modifiers - void setStartPoint (const std::string& name, const std::string& plug); - void setStartPoint (unsigned idx); - void setEndPoint (const std::string& name, const std::string& plug); - void setEndPoint (unsigned idx); - void addIntermediatePoint (double x, double y); - private: - WirePoint* _start; - WirePoint* _end; - std::vector _inters; - }; - - -// Inlines of InstancePoint. - inline InstancePoint::InstancePoint (const std::string& name, const std::string& plug) : _name(name), _plug(plug) {} - inline InstancePoint::~InstancePoint () {} - inline const std::string& InstancePoint::getName () { return _name; } - inline const std::string& InstancePoint::getPlug () { return _plug; } - - -// Inlines of PortPoint. - inline PortPoint::PortPoint (unsigned idx): _idx(idx) {} - inline PortPoint::~PortPoint () {} - inline unsigned PortPoint::getIndex () { return _idx; } - - -// Inlines of IntermediatePoint. - inline IntermediatePoint::IntermediatePoint (double x, double y): _x(x), _y(y) {} - inline IntermediatePoint::~IntermediatePoint() {} - inline double IntermediatePoint::getX () { return _x; } - inline double IntermediatePoint::getY () { return _y; } - - -// Inlines of Wire. - inline Wire::Wire () : _start(NULL), _end(NULL), _inters() {} - inline Wire::~Wire () {} - inline WirePoint* Wire::getStartPoint () { return _start; } - inline WirePoint* Wire::getEndPoint () { return _end; } - inline bool Wire::hasNoIntermediatePoints() { return _inters.empty(); } - inline const std::vector& Wire::getIntermediatePoints() { return _inters; } - - -} // namespace - -#endif -