From ab4be8a22be86162d3d0d99fb515e8a305fe1275 Mon Sep 17 00:00:00 2001
From: Damien Dupuis <alliance-users@asim.lip6.fr>
Date: Thu, 28 Oct 2010 20:56:08 +0000
Subject: [PATCH]     As Farakh asked me : Operator name is now always
 converted to upper case before save.

---
 vlsisapd/src/openChams/src/Circuit.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/vlsisapd/src/openChams/src/Circuit.cpp b/vlsisapd/src/openChams/src/Circuit.cpp
index ba0cee24..b81a3831 100644
--- a/vlsisapd/src/openChams/src/Circuit.cpp
+++ b/vlsisapd/src/openChams/src/Circuit.cpp
@@ -904,7 +904,9 @@ bool Circuit::writeToFile(string filePath) {
         file << "  <sizing>" << endl;
         for (map<Name, Operator*>::const_iterator it = _sizing->getOperators().begin() ; it != _sizing->getOperators().end() ; ++it) {
             Operator* op = (*it).second;
-            file << "    <instance name=\"" << ((*it).first).getString() << "\" operator=\"" << op->getName().getString() << "\" simulModel=\"" << op->getSimulModel().getString() << "\" callOrder=\"" << op->getCallOrder() << "\">" << endl;
+            string opName = op->getName().getString();
+            transform(opName.begin(), opName.end(), opName.begin(), ::toupper);
+            file << "    <instance name=\"" << ((*it).first).getString() << "\" operator=\"" << opName << "\" simulModel=\"" << op->getSimulModel().getString() << "\" callOrder=\"" << op->getCallOrder() << "\">" << endl;
             if (!op->hasNoConstraints()) {
                 for (map<Name, Operator::Constraint*>::const_iterator cit = op->getConstraints().begin() ; cit != op->getConstraints().end() ; ++cit) {
                     Operator::Constraint* cn = (*cit).second;