riscv
/
coriolis
mirror of https://gitlab.lip6.fr/vlsi-eda/coriolis.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

No more Error when no vdd/vss in a cell, back to a warning 

Be careful when using iter(...).next() : causes a stopException if no element, the exception has to be catched if only un warning is wanted
This commit is contained in:
Sophie Belloeil 2010-09-06 09:12:24 +00:00
parent 476608ceb2
commit 8e53a1bc36
1 changed files with 13 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
stratus1/src/stratus/st_model.py
View File

@ -82,6 +82,9 @@ class Model :
def __init__ ( self, nom, param = {}, hurCell = None, hurricane_plug = True ) : def __init__ ( self, nom, param = {}, hurCell = None, hurricane_plug = True ) :
global FRAMEWORK, CELLS global FRAMEWORK, CELLS
# Look up the editor
if globals().has_key ( "__editor" ) : setEditor ( __editor )
self._name = nom self._name = nom
self._param = param self._param = param
@ -151,12 +154,18 @@ class Model :
from st_net import VddInFromHur from st_net import VddInFromHur
from st_net import VssInFromHur from st_net import VssInFromHur
try:
netVdd = iter(hurCell.getPowerNets()).next() netVdd = iter(hurCell.getPowerNets()).next()
except StopIteration:
print "[Stratus Warning] : Cell", self._name, "does not have a vdd port."
pass
try:
netVss = iter(hurCell.getGroundNets()).next() netVss = iter(hurCell.getGroundNets()).next()
except StopIteration:
print "[Stratus Warning] : Cell", self._name, "does not have a vss port."
pass
if netVdd != None : self._st_vdds.append ( VddInFromHur ( netVdd ) ) if netVdd != None : self._st_vdds.append ( VddInFromHur ( netVdd ) )
else : print "[Stratus Warning] : Cell", self._name, "does not have a vdd port."
if netVss != None : self._st_vsss.append ( VssInFromHur ( netVss ) ) if netVss != None : self._st_vsss.append ( VssInFromHur ( netVss ) )
else : print "[Stratus Warning] : Cell", self._name, "does not have a vss port."
self._st_cks = [] self._st_cks = []