From 701487247d8035f8b07b105c10bfee0e5b86bdb4 Mon Sep 17 00:00:00 2001
From: Jean-Paul Chaput <Jean-Paul.Chaput@lip6.fr>
Date: Mon, 8 Jun 2015 12:01:32 +0200
Subject: [PATCH] Bug in VHDL portmap. Too strict checking in Kite & Etesian
 ::setViewer().

* Bug: In CRL Core, in VectorPortMap::VhdlPortMap(), if the connection
    was made to *non-contiguous* bits of an otherwise *contiguous* vector,
    it was using a span instead of the separate bits. Now check that
    bits are contiguous (delta: +1/-1) and the delta do not change of
    sign.
* Change: In Etesian & Kite, the Python interface function ::setViewer()
    was checking that the argument was indeed a CellViewer, but in text
    mode it is None. Now, silently ignore the argument if it cannot be
    converted into CellViewer.
---
 .../src/ccore/alliance/vst/VhdlPortMap.cpp    | 26 ++++++++++++-------
 etesian/src/PyEtesianEngine.cpp               | 10 ++++---
 kite/src/PyKiteEngine.cpp                     | 12 ++++++---
 3 files changed, 31 insertions(+), 17 deletions(-)

diff --git a/crlcore/src/ccore/alliance/vst/VhdlPortMap.cpp b/crlcore/src/ccore/alliance/vst/VhdlPortMap.cpp
index 3cce1494..542e3cb8 100644
--- a/crlcore/src/ccore/alliance/vst/VhdlPortMap.cpp
+++ b/crlcore/src/ccore/alliance/vst/VhdlPortMap.cpp
@@ -155,12 +155,14 @@ namespace Vhdl {
   {
     if (getSignal()->isContiguous()) {
       vector<string>  mappedNames;
-      int             begin = -1;
-      int             end   = -1;
-      const Bit*      bit   = NULL;
-      const Bit*      bitp  = NULL;
-      string          name  = "UNCONNECTED";
-      string          namep = "UNCONNECTED";
+      int             begin  = -1;
+      int             end    = -1;
+      int             delta  =  0;
+      int             deltap =  0;
+      const Bit*      bit    = NULL;
+      const Bit*      bitp   = NULL;
+      string          name   = "UNCONNECTED";
+      string          namep  = "UNCONNECTED";
   
       auto imapping  = _mapping.rbegin();
       auto imappingp = _mapping.rbegin();
@@ -176,15 +178,19 @@ namespace Vhdl {
            and bitp->getSignal()->isVector()
            and bitp->getSignal()->isContiguous()
            and (name == namep)) {
-          if (begin < 0) begin = bitp->getIndex();
-          if (end   < 0) end   = bit ->getIndex();
+          delta = (int)bit->getIndex() - (int)bitp->getIndex();
+
+          if (begin  <  0) begin = bitp->getIndex();
+          if (end    <  0) end   = bitp->getIndex();
+          if (deltap == 0) deltap = delta;
   
-          int delta = (int)bit->getIndex() - (int)bitp->getIndex();
-          if ( not ((delta > 0) xor (begin < end)) ) {
+          if ( (delta == deltap) and ((delta == -1) or (delta == +1)) ) {
             end = bit->getIndex();
+            deltap = delta;
             continue;
           }
         }
+        delta = 0;
   
         if (begin != end) {
           string vdir = (begin < end) ? "to" : "downto";
diff --git a/etesian/src/PyEtesianEngine.cpp b/etesian/src/PyEtesianEngine.cpp
index 2dcc9b09..0061ec65 100644
--- a/etesian/src/PyEtesianEngine.cpp
+++ b/etesian/src/PyEtesianEngine.cpp
@@ -49,6 +49,7 @@ namespace  Etesian {
   using Isobar::PyCell;
   using Isobar::PyCell_Link;
   using Isobar::PyCellViewer;
+  using Isobar::PyTypeCellViewer;
   using CRL::PyToolEngine;
 
 
@@ -112,11 +113,14 @@ extern "C" {
     HTRY
       METHOD_HEAD( "EtesianEngine.setViewer()" )
   
-      PyCellViewer* pyViewer;
-      if (not ParseOneArg("EtesianEngine.setViewer()",args,":cellView",(PyObject**)&pyViewer)) {
+      PyObject* pyViewer = NULL;
+      if (not PyArg_ParseTuple(args,"O:EtesianEngine.setViewer()",&pyViewer)) {
+        PyErr_SetString( ConstructorError, "Bad parameters given to EtesianEngine.setViewer()." );
         return NULL;
       }
-      etesian->setViewer( PYCELLVIEWER_O(pyViewer) );
+      if (IsPyCellViewer(pyViewer)) {
+        etesian->setViewer( PYCELLVIEWER_O(pyViewer) );
+      }
     HCATCH
 
     Py_RETURN_NONE;
diff --git a/kite/src/PyKiteEngine.cpp b/kite/src/PyKiteEngine.cpp
index 443f8377..a3986d9d 100644
--- a/kite/src/PyKiteEngine.cpp
+++ b/kite/src/PyKiteEngine.cpp
@@ -1,7 +1,7 @@
 // -*- C++ -*-
 //
 // This file is part of the Coriolis Software.
-// Copyright (c) UPMC/LIP6 2010-2015, All Rights Reserved
+// Copyright (c) UPMC 2010-2015, All Rights Reserved
 //
 // +-----------------------------------------------------------------+ 
 // |                   C O R I O L I S                               |
@@ -49,6 +49,7 @@ namespace  Kite {
   using Isobar::PyCell;
   using Isobar::PyCell_Link;
   using Isobar::PyCellViewer;
+  using Isobar::PyTypeCellViewer;
   using CRL::PyToolEngine;
 
 
@@ -131,11 +132,14 @@ extern "C" {
     HTRY
       METHOD_HEAD( "KiteEngine.setViewer()" )
   
-      PyCellViewer* pyViewer;
-      if (not ParseOneArg("KiteEngine.setViewer()",args,":cellView",(PyObject**)&pyViewer)) {
+      PyObject* pyViewer = NULL;
+      if (not PyArg_ParseTuple(args,"O:EtesianEngine.setViewer()",&pyViewer)) {
+        PyErr_SetString( ConstructorError, "Bad parameters given to EtesianEngine.setViewer()." );
         return NULL;
       }
-      kite->setViewer( PYCELLVIEWER_O(pyViewer) );
+      if (IsPyCellViewer(pyViewer)) {
+        kite->setViewer( PYCELLVIEWER_O(pyViewer) );
+      }
     HCATCH
 
     Py_RETURN_NONE;