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Merge branch 'fix-blif-zero-one' into 'devel' 

blif: Improve detection of zero/one net by requiring it to be external

See merge request vlsi-eda/coriolis!12
This commit is contained in:
Jean-Paul Chaput 2021-12-11 21:07:18 +00:00
parent 73296503ad 3f08b3789f
commit 67ca0997c3
1 changed files with 4 additions and 2 deletions
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6
crlcore/src/ccore/blif/BlifParser.cpp
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@ -384,7 +384,8 @@ namespace {
for ( Net* net : _zeroCell->getNets() ) {
if ( not net->isSupply ()
and not net->isAutomatic()
and not net->isBlockage () ) {
and not net->isBlockage ()
and net->isExternal() ) {
if (getString(net->getName()).find(_powerName) != string::npos) {
cerr << Error( "BlifParser::Model::staticInit(): Output \"%s\" of zero (tie low) cell \"%s\" match power supply name."
, getString(net->getName()).c_str(), zeroName.c_str() ) << endl;
@ -405,7 +406,8 @@ namespace {
for ( Net* net : _oneCell->getNets() )
if ( not net->isSupply ()
and not net->isAutomatic()
and not net->isBlockage () ) {
and not net->isBlockage ()
and net->isExternal() ) {
if (getString(net->getName()).find(_powerName) != string::npos) {
cerr << Error( "BlifParser::Model::staticInit(): Output \"%s\" of one (tie high) cell \"%s\" match power supply name."
, getString(net->getName()).c_str(), zeroName.c_str() ) << endl;