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coriolis
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sxlib.lib example becomes testParse.lib

This commit is contained in:
Sophie Belloeil 2010-10-08 11:47:06 +00:00
parent 96b084a80d
commit 6660ae8663
5 changed files with 173 additions and 5024 deletions
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2
vlsisapd/examples/liberty/CMakeLists.txt
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@ -1,4 +1,4 @@
ADD_SUBDIRECTORY(cplusplus)
#ADD_SUBDIRECTORY(python)
INSTALL ( FILES sxlib.lib DESTINATION share/doc/coriolis2/examples/vlsisapd/liberty )
INSTALL ( FILES testParse.lib DESTINATION share/doc/coriolis2/examples/vlsisapd/liberty )

2
vlsisapd/examples/liberty/cplusplus/driveLiberty.cpp
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@ -61,7 +61,7 @@ int main ( int argc, char * argv[] ) {
// Write
valeur="test.lib"; library->writeToFile(valeur);
valeur="testDrive.lib"; library->writeToFile(valeur);
return 0;
}

4
vlsisapd/examples/liberty/cplusplus/parseLiberty.cpp
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@ -6,7 +6,7 @@ using namespace std;
#include "vlsisapd/liberty/Library.h"
int main ( int argc, char * argv[] ) {
LIB::Library* library = LIB::Library::readFromFile("./sxlib.lib");
LIB::Library* library = LIB::Library::readFromFile("./testParse.lib");
if ( library ) {
library->print();
@ -14,8 +14,6 @@ int main ( int argc, char * argv[] ) {
cerr << "library is NULL" << endl;
}
// library->writeToFile("./mySxlib.lib");
return 0;
}

5019
vlsisapd/examples/liberty/sxlib.lib
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File diff suppressed because it is too large Load Diff

170
vlsisapd/examples/liberty/testParse.lib Normal file
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@ -0,0 +1,170 @@
/* --------- */
/* testParse */
/* --------- */
library (test) {
default_intrinsic_fall : 0.059; /* ns */
default_output_pin_fall_res : 2.850; /* kOhms */
default_max_fanout : 0.078; /* max output capacitance in pF */
default_wire_load_capacitance : 0.00015;/* pf/lambda */
default_wire_load_resistance : 0; /* must be 0 */
default_wire_load_area : 0; /* must be 0 */
default_wire_load_mode : enclosed;/* top/segmented/enclosed */
/* -------------------------------------------- */
/* values given as information (unused for */
/* timing design computation) */
/* -------------------------------------------- */
time_unit : "1ns";
voltage_unit : "1V";
current_unit : "1uA";
pulling_resistance_unit : "1kohm";
capacitive_load_unit (1,pf);
wire_load("small") {
resistance : 0 ; /* must be 0 */
capacitance : 0.00015 ; /* pf/lambda */
area : 0 ; /* must be 0 */
slope : 100; /* lambda */
fanout_length(1,100) ; /* first parameter must be 1, second in lambda */
}
wire_load("medium") {
resistance : 0 ; /* must be 0 */
capacitance : 0.00015 ; /* pf/lambda */
area : 0 ; /* must be 0 */
slope : 200; /* lambda */
fanout_length(1,200) ; /* first parameter must be 1, second in lambda */
}
wire_load_selection(medium) {
wire_load_from_area(0,500,"small"); /* less about 200 gates */
wire_load_from_area(500,1500,"medium"); /* less about 500 gates */
}
default_wire_load_selection : medium
/*---------------------- */
/* Combinationnal cells */
/*---------------------- */
cell (inv_x1) {
area : 1.0 /* pitchs */
cell_footprint : "inv";
pin(i) {
direction : input;
capacitance : 0.008;
fanout_load : 0.008;
}
pin(nq) {
direction : output;
max_fanout : 0.078;
function : "i'";
timing() {
timing_sense : negative_unate;
intrinsic_rise : 0.101;
intrinsic_fall : 0.139;
rise_resistance : 3.720;
fall_resistance : 3.640;
related_pin : "i";
}
}
}
cell (no2_x1) {
area : 1.3 /* pitchs */
cell_footprint : "no2";
pin(i0) {
direction : input;
capacitance : 0.012;
fanout_load : 0.012;
}
pin(i1) {
direction : input;
capacitance : 0.012;
fanout_load : 0.012;
}
pin(nq) {
direction : output;
max_fanout : 0.080;
function : "(i0' * i1')";
timing() {
timing_sense : negative_unate;
intrinsic_rise : 0.298;
intrinsic_fall : 0.121;
rise_resistance : 3.210;
fall_resistance : 3.640;
related_pin : "i0";
}
timing() {
timing_sense : negative_unate;
intrinsic_rise : 0.193;
intrinsic_fall : 0.161;
rise_resistance : 3.210;
fall_resistance : 3.640;
related_pin : "i1";
}
}
}
cell (a4_x2) {
area : 2.3 /* pitchs */
cell_footprint : "a4";
pin(i0) {
direction : input;
capacitance : 0.010;
fanout_load : 0.010;
}
pin(i1) {
direction : input;
capacitance : 0.010;
fanout_load : 0.010;
}
pin(i2) {
direction : input;
capacitance : 0.011;
fanout_load : 0.011;
}
pin(i3) {
direction : input;
capacitance : 0.010;
fanout_load : 0.010;
}
pin(q) {
direction : output;
max_fanout : 0.163;
function : "(i0 * i1 * i2 * i3)";
timing() {
timing_sense : positive_unate;
intrinsic_rise : 0.374;
intrinsic_fall : 0.578;
rise_resistance : 1.790;
fall_resistance : 1.620;
related_pin : "i0";
}
timing() {
timing_sense : positive_unate;
intrinsic_rise : 0.441;
intrinsic_fall : 0.539;
rise_resistance : 1.790;
fall_resistance : 1.620;
related_pin : "i1";
}
timing() {
timing_sense : positive_unate;
intrinsic_rise : 0.482;
intrinsic_fall : 0.498;
rise_resistance : 1.790;
fall_resistance : 1.620;
related_pin : "i2";
}
timing() {
timing_sense : positive_unate;
intrinsic_rise : 0.506;
intrinsic_fall : 0.455;
rise_resistance : 1.790;
fall_resistance : 1.620;
related_pin : "i3";
}
}
}
}