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coriolis
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Added classes to handle equations (HighLevelCstr, DDP, DesignerCstrOC, NRCCstr), all child of Equation. 

Modified openChams parser and driver to take into account these classes.
This commit is contained in:
Farakh Javid 2011-11-08 17:59:52 +00:00
parent f1ba48f977
commit 64ae150d5e
17 changed files with 1410 additions and 950 deletions
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10
vlsisapd/src/openChams/src/CMakeLists.txt
View File

@ -17,6 +17,11 @@ SET ( hpps vlsisapd/openChams/Circuit.h
vlsisapd/openChams/Port.h
vlsisapd/openChams/Wire.h
vlsisapd/openChams/OpenChamsException.h
vlsisapd/openChams/Equation.h
vlsisapd/openChams/HighLevelCstr.h
vlsisapd/openChams/NRCCstr.h
vlsisapd/openChams/DDP.h
vlsisapd/openChams/DesignerCstrOC.h
)
SET ( cpps Circuit.cpp
Netlist.cpp
@ -33,6 +38,11 @@ SET ( cpps Circuit.cpp
Node.cpp
Transistor.cpp
Wire.cpp
Equation.cpp
HighLevelCstr.cpp
NRCCstr.cpp
DDP.cpp
DesignerCstrOC.cpp
)
SET ( pycpps PyOpenChams.cpp
)

398
vlsisapd/src/openChams/src/Circuit.cpp
View File

@ -29,6 +29,11 @@ using namespace std;
#include "vlsisapd/openChams/Port.h"
#include "vlsisapd/openChams/Wire.h"
#include "vlsisapd/openChams/OpenChamsException.h"
#include "vlsisapd/openChams/Equation.h"
#include "vlsisapd/openChams/HighLevelCstr.h"
#include "vlsisapd/openChams/NRCCstr.h"
#include "vlsisapd/openChams/DDP.h"
#include "vlsisapd/openChams/DesignerCstrOC.h"
namespace {
template<class T> T getValue(xmlChar* str) {
@ -42,24 +47,24 @@ namespace {
namespace OpenChams {
static bool readSubCircuitsPathsDone = false;
static bool readCircuitParametersDone = false;
static bool readSimulModelsDone = false;
static bool readNetListDone = false;
static bool readInstancesDone = false;
static bool readNetsDone = false;
static bool readSchematicDone = false;
static bool readSizingDone = false;
static bool readLayoutDone = false;
static bool readSubCircuitsPathsDone = false;
static bool readCircuitParametersDone = false;
static bool readSimulModelsDone = false;
static bool readNetListDone = false;
static bool readInstancesDone = false;
static bool readNetsDone = false;
static bool readSchematicDone = false;
static bool readSizingDone = false;
static bool readLayoutDone = false;
Circuit::Circuit(Name name, Name techno) : _name(name)
Circuit::Circuit(Name name, Name techno) : _name(name)
, _absolutePath("")
, _techno(techno)
, _netlist(NULL)
, _schematic(NULL)
, _sizing(NULL)
, _layout(NULL)
{
{
readSubCircuitsPathsDone = false;
readCircuitParametersDone = false;
readSimulModelsDone = false;
@ -69,23 +74,23 @@ Circuit::Circuit(Name name, Name techno) : _name(name)
readSchematicDone = false;
readSizingDone = false;
readLayoutDone = false;
}
}
// COMPARISON FUNCTION //
bool ConnectionsSort(const Net::Connection* c1, const Net::Connection* c2) {
// COMPARISON FUNCTION //
bool ConnectionsSort(const Net::Connection* c1, const Net::Connection* c2) {
return c1->getInstanceName() < c2->getInstanceName();
}
}
bool InstanceNameSort(const Instance* i1, const Instance* i2) {
bool InstanceNameSort(const Instance* i1, const Instance* i2) {
return i1->getName() < i2->getName();
}
}
bool NetNameSort(const Net* n1, const Net* n2) {
bool NetNameSort(const Net* n1, const Net* n2) {
return n1->getName() < n2->getName();
}
}
// USEFUL //
void Circuit::check_uppercase(string& str, vector<string>& compares, string message) {
// USEFUL //
void Circuit::check_uppercase(string& str, vector<string>& compares, string message) {
transform(str.begin(), str.end(), str.begin(), ::toupper);
bool equal = false;
for (size_t i = 0 ; i < compares.size() ; i++) {
@ -96,9 +101,9 @@ void Circuit::check_uppercase(string& str, vector<string>& compares, string mess
if (!equal) {
throw OpenChamsException(message);
}
}
}
void Circuit::check_lowercase(string& str, vector<string>& compares, string message) {
void Circuit::check_lowercase(string& str, vector<string>& compares, string message) {
transform(str.begin(), str.end(), str.begin(), ::tolower);
bool equal = false;
for (size_t i = 0 ; i < compares.size() ; i++) {
@ -109,17 +114,17 @@ void Circuit::check_lowercase(string& str, vector<string>& compares, string mess
if (!equal) {
throw OpenChamsException(message);
}
}
}
void Circuit::addSimulModel(unsigned id, SimulModel::Base base, SimulModel::Version version, std::string filePath) {
void Circuit::addSimulModel(unsigned id, SimulModel::Base base, SimulModel::Version version, std::string filePath) {
SimulModel* sim = new SimulModel(id, base, version, filePath);
map<unsigned, SimulModel*>::iterator it = _simulModels.find(id);
if (it != _simulModels.end())
throw OpenChamsException("[ERROR] Cannot define two SimulModels' models with the same ID.");
_simulModels[id] = sim;
}
}
Name Circuit::readParameter(xmlNode* node, double& value) {
Name Circuit::readParameter(xmlNode* node, double& value) {
xmlChar* paramNameC = xmlGetProp(node, (xmlChar*)"name");
xmlChar* valueC = xmlGetProp(node, (xmlChar*)"value");
if (paramNameC && valueC) {
@ -129,9 +134,9 @@ Name Circuit::readParameter(xmlNode* node, double& value) {
} else {
throw OpenChamsException("[ERROR] 'parameter' node must have 'name' and 'value' properties.");
}
}
}
Name Circuit::readParameterEq(xmlNode* node, string& eqStr) {
Name Circuit::readParameterEq(xmlNode* node, string& eqStr) {
xmlChar* paramNameC = xmlGetProp(node, (xmlChar*)"name");
xmlChar* equationC = xmlGetProp(node, (xmlChar*)"equation");
if (paramNameC && equationC) {
@ -141,9 +146,9 @@ Name Circuit::readParameterEq(xmlNode* node, string& eqStr) {
} else {
throw OpenChamsException("[ERROR] 'parameterEq' node must have 'name' and 'equation' properties.");
}
}
}
Name Circuit::readConnector(xmlNode* node) {
Name Circuit::readConnector(xmlNode* node) {
xmlChar* connectorNameC = xmlGetProp(node, (xmlChar*)"name");
if (connectorNameC) {
Name name((const char*)connectorNameC);
@ -152,10 +157,10 @@ Name Circuit::readConnector(xmlNode* node) {
throw OpenChamsException("[ERROR] 'connector' node must have 'name' property.");
//return Name("");
}
}
}
// CIRCUIT //
void Circuit::readSubCircuitsPaths(xmlNode* node) {
// CIRCUIT //
void Circuit::readSubCircuitsPaths(xmlNode* node) {
if (readSubCircuitsPathsDone) {
cerr << "[WARNING] Only one 'subCircuitsPaths' node is allowed in circuit, others will be ignored." << endl;
return;
@ -182,9 +187,9 @@ void Circuit::readSubCircuitsPaths(xmlNode* node) {
}
}
readSubCircuitsPathsDone = true;
}
}
void Circuit::readCircuitParameters(xmlNode* node) {
void Circuit::readCircuitParameters(xmlNode* node) {
if (readCircuitParametersDone) {
cerr << "[WARNING] Only one 'parameters' node is allowed in circuit, others will be ignored." << endl;
return;
@ -210,9 +215,9 @@ void Circuit::readCircuitParameters(xmlNode* node) {
}
}
readCircuitParametersDone = true;
}
}
void Circuit::readSimulModels(xmlNode* node) {
void Circuit::readSimulModels(xmlNode* node) {
if (readSimulModelsDone) {
cerr << "[WARNING] Only one 'simulModels' node is allowed in circuit, others will be ignored." << endl;
return;
@ -273,10 +278,10 @@ void Circuit::readSimulModels(xmlNode* node) {
}
}
readSimulModelsDone = true;
}
}
// NETLIST //
void Circuit::readNetList(xmlNode* node) {
// NETLIST //
void Circuit::readNetList(xmlNode* node) {
if (readNetListDone) {
cerr << "[WARNING] Only one 'netlist' node is allowed in circuit, others will be ignored." << endl;
return;
@ -296,10 +301,10 @@ void Circuit::readNetList(xmlNode* node) {
}
readNetListDone = true;
_netlist = netlist;
}
}
// INSTANCES //
void Circuit::readInstances(xmlNode* node, Netlist* netlist) {
// INSTANCES //
void Circuit::readInstances(xmlNode* node, Netlist* netlist) {
if (readInstancesDone) {
cerr << "[WARNING] Only one 'instances' node is allowed in 'netlist', others will be ignored." << endl;
return;
@ -315,9 +320,9 @@ void Circuit::readInstances(xmlNode* node, Netlist* netlist) {
}
}
readInstancesDone = true;
}
}
Instance* Circuit::readInstance(xmlNode* node, Netlist* netlist) {
Instance* Circuit::readInstance(xmlNode* node, Netlist* netlist) {
xmlChar* iNameC = xmlGetProp(node, (xmlChar*)"name");
xmlChar* iModelC = xmlGetProp(node, (xmlChar*)"model");
xmlChar* iOrderC = xmlGetProp(node, (xmlChar*)"order");
@ -366,9 +371,9 @@ Instance* Circuit::readInstance(xmlNode* node, Netlist* netlist) {
}
}
return inst;
}
}
void Circuit::readInstanceConnectors(xmlNode* node, Instance* inst) {
void Circuit::readInstanceConnectors(xmlNode* node, Instance* inst) {
xmlNode* child = node->children;
for (xmlNode* node = child; node; node = node->next) {
if (node->type == XML_ELEMENT_NODE) {
@ -379,9 +384,9 @@ void Circuit::readInstanceConnectors(xmlNode* node, Instance* inst) {
}
}
}
}
}
void Circuit::readInstanceParameters(xmlNode* node, Instance* inst) {
void Circuit::readInstanceParameters(xmlNode* node, Instance* inst) {
xmlNode* child = node->children;
for (xmlNode* node = child; node; node = node->next) {
if (node->type == XML_ELEMENT_NODE) {
@ -401,9 +406,9 @@ void Circuit::readInstanceParameters(xmlNode* node, Instance* inst) {
}
}
}
}
}
void Circuit::readInstanceTransistors(xmlNode* node, Device* dev) {
void Circuit::readInstanceTransistors(xmlNode* node, Device* dev) {
xmlNode* child = node->children;
for (xmlNode* node = child; node; node = node->next) {
if (node->type == XML_ELEMENT_NODE) {
@ -415,9 +420,9 @@ void Circuit::readInstanceTransistors(xmlNode* node, Device* dev) {
}
}
}
}
void Circuit::readTransistor(xmlNode* node, Device* dev) {
void Circuit::readTransistor(xmlNode* node, Device* dev) {
xmlChar* tNameC = xmlGetProp(node, (xmlChar*)"name");
Transistor* trans = NULL;
if (tNameC) {
@ -440,9 +445,9 @@ void Circuit::readTransistor(xmlNode* node, Device* dev) {
}
}
}
}
}
void Circuit::readTransistorConnection(xmlNode* node, Transistor* trans) {
void Circuit::readTransistorConnection(xmlNode* node, Transistor* trans) {
xmlChar* gateC = xmlGetProp(node, (xmlChar*)"gate");
xmlChar* sourceC = xmlGetProp(node, (xmlChar*)"source");
xmlChar* drainC = xmlGetProp(node, (xmlChar*)"drain");
@ -460,10 +465,10 @@ void Circuit::readTransistorConnection(xmlNode* node, Transistor* trans) {
throw OpenChamsException("[ERROR] 'connection' node must have 'gate', 'source', 'drain' and 'bulk' properties.");
}
}
}
// NETS //
void Circuit::readNets(xmlNode* node, Netlist* netlist) {
// NETS //
void Circuit::readNets(xmlNode* node, Netlist* netlist) {
if (readNetsDone) {
cerr << "[WARNING] Only one 'nets' node is allowed in 'netlist', others will be ignored." << endl;
return;
@ -479,9 +484,9 @@ void Circuit::readNets(xmlNode* node, Netlist* netlist) {
}
}
readNetsDone = true;
}
}
Net* Circuit::readNet(xmlNode* node, Netlist* netlist) {
Net* Circuit::readNet(xmlNode* node, Netlist* netlist) {
xmlChar* nNameC = xmlGetProp(node, (xmlChar*)"name");
xmlChar* nTypeC = xmlGetProp(node, (xmlChar*)"type");
xmlChar* nExternC = xmlGetProp(node, (xmlChar*)"isExternal");
@ -515,9 +520,9 @@ Net* Circuit::readNet(xmlNode* node, Netlist* netlist) {
}
}
return net;
}
}
void Circuit::readNetConnector(xmlNode* node, Net* net) {
void Circuit::readNetConnector(xmlNode* node, Net* net) {
xmlChar* instanceNameC = xmlGetProp(node, (xmlChar*)"instance");
xmlChar* connectorNameC = xmlGetProp(node, (xmlChar*)"name");
if (instanceNameC && connectorNameC) {
@ -538,10 +543,10 @@ void Circuit::readNetConnector(xmlNode* node, Net* net) {
} else {
throw OpenChamsException("[ERROR] 'connector' node must have 'instance' and 'name' properties (for net).");
}
}
}
// SCHEMATIC //
void Circuit::readSchematic(xmlNode* node) {
// SCHEMATIC //
void Circuit::readSchematic(xmlNode* node) {
if (readSchematicDone) {
cerr << "[WARNING] Only one 'schematic' node is allowed in circuit, others will be ignored." << endl;
return;
@ -562,9 +567,9 @@ void Circuit::readSchematic(xmlNode* node) {
}
readSchematicDone = true;
_schematic = schematic;
}
}
void Circuit::readInstanceSchematic(xmlNode* node, Schematic* schematic) {
void Circuit::readInstanceSchematic(xmlNode* node, Schematic* schematic) {
xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name");
xmlChar* xC = xmlGetProp(node, (xmlChar*)"x");
xmlChar* yC = xmlGetProp(node, (xmlChar*)"y");
@ -581,9 +586,9 @@ void Circuit::readInstanceSchematic(xmlNode* node, Schematic* schematic) {
} else {
throw OpenChamsException("[ERROR] 'instance' node in 'schematic' must have 'name', 'x', 'y' and 'orient' properties.");
}
}
}
void Circuit::readNetSchematic(xmlNode* node, Circuit* circuit) {
void Circuit::readNetSchematic(xmlNode* node, Circuit* circuit) {
xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name");
if (nameC) {
Name nName((const char*)nameC);
@ -609,9 +614,9 @@ void Circuit::readNetSchematic(xmlNode* node, Circuit* circuit) {
} else {
throw OpenChamsException("[ERROR] 'net' node in schematic must have 'name' property.");
}
}
}
void Circuit::readPortSchematic(xmlNode* node, Net* net) {
void Circuit::readPortSchematic(xmlNode* node, Net* net) {
xmlChar* typeC = xmlGetProp(node, (xmlChar*)"type");
xmlChar* idxC = xmlGetProp(node, (xmlChar*)"idx");
xmlChar* xC = xmlGetProp(node, (xmlChar*)"x");
@ -630,9 +635,9 @@ void Circuit::readPortSchematic(xmlNode* node, Net* net) {
} else {
throw OpenChamsException("[ERROR] 'schematic'.'port' must have 'type', 'idx', 'x', 'y' and 'orient' properties.");
}
}
}
void Circuit::readWireSchematic(xmlNode* node, Net* net) {
void Circuit::readWireSchematic(xmlNode* node, Net* net) {
Wire* wire = net->addWire();
xmlNode* child = node->children;
for (xmlNode* node = child; node; node = node->next) {
@ -679,10 +684,10 @@ void Circuit::readWireSchematic(xmlNode* node, Net* net) {
}
}
}
}
}
// SIZING //
void Circuit::readSizing(xmlNode* node) {
// SIZING //
void Circuit::readSizing(xmlNode* node) {
if (readSizingDone) {
cerr << "[WARNING] Only one 'sizing' node is allowed in circuit, others will be ignored." << endl;
return;
@ -704,9 +709,9 @@ void Circuit::readSizing(xmlNode* node) {
}
readSizingDone = true;
_sizing = sizing;
}
}
void Circuit::readInstanceSizing(xmlNode* node, Sizing* sizing) {
void Circuit::readInstanceSizing(xmlNode* node, Sizing* sizing) {
xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name");
xmlChar* operatorC = xmlGetProp(node, (xmlChar*)"operator");
xmlChar* simulModC = xmlGetProp(node, (xmlChar*)"simulModel");
@ -731,9 +736,9 @@ void Circuit::readInstanceSizing(xmlNode* node, Sizing* sizing) {
} else {
throw OpenChamsException("[ERROR] 'instance' node in 'sizing' must have 'name', 'operator' and 'simulModel' properties.");
}
}
}
void Circuit::readConstraint(xmlNode* node, Operator* op) {
void Circuit::readConstraint(xmlNode* node, Operator* op) {
// attributes of constraint may be :
// param ref refParam [factor]
// param refEquation [factor]
@ -762,35 +767,125 @@ void Circuit::readConstraint(xmlNode* node, Operator* op) {
} else {
throw OpenChamsException("[ERROR] 'constraint' node must have 'param, ref, refParam, [factor]' or 'param, refEq, [factor]' properties.");
}
}
}
void Circuit::readEquations(xmlNode* node, Sizing* sizing) {
void Circuit::readEquations(xmlNode* node, Sizing* sizing) {
xmlNode* child = node->children;
for (xmlNode* node = child; node; node = node->next) {
if (node->type == XML_ELEMENT_NODE) {
if (xmlStrEqual(node->name, (xmlChar*)"eq")) {
readEquation(node, sizing);
} else {
throw OpenChamsException("[ERROR] Only 'eq' nodes are allowed in 'equations'.");
if (xmlStrEqual(node->name, (xmlChar*)"cstr_circuit_level"))
readEquation_CircuitLevel(node, sizing);
else if (xmlStrEqual(node->name, (xmlChar*)"nrc_cstr"))
readEquation_NRC(node, sizing);
else if (xmlStrEqual(node->name, (xmlChar*)"ddps"))
readEquation_DDPs(node, sizing);
else if (xmlStrEqual(node->name, (xmlChar*)"cstr_designer"))
readEquation_DesignerCstr(node, sizing);
else {
throw OpenChamsException("[ERROR] 'cstr_circuit_level', 'nrc_cstr' and 'ddps' nodes are allowed in 'equations'.");
}
}
}
}
}
void Circuit::readEquation(xmlNode* node, Sizing* sizing) {
xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name");
xmlChar* equationC = xmlGetProp(node, (xmlChar*)"equation");
void Circuit::readEquation_CircuitLevel(xmlNode* node, Sizing* sizing) {
if (node->type == XML_ELEMENT_NODE && node->children) {
for (xmlNode* eqNode = node->children ; eqNode ; eqNode = eqNode->next) {
if (eqNode->type == XML_ELEMENT_NODE && xmlStrEqual(eqNode->name, (xmlChar*)"cstr_cl")) {
xmlChar* nameC = xmlGetProp(eqNode, (xmlChar*)"name");
xmlChar* equationC = xmlGetProp(eqNode, (xmlChar*)"equation");
if (nameC && equationC) {
Name eName ((const char*)nameC);
string eqStr ((const char*)equationC);
sizing->addEquation(eName, eqStr);
} else {
throw OpenChamsException("[ERROR] 'eq' node in 'equations' must have 'name' and 'equation' properties.");
HighLevelCstr* equation = new HighLevelCstr();
equation->addEquation(eqStr);
sizing->addEquation(eName, (Equation*)(equation));
}
else
throw OpenChamsException("[ERROR] 'cstr_cl' node in 'equations' must have 'name' and 'equation' properties.");
}
}
}
}
}
// LAYOUT //
void Circuit::readLayout(xmlNode* node) {
void Circuit::readEquation_DesignerCstr(xmlNode* node, Sizing* sizing) {
if (node->type == XML_ELEMENT_NODE && node->children) {
for (xmlNode* eqNode = node->children ; eqNode ; eqNode = eqNode->next) {
if (eqNode->type == XML_ELEMENT_NODE && xmlStrEqual(eqNode->name, (xmlChar*)"cstr_dsg")) {
xmlChar* nameC = xmlGetProp(eqNode, (xmlChar*)"name");
xmlChar* equationC = xmlGetProp(eqNode, (xmlChar*)"equation");
if (nameC && equationC) {
Name eName ((const char*)nameC);
string eqStr ((const char*)equationC);
DesignerCstrOC* equation = new DesignerCstrOC();
equation->addEquation(eqStr);
sizing->addEquation(eName, (Equation*)(equation));
}
else
throw OpenChamsException("[ERROR] 'cstr_dsg' node in 'equations' must have 'name' and 'equation' properties.");
}
}
}
}
void Circuit::readEquation_NRC(xmlNode* node, Sizing* sizing) {
// cerr << "NRC not yet managed" << endl;
if (node->type == XML_ELEMENT_NODE && node->children) {
for (xmlNode* eqNode = node->children ; eqNode ; eqNode = eqNode->next) {
if (eqNode->type == XML_ELEMENT_NODE && xmlStrEqual(eqNode->name, (xmlChar*)"nrc")) {
xmlChar* nameC = xmlGetProp(eqNode, (xmlChar*)"name");
xmlChar* paramC = xmlGetProp(eqNode, (xmlChar*)"param");
xmlChar* equationC = xmlGetProp(eqNode, (xmlChar*)"equation");
if (nameC && equationC && paramC) {
Name eName ((const char*)nameC);
string eqStr ((const char*)equationC);
string paramStr ((const char*)paramC);
NRCCstr* equation = new NRCCstr(paramStr);
equation->addEquation(eqStr);
sizing->addEquation(eName, (Equation*)(equation));
}
else
throw OpenChamsException("[ERROR] 'nrc' node in 'nrc_cstr' must have 'name', 'param' and 'equation' properties.");
}
}
}
}
void Circuit::readEquation_DDPs(xmlNode* node, Sizing* sizing) {
// cerr << "DDP not yet managed" << endl;
if (node->type == XML_ELEMENT_NODE && node->children) {
for (xmlNode* eqNode = node->children ; eqNode ; eqNode = eqNode->next) {
if (eqNode->type == XML_ELEMENT_NODE && xmlStrEqual(eqNode->name, (xmlChar*)"ddp_i")) {
xmlChar* nameC = xmlGetProp(eqNode, (xmlChar*)"name");
if (nameC) {
Name eName ((const char*)nameC);
DDP* equation = new DDP();
for(xmlNode* eqNode2 = eqNode->children ; eqNode2 ; eqNode2 = eqNode2->next) {
if (eqNode2->type == XML_ELEMENT_NODE && xmlStrEqual(eqNode2->name, (xmlChar*)"ddp_eq")) {
xmlChar* equationC = xmlGetProp(eqNode2, (xmlChar*)"equation");
if (equationC) {
string eqStr ((const char*)equationC);
equation->addEquation(eqStr);
}
}
}
sizing->addEquation(eName, (Equation*)(equation));
}
else
throw OpenChamsException("[ERROR] 'ddp_i' node in 'ddps' must have 'name' property.");
}
}
}
}
// *************************************************************************************
// LAYOUT //
void Circuit::readLayout(xmlNode* node) {
if (readLayoutDone) {
cerr << "[WARNING] Only one 'layout' node is allowed in circuit, others will be ignored." << endl;
return;
@ -812,9 +907,9 @@ void Circuit::readLayout(xmlNode* node) {
}
readLayoutDone = true;
_layout = layout;
}
}
void Circuit::readInstanceLayout(xmlNode* node, Layout* layout) {
void Circuit::readInstanceLayout(xmlNode* node, Layout* layout) {
xmlChar* nameC = xmlGetProp(node, (xmlChar*)"name");
xmlChar* styleC = xmlGetProp(node, (xmlChar*)"style");
if (nameC && styleC) {
@ -824,9 +919,9 @@ void Circuit::readInstanceLayout(xmlNode* node, Layout* layout) {
} else {
throw OpenChamsException("[ERROR] 'instance' node in 'layout' must have 'name' and 'style' properties.");
}
}
}
void Circuit::readHBTree(xmlNode* node, Layout* layout) {
void Circuit::readHBTree(xmlNode* node, Layout* layout) {
// HBTree node can have only one child (group or bloc)
xmlNode* child = node->children;
if (child->type == XML_ELEMENT_NODE) {
@ -836,9 +931,9 @@ void Circuit::readHBTree(xmlNode* node, Layout* layout) {
// save root node in layout
layout->setHBTreeRoot(root);
}
}
}
Node* Circuit::readNodeOrBloc(xmlNode* node, Node* parent) {
Node* Circuit::readNodeOrBloc(xmlNode* node, Node* parent) {
// 1 - create Node based on xmlNode* passed as argument
if (node->type == XML_ELEMENT_NODE) {
bool isAGroup = xmlStrEqual(node->name, (xmlChar*)"group");
@ -908,9 +1003,9 @@ Node* Circuit::readNodeOrBloc(xmlNode* node, Node* parent) {
return nodeOC;
}
return NULL;
}
}
void Circuit::setAbsolutePath(const string filePath) {
void Circuit::setAbsolutePath(const string filePath) {
if (filePath[0] == '/')
_absolutePath = filePath;
else {
@ -918,9 +1013,9 @@ void Circuit::setAbsolutePath(const string filePath) {
}
size_t found = _absolutePath.find_last_of("/");
_absolutePath = _absolutePath.substr(0, found);
}
}
Circuit* Circuit::readFromFile(const string filePath) {
Circuit* Circuit::readFromFile(const string filePath) {
LIBXML_TEST_VERSION;
Circuit* cir = NULL;
@ -984,9 +1079,9 @@ Circuit* Circuit::readFromFile(const string filePath) {
throw OpenChamsException("[ERROR] no <netlist> section was found in parsed file !");
}
return cir;
}
}
Netlist* Circuit::createNetlist() {
Netlist* Circuit::createNetlist() {
if (_netlist)
throw OpenChamsException("[ERROR] Cannot create two netlists in one circuit.");
@ -995,9 +1090,9 @@ Netlist* Circuit::createNetlist() {
throw OpenChamsException("[ERROR] Cannot create netlist.");
return _netlist;
}
}
Schematic* Circuit::createSchematic() {
Schematic* Circuit::createSchematic() {
if (_schematic)
throw OpenChamsException("[ERROR] Cannot create two scheamtics in one circuit.");
@ -1006,9 +1101,9 @@ Schematic* Circuit::createSchematic() {
throw OpenChamsException("[ERROR] Cannot create schematic.");
return _schematic;
}
}
Sizing* Circuit::createSizing() {
Sizing* Circuit::createSizing() {
if (_sizing)
throw OpenChamsException("[ERROR] Cannot create two sizings in one circuit.");
@ -1017,9 +1112,9 @@ Sizing* Circuit::createSizing() {
throw OpenChamsException("[ERROR] Cannot create sizing.");
return _sizing;
}
}
Layout* Circuit::createLayout() {
Layout* Circuit::createLayout() {
if (_layout)
throw OpenChamsException("[ERROR] Cannot create two layouts in one circuit.");
@ -1028,9 +1123,9 @@ Layout* Circuit::createLayout() {
throw OpenChamsException("[ERROR] Cannot create layout.");
return _layout;
}
}
void Circuit::driveHBTree(ofstream& file, Node* node, unsigned indent) {
void Circuit::driveHBTree(ofstream& file, Node* node, unsigned indent) {
if (!node) return;
for (unsigned i = 0 ; i < indent ; i++)
file << " ";
@ -1090,9 +1185,9 @@ void Circuit::driveHBTree(ofstream& file, Node* node, unsigned indent) {
file << "</group>" << endl;
return;
}
}
}
bool Circuit::writeToFile(string filePath) {
bool Circuit::writeToFile(string filePath) {
ofstream file;
file.open(filePath.c_str());
if (!file.is_open()) {
@ -1132,8 +1227,10 @@ bool Circuit::writeToFile(string filePath) {
for (map<Name, double>::const_iterator it = _params.getValues().begin() ; it != _params.getValues().end() ; ++it) {
file << " <parameter name=\"" << (*it).first.getString() << "\" value=\"" << (*it).second << "\"/>" << endl;
}
for (map<Name, string>::const_iterator it = _params.getEqValues().begin() ; it != _params.getEqValues().end() ; ++it) {
file << " <parameterEq name=\"" << (*it).first.getString() << "\" equation=\"" << (*it).second << "\"/>" << endl;
cerr << "_params.getValues().size() = " << _params.getValues().size() << endl;
cerr << "_params.getEqValues().size() = " << _params.getEqValues().size() << endl;
for (map<Name, string>::const_iterator it2 = _params.getEqValues().begin() ; it2 != _params.getEqValues().end() ; ++it2) {
file << " <parameterEq name=\"" << (*it2).first.getString() << "\" equation=\"" << (*it2).second << "\"/>" << endl;
}
file << " </parameters>" << endl;
}
@ -1184,6 +1281,9 @@ bool Circuit::writeToFile(string filePath) {
for (map<Name, double>::const_iterator it = params.getValues().begin() ; it != params.getValues().end() ; ++it) {
file << " <parameter name=\"" << (*it).first.getString() << "\" value=\"" << (*it).second << "\"/>" << endl;
}
for(map<Name, string>::const_iterator it = params.getEqValues().begin() ; it != params.getEqValues().end() ; ++it) {
file << " <parameterEq name=\"" << (*it).first.getString() << "\" equation=\"" << (*it).second << "\"/>" << endl;
}
file << " </parameters>" << endl;
}
file << " </instance>" << endl;
@ -1270,8 +1370,12 @@ bool Circuit::writeToFile(string filePath) {
}
file << " </schematic>" << endl;
}
if (_sizing && !_sizing->hasNoOperators()) {
// SIZING (modified by Farakh) ***************************************************************
if(_sizing && (!_sizing->hasNoOperators() || !_sizing->hasNoEquations()) )
file << " <sizing>" << endl;
if (_sizing && !_sizing->hasNoOperators()) {
// file << " <sizing>" << endl;
for (map<Name, Operator*>::const_iterator it = _sizing->getOperators().begin() ; it != _sizing->getOperators().end() ; ++it) {
Operator* op = (*it).second;
string opName = op->getName().getString();
@ -1290,15 +1394,53 @@ bool Circuit::writeToFile(string filePath) {
}
file << " </instance>" << endl;
}
if (!_sizing->hasNoEquations()) {
file << " <equations>" << endl;
for (map<Name, string>::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it) {
file << " <eq name=\"" << ((*it).first).getString() << "\" equation=\"" << (*it).second << "\"/>" << endl;
}
// EQUATIONS
if (_sizing && !_sizing->hasNoEquations()) {
file << " <equations>" << endl;
// for (map<Name, string>::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it)
// file << " <eq name=\"" << ((*it).first).getString() << "\" equation=\"" << (*it).second << "\"/>" << endl;
file << " <cstr_designer>" << endl;
for(map<Name, Equation*>::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it) {
if(dynamic_cast<DesignerCstrOC*>((*it).second))
file << " <cstr_dsg name=\"" << ((*it).first).getString() << "\" equation=\"" << (*it).second->getEquationStr()[0] << "\"/>" << endl;
}
file << " </cstr_designer>" << endl;
file << " <cstr_circuit_level>" << endl;
for(map<Name, Equation*>::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it) {
if(dynamic_cast<HighLevelCstr*>((*it).second))
file << " <cstr_cl name=\"" << ((*it).first).getString() << "\" equation=\"" << (*it).second->getEquationStr()[0] << "\"/>" << endl;
}
file << " </cstr_circuit_level>" << endl;
file << " <nrc_cstr>" << endl;
for(map<Name, Equation*>::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it) {
if(dynamic_cast<NRCCstr*>((*it).second)) {
NRCCstr* nrcCstr = (NRCCstr*)((*it).second);
file << " <nrc name=\"" << ((*it).first).getString() << "\" param=\"" << nrcCstr->getVoltage() << "\" equation=\"" << (*it).second->getEquationStr()[0] << "\"/>" << endl;
}
}
file << " </nrc_cstr>" << endl;
file << " <ddps>" << endl;
for(map<Name, Equation*>::const_iterator it = _sizing->getEquations().begin() ; it != _sizing->getEquations().end() ; ++it) {
if(dynamic_cast<DDP*>((*it).second)) {
file << " <ddp_i name=\"" << ((*it).first).getString() << "\">" << endl;
for(map<int, string>::const_iterator it2 = (*it).second->getEquationStr().begin(); it2!=(*it).second->getEquationStr().end(); ++it2)
file << " <ddp_eq equation=\"" << (*it2).second << "\"/>" << endl;
file << " </ddp_i>" << endl;
}
}
file << " </ddps>" << endl;
file << " </equations>" << endl;
}
if(_sizing && (!_sizing->hasNoOperators() || !_sizing->hasNoEquations()) )
file << " </sizing>" << endl;
}
// *******************************************************************************************
if (_layout) {
file << " <layout>" << endl;
if (!_layout->hasNoInstance()) {
@ -1316,7 +1458,7 @@ bool Circuit::writeToFile(string filePath) {
file << "</circuit>" << endl;
file.close();
return true;
}
}
}

32
vlsisapd/src/openChams/src/DDP.cpp Normal file
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@ -0,0 +1,32 @@
/*
* DDP.cpp
* openChams
*
* Created by Farakh JAVID on 25/10/2011.
* Copyright 2010 UPMC / LIP6. All rights reserved.
*
*/
#include <string>
#include <iostream>
using namespace std;
#include "vlsisapd/openChams/DDP.h"
namespace OpenChams {
DDP::DDP()
: Equation()
{}
// This function prints all equations
void DDP::printEquations() {
map<int, string>::iterator it;
cerr << "Printing equations of a DDP : " << endl;
for(it=_equations.begin(); it!=_equations.end(); ++it) {
cerr << (*it).first << "\t" << (*it).second << endl;
}
}
} // namespace

31
vlsisapd/src/openChams/src/DesignerCstrOC.cpp Normal file
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@ -0,0 +1,31 @@
/*
* DesignerCstrOC.cpp
* openChams
*
* Created by Farakh JAVID on 25/10/2011.
* Copyright 2010 UPMC / LIP6. All rights reserved.
*
*/
#include <string>
#include <iostream>
using namespace std;
#include "vlsisapd/openChams/DesignerCstrOC.h"
namespace OpenChams {
DesignerCstrOC::DesignerCstrOC()
: Equation()
{}
// This function prints all equations
void DesignerCstrOC::printEquations() {
map<int, string>::iterator it;
cerr << "Printing equations of a DesignerCstrOC : " << endl;
for(it=_equations.begin(); it!=_equations.end(); ++it) {
cerr << (*it).first << "\t" << (*it).second << endl;
}
}
} // namespace

25
vlsisapd/src/openChams/src/Equation.cpp Normal file
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@ -0,0 +1,25 @@
/*
* Equation.cpp
* openChams
*
* Created by Farakh JAVID on 25/10/2011.
* Copyright 2010 UPMC / LIP6. All rights reserved.
*
*/
#include <string>
using namespace std;
#include "vlsisapd/openChams/Equation.h"
namespace OpenChams {
Equation::Equation()
: _equations()
// , _paramsInEquation()
{}
void Equation::addEquation(std::string eq) {
_equations[_equations.size()] = eq;
}
} // namespace

31
vlsisapd/src/openChams/src/HighLevelCstr.cpp Normal file
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@ -0,0 +1,31 @@
/*
* HighLevelCstr.cpp
* openChams
*
* Created by Farakh JAVID on 25/10/2011.
* Copyright 2010 UPMC / LIP6. All rights reserved.
*
*/
#include <string>
#include <iostream>
using namespace std;
#include "vlsisapd/openChams/HighLevelCstr.h"
namespace OpenChams {
HighLevelCstr::HighLevelCstr()
: Equation()
{}
// This function prints all equations
void HighLevelCstr::printEquations() {
map<int, string>::iterator it;
cerr << "Printing equations of a HighLevelCstr : " << endl;
for(it=_equations.begin(); it!=_equations.end(); ++it) {
cerr << (*it).first << "\t" << (*it).second << endl;
}
}
} // namespace

33
vlsisapd/src/openChams/src/NRCCstr.cpp Normal file
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@ -0,0 +1,33 @@
/*
* NRCCstr.cpp
* openChams
*
* Created by Farakh JAVID on 25/10/2011.
* Copyright 2010 UPMC / LIP6. All rights reserved.
*
*/
#include <string>
#include <iostream>
using namespace std;
#include "vlsisapd/openChams/NRCCstr.h"
namespace OpenChams {
NRCCstr::NRCCstr(string controlVoltage)
: Equation()
, _controlVoltage(controlVoltage)
{}
// This function prints all equations
void NRCCstr::printEquations() {
map<int, string>::iterator it;
cerr << "Printing equations of a NRCCstr : " << endl;
cerr << "Control voltage = " << _controlVoltage << endl;
for(it=_equations.begin(); it!=_equations.end(); ++it) {
cerr << (*it).first << "\t" << (*it).second << endl;
}
}
} // namespace

1
vlsisapd/src/openChams/src/Parameters.cpp
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@ -59,6 +59,7 @@ void Parameters::addParameter(Name name, string eqStr) {
throw OpenChamsException(error);
}
_paramsEq[name] = eqStr;
cerr << "987* _paramsEq.size() = " << _paramsEq.size() << endl;
}
} // namespace

2
vlsisapd/src/openChams/src/PyOpenChams.cpp
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@ -299,6 +299,7 @@ BOOST_PYTHON_MODULE(OPENCHAMS) {
;
} // end operatorScope
/*
// map wrapping for OpenChams::Sizing
STL_MAP_WRAPPING_PTR(Name, Operator*, "OperatorsMap")
// class OpenChams::Sizing
@ -313,6 +314,7 @@ BOOST_PYTHON_MODULE(OPENCHAMS) {
.def("getEquations", &Sizing::getEquations, return_internal_reference<>())
.def("getOperators", &Sizing::getOperators, return_internal_reference<>())
;
*/
// map wrapping for OpenChams::Layout
STL_MAP_WRAPPING(Name, Name, "LayoutInstancesMap")

5
vlsisapd/src/openChams/src/Sizing.cpp
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@ -13,6 +13,7 @@ using namespace std;
#include "vlsisapd/openChams/Sizing.h"
#include "vlsisapd/openChams/Circuit.h"
#include "vlsisapd/openChams/Operator.h"
#include "vlsisapd/openChams/Equation.h"
#include "vlsisapd/openChams/OpenChamsException.h"
namespace OpenChams {
@ -31,8 +32,8 @@ Operator* Sizing::addOperator(Name instanceName, Name operatorName, Name simulMo
return op;
}
void Sizing::addEquation(Name equationName, string equation) {
map<Name, string>::iterator it = _equations.find(equationName);
void Sizing::addEquation(Name equationName, Equation* equation) {
map<Name, Equation*>::iterator it = _equations.find(equationName);
if (it != _equations.end()) {
string error("[ERROR] Cannot set several equations with the same name in 'sizing' (");
error += equationName.getString();

7
vlsisapd/src/openChams/src/vlsisapd/openChams/Circuit.h
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@ -91,8 +91,13 @@ class Circuit {
void readSizing(xmlNode*);
void readInstanceSizing(xmlNode*, Sizing*);
void readConstraint(xmlNode*, Operator*);
void readEquations(xmlNode*, Sizing*);
void readEquation(xmlNode*, Sizing*);
void readEquation_CircuitLevel(xmlNode*, Sizing*);
void readEquation_NRC(xmlNode*, Sizing*);
void readEquation_DDPs(xmlNode*, Sizing*);
void readEquation_DesignerCstr(xmlNode*, Sizing*);
void readLayout(xmlNode*);
void readInstanceLayout(xmlNode*, Layout*);
void readHBTree(xmlNode*, Layout*);

24
vlsisapd/src/openChams/src/vlsisapd/openChams/DDP.h Normal file
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@ -0,0 +1,24 @@
/*
* DDP.h
* openChams
*
* Created by Farakh JAVID on 25/10/2011.
* Copyright 2008-2010 UPMC / LIP6. All rights reserved.
*
*/
#ifndef __OPENCHAMS_DDP_H__
#define __OPENCHAMS_DDP_H__
#include "vlsisapd/openChams/Equation.h"
namespace OpenChams {
class DDP : public Equation {
public:
DDP();
virtual void printEquations();
};
} // namespace
#endif

24
vlsisapd/src/openChams/src/vlsisapd/openChams/DesignerCstrOC.h Normal file
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@ -0,0 +1,24 @@
/*
* DesignerCstrOC.h
* openChams
*
* Created by Farakh JAVID on 25/10/2011.
* Copyright 2008-2010 UPMC / LIP6. All rights reserved.
*
*/
#ifndef __OPENCHAMS_DESIGNERCSTROC_H__
#define __OPENCHAMS_DESIGNERCSTROC_H__
#include "vlsisapd/openChams/Equation.h"
namespace OpenChams {
class DesignerCstrOC : public Equation {
public:
DesignerCstrOC();
virtual void printEquations();
};
} // namespace
#endif

34
vlsisapd/src/openChams/src/vlsisapd/openChams/Equation.h Normal file
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@ -0,0 +1,34 @@
/*
* Equation.h
* openChams
*
* Created by Farakh JAVID on 25/10/2011.
* Copyright 2008-2010 UPMC / LIP6. All rights reserved.
*
*/
#ifndef __OPENCHAMS_EQUATION_H__
#define __OPENCHAMS_EQUATION_H__
#include <vector>
#include <map>
//using namespace std;
namespace OpenChams {
class Equation {
public:
Equation();
void addEquation(std::string eq);
inline std::map<int, std::string>& getEquationStr();
virtual void printEquations() = 0;
protected:
std::map<int, std::string> _equations; // this map contains the equation(s)
// std::vector<std::string> _paramsInEquation; //
};
inline std::map<int, std::string>& Equation::getEquationStr() {return _equations;}
} // namespace
#endif

24
vlsisapd/src/openChams/src/vlsisapd/openChams/HighLevelCstr.h Normal file
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@ -0,0 +1,24 @@
/*
* HighLevelCstr.h
* openChams
*
* Created by Farakh JAVID on 25/10/2011.
* Copyright 2008-2010 UPMC / LIP6. All rights reserved.
*
*/
#ifndef __OPENCHAMS_HIGHLEVELCSTR_H__
#define __OPENCHAMS_HIGHLEVELCSTR_H__
#include "vlsisapd/openChams/Equation.h"
namespace OpenChams {
class HighLevelCstr : public Equation {
public:
HighLevelCstr();
virtual void printEquations();
};
} // namespace
#endif

33
vlsisapd/src/openChams/src/vlsisapd/openChams/NRCCstr.h Normal file
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@ -0,0 +1,33 @@
/*
* NRCCstr.h
* openChams
*
* Created by Farakh JAVID on 25/10/2011.
* Copyright 2008-2010 UPMC / LIP6. All rights reserved.
*
*/
#ifndef __OPENCHAMS_NRCCSTR_H__
#define __OPENCHAMS_NRCCSTR_H__
#include "vlsisapd/openChams/Equation.h"
namespace OpenChams {
class NRCCstr : public Equation {
public:
NRCCstr(string controlVoltage);
inline void setVoltage(std::string s);
inline std::string getVoltage();
virtual void printEquations();
private:
std::string _controlVoltage;
};
inline void NRCCstr::setVoltage(std::string s) {_controlVoltage = s;}
inline std::string NRCCstr::getVoltage() {return _controlVoltage;}
} // namespace
#endif

24
vlsisapd/src/openChams/src/vlsisapd/openChams/Sizing.h
View File

@ -13,32 +13,40 @@
#include <map>
namespace OpenChams {
class Name;
class Circuit;
class Operator;
class Name;
class Circuit;
class Operator;
class Equation;
// class HighLevelCstr;
// class NRCCstr;
// class DDP;
class Sizing {
class Sizing {
public:
Sizing(Circuit*);
Operator* addOperator(Name instanceName, Name operatorName, Name simulModel);
void addEquation(Name equationName, std::string equation);
// void addEquation(Name equationName, HighLevelCstr*);
// void addEquation(Name equationName, NRCCstr*);
// void addEquation(Name equationName, DDP*);
void addEquation(Name equationName, Equation*);
inline bool hasNoOperators();
inline bool hasNoEquations();
inline const std::map<Name, Operator*>& getOperators();
inline const std::map<Name, std::string>& getEquations();
inline const std::map<Name, Equation*>& getEquations();
private:
Circuit* _circuit;
std::map<Name, Operator*> _operators; // instanceName <-> operator
std::map<Name, std::string> _equations; // equationName <-> equation (string)
std::map<Name, Equation*> _equations; // equationName <-> equation (string)
};
inline bool Sizing::hasNoOperators() { return (_operators.size() == 0) ? true : false; };
inline bool Sizing::hasNoEquations() { return (_equations.size() == 0) ? true : false; };
inline const std::map<Name, Operator*>& Sizing::getOperators() { return _operators; };
inline const std::map<Name, std::string>& Sizing::getEquations() { return _equations; };
inline const std::map<Name, Equation*>& Sizing::getEquations() { return _equations; };
} // namespace
#endif