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coriolis
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Perform only one connexion to the power supplies and the corona ring. 

* Bug: In cumulus/plugins.chip.pads, we were connecting the ground and
    power supplies to all the horizontal wires in the corona ring.
    But, when there are more than one and especially at the outer
    border of the pad, the vertical connecting wire will create
    various shorts over the pad.
      Now we connect only to the innermost horizontal wire only.
    Had to chech if the core side of the pad is north or south.
This commit is contained in:
Jean-Paul Chaput 2021-04-28 23:38:32 +02:00
parent e2d0188543
commit 44f716c4a2
2 changed files with 21 additions and 0 deletions
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5
cumulus/src/plugins/alpha/chip/configuration.py
View File

@ -94,6 +94,7 @@ class ChipConf ( BlockConf ):
# trace( 550, '\tONE LAMBDA = %s\n' % DbU.getValueString(DbU.fromLambda(1.0)) )
self.validated = True
# Block Corona parameters (triggers loading from disk).
self.cfg.chip.padCoreSide = None
self.cfg.chip.supplyRailWidth = None
self.cfg.chip.supplyRailPitch = None
self.cfg.chip.block.rails.count = None
@ -112,6 +113,10 @@ class ChipConf ( BlockConf ):
self.padsHavePosition = False
trace( 550, '-' )
@property
def padCoreSide ( self ):
return self.cfg.chip.padCoreSide
@property
def railsCount ( self ):
return self._railsCount

16
cumulus/src/plugins/alpha/chip/pads.py
View File

@ -16,6 +16,7 @@
from __future__ import print_function
import sys
import re
import copy
from operator import itemgetter
from Hurricane import DbU, Point, Transformation, Interval, Box, \
Path, Occurrence, UpdateSession, Layer, \
@ -952,6 +953,7 @@ class Corona ( object ):
, component.getLayer()
, axis
, width ) )
self.padRails.sort( key=itemgetter(2) )
def _createCoreWire ( self, chipIntNet, padNet, padInstance, count ):
trace( 550, ',+', '\tCorona._createCoreWire()\n' )
@ -1136,8 +1138,13 @@ class Corona ( object ):
chipLayer = self.conf.getRoutingLayer( self.conf.routingGauge.getPowerSupplyGauge().getDepth() - 1 )
coronaAb = self.conf.icorona.getAbutmentBox()
chipAxis = coronaAxis + self.conf.icorona.getTransformation().getTx()
rails = []
trace( 550, '\tchipLayer={}\n'.format(chipLayer) )
for rail in self.padRails:
rails.append( [ rail[0], rail[1], rail[2], rail[3] ] )
if self.conf.padCoreSide == 'North':
rails.reverse()
for rail in rails:
net = rail[0]
layer = rail[1]
railAxis = rail[2]
@ -1145,6 +1152,7 @@ class Corona ( object ):
if net != chipNet or chipLayer.getMask() != layer.getMask():
continue
if side == North:
trace( 550, '\tNorth side supply\n' )
trace( 550, '\tcoronaAb={}\n'.format(coronaAb) )
trace( 550, '\tcoronaAxis={}\n'.format(DbU.getValueString(coronaAxis)) )
trace( 550, '\tchipAxis={}\n'.format(DbU.getValueString(chipAxis)) )
@ -1180,7 +1188,14 @@ class Corona ( object ):
)
trace( 550, '\tpin={}\n'.format(pin) )
self.powerCount += 1
break
elif side == South:
trace( 550, '\tSouth side supply\n' )
trace( 550, '\tcoronaAb={}\n'.format(coronaAb) )
trace( 550, '\tcoronaAxis={}\n'.format(DbU.getValueString(coronaAxis)) )
trace( 550, '\tchipAxis={}\n'.format(DbU.getValueString(chipAxis)) )
trace( 550, '\trailNet={} <-> {}\n'.format(net,chipNet) )
trace( 550, '\trailAxis={}\n'.format(DbU.getValueString(railAxis)) )
Vertical.create( chipNet
, supplyLayer
, chipAxis
@ -1209,6 +1224,7 @@ class Corona ( object ):
, DbU.fromLambda( 1.0 )
)
self.powerCount += 1
break
trace( 550, '-' )
def doLayout ( self ):