Quick fix for Stratus1, missing cell mapping file.
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1da71ae740
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@ -7,7 +7,8 @@ import helpers
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parametersTable = \
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parametersTable = \
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( ("stratus1.format" , TypeString, "vst")
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( ("stratus1.format" , TypeString, "vst")
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, ("stratus1.simulator" , TypeString, "asimut")
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, ("stratus1.simulator" , TypeString, "asimut")
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,)
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, ("stratus1.mappingName", TypeString, os.path.join(helpers.sysConfDir,'symbolic/cmos/stratus2sxlib.xml') )
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)
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execfile( helpers.sysConfDir+'/common/stratus1.conf' )
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execfile( helpers.sysConfDir+'/common/stratus1.conf' )
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@ -0,0 +1,85 @@
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<?xml version="1.0" encoding='us-ascii'?>
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<technology name="sxlib">
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<model name="a2" realcell="a2_x2"
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time="434" area="1.7"
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i0="i0" i1="i1" q="q" vdd="vdd" vss="vss"></model>
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<model name="a3" realcell="a3_x2"
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time="521" area="2"
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i0="i0" i1="i1" i2="i2" q="q" vdd="vdd" vss="vss"></model>
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<model name="a4" realcell="a4_x2"
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time="578" area="2.3"
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i0="i0" i1="i1" i2="i2" i3="i3" q="q" vdd="vdd" vss="vss"></model>
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<model name="na2" realcell="na2_x1"
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time="288" area="1.3"
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i0="i0" i1="i1" nq="nq" vdd="vdd" vss="vss"></model>
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<model name="na3" realcell="na3_x1"
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time="363" area="1.7"
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i0="i0" i1="i1" i2="i2" nq="nq" vdd="vdd" vss="vss"></model>
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<model name="na4" realcell="na4_x1"
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time="438" area="2"
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i0="i0" i1="i1" i2="i2" i3="i3" nq="nq" vdd="vdd" vss="vss"></model>
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<model name="o2" realcell="o2_x2"
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time="406" area="1.7"
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i0="i0" i1="i1" q="q" vdd="vdd" vss="vss"></model>
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<model name="o3" realcell="o3_x2"
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time="506" area="2"
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i0="i0" i1="i1" i2="i2" q="q" vdd="vdd" vss="vss"></model>
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<model name="o4" realcell="o4_x2"
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time="631" area="2.3"
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i0="i0" i1="i1" i2="i2" i3="i3" q="q" vdd="vdd" vss="vss"></model>
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<model name="no2" realcell="no2_x1"
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time="298" area="1.3"
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i0="i0" i1="i1" nq="nq" vdd="vdd" vss="vss"></model>
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<model name="no3" realcell="no3_x1"
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time="407" area="1.7"
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i0="i0" i1="i1" i2="i2" nq="nq" vdd="vdd" vss="vss"></model>
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<model name="no4" realcell="no4_x1"
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time="499" area="2"
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i0="i0" i1="i1" i2="i2" i3="i3" nq="nq" vdd="vdd" vss="vss"></model>
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<model name="xr2" realcell="xr2_x1"
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time="405" area="3"
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i0="i0" i1="i1" q="q" vdd="vdd" vss="vss"></model>
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<model name="nxr2" realcell="nxr2_x1"
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time="503" area="3"
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i0="i0" i1="i1" nq="nq" vdd="vdd" vss="vss"></model>
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<model name="inv" realcell="inv_x1"
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time="139" area="1"
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i="i" nq="nq" vdd="vdd" vss="vss"></model>
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<model name="buf" realcell="buf_x2"
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time="409" area="1.3"
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i="i" q="q" vdd="vdd" vss="vss"></model>
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<model name="zero" realcell="zero_x0"
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time="0" area="1"
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nq="nq" vdd="vdd" vss="vss"></model>
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<model name="one" realcell="one_x0"
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time="0" area="1"
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q="q" vdd="vdd" vss="vss"></model>
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<model name="mx2" realcell="mx2_x2"
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time="534" area="3"
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i0="i0" i1="i1" cmd="cmd" q="q" vdd="vdd" vss="vss"></model>
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<model name="nmx2" realcell="nmx2_x1"
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time="410" area="2.3"
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i0="i0" i1="i1" cmd="cmd" nq="nq" vdd="vdd" vss="vss"></model>
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<model name="halfadder" realcell="halfadder_x2"
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time="607" area="5.3"
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a="a" b="b" sout="sout" cout="cout" vdd="vdd" vss="vss"></model>
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<model name="fulladder" realcell="fulladder_x2"
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time="1251" area="6.6"
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a="a1,a2,a3,a4" b="b1,b2,b3,b4" cin="cin1,cin2,cin3" sout="sout" cout="cout" vdd="vdd" vss="vss"></model>
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<model name="sff1" realcell="sff1_x4"
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time="476" area="6"
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i="i" ck="ck" q="q" vdd="vdd" vss="vss"></model>
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<model name="sff2" realcell="sff2_x4"
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time="666" area="8"
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i0="i0" i1="i1" ck="ck" cmd="cmd" q="q" vdd="vdd" vss="vss"></model>
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<model name="sff3" realcell="sff3_x4"
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time="950" area="0"
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i0="i0" i1="i1" i2="i2" ck="ck" cmd0="cmd0" cmd1="cmd1" q="q" vdd="vdd" vss="vss"></model><!-- pas dans le .lib -->
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<model name="ts" realcell="ts_x4"
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time="492" area="3.3"
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i="i" cmd="cmd" q="q" vdd="vdd" vss="vss"></model>
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<model name="nts" realcell="nts_x1"
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time="249" area="2"
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i="i" cmd="cmd" nq="nq" vdd="vdd" vss="vss"></model>
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</technology>
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@ -989,7 +989,8 @@ class Model() :
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raise Exception ( err )
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raise Exception ( err )
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##### Creation of the instance #####
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##### Creation of the instance #####
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# dict['flags'] = F_MSB_FIRST # When vst driver permits to do F_LSB_FIRST or F_LSB_FIRST TODO
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# dict['flags'] = F_MSB_FIRST # When vst driver permits to do F_LSB_FIRST or F_LSB_FIRST TODO
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# dict['flags'] = 0
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## Virtual library ##
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## Virtual library ##
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if modele in BVg :
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if modele in BVg :
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@ -62,7 +62,9 @@ def Place ( ins, sym, ref, plac = FIXED, cell = None ) :
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# Error if x and y found not permitted :
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# Error if x and y found not permitted :
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if ref._x % MYPITCH :
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if ref._x % MYPITCH :
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err = "\n[Stratus ERROR] Place : " + ins._name + " : coordinate x is not a mutiple of PITCH.\n"
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err = "\n[Stratus ERROR] Place : " + ins._name + " : coordinate x " \
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+ DbU.getValueString(ref._x) + " is not a mutiple of PITCH " \
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+ DbU.getValueString(MYPITCH) + ".\n"
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raise Exception ( err )
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raise Exception ( err )
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if ref._y % MYSLICE :
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if ref._y % MYSLICE :
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@ -59,8 +59,8 @@ import types
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###########
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###########
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class XY :
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class XY :
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def __init__ ( self, x, y ) :
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def __init__ ( self, x, y ) :
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self._x = x
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self._x = DbU.fromLambda(x)
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self._y = y
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self._y = DbU.fromLambda(y)
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##################################
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##################################
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def GetRefXY ( pathname, refname ) :
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def GetRefXY ( pathname, refname ) :
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