From 1557d613ae8192fd61648095a850fe532e278ce8 Mon Sep 17 00:00:00 2001 From: Jean-Paul Chaput Date: Mon, 27 Feb 2023 22:14:32 +0100 Subject: [PATCH] Comprehensive reorganisation of the Python part of Coriolis. * Move all Python stuff under a common Python namespace "coriolis". * Instead of having a series subtrees for each tool, integrate everything in one common tree. So now, all components can be located either with an absolute path from "coriolis" or, inside cross-reference themselves through relatives imports. * As a consequence, we only need to add ".../site-packages/coriolis/" to the PYTHONPATH, and not a whole bunch of subdirectories. And nothing, if installed in-system. * The tree of free technologies configuration files is also moved below "coriolis/technos" instead of "/etc". * Supressed "cumulus" level for the plugins. * All python modules are rewritten using relative imports except for the configuration files that uses absolute import as they can be cloned outside of the tree to serve as templates. * Change: In boostrap/FindPythonSitePackages, include "/coriolis" in Python_CORIOLISARCH and Python_CORIOLISLIB. Provide a Python_SITELIB *without* "/coriolis" appended. * Change: In cumulus/plugins/__init__.loadPlugins(), must prefix modules read in the plugins directory by "coriolis.plugins.". No longer need to add their path to sys.path. * Change: In crlcore/python/technos/nodeX/*/devices.py, the scripts of the layouts generators must be prefixed by "coriolis.oroshi.". * Change: In CRL::System CTOR, no longer add the pathes of the various plugins to sys.path. Only "site-packages/coriolis/". * New: In Utilities::Path::toPyModePath(), new method to convert a filesystem path into a python module path. Examples: "coriolis/plugins/block" --> "coriolis.plugins.block". "coriolis/plugins/rsave.py" --> "coriolis.plugins.rsave". * Change: In katanaEngine::_runKatanaEngine(), rename the hook script initHook.py. No longer need to modify sys.path. * Change: In BoraEngine::_runBoraEngine(), rename the hook script initHook.py. No longer need to modify sys.path. * Change: In UnicornGui::_runUnicornInit(), rename the hook script initHook.py. No longer need to modify sys.path. * Change: In cumulus.plugins.chip.constants, put the constants outside __init__.py to avoid a loop at initialization. --- .../FindPythonSitePackages.cmake | 15 +- bootstrap/coriolisEnv.py | 12 +- bora/python/CMakeLists.txt | 2 +- bora/python/{boraInit.py => initHook.py} | 2 +- bora/src/BoraEngine.cpp | 10 +- crlcore/CMakeLists.txt | 1 - crlcore/etc/CMakeLists.txt | 7 - crlcore/etc/node180/scn6m_deep_09/devices.py | 136 -- crlcore/python/CMakeLists.txt | 8 + crlcore/{etc/node180 => python}/__init__.py | 0 crlcore/python/helpers/__init__.py | 126 +- crlcore/python/helpers/analogtechno.py | 9 +- crlcore/python/helpers/io.py | 82 +- crlcore/python/helpers/overlay.py | 6 +- crlcore/python/helpers/technology.py | 2 +- .../technos}/45/freepdk_45/alliance.conf | 0 .../technos}/45/freepdk_45/analog.conf | 0 .../technos}/45/freepdk_45/display.conf | 0 .../technos}/45/freepdk_45/etesian.conf | 0 .../technos}/45/freepdk_45/hMetis.conf | 0 .../technos}/45/freepdk_45/kite.conf | 0 .../technos}/45/freepdk_45/mauka.conf | 0 .../technos}/45/freepdk_45/misc.conf | 0 .../technos}/45/freepdk_45/nimbus.conf | 0 .../technos}/45/freepdk_45/patterns.conf | 0 .../technos}/45/freepdk_45/plugins.conf | 0 .../technos}/45/freepdk_45/stratus1.conf | 0 .../technos}/45/freepdk_45/technology.conf | 0 .../technos}/45/ispd18/alliance.conf | 0 .../technos}/45/ispd18/analog.conf | 0 .../technos}/45/ispd18/display.conf | 0 .../technos}/45/ispd18/etesian.conf | 0 .../technos}/45/ispd18/hMetis.conf | 0 .../technos}/45/ispd18/kite.conf | 0 .../technos}/45/ispd18/mauka.conf | 0 .../technos}/45/ispd18/misc.conf | 0 .../technos}/45/ispd18/nimbus.conf | 0 .../technos}/45/ispd18/patterns.conf | 0 .../technos}/45/ispd18/plugins.conf | 0 .../technos}/45/ispd18/stratus1.conf | 0 .../technos}/45/ispd18/technology.conf | 0 crlcore/python/technos/CMakeLists.txt | 9 + .../node45 => python/technos}/__init__.py | 0 .../technos}/common/__init__.py | 14 +- .../technos}/common/analog.conf | 0 .../{etc => python/technos}/common/analog.py | 11 +- .../{etc => python/technos}/common/colors.py | 4 +- .../technos}/common/devices.conf | 0 .../{etc => python/technos}/common/devices.py | 10 +- .../technos}/common/display.conf | 0 .../{etc => python/technos}/common/display.py | 12 +- .../technos}/common/etesian.conf | 0 .../{etc => python/technos}/common/etesian.py | 6 +- .../technos}/common/hMetis.conf | 0 .../{etc => python/technos}/common/kite.conf | 0 .../{etc => python/technos}/common/kite.py | 4 +- .../{etc => python/technos}/common/mauka.conf | 0 .../{etc => python/technos}/common/misc.conf | 0 .../{etc => python/technos}/common/misc.py | 4 +- .../technos}/common/nimbus.conf | 0 .../technos}/common/patterns.conf | 0 .../technos}/common/patterns.py | 8 +- .../technos}/common/stratus1.conf | 0 .../technos}/common/stratus1.py | 6 +- .../technos}/common/technology.conf | 0 .../technos}/common/technology.py | 16 +- .../technos/node180}/__init__.py | 0 .../node180/scn6m_deep_09/__init__.py | 39 +- .../node180/scn6m_deep_09/alliance.py | 10 +- .../technos}/node180/scn6m_deep_09/analog.py | 9 +- .../technos/node180/scn6m_deep_09/devices.py | 137 ++ .../technos}/node180/scn6m_deep_09/display.py | 11 +- .../scn6m_deep_09/dtr_scn6m_deep_09.py | 12 +- .../technos}/node180/scn6m_deep_09/etesian.py | 9 +- .../technos}/node180/scn6m_deep_09/kite.py | 21 +- .../technos}/node180/scn6m_deep_09/misc.py | 9 +- .../node180/scn6m_deep_09/patterns.py | 9 +- .../technos}/node180/scn6m_deep_09/plugins.py | 11 +- .../node180/scn6m_deep_09/stratus1.py | 11 +- .../node180/scn6m_deep_09/technology.py | 17 +- .../technos/node45}/__init__.py | 0 .../technos}/node45/freepdk45/__init__.py | 37 +- .../technos}/node45/freepdk45/alliance.py | 10 +- .../technos}/node45/freepdk45/analog.py | 9 +- .../technos}/node45/freepdk45/devices.py | 13 +- .../technos}/node45/freepdk45/display.py | 12 +- .../technos}/node45/freepdk45/etesian.py | 9 +- .../technos}/node45/freepdk45/kite.py | 20 +- .../technos}/node45/freepdk45/misc.py | 9 +- .../technos}/node45/freepdk45/patterns.py | 9 +- .../technos}/node45/freepdk45/plugins.py | 11 +- .../technos}/node45/freepdk45/stratus1.py | 11 +- .../technos}/node45/freepdk45/technology.py | 16 +- .../python/technos/node600}/__init__.py | 0 .../technos}/node600/phenitec/__init__.py | 37 +- .../technos}/node600/phenitec/alliance.py | 10 +- .../technos}/node600/phenitec/analog.py | 9 +- .../technos}/node600/phenitec/devices.py | 13 +- .../technos}/node600/phenitec/display.py | 12 +- .../technos}/node600/phenitec/etesian.py | 9 +- .../technos}/node600/phenitec/kite.py | 20 +- .../technos}/node600/phenitec/misc.py | 9 +- .../technos}/node600/phenitec/patterns.py | 9 +- .../technos}/node600/phenitec/plugins.py | 11 +- .../technos}/node600/phenitec/stratus1.py | 11 +- .../technos}/node600/phenitec/technology.py | 17 +- .../python/technos/symbolic}/__init__.py | 0 .../technos}/symbolic/cmos/__init__.py | 36 +- .../technos}/symbolic/cmos/alliance.py | 10 +- .../technos}/symbolic/cmos/analog.py | 9 +- .../technos}/symbolic/cmos/display.py | 12 +- .../technos}/symbolic/cmos/etesian.py | 9 +- .../technos}/symbolic/cmos/kite.py | 21 +- .../technos}/symbolic/cmos/misc.py | 9 +- .../technos}/symbolic/cmos/patterns.py | 9 +- .../technos}/symbolic/cmos/plugins.py | 12 +- .../technos}/symbolic/cmos/stratus1.py | 15 +- .../technos}/symbolic/cmos/stratus2sxlib.xml | 0 .../technos}/symbolic/cmos/technology.py | 17 +- .../technos}/symbolic/cmos45/__init__.py | 35 +- .../technos}/symbolic/cmos45/alliance.py | 10 +- .../technos}/symbolic/cmos45/analog.py | 9 +- .../technos}/symbolic/cmos45/display.py | 12 +- .../technos}/symbolic/cmos45/etesian.py | 9 +- .../technos}/symbolic/cmos45/kite.py | 20 +- .../technos}/symbolic/cmos45/misc.py | 9 +- .../technos}/symbolic/cmos45/patterns.py | 9 +- .../technos}/symbolic/cmos45/plugins.py | 11 +- .../technos}/symbolic/cmos45/stratus1.py | 12 +- .../technos}/symbolic/cmos45/technology.py | 18 +- .../technos}/symbolic/ispd05/alliance.conf | 0 .../technos}/symbolic/ispd05/analog.conf | 0 .../technos}/symbolic/ispd05/display.conf | 0 .../technos}/symbolic/ispd05/etesian.conf | 0 .../technos}/symbolic/ispd05/hMetis.conf | 0 .../technos}/symbolic/ispd05/kite.conf | 0 .../technos}/symbolic/ispd05/mauka.conf | 0 .../technos}/symbolic/ispd05/misc.conf | 0 .../technos}/symbolic/ispd05/nimbus.conf | 0 .../technos}/symbolic/ispd05/patterns.conf | 0 .../technos}/symbolic/ispd05/plugins.conf | 0 .../technos}/symbolic/ispd05/stratus1.conf | 0 .../technos}/symbolic/ispd05/technology.conf | 0 .../technos}/symbolic/vsc200/alliance.conf | 0 .../technos}/symbolic/vsc200/display.conf | 0 .../technos}/symbolic/vsc200/etesian.conf | 0 .../technos}/symbolic/vsc200/hMetis.conf | 0 .../technos}/symbolic/vsc200/kite.conf | 0 .../technos}/symbolic/vsc200/mauka.conf | 0 .../technos}/symbolic/vsc200/misc.conf | 0 .../technos}/symbolic/vsc200/nimbus.conf | 0 .../technos}/symbolic/vsc200/patterns.conf | 0 .../technos}/symbolic/vsc200/plugins.conf | 0 .../technos}/symbolic/vsc200/stratus1.conf | 0 .../technos}/symbolic/vsc200/technology.conf | 0 crlcore/src/ccore/CMakeLists.txt | 2 +- crlcore/src/ccore/Utilities.cpp | 20 +- cumulus/src/CMakeLists.txt | 134 +- .../{plugins/alpha/core2chip => }/__init__.py | 0 cumulus/src/designflow/asimut.py | 4 +- cumulus/src/designflow/blif2vst.py | 12 +- cumulus/src/designflow/boog.py | 4 +- cumulus/src/designflow/boom.py | 4 +- cumulus/src/designflow/copy.py | 2 +- cumulus/src/designflow/cougar.py | 4 +- cumulus/src/designflow/druc.py | 4 +- cumulus/src/designflow/genpat.py | 4 +- cumulus/src/designflow/loon.py | 4 +- cumulus/src/designflow/lvx.py | 6 +- cumulus/src/designflow/pnr.py | 10 +- cumulus/src/designflow/s2r.py | 4 +- cumulus/src/designflow/task.py | 4 +- cumulus/src/designflow/technos.py | 61 +- cumulus/src/designflow/vasy.py | 4 +- cumulus/src/designflow/yosys.py | 4 +- cumulus/src/plugins/__init__.py | 50 +- cumulus/src/plugins/aboutwindow.py | 10 +- cumulus/src/plugins/alpha/chip/__init__.py | 480 ----- cumulus/src/plugins/alpha/chip/chip.py | 159 -- .../src/plugins/alpha/chip/configuration.py | 715 ------- cumulus/src/plugins/alpha/core2chip/cmos.py | 184 -- .../src/plugins/alpha/core2chip/core2chip.py | 786 ------- .../src/plugins/{alpha => }/block/bigvia.py | 27 +- .../src/plugins/{alpha => }/block/block.py | 54 +- .../{alpha => }/block/configuration.py | 56 +- .../src/plugins/{alpha => }/block/hfns1.py | 48 +- .../src/plugins/{alpha => }/block/hfns2.py | 47 +- .../src/plugins/{alpha => }/block/hfns3.py | 50 +- .../src/plugins/{alpha => }/block/hfns4.py | 33 +- .../src/plugins/{alpha => }/block/htree.py | 28 +- .../src/plugins/{alpha => }/block/iospecs.py | 20 +- .../src/plugins/{alpha => }/block/matrix.py | 32 +- cumulus/src/plugins/{alpha => }/block/rsmt.py | 35 +- .../src/plugins/{alpha => }/block/spares.py | 29 +- .../src/plugins/{alpha => }/block/timing.py | 44 +- cumulus/src/plugins/checks.py | 20 +- cumulus/src/plugins/chip/__init__.py | 463 +++- cumulus/src/plugins/chip/chip.py | 336 ++- cumulus/src/plugins/chip/configuration.py | 1861 ++++++----------- cumulus/src/plugins/chip/constants.py | 45 + .../src/plugins/{alpha => }/chip/corona.py | 28 +- cumulus/src/plugins/{alpha => }/chip/pads.py | 41 +- cumulus/src/plugins/{alpha => }/chip/power.py | 23 +- .../plugins/{alpha => }/chip/powerplane.py | 29 +- cumulus/src/plugins/conductor.py | 28 +- cumulus/src/plugins/core2chip/cmos.py | 225 +- cumulus/src/plugins/core2chip/core2chip.py | 1062 ++++++---- .../{alpha => }/core2chip/libresocio.py | 17 +- .../plugins/{alpha => }/core2chip/niolib.py | 13 +- cumulus/src/plugins/core2chip/phlib.py | 21 +- cumulus/src/plugins/core2chip/phlib80.py | 20 +- .../plugins/{alpha => }/core2chip/sky130.py | 22 +- .../plugins/{alpha => }/harness/__init__.py | 0 .../src/plugins/{alpha => }/harness/pads.py | 31 +- .../src/plugins/{alpha => }/macro/__init__.py | 0 .../src/plugins/{alpha => }/macro/macro.py | 27 +- cumulus/src/plugins/matrixplacer.py | 27 +- cumulus/src/plugins/rsave.py | 19 +- cumulus/src/plugins/rsaveall.py | 18 +- cumulus/src/plugins/s2r.py | 22 +- cumulus/src/plugins/sram/sram.py | 18 +- cumulus/src/plugins/sram/sram_256x32.py | 22 +- cumulus/src/plugins/sram/sramplacer1.py | 25 +- cumulus/src/plugins/sram/sramplacer2.py | 25 +- cumulus/src/plugins/stats.py | 25 +- cumulus/src/plugins/{alpha => }/utils.py | 9 +- .../cumulus}/src/Alliance.py | 0 .../cumulus}/src/placeandroute.py | 0 .../cumulus}/src/plugins/block.py | 0 .../cumulus/src/plugins/block}/__init__.py | 0 .../cumulus}/src/plugins/block/vchannels.py | 0 .../cumulus/src/plugins/chip/__init__.py | 51 + .../cumulus}/src/plugins/chip/blockcorona.py | 0 .../cumulus}/src/plugins/chip/blockpower.py | 0 deprecated/cumulus/src/plugins/chip/chip.py | 240 +++ .../cumulus/src/plugins/chip/configuration.py | 1303 ++++++++++++ .../cumulus}/src/plugins/chip/padscorona.py | 0 .../cumulus}/src/plugins/chipplace.py | 0 .../cumulus}/src/plugins/chiproute.py | 0 .../cumulus}/src/plugins/clocktree.py | 0 .../cumulus/src/plugins/core2chip/__init__.py | 0 .../cumulus/src/plugins/core2chip/cmos.py | 155 ++ .../src/plugins/core2chip/core2chip.py | 451 ++++ .../cumulus/src/plugins}/core2chip/phlib.py | 2 +- .../cumulus/src/plugins}/core2chip/phlib80.py | 2 +- .../cumulus}/src/plugins/core2chip_cmos.py | 0 .../cumulus}/src/plugins/core2chip_phlib80.py | 0 .../cumulus/src/plugins/cts/__init__.py | 0 .../cumulus}/src/plugins/cts/clocktree.py | 0 .../cumulus}/src/plugins/cts/rsmt.py | 0 .../cumulus}/src/plugins/vchannels.py | 25 +- {cumulus => deprecated/cumulus}/src/ref.py | 0 deprecated/kite/python/CMakeLists.txt | 2 +- hurricane/src/analog/Device.cpp | 3 +- hurricane/src/utilities/Path.cpp | 15 + .../src/utilities/hurricane/utilities/Path.h | 77 +- .../src/viewer/hurricane/viewer/Script.h | 2 +- karakaze/python/analogdesign.py | 45 +- katana/python/CMakeLists.txt | 2 +- katana/python/{katanaInit.py => initHook.py} | 13 +- katana/src/KatanaEngine.cpp | 12 +- oroshi/python/__init__.py | 17 +- oroshi/python/capacitormatrix.py | 17 +- oroshi/python/capacitorrouted.py | 23 +- oroshi/python/capacitorroutedsingle.py | 19 +- oroshi/python/capacitorunit.py | 15 +- oroshi/python/capacitorvrtracks.py | 19 +- oroshi/python/dtr.py | 30 +- oroshi/python/multicapacitor.py | 35 +- oroshi/python/nonunitcapacitor.py | 20 +- oroshi/python/paramsmatrix.py | 9 +- oroshi/python/resistor.py | 26 +- oroshi/python/resistorsnake.py | 17 +- oroshi/python/stack.py | 111 +- oroshi/python/wip_csp.py | 29 +- oroshi/python/wip_dp.py | 30 +- oroshi/python/wip_transistor.py | 34 +- tutorial/python/runDemo.py | 21 +- tutorial/src/tutorial.py | 14 +- unicorn/python/CMakeLists.txt | 2 +- .../python/{unicornInit.py => initHook.py} | 26 +- unicorn/src/UnicornGui.cpp | 10 +- unicorn/src/cgt.py | 43 +- unicorn/src/coriolis.py | 2 +- 284 files changed, 5917 insertions(+), 6225 deletions(-) rename bora/python/{boraInit.py => initHook.py} (87%) delete mode 100644 crlcore/etc/CMakeLists.txt delete mode 100644 crlcore/etc/node180/scn6m_deep_09/devices.py rename crlcore/{etc/node180 => python}/__init__.py (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/alliance.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/analog.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/display.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/etesian.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/hMetis.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/kite.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/mauka.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/misc.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/nimbus.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/patterns.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/plugins.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/stratus1.conf (100%) rename crlcore/{etc => python/technos}/45/freepdk_45/technology.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/alliance.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/analog.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/display.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/etesian.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/hMetis.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/kite.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/mauka.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/misc.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/nimbus.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/patterns.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/plugins.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/stratus1.conf (100%) rename crlcore/{etc => python/technos}/45/ispd18/technology.conf (100%) create mode 100644 crlcore/python/technos/CMakeLists.txt rename crlcore/{etc/node45 => python/technos}/__init__.py (100%) rename crlcore/{etc => python/technos}/common/__init__.py (87%) rename crlcore/{etc => python/technos}/common/analog.conf (100%) rename crlcore/{etc => python/technos}/common/analog.py (73%) rename crlcore/{etc => python/technos}/common/colors.py (96%) rename crlcore/{etc => python/technos}/common/devices.conf (100%) rename crlcore/{etc => python/technos}/common/devices.py (87%) rename crlcore/{etc => python/technos}/common/display.conf (100%) rename crlcore/{etc => python/technos}/common/display.py (99%) rename crlcore/{etc => python/technos}/common/etesian.conf (100%) rename crlcore/{etc => python/technos}/common/etesian.py (93%) rename crlcore/{etc => python/technos}/common/hMetis.conf (100%) rename crlcore/{etc => python/technos}/common/kite.conf (100%) rename crlcore/{etc => python/technos}/common/kite.py (96%) rename crlcore/{etc => python/technos}/common/mauka.conf (100%) rename crlcore/{etc => python/technos}/common/misc.conf (100%) rename crlcore/{etc => python/technos}/common/misc.py (97%) rename crlcore/{etc => python/technos}/common/nimbus.conf (100%) rename crlcore/{etc => python/technos}/common/patterns.conf (100%) rename crlcore/{etc => python/technos}/common/patterns.py (99%) rename crlcore/{etc => python/technos}/common/stratus1.conf (100%) rename crlcore/{etc => python/technos}/common/stratus1.py (87%) rename crlcore/{etc => python/technos}/common/technology.conf (100%) rename crlcore/{etc => python/technos}/common/technology.py (98%) rename crlcore/{etc/node600 => python/technos/node180}/__init__.py (100%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/__init__.py (53%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/alliance.py (85%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/analog.py (74%) create mode 100644 crlcore/python/technos/node180/scn6m_deep_09/devices.py rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/display.py (71%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/dtr_scn6m_deep_09.py (97%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/etesian.py (74%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/kite.py (97%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/misc.py (74%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/patterns.py (74%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/plugins.py (85%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/stratus1.py (75%) rename crlcore/{etc => python/technos}/node180/scn6m_deep_09/technology.py (96%) rename crlcore/{etc/symbolic => python/technos/node45}/__init__.py (100%) rename crlcore/{etc => python/technos}/node45/freepdk45/__init__.py (54%) rename crlcore/{etc => python/technos}/node45/freepdk45/alliance.py (85%) rename crlcore/{etc => python/technos}/node45/freepdk45/analog.py (74%) rename crlcore/{etc => python/technos}/node45/freepdk45/devices.py (95%) rename crlcore/{etc => python/technos}/node45/freepdk45/display.py (71%) rename crlcore/{etc => python/technos}/node45/freepdk45/etesian.py (74%) rename crlcore/{etc => python/technos}/node45/freepdk45/kite.py (97%) rename crlcore/{etc => python/technos}/node45/freepdk45/misc.py (74%) rename crlcore/{etc => python/technos}/node45/freepdk45/patterns.py (74%) rename crlcore/{etc => python/technos}/node45/freepdk45/plugins.py (85%) rename crlcore/{etc => python/technos}/node45/freepdk45/stratus1.py (75%) rename crlcore/{etc => python/technos}/node45/freepdk45/technology.py (97%) rename {cumulus/src/plugins/alpha => crlcore/python/technos/node600}/__init__.py (100%) rename crlcore/{etc => python/technos}/node600/phenitec/__init__.py (55%) rename crlcore/{etc => python/technos}/node600/phenitec/alliance.py (87%) rename crlcore/{etc => python/technos}/node600/phenitec/analog.py (74%) rename crlcore/{etc => python/technos}/node600/phenitec/devices.py (95%) rename crlcore/{etc => python/technos}/node600/phenitec/display.py (71%) rename crlcore/{etc => python/technos}/node600/phenitec/etesian.py (74%) rename crlcore/{etc => python/technos}/node600/phenitec/kite.py (97%) rename crlcore/{etc => python/technos}/node600/phenitec/misc.py (74%) rename crlcore/{etc => python/technos}/node600/phenitec/patterns.py (74%) rename crlcore/{etc => python/technos}/node600/phenitec/plugins.py (85%) rename crlcore/{etc => python/technos}/node600/phenitec/stratus1.py (75%) rename crlcore/{etc => python/technos}/node600/phenitec/technology.py (95%) rename {cumulus/src/plugins/alpha/block => crlcore/python/technos/symbolic}/__init__.py (100%) rename crlcore/{etc => python/technos}/symbolic/cmos/__init__.py (59%) rename crlcore/{etc => python/technos}/symbolic/cmos/alliance.py (88%) rename crlcore/{etc => python/technos}/symbolic/cmos/analog.py (74%) rename crlcore/{etc => python/technos}/symbolic/cmos/display.py (72%) rename crlcore/{etc => python/technos}/symbolic/cmos/etesian.py (74%) rename crlcore/{etc => python/technos}/symbolic/cmos/kite.py (96%) rename crlcore/{etc => python/technos}/symbolic/cmos/misc.py (75%) rename crlcore/{etc => python/technos}/symbolic/cmos/patterns.py (74%) rename crlcore/{etc => python/technos}/symbolic/cmos/plugins.py (86%) rename crlcore/{etc => python/technos}/symbolic/cmos/stratus1.py (73%) rename crlcore/{etc => python/technos}/symbolic/cmos/stratus2sxlib.xml (100%) rename crlcore/{etc => python/technos}/symbolic/cmos/technology.py (82%) rename crlcore/{etc => python/technos}/symbolic/cmos45/__init__.py (58%) rename crlcore/{etc => python/technos}/symbolic/cmos45/alliance.py (85%) rename crlcore/{etc => python/technos}/symbolic/cmos45/analog.py (74%) rename crlcore/{etc => python/technos}/symbolic/cmos45/display.py (72%) rename crlcore/{etc => python/technos}/symbolic/cmos45/etesian.py (74%) rename crlcore/{etc => python/technos}/symbolic/cmos45/kite.py (98%) rename crlcore/{etc => python/technos}/symbolic/cmos45/misc.py (75%) rename crlcore/{etc => python/technos}/symbolic/cmos45/patterns.py (74%) rename crlcore/{etc => python/technos}/symbolic/cmos45/plugins.py (85%) rename crlcore/{etc => python/technos}/symbolic/cmos45/stratus1.py (75%) rename crlcore/{etc => python/technos}/symbolic/cmos45/technology.py (95%) rename crlcore/{etc => python/technos}/symbolic/ispd05/alliance.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/analog.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/display.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/etesian.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/hMetis.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/kite.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/mauka.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/misc.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/nimbus.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/patterns.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/plugins.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/stratus1.conf (100%) rename crlcore/{etc => python/technos}/symbolic/ispd05/technology.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/alliance.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/display.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/etesian.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/hMetis.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/kite.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/mauka.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/misc.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/nimbus.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/patterns.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/plugins.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/stratus1.conf (100%) rename crlcore/{etc => python/technos}/symbolic/vsc200/technology.conf (100%) rename cumulus/src/{plugins/alpha/core2chip => }/__init__.py (100%) delete mode 100644 cumulus/src/plugins/alpha/chip/__init__.py delete mode 100644 cumulus/src/plugins/alpha/chip/chip.py delete mode 100644 cumulus/src/plugins/alpha/chip/configuration.py delete mode 100644 cumulus/src/plugins/alpha/core2chip/cmos.py delete mode 100644 cumulus/src/plugins/alpha/core2chip/core2chip.py rename cumulus/src/plugins/{alpha => }/block/bigvia.py (93%) rename cumulus/src/plugins/{alpha => }/block/block.py (96%) rename cumulus/src/plugins/{alpha => }/block/configuration.py (97%) rename cumulus/src/plugins/{alpha => }/block/hfns1.py (96%) rename cumulus/src/plugins/{alpha => }/block/hfns2.py (89%) rename cumulus/src/plugins/{alpha => }/block/hfns3.py (94%) rename cumulus/src/plugins/{alpha => }/block/hfns4.py (92%) rename cumulus/src/plugins/{alpha => }/block/htree.py (95%) rename cumulus/src/plugins/{alpha => }/block/iospecs.py (92%) rename cumulus/src/plugins/{alpha => }/block/matrix.py (88%) rename cumulus/src/plugins/{alpha => }/block/rsmt.py (95%) rename cumulus/src/plugins/{alpha => }/block/spares.py (98%) rename cumulus/src/plugins/{alpha => }/block/timing.py (79%) create mode 100644 cumulus/src/plugins/chip/constants.py rename cumulus/src/plugins/{alpha => }/chip/corona.py (97%) rename cumulus/src/plugins/{alpha => }/chip/pads.py (97%) rename cumulus/src/plugins/{alpha => }/chip/power.py (94%) rename cumulus/src/plugins/{alpha => }/chip/powerplane.py (96%) rename cumulus/src/plugins/{alpha => }/core2chip/libresocio.py (94%) rename cumulus/src/plugins/{alpha => }/core2chip/niolib.py (94%) rename cumulus/src/plugins/{alpha => }/core2chip/sky130.py (95%) rename cumulus/src/plugins/{alpha => }/harness/__init__.py (100%) rename cumulus/src/plugins/{alpha => }/harness/pads.py (96%) rename cumulus/src/plugins/{alpha => }/macro/__init__.py (100%) rename cumulus/src/plugins/{alpha => }/macro/macro.py (96%) rename cumulus/src/plugins/{alpha => }/utils.py (95%) rename {cumulus => deprecated/cumulus}/src/Alliance.py (100%) rename {cumulus => deprecated/cumulus}/src/placeandroute.py (100%) rename {cumulus => deprecated/cumulus}/src/plugins/block.py (100%) rename {cumulus/src/plugins/cts => deprecated/cumulus/src/plugins/block}/__init__.py (100%) rename {cumulus => deprecated/cumulus}/src/plugins/block/vchannels.py (100%) create mode 100644 deprecated/cumulus/src/plugins/chip/__init__.py rename {cumulus => deprecated/cumulus}/src/plugins/chip/blockcorona.py (100%) rename {cumulus => deprecated/cumulus}/src/plugins/chip/blockpower.py (100%) create mode 100644 deprecated/cumulus/src/plugins/chip/chip.py create mode 100644 deprecated/cumulus/src/plugins/chip/configuration.py rename {cumulus => deprecated/cumulus}/src/plugins/chip/padscorona.py (100%) rename {cumulus => deprecated/cumulus}/src/plugins/chipplace.py (100%) rename {cumulus => deprecated/cumulus}/src/plugins/chiproute.py (100%) rename {cumulus => deprecated/cumulus}/src/plugins/clocktree.py (100%) create mode 100644 deprecated/cumulus/src/plugins/core2chip/__init__.py create mode 100644 deprecated/cumulus/src/plugins/core2chip/cmos.py create mode 100644 deprecated/cumulus/src/plugins/core2chip/core2chip.py rename {cumulus/src/plugins/alpha => deprecated/cumulus/src/plugins}/core2chip/phlib.py (98%) rename {cumulus/src/plugins/alpha => deprecated/cumulus/src/plugins}/core2chip/phlib80.py (98%) rename {cumulus => deprecated/cumulus}/src/plugins/core2chip_cmos.py (100%) rename {cumulus => deprecated/cumulus}/src/plugins/core2chip_phlib80.py (100%) create mode 100644 deprecated/cumulus/src/plugins/cts/__init__.py rename {cumulus => deprecated/cumulus}/src/plugins/cts/clocktree.py (100%) rename {cumulus => deprecated/cumulus}/src/plugins/cts/rsmt.py (100%) rename {cumulus => deprecated/cumulus}/src/plugins/vchannels.py (81%) rename {cumulus => deprecated/cumulus}/src/ref.py (100%) rename katana/python/{katanaInit.py => initHook.py} (60%) rename unicorn/python/{unicornInit.py => initHook.py} (81%) diff --git a/bootstrap/cmake_modules/FindPythonSitePackages.cmake b/bootstrap/cmake_modules/FindPythonSitePackages.cmake index 42c492c4..a7e6dcf7 100644 --- a/bootstrap/cmake_modules/FindPythonSitePackages.cmake +++ b/bootstrap/cmake_modules/FindPythonSitePackages.cmake @@ -9,7 +9,7 @@ if(UNIX AND NOT POETRY) execute_process(COMMAND "${Python_EXECUTABLE}" "-c" "${SCRIPT}" RESULT_VARIABLE RETURN_CODE - OUTPUT_VARIABLE Python_CORIOLISARCH + OUTPUT_VARIABLE Python_SITEARCH OUTPUT_STRIP_TRAILING_WHITESPACE ) @@ -19,7 +19,7 @@ if(UNIX AND NOT POETRY) execute_process(COMMAND "${Python_EXECUTABLE}" "-c" "${SCRIPT}" RESULT_VARIABLE RETURN_CODE - OUTPUT_VARIABLE Python_CORIOLISLIB + OUTPUT_VARIABLE Python_SITELIB OUTPUT_STRIP_TRAILING_WHITESPACE ) @@ -29,12 +29,15 @@ if(UNIX AND NOT POETRY) set(FindPythonSitePackages_FOUND FALSE) endif(RETURN_CODE EQUAL 0) - set(Python_CORIOLISARCH "lib${LIB_SUFFIX}/${Python_CORIOLISARCH}" - CACHE STRING "Python platform dependent install directory." FORCE) - set(Python_CORIOLISLIB "lib${LIB_SUFFIX}/${Python_CORIOLISLIB}" - CACHE STRING "Python platform independent install directory." FORCE) + set(Python_CORIOLISARCH "lib${LIB_SUFFIX}/${Python_SITEARCH}/coriolis" + CACHE STRING "Python platform dependent install directory (Coriolis modules)." FORCE) + set(Python_SITELIB "lib${LIB_SUFFIX}/${Python_SITELIB}" + CACHE STRING "Python platform independent install directory." FORCE) + set(Python_CORIOLISLIB "${Python_SITELIB}/coriolis" + CACHE STRING "Python platform independent install directory (Coriolis modules)." FORCE) mark_as_advanced(Python_CORIOLISARCH) mark_as_advanced(Python_CORIOLISLIB) + mark_as_advanced(Python_SITELIB) if(FindPythonSitePackages_FOUND) if(NOT FindPythonSitePackages_FIND_QUIETLY) diff --git a/bootstrap/coriolisEnv.py b/bootstrap/coriolisEnv.py index 42cf735c..f23ec757 100755 --- a/bootstrap/coriolisEnv.py +++ b/bootstrap/coriolisEnv.py @@ -288,12 +288,12 @@ if __name__ == "__main__": if os.path.isdir(pyPackageDir): sitePackagesDir = pyPackageDir break - strippedPythonPath = "%s:" % (sitePackagesDir) + strippedPythonPath - strippedPythonPath = "%s/crlcore:" % (sitePackagesDir) + strippedPythonPath - strippedPythonPath = "%s/cumulus:" % (sitePackagesDir) + strippedPythonPath - strippedPythonPath = "%s/cumulus/plugins:" % (sitePackagesDir) + strippedPythonPath - strippedPythonPath = "%s/stratus:" % (sitePackagesDir) + strippedPythonPath - strippedPythonPath = "%s:" % (sysconfDir) + strippedPythonPath + strippedPythonPath = "%s" % (sitePackagesDir) + strippedPythonPath + #strippedPythonPath = "%s/crlcore:" % (sitePackagesDir) + strippedPythonPath + #strippedPythonPath = "%s/cumulus:" % (sitePackagesDir) + strippedPythonPath + #strippedPythonPath = "%s/cumulus/plugins:" % (sitePackagesDir) + strippedPythonPath + #strippedPythonPath = "%s/stratus:" % (sitePackagesDir) + strippedPythonPath + #strippedPythonPath = "%s:" % (sysconfDir) + strippedPythonPath shellScriptSh += 'PYTHONPATH="%(PYTHONPATH)s";' \ 'export PYTHONPATH;' shellScriptCsh += 'setenv PYTHONPATH "%(PYTHONPATH)s";' diff --git a/bora/python/CMakeLists.txt b/bora/python/CMakeLists.txt index a2f0ef8f..f08f08b3 100644 --- a/bora/python/CMakeLists.txt +++ b/bora/python/CMakeLists.txt @@ -1,2 +1,2 @@ - install ( FILES boraInit.py DESTINATION ${Python_CORIOLISLIB}/bora ) + install ( FILES initHook.py DESTINATION ${Python_CORIOLISLIB}/bora ) diff --git a/bora/python/boraInit.py b/bora/python/initHook.py similarity index 87% rename from bora/python/boraInit.py rename to bora/python/initHook.py index ecbb70ed..fc6b646b 100644 --- a/bora/python/boraInit.py +++ b/bora/python/initHook.py @@ -16,7 +16,7 @@ def boraHook ( **kw ): if 'bora' in kw: bora = kw['bora'] else: - print( ErrorMessage( 3, 'boraHook(): Must be run from a BoraEngine.' )) + print( ErrorMessage( 3, 'bora.initHook(): Must be run from a BoraEngine.' )) return try: userInit = os.path.join( os.getcwd(), 'coriolis2/bora.py' ) diff --git a/bora/src/BoraEngine.cpp b/bora/src/BoraEngine.cpp index d6225872..51a8cd75 100644 --- a/bora/src/BoraEngine.cpp +++ b/bora/src/BoraEngine.cpp @@ -111,17 +111,17 @@ namespace Bora { void BoraEngine::_runBoraInit () { Utilities::Path pythonSitePackages = System::getPath("pythonSitePackages"); - Utilities::Path systemConfDir = pythonSitePackages / "bora"; - Utilities::Path systemConfFile = systemConfDir / "boraInit.py"; + Utilities::Path confFile = "coriolis/bora/initHook.py"; + Utilities::Path systemConfFile = pythonSitePackages / confFile; if (systemConfFile.exists()) { - Isobar::Script::addPath( systemConfDir.toString() ); + //Isobar::Script::addPath( systemConfDir.toString() ); - dbo_ptr script = Isobar::Script::create( systemConfFile.stem().toString() ); + dbo_ptr script = Isobar::Script::create( confFile.toPyModPath() ); script->addKwArgument( "bora" , (PyObject*)PyBoraEngine_Link(this) ); script->runFunction ( "boraHook", getCell() ); - Isobar::Script::removePath( systemConfDir.toString() ); + //Isobar::Script::removePath( systemConfDir.toString() ); } else { cerr << Warning( "Bora system configuration file:\n <%s> not found." , systemConfFile.toString().c_str() ) << endl; diff --git a/crlcore/CMakeLists.txt b/crlcore/CMakeLists.txt index e3a5a7aa..aea87892 100644 --- a/crlcore/CMakeLists.txt +++ b/crlcore/CMakeLists.txt @@ -41,6 +41,5 @@ add_subdirectory(src) add_subdirectory(python) - add_subdirectory(etc) add_subdirectory(cmake_modules) add_subdirectory(doc) diff --git a/crlcore/etc/CMakeLists.txt b/crlcore/etc/CMakeLists.txt deleted file mode 100644 index 3fc94878..00000000 --- a/crlcore/etc/CMakeLists.txt +++ /dev/null @@ -1,7 +0,0 @@ - - install( DIRECTORY common DESTINATION ${SYS_CONF_DIR}/coriolis2 ) - install( DIRECTORY symbolic DESTINATION ${SYS_CONF_DIR}/coriolis2 ) - install( DIRECTORY node45 DESTINATION ${SYS_CONF_DIR}/coriolis2 ) - install( DIRECTORY node180 DESTINATION ${SYS_CONF_DIR}/coriolis2 ) - install( DIRECTORY node600 DESTINATION ${SYS_CONF_DIR}/coriolis2 ) - diff --git a/crlcore/etc/node180/scn6m_deep_09/devices.py b/crlcore/etc/node180/scn6m_deep_09/devices.py deleted file mode 100644 index 3bd4e28d..00000000 --- a/crlcore/etc/node180/scn6m_deep_09/devices.py +++ /dev/null @@ -1,136 +0,0 @@ - -# This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved -# -# +-----------------------------------------------------------------+ -# | C O R I O L I S | -# | Alliance / Hurricane Interface | -# | | -# | Author : Jean-Paul CHAPUT | -# | E-mail : Jean-Paul.Chaput@lip6.fr | -# | =============================================================== | -# | Python : "./node180/scn6m_deep_09/devices.py" | -# +-----------------------------------------------------------------+ - - -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) - -import common.devices -from common.devices import addDevice - -chamsDir = helpers.sysConfDir + '/share/coriolis2/' -spiceDir = chamsDir + 'spice/' - -addDevice( name = 'DifferentialPairBulkConnected' - , spice = spiceDir+'DiffPairBulkConnected.spi' - , connectors = ( 'D1', 'D2', 'G1', 'G2', 'S' ) - , layouts = ( ('Horizontal M2' , 'DP_horizontalM2.py' ) - , ('Symmetrical' , 'DP_symmetrical.py' ) - , ('Common centroid', 'DP_2DCommonCentroid.py') - , ('Interdigitated' , 'DP_interdigitated.py' ) - , ('WIP DP' , 'wip_dp.py' ) - ) - ) -addDevice( name = 'DifferentialPairBulkUnconnected' - , spice = spiceDir+'DiffPairBulkUnconnected.spi' - , connectors = ( 'D1', 'D2', 'G1', 'G2', 'S', 'B' ) - , layouts = ( ('Horizontal M2' , 'DP_horizontalM2.py' ) - , ('Symmetrical' , 'DP_symmetrical.py' ) - , ('Common centroid', 'DP_2DCommonCentroid.py') - , ('Interdigitated' , 'DP_interdigitated.py' ) - , ('WIP DP' , 'wip_dp.py' ) - ) - ) -addDevice( name = 'LevelShifterBulkUnconnected' - , spice = spiceDir+'LevelShifterBulkUnconnected.spi' - , connectors = ( 'D1', 'D2', 'S1', 'S2', 'B' ) - , layouts = ( ('Horizontal M2' , 'LS_horizontalM2.py' ) - , ('Symmetrical' , 'LS_symmetrical.py' ) - , ('Common centroid', 'LS_2DCommonCentroid.py') - , ('Interdigitated' , 'LS_interdigitated.py' ) - ) - ) -addDevice( name = 'TransistorBulkConnected' - , spice = spiceDir+'TransistorBulkConnected.spi' - , connectors = ( 'D', 'G', 'S' ) - , layouts = ( ('Rotate transistor', 'Transistor_rotate.py') - , ('Common transistor', 'Transistor_common.py') - , ('WIP Transistor' , 'wip_transistor.py' ) - ) - ) -addDevice( name = 'TransistorBulkUnconnected' - , spice = spiceDir+'TransistorBulkUnconnected.spi' - , connectors = ( 'D', 'G', 'S', 'B' ) - , layouts = ( ('Rotate transistor', 'Transistor_rotate.py') - , ('Common transistor', 'Transistor_common.py') - , ('WIP Transistor' , 'wip_transistor.py' ) - ) - ) -addDevice( name = 'CrossCoupledPairBulkConnected' - , spice = spiceDir+'CCPairBulkConnected.spi' - , connectors = ( 'D1', 'D2', 'S' ) - , layouts = ( ('Horizontal M2' , 'CCP_horizontalM2.py' ) - , ('Symmetrical' , 'CCP_symmetrical.py' ) - , ('Common centroid', 'CCP_2DCommonCentroid.py') - , ('Interdigitated' , 'CCP_interdigitated.py' ) - ) - ) -addDevice( name = 'CrossCoupledPairBulkUnconnected' - , spice = spiceDir+'CCPairBulkUnconnected.spi' - , connectors = ( 'D1', 'D2', 'S', 'B' ) - , layouts = ( ('Horizontal M2' , 'CCP_horizontalM2.py' ) - , ('Symmetrical' , 'CCP_symmetrical.py' ) - , ('Common centroid', 'CCP_2DCommonCentroid.py') - , ('Interdigitated' , 'CCP_interdigitated.py' ) - ) - ) -addDevice( name = 'CommonSourcePairBulkConnected' - , spice = spiceDir+'CommonSourcePairBulkConnected.spi' - , connectors = ( 'D1', 'D2', 'S', 'G' ) - , layouts = ( ('Horizontal M2' , 'CSP_horizontalM2.py' ) - , ('Symmetrical' , 'CSP_symmetrical.py' ) - , ('Interdigitated' , 'CSP_interdigitated.py' ) - , ('WIP CSP' , 'wip_csp.py' ) - ) - ) -addDevice( name = 'CommonSourcePairBulkUnconnected' - , spice = spiceDir+'CommonSourcePairBulkUnconnected.spi' - , connectors = ( 'D1', 'D2', 'S', 'G', 'B' ) - , layouts = ( ('Horizontal M2' , 'CSP_horizontalM2.py' ) - , ('Symmetrical' , 'CSP_symmetrical.py' ) - , ('Interdigitated' , 'CSP_interdigitated.py' ) - , ('WIP CSP' , 'wip_csp.py' ) - ) - ) -addDevice( name = 'SimpleCurrentMirrorBulkConnected' - , spice = spiceDir+'CurrMirBulkConnected.spi' - , connectors = ( 'D1', 'D2', 'S' ) - , layouts = ( ('Horizontal M2' , 'SCM_horizontalM2.py' ) - , ('Symmetrical' , 'SCM_symmetrical.py' ) - , ('Common centroid', 'SCM_2DCommonCentroid.py') - , ('Interdigitated' , 'SCM_interdigitated.py' ) - ) - ) -addDevice( name = 'SimpleCurrentMirrorBulkUnconnected' - , spice = spiceDir+'CurrMirBulkUnconnected.spi' - , connectors = ( 'D1', 'D2', 'S', 'B' ) - , layouts = ( ('Horizontal M2' , 'SCM_horizontalM2.py' ) - , ('Symmetrical' , 'SCM_symmetrical.py' ) - , ('Common centroid', 'SCM_2DCommonCentroid.py') - , ('Interdigitated' , 'SCM_interdigitated.py' ) - ) - ) -addDevice( name = 'MultiCapacitor' - #, spice = spiceDir+'MIM_OneCapacitor.spi' - #, connectors = ( 'T1', 'B1' ) - , layouts = ( ('Matrix', 'capacitormatrix.py' ), - ) - ) -addDevice( name = 'Resistor' - #, spice = spiceDir+'MIM_OneCapacitor.spi' - , connectors = ( 'PIN1', 'PIN2' ) - , layouts = ( ('Snake', 'resistorsnake.py' ), - ) - ) - diff --git a/crlcore/python/CMakeLists.txt b/crlcore/python/CMakeLists.txt index ffedd828..dfa2e336 100644 --- a/crlcore/python/CMakeLists.txt +++ b/crlcore/python/CMakeLists.txt @@ -1,7 +1,15 @@ + install( FILES __init__.py DESTINATION ${Python_CORIOLISLIB} ) install( FILES helpers/__init__.py DESTINATION ${Python_CORIOLISLIB}/helpers ) install( FILES helpers/io.py DESTINATION ${Python_CORIOLISLIB}/helpers ) install( FILES helpers/utils.py DESTINATION ${Python_CORIOLISLIB}/helpers ) install( FILES helpers/overlay.py DESTINATION ${Python_CORIOLISLIB}/helpers ) install( FILES helpers/analogtechno.py DESTINATION ${Python_CORIOLISLIB}/helpers ) install( FILES helpers/technology.py DESTINATION ${Python_CORIOLISLIB}/helpers ) + + install( FILES technos/__init__.py DESTINATION ${Python_CORIOLISLIB}/technos ) + install( DIRECTORY technos/common DESTINATION ${Python_CORIOLISLIB}/technos ) + install( DIRECTORY technos/symbolic DESTINATION ${Python_CORIOLISLIB}/technos ) + install( DIRECTORY technos/node600 DESTINATION ${Python_CORIOLISLIB}/technos ) + install( DIRECTORY technos/node180 DESTINATION ${Python_CORIOLISLIB}/technos ) + install( DIRECTORY technos/node45 DESTINATION ${Python_CORIOLISLIB}/technos ) diff --git a/crlcore/etc/node180/__init__.py b/crlcore/python/__init__.py similarity index 100% rename from crlcore/etc/node180/__init__.py rename to crlcore/python/__init__.py diff --git a/crlcore/python/helpers/__init__.py b/crlcore/python/helpers/__init__.py index d8376bcb..c3de79c9 100644 --- a/crlcore/python/helpers/__init__.py +++ b/crlcore/python/helpers/__init__.py @@ -39,11 +39,10 @@ if not sysModules: for moduleName in sys.modules.keys(): sysModules.add( moduleName ) -import Hurricane -import Viewer -import CRL -import helpers.io -from helpers.io import ErrorMessage +from ..Hurricane import DbU, DataBase, Net +from ..Viewer import Graphics +from ..CRL import AllianceFramework +from .io import ErrorMessage, WarningMessage def irange ( value ): @@ -77,67 +76,6 @@ def truncPath ( path, maxlength=80 ): return '...' + os.sep + trunc -def textStackTrace ( trace, showIndent=True, scriptPath=None ): - indent = '' - if showIndent: indent = ' ' - s = '' - if scriptPath: - if len(scriptPath) > 100: - filename = scriptPath[-100:] - filename = '.../' + filename[ filename.find('/')+1 : ] - - if showIndent: s += '[ERROR] ' - s += 'An exception occured while loading the Python script module:\n' - s += indent + '\"{}\"\n' % (filename) - s += indent + 'You should check for simple python errors in this module.\n\n' - - s += indent + 'Python stack trace:\n' - maxdepth = len( trace ) - for depth in range( maxdepth ): - filename, line, function, code = trace[ maxdepth-depth-1 ] - if len(filename) > 58: - filename = filename[-58:] - filename = '.../' + filename[ filename.find('/')+1 : ] - #s += indent + '[%02d] %45s:%-5d in \"{}()\"' % ( maxdepth-depth-1, filename, line, function ) - s += indent + '#{} in {:>25}() at {}:{}\n'.format( depth, function, filename, line ) - return s - - -def showStackTrace ( trace ): - print( textStackTrace( trace, True )) - return - - -def textPythonTrace ( scriptPath=None, e=None, tryContinue=True ): - s = '' - if scriptPath: - if len(scriptPath) > 100: - filename = scriptPath[-100:] - filename = '.../' + filename[ filename.find('/')+1 : ] - else: - filename = scriptPath - s += '[ERROR] An exception occured while loading the Python script module:\n' - s += ' \"{}\"\n'.format(filename) - s += ' You should check for simple python errors in this module.\n' - if isinstance(e,helpers.io.ErrorMessage): - trace = e.trace - s += textStackTrace( trace ) - if e: - s += ' Error was:\n' - s += ' {}\n'.format(e) - else: - #trace = traceback.extract_tb( sys.exc_info()[2] ) - print( traceback.format_exc() ) - if tryContinue: - s += ' Trying to continue anyway...' - return s - - -def showPythonTrace ( scriptPath=None, e=None, tryContinue=True ): - print( textPythonTrace( scriptPath, e, tryContinue )) - return - - class Dots ( object ): def __init__ (self, header="", width=73): @@ -260,13 +198,13 @@ def overload ( defaultParameters, parameters ): return tuple(overloadParameters) -def l ( value ): return Hurricane.DbU.fromLambda( value ) -def u ( value ): return Hurricane.DbU.fromPhysical( value, Hurricane.DbU.UnitPowerMicro ) -def n ( value ): return Hurricane.DbU.fromPhysical( value, Hurricane.DbU.UnitPowerNano ) +def l ( value ): return DbU.fromLambda( value ) +def u ( value ): return DbU.fromPhysical( value, DbU.UnitPowerMicro ) +def n ( value ): return DbU.fromPhysical( value, DbU.UnitPowerNano ) def onFGrid ( u ): - oneGrid = Hurricane.DbU.fromGrid( 1.0 ) + oneGrid = DbU.fromGrid( 1.0 ) if u % oneGrid: u -= (u % oneGrid) return u @@ -313,7 +251,7 @@ def setNdaTopDir ( ndaTopDirArg ): global ndaTopDir if not os.path.isdir(ndaTopDirArg): - print( helpers.io.WarningMessage( 'helpers.setNdaTopDir(): Directory "{}" does not exists.'.format( ndaTopDirArg ))) + print( WarningMessage( 'helpers.setNdaTopDir(): Directory "{}" does not exists.'.format( ndaTopDirArg ))) else: ndaTopDir = ndaTopDirArg sys.path.append( os.path.join(ndaTopDir,'etc/coriolis2') ) @@ -379,20 +317,20 @@ def setSysConfDir ( quiet=False ): def netDirectionToStr ( netDir ): flags = [ '-', '-', '-', '-', '-' ] - if netDir & Hurricane.Net.Direction.DirIn: flags[0] = 'i' - if netDir & Hurricane.Net.Direction.DirOut: flags[1] = 'o' - if netDir & Hurricane.Net.Direction.ConnTristate: flags[2] = 't' - if netDir & Hurricane.Net.Direction.ConnWiredOr: flags[3] = 'w' + if netDir & Net.Direction.DirIn: flags[0] = 'i' + if netDir & Net.Direction.DirOut: flags[1] = 'o' + if netDir & Net.Direction.ConnTristate: flags[2] = 't' + if netDir & Net.Direction.ConnWiredOr: flags[3] = 'w' s = flags[0]+flags[1]+flags[2]+flags[3]+' ' - if netDir == Hurricane.Net.Direction.UNDEFINED: s += '(UNDEFINED)' - elif netDir == Hurricane.Net.Direction.IN: s += '(IN)' - elif netDir == Hurricane.Net.Direction.OUT: s += '(OUT)' - elif netDir == Hurricane.Net.Direction.INOUT: s += '(INOUT)' - elif netDir == Hurricane.Net.Direction.TRISTATE: s += '(TRISTATE)' - elif netDir == Hurricane.Net.Direction.TRANSCV: s += '(TRANSCV)' - elif netDir == Hurricane.Net.Direction.WOR_OUT: s += '(WOR_OUT)' - elif netDir == Hurricane.Net.Direction.WOR_INOUT: s += '(WOR_INOUT)' + if netDir == Net.Direction.UNDEFINED: s += '(UNDEFINED)' + elif netDir == Net.Direction.IN: s += '(IN)' + elif netDir == Net.Direction.OUT: s += '(OUT)' + elif netDir == Net.Direction.INOUT: s += '(INOUT)' + elif netDir == Net.Direction.TRISTATE: s += '(TRISTATE)' + elif netDir == Net.Direction.TRANSCV: s += '(TRANSCV)' + elif netDir == Net.Direction.WOR_OUT: s += '(WOR_OUT)' + elif netDir == Net.Direction.WOR_INOUT: s += '(WOR_INOUT)' else: s += '(UNKNOWN)' return s @@ -410,10 +348,10 @@ def unloadUserSettings (): warning = '' if refcount > 3: warning = '(NOTE: More than 3 refcount %d)' % refcount - #print( helpers.io.WarningMessage( [ 'Configuration module "{}" has more than 3 references ({})".' \ - # .format(moduleName,refcount) - # , 'May be unable to unload it from the Python process.' - # ] )) + #print( WarningMessage( [ 'Configuration module "{}" has more than 3 references ({})".' \ + # .format(moduleName,refcount) + # , 'May be unable to unload it from the Python process.' + # ] )) print( ' - {:-34} {:-35}'.format( '"{}".'.format(moduleName), warning )) del sys.modules[ moduleName ] confModules = set() @@ -421,7 +359,7 @@ def unloadUserSettings (): def loadUserSettings (): - if Hurricane.DataBase.getDB() is not None: + if DataBase.getDB() is not None: print( ' o DataBase already initialized, skip loading of "./coriolis2/settings.py".' ) return True rvalue = False @@ -431,9 +369,9 @@ def loadUserSettings (): import coriolis2.settings rvalue = True else: - print( helpers.io.WarningMessage( [ 'User\'s settings directory "{}" exists, but do not contains "__init__.py".'.format( './coriolis2/' ) - , '(path:"{}")'.format( os.path.abspath(os.getcwd()) ) - ] )) + print( WarningMessage( [ 'User\'s settings directory "{}" exists, but do not contains "__init__.py".'.format( './coriolis2/' ) + , '(path:"{}")'.format( os.path.abspath(os.getcwd()) ) + ] )) else: import symbolic.cmos tagConfModules() @@ -452,8 +390,8 @@ def tagConfModules (): def resetCoriolis (): print( ' o Full reset of Coriolis/Hurricane databases.' ) - CRL.AllianceFramework.get().destroy() - Viewer.Graphics.get().clear() - Hurricane.DataBase.getDB().destroy() + AllianceFramework.get().destroy() + Graphics.get().clear() + DataBase.getDB().destroy() unloadUserSettings() return diff --git a/crlcore/python/helpers/analogtechno.py b/crlcore/python/helpers/analogtechno.py index b8c4f811..7128becc 100644 --- a/crlcore/python/helpers/analogtechno.py +++ b/crlcore/python/helpers/analogtechno.py @@ -2,7 +2,7 @@ # -*- Mode:Python -*- # # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2015-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2015-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -18,11 +18,8 @@ import os import os.path import sys -import Hurricane -from Hurricane import DbU -from Hurricane import DataBase -from Hurricane import Layer -from helpers.io import catch, ErrorMessage, WarningMessage +from ..Hurricane import DbU, DataBase, Layer +from .io import catch, ErrorMessage, WarningMessage tech = None diff --git a/crlcore/python/helpers/io.py b/crlcore/python/helpers/io.py index 737e1f83..22f8b247 100644 --- a/crlcore/python/helpers/io.py +++ b/crlcore/python/helpers/io.py @@ -19,10 +19,70 @@ import os import os.path import re import traceback -import Cfg -import helpers -from Hurricane import UpdateSession -import Viewer +from .. import Cfg +from ..Hurricane import UpdateSession +from ..Viewer import Graphics, ErrorWidget + + +def textStackTrace ( trace, showIndent=True, scriptPath=None ): + indent = '' + if showIndent: indent = ' ' + s = '' + if scriptPath: + if len(scriptPath) > 100: + filename = scriptPath[-100:] + filename = '.../' + filename[ filename.find('/')+1 : ] + + if showIndent: s += '[ERROR] ' + s += 'An exception occured while loading the Python script module:\n' + s += indent + '\"{}\"\n' % (filename) + s += indent + 'You should check for simple python errors in this module.\n\n' + + s += indent + 'Python stack trace:\n' + maxdepth = len( trace ) + for depth in range( maxdepth ): + filename, line, function, code = trace[ maxdepth-depth-1 ] + if len(filename) > 58: + filename = filename[-58:] + filename = '.../' + filename[ filename.find('/')+1 : ] + #s += indent + '[%02d] %45s:%-5d in \"{}()\"' % ( maxdepth-depth-1, filename, line, function ) + s += indent + '#{} in {:>25}() at {}:{}\n'.format( depth, function, filename, line ) + return s + + +def showStackTrace ( trace ): + print( textStackTrace( trace, True )) + return + + +def textPythonTrace ( scriptPath=None, e=None, tryContinue=True ): + s = '' + if scriptPath: + if len(scriptPath) > 100: + filename = scriptPath[-100:] + filename = '.../' + filename[ filename.find('/')+1 : ] + else: + filename = scriptPath + s += '[ERROR] An exception occured while loading the Python script module:\n' + s += ' \"{}\"\n'.format(filename) + s += ' You should check for simple python errors in this module.\n' + if isinstance(e,ErrorMessage): + trace = e.trace + s += textStackTrace( trace ) + if e: + s += ' Error was:\n' + s += ' {}\n'.format(e) + else: + #trace = traceback.extract_tb( sys.exc_info()[2] ) + print( traceback.format_exc() ) + if tryContinue: + s += ' Trying to continue anyway...' + return s + + +def showPythonTrace ( scriptPath=None, e=None, tryContinue=True ): + print( textPythonTrace( scriptPath, e, tryContinue )) + return # ------------------------------------------------------------------- @@ -100,10 +160,10 @@ class ErrorMessage ( Exception ): @staticmethod def show ( code, *arguments ): e = ErrorMessage( code, *arguments ) - if not Viewer.Graphics.get().isEnabled(): + if not Graphics.get().isEnabled(): raise e - tryCont = Viewer.ErrorWidget.run( e.getLinesAsString() - , helpers.textStackTrace( e.trace, False, e.scriptPath )) + tryCont = ErrorWidget.run( e.getLinesAsString() + , textStackTrace( e.trace, False, e.scriptPath )) if not tryCont: raise e return @@ -122,10 +182,10 @@ def catch ( errorObject ): em.trace = traceback.extract_tb( sys.exc_info()[2] ) #em.scriptPath = __file__ print( em ) - print( helpers.textStackTrace( em.trace, True, em.scriptPath )) - if Viewer.Graphics.get().isEnabled(): - Viewer.ErrorWidget.run( em.getLinesAsString() - , helpers.textStackTrace( em.trace, False, em.scriptPath )) + print( textStackTrace( em.trace, True, em.scriptPath )) + if Graphics.get().isEnabled(): + ErrorWidget.run( em.getLinesAsString() + , textStackTrace( em.trace, False, em.scriptPath )) if UpdateSession.getStackSize() > 0: UpdateSession.close() return diff --git a/crlcore/python/helpers/overlay.py b/crlcore/python/helpers/overlay.py index 2f0d7f83..dcbb0422 100644 --- a/crlcore/python/helpers/overlay.py +++ b/crlcore/python/helpers/overlay.py @@ -25,9 +25,9 @@ Contains: * ``overlay.CfgCache`` : A cache for Cfg parameters. """ -import Cfg -import Hurricane -from .io import isVL +from .. import Cfg +from .. import Hurricane +from .io import isVL class UpdateSession ( object ): diff --git a/crlcore/python/helpers/technology.py b/crlcore/python/helpers/technology.py index 4150b643..0b2290db 100644 --- a/crlcore/python/helpers/technology.py +++ b/crlcore/python/helpers/technology.py @@ -17,7 +17,7 @@ Some helpers to create or load a technology and it's libraries. """ -from Hurricane import DataBase, Library, BasicLayer, Layer, ViaLayer +from ..Hurricane import DataBase, Library, BasicLayer, Layer, ViaLayer __all__ = [ 'safeGetLibrary', 'createBL', 'setEnclosures' ] diff --git a/crlcore/etc/45/freepdk_45/alliance.conf b/crlcore/python/technos/45/freepdk_45/alliance.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/alliance.conf rename to crlcore/python/technos/45/freepdk_45/alliance.conf diff --git a/crlcore/etc/45/freepdk_45/analog.conf b/crlcore/python/technos/45/freepdk_45/analog.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/analog.conf rename to crlcore/python/technos/45/freepdk_45/analog.conf diff --git a/crlcore/etc/45/freepdk_45/display.conf b/crlcore/python/technos/45/freepdk_45/display.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/display.conf rename to crlcore/python/technos/45/freepdk_45/display.conf diff --git a/crlcore/etc/45/freepdk_45/etesian.conf b/crlcore/python/technos/45/freepdk_45/etesian.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/etesian.conf rename to crlcore/python/technos/45/freepdk_45/etesian.conf diff --git a/crlcore/etc/45/freepdk_45/hMetis.conf b/crlcore/python/technos/45/freepdk_45/hMetis.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/hMetis.conf rename to crlcore/python/technos/45/freepdk_45/hMetis.conf diff --git a/crlcore/etc/45/freepdk_45/kite.conf b/crlcore/python/technos/45/freepdk_45/kite.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/kite.conf rename to crlcore/python/technos/45/freepdk_45/kite.conf diff --git a/crlcore/etc/45/freepdk_45/mauka.conf b/crlcore/python/technos/45/freepdk_45/mauka.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/mauka.conf rename to crlcore/python/technos/45/freepdk_45/mauka.conf diff --git a/crlcore/etc/45/freepdk_45/misc.conf b/crlcore/python/technos/45/freepdk_45/misc.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/misc.conf rename to crlcore/python/technos/45/freepdk_45/misc.conf diff --git a/crlcore/etc/45/freepdk_45/nimbus.conf b/crlcore/python/technos/45/freepdk_45/nimbus.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/nimbus.conf rename to crlcore/python/technos/45/freepdk_45/nimbus.conf diff --git a/crlcore/etc/45/freepdk_45/patterns.conf b/crlcore/python/technos/45/freepdk_45/patterns.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/patterns.conf rename to crlcore/python/technos/45/freepdk_45/patterns.conf diff --git a/crlcore/etc/45/freepdk_45/plugins.conf b/crlcore/python/technos/45/freepdk_45/plugins.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/plugins.conf rename to crlcore/python/technos/45/freepdk_45/plugins.conf diff --git a/crlcore/etc/45/freepdk_45/stratus1.conf b/crlcore/python/technos/45/freepdk_45/stratus1.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/stratus1.conf rename to crlcore/python/technos/45/freepdk_45/stratus1.conf diff --git a/crlcore/etc/45/freepdk_45/technology.conf b/crlcore/python/technos/45/freepdk_45/technology.conf similarity index 100% rename from crlcore/etc/45/freepdk_45/technology.conf rename to crlcore/python/technos/45/freepdk_45/technology.conf diff --git a/crlcore/etc/45/ispd18/alliance.conf b/crlcore/python/technos/45/ispd18/alliance.conf similarity index 100% rename from crlcore/etc/45/ispd18/alliance.conf rename to crlcore/python/technos/45/ispd18/alliance.conf diff --git a/crlcore/etc/45/ispd18/analog.conf b/crlcore/python/technos/45/ispd18/analog.conf similarity index 100% rename from crlcore/etc/45/ispd18/analog.conf rename to crlcore/python/technos/45/ispd18/analog.conf diff --git a/crlcore/etc/45/ispd18/display.conf b/crlcore/python/technos/45/ispd18/display.conf similarity index 100% rename from crlcore/etc/45/ispd18/display.conf rename to crlcore/python/technos/45/ispd18/display.conf diff --git a/crlcore/etc/45/ispd18/etesian.conf b/crlcore/python/technos/45/ispd18/etesian.conf similarity index 100% rename from crlcore/etc/45/ispd18/etesian.conf rename to crlcore/python/technos/45/ispd18/etesian.conf diff --git a/crlcore/etc/45/ispd18/hMetis.conf b/crlcore/python/technos/45/ispd18/hMetis.conf similarity index 100% rename from crlcore/etc/45/ispd18/hMetis.conf rename to crlcore/python/technos/45/ispd18/hMetis.conf diff --git a/crlcore/etc/45/ispd18/kite.conf b/crlcore/python/technos/45/ispd18/kite.conf similarity index 100% rename from crlcore/etc/45/ispd18/kite.conf rename to crlcore/python/technos/45/ispd18/kite.conf diff --git a/crlcore/etc/45/ispd18/mauka.conf b/crlcore/python/technos/45/ispd18/mauka.conf similarity index 100% rename from crlcore/etc/45/ispd18/mauka.conf rename to crlcore/python/technos/45/ispd18/mauka.conf diff --git a/crlcore/etc/45/ispd18/misc.conf b/crlcore/python/technos/45/ispd18/misc.conf similarity index 100% rename from crlcore/etc/45/ispd18/misc.conf rename to crlcore/python/technos/45/ispd18/misc.conf diff --git a/crlcore/etc/45/ispd18/nimbus.conf b/crlcore/python/technos/45/ispd18/nimbus.conf similarity index 100% rename from crlcore/etc/45/ispd18/nimbus.conf rename to crlcore/python/technos/45/ispd18/nimbus.conf diff --git a/crlcore/etc/45/ispd18/patterns.conf b/crlcore/python/technos/45/ispd18/patterns.conf similarity index 100% rename from crlcore/etc/45/ispd18/patterns.conf rename to crlcore/python/technos/45/ispd18/patterns.conf diff --git a/crlcore/etc/45/ispd18/plugins.conf b/crlcore/python/technos/45/ispd18/plugins.conf similarity index 100% rename from crlcore/etc/45/ispd18/plugins.conf rename to crlcore/python/technos/45/ispd18/plugins.conf diff --git a/crlcore/etc/45/ispd18/stratus1.conf b/crlcore/python/technos/45/ispd18/stratus1.conf similarity index 100% rename from crlcore/etc/45/ispd18/stratus1.conf rename to crlcore/python/technos/45/ispd18/stratus1.conf diff --git a/crlcore/etc/45/ispd18/technology.conf b/crlcore/python/technos/45/ispd18/technology.conf similarity index 100% rename from crlcore/etc/45/ispd18/technology.conf rename to crlcore/python/technos/45/ispd18/technology.conf diff --git a/crlcore/python/technos/CMakeLists.txt b/crlcore/python/technos/CMakeLists.txt new file mode 100644 index 00000000..d08e218b --- /dev/null +++ b/crlcore/python/technos/CMakeLists.txt @@ -0,0 +1,9 @@ + + install( FILES __init__.py DESTINATION ${SYS_CONF_DIR} ) + install( FILES __init__.py DESTINATION ${SYS_CONF_DIR}/coriolis2 ) + install( DIRECTORY common DESTINATION ${SYS_CONF_DIR}/coriolis2 ) + install( DIRECTORY symbolic DESTINATION ${SYS_CONF_DIR}/coriolis2 ) + install( DIRECTORY node45 DESTINATION ${SYS_CONF_DIR}/coriolis2 ) + install( DIRECTORY node180 DESTINATION ${SYS_CONF_DIR}/coriolis2 ) + install( DIRECTORY node600 DESTINATION ${SYS_CONF_DIR}/coriolis2 ) + diff --git a/crlcore/etc/node45/__init__.py b/crlcore/python/technos/__init__.py similarity index 100% rename from crlcore/etc/node45/__init__.py rename to crlcore/python/technos/__init__.py diff --git a/crlcore/etc/common/__init__.py b/crlcore/python/technos/common/__init__.py similarity index 87% rename from crlcore/etc/common/__init__.py rename to crlcore/python/technos/common/__init__.py index dd85582b..409261fc 100644 --- a/crlcore/etc/common/__init__.py +++ b/crlcore/python/technos/common/__init__.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,9 +13,9 @@ # +-----------------------------------------------------------------+ -from Hurricane import DataBase -import helpers.io -from helpers.io import ErrorMessage +from coriolis.Hurricane import DataBase +from coriolis.helpers import stype +from coriolis.helpers.io import catch, ErrorMessage def loadGdsLayers ( gdsLayersTable ): @@ -32,13 +32,13 @@ def loadGdsLayers ( gdsLayersTable ): if not isinstance(gdsiiLayer,int): raise ErrorMessage( 1, ['Incoherency in entry.' ,'GDSII layer number is not of int type (%s).' \ - % helpers.stype(gdsiiLayer) + % stype(gdsiiLayer) ,str(entry) ] ) if not isinstance(gdsiiDatatype,int): raise ErrorMessage( 1, ['Incoherency in entry.' ,'GDSII layer Datatype is not of int type (%s).' \ - % helpers.stype(gdsiiDatatype) + % stype(gdsiiDatatype) ,str(entry) ] ) @@ -55,5 +55,5 @@ def loadGdsLayers ( gdsLayersTable ): basicLayer.setGds2Datatype( gdsiiDatatype ) except Exception as e: - helpers.io.catch( e ) + catch( e ) return diff --git a/crlcore/etc/common/analog.conf b/crlcore/python/technos/common/analog.conf similarity index 100% rename from crlcore/etc/common/analog.conf rename to crlcore/python/technos/common/analog.conf diff --git a/crlcore/etc/common/analog.py b/crlcore/python/technos/common/analog.py similarity index 73% rename from crlcore/etc/common/analog.py rename to crlcore/python/technos/common/analog.py index 1d9308ba..00387f51 100644 --- a/crlcore/etc/common/analog.py +++ b/crlcore/python/technos/common/analog.py @@ -1,24 +1,23 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | # | Alliance / Hurricane Interface | # | | # | Author : Jean-Paul CHAPUT | -# | E-mail : Jean-Paul.Chaput@asim.lip6.fr | +# | E-mail : Jean-Paul.Chaput@lip6.fr | # | =============================================================== | # | Python : "./etc/common/analog.py" | # +-----------------------------------------------------------------+ -import Cfg -import helpers - +import coriolis.Cfg as Cfg +from coriolis.helpers import technoDir p = Cfg.getParamString( 'analog.techno' ) p.setString( 'Analog_technology_has_not_been_set' ) p.flags = Cfg.Parameter.Flags.NeedRestart|Cfg.Parameter.Flags.MustExist -#Cfg.getParamString( 'analog.devices' ).setString( helpers.technoDir+'/devices.conf' ) +#Cfg.getParamString( 'analog.devices' ).setString( technoDir+'/devices.conf' ) diff --git a/crlcore/etc/common/colors.py b/crlcore/python/technos/common/colors.py similarity index 96% rename from crlcore/etc/common/colors.py rename to crlcore/python/technos/common/colors.py index bb924420..d5ef8276 100644 --- a/crlcore/etc/common/colors.py +++ b/crlcore/python/technos/common/colors.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -14,7 +14,7 @@ import string -from helpers.io import ErrorMessage +from coriolis.helpers.io import ErrorMessage stdColors = \ diff --git a/crlcore/etc/common/devices.conf b/crlcore/python/technos/common/devices.conf similarity index 100% rename from crlcore/etc/common/devices.conf rename to crlcore/python/technos/common/devices.conf diff --git a/crlcore/etc/common/devices.py b/crlcore/python/technos/common/devices.py similarity index 87% rename from crlcore/etc/common/devices.py rename to crlcore/python/technos/common/devices.py index 990554ed..ec96fa5d 100644 --- a/crlcore/etc/common/devices.py +++ b/crlcore/python/technos/common/devices.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,10 +13,8 @@ # +-----------------------------------------------------------------+ -from Hurricane import DataBase -import helpers.io -from helpers.io import ErrorMessage -from helpers.io import WarningMessage +from coriolis.Hurricane import DataBase +from coriolis.helpers.io import catch, ErrorMessage, WarningMessage tech = DataBase.getDB().getTechnology() @@ -42,5 +40,5 @@ def addDevice ( **kw ): print( WarningMessage( 'common.addDevice(): Missing layouts on device "{}".' \ .format( kw['name'] ))) except Exception as e: - helpers.io.catch( e ) + catch( e ) return diff --git a/crlcore/etc/common/display.conf b/crlcore/python/technos/common/display.conf similarity index 100% rename from crlcore/etc/common/display.conf rename to crlcore/python/technos/common/display.conf diff --git a/crlcore/etc/common/display.py b/crlcore/python/technos/common/display.py similarity index 99% rename from crlcore/etc/common/display.py rename to crlcore/python/technos/common/display.py index e7fe49b2..8e37abea 100644 --- a/crlcore/etc/common/display.py +++ b/crlcore/python/technos/common/display.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,11 +13,11 @@ # +-----------------------------------------------------------------+ -import Cfg -import Viewer -from helpers import overlay, l, u, n -from common.colors import toRGB -from common.patterns import toHexa +import coriolis.Cfg as Cfg +import coriolis.Viewer as Viewer +from coriolis.helpers import overlay, l, u, n +from coriolis.technos.common.colors import toRGB +from coriolis.technos.common.patterns import toHexa def createStyles ( scale=1.0 ): diff --git a/crlcore/etc/common/etesian.conf b/crlcore/python/technos/common/etesian.conf similarity index 100% rename from crlcore/etc/common/etesian.conf rename to crlcore/python/technos/common/etesian.conf diff --git a/crlcore/etc/common/etesian.py b/crlcore/python/technos/common/etesian.py similarity index 93% rename from crlcore/etc/common/etesian.py rename to crlcore/python/technos/common/etesian.py index c1378010..866d339f 100644 --- a/crlcore/etc/common/etesian.py +++ b/crlcore/python/technos/common/etesian.py @@ -1,19 +1,19 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | # | Alliance / Hurricane Interface | # | | # | Author : Jean-Paul CHAPUT | -# | E-mail : Jean-Paul.Chaput@asim.lip6.fr | +# | E-mail : Jean-Paul.Chaput@lip6.fr | # | =============================================================== | # | Python : "./etc/common/etesian.py" | # +-----------------------------------------------------------------+ -import Cfg +import coriolis.Cfg as Cfg param = Cfg.getParamDouble( 'etesian.aspectRatio' ) diff --git a/crlcore/etc/common/hMetis.conf b/crlcore/python/technos/common/hMetis.conf similarity index 100% rename from crlcore/etc/common/hMetis.conf rename to crlcore/python/technos/common/hMetis.conf diff --git a/crlcore/etc/common/kite.conf b/crlcore/python/technos/common/kite.conf similarity index 100% rename from crlcore/etc/common/kite.conf rename to crlcore/python/technos/common/kite.conf diff --git a/crlcore/etc/common/kite.py b/crlcore/python/technos/common/kite.py similarity index 96% rename from crlcore/etc/common/kite.py rename to crlcore/python/technos/common/kite.py index bd9af3bd..e9524096 100644 --- a/crlcore/etc/common/kite.py +++ b/crlcore/python/technos/common/kite.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,7 @@ # +-----------------------------------------------------------------+ -import Cfg +import coriolis.Cfg as Cfg layout = Cfg.Configuration.get().getLayout() diff --git a/crlcore/etc/common/mauka.conf b/crlcore/python/technos/common/mauka.conf similarity index 100% rename from crlcore/etc/common/mauka.conf rename to crlcore/python/technos/common/mauka.conf diff --git a/crlcore/etc/common/misc.conf b/crlcore/python/technos/common/misc.conf similarity index 100% rename from crlcore/etc/common/misc.conf rename to crlcore/python/technos/common/misc.conf diff --git a/crlcore/etc/common/misc.py b/crlcore/python/technos/common/misc.py similarity index 97% rename from crlcore/etc/common/misc.py rename to crlcore/python/technos/common/misc.py index df9cbcf6..7c266491 100644 --- a/crlcore/etc/common/misc.py +++ b/crlcore/python/technos/common/misc.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,7 @@ # +-----------------------------------------------------------------+ -import Cfg +import coriolis.Cfg as Cfg Cfg.getParamBool( 'misc.catchCore' ).setBool( False ) diff --git a/crlcore/etc/common/nimbus.conf b/crlcore/python/technos/common/nimbus.conf similarity index 100% rename from crlcore/etc/common/nimbus.conf rename to crlcore/python/technos/common/nimbus.conf diff --git a/crlcore/etc/common/patterns.conf b/crlcore/python/technos/common/patterns.conf similarity index 100% rename from crlcore/etc/common/patterns.conf rename to crlcore/python/technos/common/patterns.conf diff --git a/crlcore/etc/common/patterns.py b/crlcore/python/technos/common/patterns.py similarity index 99% rename from crlcore/etc/common/patterns.py rename to crlcore/python/technos/common/patterns.py index 64710130..8a399c54 100644 --- a/crlcore/etc/common/patterns.py +++ b/crlcore/python/technos/common/patterns.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Universit 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Universit 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -15,10 +15,8 @@ import sys import math -import helpers -from helpers import irange -from helpers.io import ErrorMessage -from helpers.io import WarningMessage +from coriolis.helpers import irange +from coriolis.helpers.io import ErrorMessage, WarningMessage class Pattern ( object ): diff --git a/crlcore/etc/common/stratus1.conf b/crlcore/python/technos/common/stratus1.conf similarity index 100% rename from crlcore/etc/common/stratus1.conf rename to crlcore/python/technos/common/stratus1.conf diff --git a/crlcore/etc/common/stratus1.py b/crlcore/python/technos/common/stratus1.py similarity index 87% rename from crlcore/etc/common/stratus1.py rename to crlcore/python/technos/common/stratus1.py index b010574e..49e0eb1f 100644 --- a/crlcore/etc/common/stratus1.py +++ b/crlcore/python/technos/common/stratus1.py @@ -1,19 +1,19 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | # | Alliance / Hurricane Interface | # | | # | Author : Jean-Paul CHAPUT | -# | E-mail : Jean-Paul.Chaput@asim.lip6.fr | +# | E-mail : Jean-Paul.Chaput@lip6.fr | # | =============================================================== | # | Python : "./etc/common/stratus1.py" | # +-----------------------------------------------------------------+ -import Cfg +import coriolis.Cfg as Cfg layout = Cfg.Configuration.get().getLayout() layout.addTab ( 'stratus1', 'Stratus1' ) diff --git a/crlcore/etc/common/technology.conf b/crlcore/python/technos/common/technology.conf similarity index 100% rename from crlcore/etc/common/technology.conf rename to crlcore/python/technos/common/technology.conf diff --git a/crlcore/etc/common/technology.py b/crlcore/python/technos/common/technology.py similarity index 98% rename from crlcore/etc/common/technology.py rename to crlcore/python/technos/common/technology.py index fc9a4130..3aa971e8 100644 --- a/crlcore/etc/common/technology.py +++ b/crlcore/python/technos/common/technology.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,16 +13,10 @@ # +-----------------------------------------------------------------+ -from helpers import l, u, n -from Hurricane import DataBase -from Hurricane import Technology -from Hurricane import Layer -from Hurricane import BasicLayer -from Hurricane import DiffusionLayer -from Hurricane import TransistorLayer -from Hurricane import RegularLayer -from Hurricane import ContactLayer -from Hurricane import ViaLayer +from coriolis.helpers import l, u, n +from coriolis.Hurricane import DataBase, Technology, Layer, BasicLayer, \ + DiffusionLayer, TransistorLayer, \ + RegularLayer, ContactLayer, ViaLayer tech = DataBase.getDB().getTechnology() diff --git a/crlcore/etc/node600/__init__.py b/crlcore/python/technos/node180/__init__.py similarity index 100% rename from crlcore/etc/node600/__init__.py rename to crlcore/python/technos/node180/__init__.py diff --git a/crlcore/etc/node180/scn6m_deep_09/__init__.py b/crlcore/python/technos/node180/scn6m_deep_09/__init__.py similarity index 53% rename from crlcore/etc/node180/scn6m_deep_09/__init__.py rename to crlcore/python/technos/node180/scn6m_deep_09/__init__.py index dc0af2cb..5546e40b 100644 --- a/crlcore/etc/node180/scn6m_deep_09/__init__.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/__init__.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,31 +13,32 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 1, ' o Loading "node180.scn6m_deep_09" technology.' ) -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, tagConfModules +from coriolis.helpers.io import vprint +vprint( 1, ' o Loading "node180.scn6m_deep_09" technology.' ) +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -from Hurricane import DataBase -from CRL import System +from coriolis.Hurricane import DataBase +from coriolis.CRL import System Cfg.Configuration.pushDefaultPriority( Cfg.Parameter.Priority.ConfigurationFile ) DataBase.create() System.get() -import node180.scn6m_deep_09.misc -import node180.scn6m_deep_09.technology -import node180.scn6m_deep_09.display -import node180.scn6m_deep_09.analog -import node180.scn6m_deep_09.alliance -import node180.scn6m_deep_09.etesian -import node180.scn6m_deep_09.kite -import node180.scn6m_deep_09.plugins -import node180.scn6m_deep_09.stratus1 -import node180.scn6m_deep_09.devices -import node180.scn6m_deep_09.dtr_scn6m_deep_09 +from . import misc +from . import technology +from . import display +from . import analog +from . import alliance +from . import etesian +from . import kite +from . import plugins +from . import stratus1 +from . import devices +from . import dtr_scn6m_deep_09 Cfg.Configuration.popDefaultPriority() -helpers.tagConfModules() +tagConfModules() diff --git a/crlcore/etc/node180/scn6m_deep_09/alliance.py b/crlcore/python/technos/node180/scn6m_deep_09/alliance.py similarity index 85% rename from crlcore/etc/node180/scn6m_deep_09/alliance.py rename to crlcore/python/technos/node180/scn6m_deep_09/alliance.py index b37e15f4..6f016eba 100644 --- a/crlcore/etc/node180/scn6m_deep_09/alliance.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/alliance.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,13 +13,13 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) import os import os.path -from CRL import Environment -from CRL import AllianceFramework +from coriolis.CRL import Environment, AllianceFramework allianceTop = None if 'ALLIANCE_TOP' in os.environ: diff --git a/crlcore/etc/node180/scn6m_deep_09/analog.py b/crlcore/python/technos/node180/scn6m_deep_09/analog.py similarity index 74% rename from crlcore/etc/node180/scn6m_deep_09/analog.py rename to crlcore/python/technos/node180/scn6m_deep_09/analog.py index 22a76ef7..081533a6 100644 --- a/crlcore/etc/node180/scn6m_deep_09/analog.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/analog.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -#import common.analog +#from ...common import analog diff --git a/crlcore/python/technos/node180/scn6m_deep_09/devices.py b/crlcore/python/technos/node180/scn6m_deep_09/devices.py new file mode 100644 index 00000000..a52edfa1 --- /dev/null +++ b/crlcore/python/technos/node180/scn6m_deep_09/devices.py @@ -0,0 +1,137 @@ + +# This file is part of the Coriolis Software. +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved +# +# +-----------------------------------------------------------------+ +# | C O R I O L I S | +# | Alliance / Hurricane Interface | +# | | +# | Author : Jean-Paul CHAPUT | +# | E-mail : Jean-Paul.Chaput@lip6.fr | +# | =============================================================== | +# | Python : "./node180/scn6m_deep_09/devices.py" | +# +-----------------------------------------------------------------+ + + +from coriolis.helpers import truncPath, sysConfDir +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) + +from ...common import devices +from ...common.devices import addDevice + +chamsDir = sysConfDir + '/share/coriolis2/' +spiceDir = chamsDir + 'spice/' + +addDevice( name = 'DifferentialPairBulkConnected' + , spice = spiceDir+'DiffPairBulkConnected.spi' + , connectors = ( 'D1', 'D2', 'G1', 'G2', 'S' ) + , layouts = ( ('Horizontal M2' , 'coriolis.oroshi.DP_horizontalM2.py' ) + , ('Symmetrical' , 'coriolis.oroshi.DP_symmetrical.py' ) + , ('Common centroid', 'coriolis.oroshi.DP_2DCommonCentroid.py') + , ('Interdigitated' , 'coriolis.oroshi.DP_interdigitated.py' ) + , ('WIP DP' , 'coriolis.oroshi.wip_dp.py' ) + ) + ) +addDevice( name = 'DifferentialPairBulkUnconnected' + , spice = spiceDir+'DiffPairBulkUnconnected.spi' + , connectors = ( 'D1', 'D2', 'G1', 'G2', 'S', 'B' ) + , layouts = ( ('Horizontal M2' , 'coriolis.oroshi.DP_horizontalM2.py' ) + , ('Symmetrical' , 'coriolis.oroshi.DP_symmetrical.py' ) + , ('Common centroid', 'coriolis.oroshi.DP_2DCommonCentroid.py') + , ('Interdigitated' , 'coriolis.oroshi.DP_interdigitated.py' ) + , ('WIP DP' , 'coriolis.oroshi.wip_dp.py' ) + ) + ) +addDevice( name = 'LevelShifterBulkUnconnected' + , spice = spiceDir+'LevelShifterBulkUnconnected.spi' + , connectors = ( 'D1', 'D2', 'S1', 'S2', 'B' ) + , layouts = ( ('Horizontal M2' , 'coriolis.oroshi.LS_horizontalM2.py' ) + , ('Symmetrical' , 'coriolis.oroshi.LS_symmetrical.py' ) + , ('Common centroid', 'coriolis.oroshi.LS_2DCommonCentroid.py') + , ('Interdigitated' , 'coriolis.oroshi.LS_interdigitated.py' ) + ) + ) +addDevice( name = 'TransistorBulkConnected' + , spice = spiceDir+'TransistorBulkConnected.spi' + , connectors = ( 'D', 'G', 'S' ) + , layouts = ( ('Rotate transistor', 'coriolis.oroshi.Transistor_rotate.py') + , ('Common transistor', 'coriolis.oroshi.Transistor_common.py') + , ('WIP Transistor' , 'coriolis.oroshi.wip_transistor.py' ) + ) + ) +addDevice( name = 'TransistorBulkUnconnected' + , spice = spiceDir+'TransistorBulkUnconnected.spi' + , connectors = ( 'D', 'G', 'S', 'B' ) + , layouts = ( ('Rotate transistor', 'coriolis.oroshi.Transistor_rotate.py') + , ('Common transistor', 'coriolis.oroshi.Transistor_common.py') + , ('WIP Transistor' , 'coriolis.oroshi.wip_transistor.py' ) + ) + ) +addDevice( name = 'CrossCoupledPairBulkConnected' + , spice = spiceDir+'CCPairBulkConnected.spi' + , connectors = ( 'D1', 'D2', 'S' ) + , layouts = ( ('Horizontal M2' , 'coriolis.oroshi.CCP_horizontalM2.py' ) + , ('Symmetrical' , 'coriolis.oroshi.CCP_symmetrical.py' ) + , ('Common centroid', 'coriolis.oroshi.CCP_2DCommonCentroid.py') + , ('Interdigitated' , 'coriolis.oroshi.CCP_interdigitated.py' ) + ) + ) +addDevice( name = 'CrossCoupledPairBulkUnconnected' + , spice = spiceDir+'CCPairBulkUnconnected.spi' + , connectors = ( 'D1', 'D2', 'S', 'B' ) + , layouts = ( ('Horizontal M2' , 'coriolis.oroshi.CCP_horizontalM2.py' ) + , ('Symmetrical' , 'coriolis.oroshi.CCP_symmetrical.py' ) + , ('Common centroid', 'coriolis.oroshi.CCP_2DCommonCentroid.py') + , ('Interdigitated' , 'coriolis.oroshi.CCP_interdigitated.py' ) + ) + ) +addDevice( name = 'CommonSourcePairBulkConnected' + , spice = spiceDir+'CommonSourcePairBulkConnected.spi' + , connectors = ( 'D1', 'D2', 'S', 'G' ) + , layouts = ( ('Horizontal M2' , 'coriolis.oroshi.CSP_horizontalM2.py' ) + , ('Symmetrical' , 'coriolis.oroshi.CSP_symmetrical.py' ) + , ('Interdigitated' , 'coriolis.oroshi.CSP_interdigitated.py' ) + , ('WIP CSP' , 'coriolis.oroshi.wip_csp.py' ) + ) + ) +addDevice( name = 'CommonSourcePairBulkUnconnected' + , spice = spiceDir+'CommonSourcePairBulkUnconnected.spi' + , connectors = ( 'D1', 'D2', 'S', 'G', 'B' ) + , layouts = ( ('Horizontal M2' , 'coriolis.oroshi.CSP_horizontalM2.py' ) + , ('Symmetrical' , 'coriolis.oroshi.CSP_symmetrical.py' ) + , ('Interdigitated' , 'coriolis.oroshi.CSP_interdigitated.py' ) + , ('WIP CSP' , 'coriolis.oroshi.wip_csp.py' ) + ) + ) +addDevice( name = 'SimpleCurrentMirrorBulkConnected' + , spice = spiceDir+'CurrMirBulkConnected.spi' + , connectors = ( 'D1', 'D2', 'S' ) + , layouts = ( ('Horizontal M2' , 'coriolis.oroshi.SCM_horizontalM2.py' ) + , ('Symmetrical' , 'coriolis.oroshi.SCM_symmetrical.py' ) + , ('Common centroid', 'coriolis.oroshi.SCM_2DCommonCentroid.py') + , ('Interdigitated' , 'coriolis.oroshi.SCM_interdigitated.py' ) + ) + ) +addDevice( name = 'SimpleCurrentMirrorBulkUnconnected' + , spice = spiceDir+'CurrMirBulkUnconnected.spi' + , connectors = ( 'D1', 'D2', 'S', 'B' ) + , layouts = ( ('Horizontal M2' , 'coriolis.oroshi.SCM_horizontalM2.py' ) + , ('Symmetrical' , 'coriolis.oroshi.SCM_symmetrical.py' ) + , ('Common centroid', 'coriolis.oroshi.SCM_2DCommonCentroid.py') + , ('Interdigitated' , 'coriolis.oroshi.SCM_interdigitated.py' ) + ) + ) +addDevice( name = 'MultiCapacitor' + #, spice = spiceDir+'MIM_OneCapacitor.spi' + #, connectors = ( 'T1', 'B1' ) + , layouts = ( ('Matrix', 'coriolis.oroshi.capacitormatrix.py' ), + ) + ) +addDevice( name = 'Resistor' + #, spice = spiceDir+'MIM_OneCapacitor.spi' + , connectors = ( 'PIN1', 'PIN2' ) + , layouts = ( ('Snake', 'coriolis.oroshi.resistorsnake.py' ), + ) + ) + diff --git a/crlcore/etc/node180/scn6m_deep_09/display.py b/crlcore/python/technos/node180/scn6m_deep_09/display.py similarity index 71% rename from crlcore/etc/node180/scn6m_deep_09/display.py rename to crlcore/python/technos/node180/scn6m_deep_09/display.py index a17e9dcb..de7cb595 100644 --- a/crlcore/etc/node180/scn6m_deep_09/display.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/display.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,9 +13,10 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -import common.display +from ...common import display -common.display.createStyles( scale=0.5 ) +display.createStyles( scale=0.5 ) diff --git a/crlcore/etc/node180/scn6m_deep_09/dtr_scn6m_deep_09.py b/crlcore/python/technos/node180/scn6m_deep_09/dtr_scn6m_deep_09.py similarity index 97% rename from crlcore/etc/node180/scn6m_deep_09/dtr_scn6m_deep_09.py rename to crlcore/python/technos/node180/scn6m_deep_09/dtr_scn6m_deep_09.py index 37c3d318..7503271c 100644 --- a/crlcore/etc/node180/scn6m_deep_09/dtr_scn6m_deep_09.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/dtr_scn6m_deep_09.py @@ -8,14 +8,12 @@ # # Used revision 8.00 of May 11, 2009. -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -from Hurricane import DbU -from helpers.analogtechno import Length -from helpers.analogtechno import Area -from helpers.analogtechno import Asymmetric -from helpers.analogtechno import loadAnalogTechno +from coriolis.Hurricane import DbU +from coriolis.helpers.analogtechno import Length, Area, Asymmetric, loadAnalogTechno analogTechnologyTable = \ diff --git a/crlcore/etc/node180/scn6m_deep_09/etesian.py b/crlcore/python/technos/node180/scn6m_deep_09/etesian.py similarity index 74% rename from crlcore/etc/node180/scn6m_deep_09/etesian.py rename to crlcore/python/technos/node180/scn6m_deep_09/etesian.py index b293d47f..7efc7820 100644 --- a/crlcore/etc/node180/scn6m_deep_09/etesian.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/etesian.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -import common.etesian +from ...common import etesian diff --git a/crlcore/etc/node180/scn6m_deep_09/kite.py b/crlcore/python/technos/node180/scn6m_deep_09/kite.py similarity index 97% rename from crlcore/etc/node180/scn6m_deep_09/kite.py rename to crlcore/python/technos/node180/scn6m_deep_09/kite.py index 358f4529..03014d96 100644 --- a/crlcore/etc/node180/scn6m_deep_09/kite.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/kite.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,17 +13,16 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -from Hurricane import DataBase -from CRL import AllianceFramework -from CRL import RoutingGauge -from CRL import RoutingLayerGauge -from CRL import CellGauge -from helpers import l, n, u -import common.kite +from coriolis.Hurricane import DataBase +from coriolis.CRL import AllianceFramework, RoutingGauge, \ + RoutingLayerGauge, CellGauge + +from ...common import kite p = Cfg.getParamDouble ( 'lefImport.minTerminalWidth' ).setDouble ( 0.0 ) diff --git a/crlcore/etc/node180/scn6m_deep_09/misc.py b/crlcore/python/technos/node180/scn6m_deep_09/misc.py similarity index 74% rename from crlcore/etc/node180/scn6m_deep_09/misc.py rename to crlcore/python/technos/node180/scn6m_deep_09/misc.py index e283a180..d1a51c36 100644 --- a/crlcore/etc/node180/scn6m_deep_09/misc.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/misc.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -import common.misc +from ...common import misc diff --git a/crlcore/etc/node180/scn6m_deep_09/patterns.py b/crlcore/python/technos/node180/scn6m_deep_09/patterns.py similarity index 74% rename from crlcore/etc/node180/scn6m_deep_09/patterns.py rename to crlcore/python/technos/node180/scn6m_deep_09/patterns.py index 55de360c..db074638 100644 --- a/crlcore/etc/node180/scn6m_deep_09/patterns.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/patterns.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -import common.patterns +from ...common import patterns diff --git a/crlcore/etc/node180/scn6m_deep_09/plugins.py b/crlcore/python/technos/node180/scn6m_deep_09/plugins.py similarity index 85% rename from crlcore/etc/node180/scn6m_deep_09/plugins.py rename to crlcore/python/technos/node180/scn6m_deep_09/plugins.py index e1f04729..b4e14cb6 100644 --- a/crlcore/etc/node180/scn6m_deep_09/plugins.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/plugins.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne University 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,11 +13,10 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) - -from helpers import l, u, n +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) Cfg.getParamInt ( "chip.block.rails.count" ).setInt ( 5 ) Cfg.getParamInt ( "chip.block.rails.hWidth" ).setInt ( l( 24) ) diff --git a/crlcore/etc/node180/scn6m_deep_09/stratus1.py b/crlcore/python/technos/node180/scn6m_deep_09/stratus1.py similarity index 75% rename from crlcore/etc/node180/scn6m_deep_09/stratus1.py rename to crlcore/python/technos/node180/scn6m_deep_09/stratus1.py index fec2ddba..d0cf5099 100644 --- a/crlcore/etc/node180/scn6m_deep_09/stratus1.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/stratus1.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Universié 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,11 +13,12 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -import common.stratus1 +from ...common import stratus1 Cfg.getParamString( "stratus1.format" ).setString( "vst" ) Cfg.getParamString( "stratus1.simulator" ).setString( "asimut" ) diff --git a/crlcore/etc/node180/scn6m_deep_09/technology.py b/crlcore/python/technos/node180/scn6m_deep_09/technology.py similarity index 96% rename from crlcore/etc/node180/scn6m_deep_09/technology.py rename to crlcore/python/technos/node180/scn6m_deep_09/technology.py index 4bce45ef..b3aad484 100644 --- a/crlcore/etc/node180/scn6m_deep_09/technology.py +++ b/crlcore/python/technos/node180/scn6m_deep_09/technology.py @@ -13,12 +13,11 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) -from helpers import l, u, n -from Hurricane import DbU -from Hurricane import DataBase -from Hurricane import Technology +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) + +from coriolis.Hurricane import DbU, DataBase, Technology tech = DataBase.getDB().getTechnology() if tech: @@ -32,8 +31,8 @@ DbU.setGridsPerLambda ( 18 ) DbU.setSymbolicSnapGridStep( DbU.fromLambda( 1.0) ) DbU.setPolygonStep ( DbU.fromGrid ( 9.0) ) -import common -from common.technology import * +from ...common import loadGdsLayers +from ...common.technology import * # Redefine all size from the "cmos" common part. NWELL.setExtentionCap( nWell, l(4.0) ) @@ -225,4 +224,4 @@ gdsLayersTable = \ ] -common.loadGdsLayers( gdsLayersTable ) +loadGdsLayers( gdsLayersTable ) diff --git a/crlcore/etc/symbolic/__init__.py b/crlcore/python/technos/node45/__init__.py similarity index 100% rename from crlcore/etc/symbolic/__init__.py rename to crlcore/python/technos/node45/__init__.py diff --git a/crlcore/etc/node45/freepdk45/__init__.py b/crlcore/python/technos/node45/freepdk45/__init__.py similarity index 54% rename from crlcore/etc/node45/freepdk45/__init__.py rename to crlcore/python/technos/node45/freepdk45/__init__.py index d02344fa..dca470c5 100644 --- a/crlcore/etc/node45/freepdk45/__init__.py +++ b/crlcore/python/technos/node45/freepdk45/__init__.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,30 +13,31 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 1, ' o Loading "node45.freepdk45" technology.' ) -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, tagConfModules +from coriolis.helpers.io import vprint +vprint( 1, ' o Loading "node45.freepdk45" technology.' ) +vprint( 2, ' - "%s".' % truncPath(__file__) ) -from Hurricane import DataBase -from CRL import System +from coriolis.Hurricane import DataBase +from coriolis.CRL import System Cfg.Configuration.pushDefaultPriority( Cfg.Parameter.Priority.ConfigurationFile ) DataBase.create() System.get() -import node45.freepdk45.misc -import node45.freepdk45.technology -import node45.freepdk45.display -import node45.freepdk45.analog -import node45.freepdk45.alliance -import node45.freepdk45.etesian -import node45.freepdk45.kite -import node45.freepdk45.plugins -import node45.freepdk45.stratus1 -import node45.freepdk45.devices +from .freepdk45 import misc +from .freepdk45 import technology +from .freepdk45 import display +from .freepdk45 import analog +from .freepdk45 import alliance +from .freepdk45 import etesian +from .freepdk45 import kite +from .freepdk45 import plugins +from .freepdk45 import stratus1 +from .freepdk45 import devices Cfg.Configuration.popDefaultPriority() -helpers.tagConfModules() +tagConfModules() diff --git a/crlcore/etc/node45/freepdk45/alliance.py b/crlcore/python/technos/node45/freepdk45/alliance.py similarity index 85% rename from crlcore/etc/node45/freepdk45/alliance.py rename to crlcore/python/technos/node45/freepdk45/alliance.py index 96823b0b..314d4c47 100644 --- a/crlcore/etc/node45/freepdk45/alliance.py +++ b/crlcore/python/technos/node45/freepdk45/alliance.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2020, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,13 +13,13 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) import os import os.path -from CRL import Environment -from CRL import AllianceFramework +from coriolis.CRL import Environment, AllianceFramework allianceTop = None diff --git a/crlcore/etc/node45/freepdk45/analog.py b/crlcore/python/technos/node45/freepdk45/analog.py similarity index 74% rename from crlcore/etc/node45/freepdk45/analog.py rename to crlcore/python/technos/node45/freepdk45/analog.py index 83b2d1fa..06da27bb 100644 --- a/crlcore/etc/node45/freepdk45/analog.py +++ b/crlcore/python/technos/node45/freepdk45/analog.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2020, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -#import common.analog +#from ...common import analog diff --git a/crlcore/etc/node45/freepdk45/devices.py b/crlcore/python/technos/node45/freepdk45/devices.py similarity index 95% rename from crlcore/etc/node45/freepdk45/devices.py rename to crlcore/python/technos/node45/freepdk45/devices.py index 9926656b..3d66c916 100644 --- a/crlcore/etc/node45/freepdk45/devices.py +++ b/crlcore/python/technos/node45/freepdk45/devices.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2020, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,14 +13,15 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath, sysConfDir +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.devices -from common.devices import addDevice +from ...common import devices +from ...common.devices import addDevice -chamsDir = helpers.sysConfDir + '/share/coriolis2/' +chamsDir = sysConfDir + '/share/coriolis2/' spiceDir = chamsDir + 'spice/' diff --git a/crlcore/etc/node45/freepdk45/display.py b/crlcore/python/technos/node45/freepdk45/display.py similarity index 71% rename from crlcore/etc/node45/freepdk45/display.py rename to crlcore/python/technos/node45/freepdk45/display.py index 4843a1ef..57c33a53 100644 --- a/crlcore/etc/node45/freepdk45/display.py +++ b/crlcore/python/technos/node45/freepdk45/display.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2020, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,10 +13,10 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.display +from ...common import display - -common.display.createStyles( scale=0.5 ) +display.createStyles( scale=0.5 ) diff --git a/crlcore/etc/node45/freepdk45/etesian.py b/crlcore/python/technos/node45/freepdk45/etesian.py similarity index 74% rename from crlcore/etc/node45/freepdk45/etesian.py rename to crlcore/python/technos/node45/freepdk45/etesian.py index b8197ff0..af424b99 100644 --- a/crlcore/etc/node45/freepdk45/etesian.py +++ b/crlcore/python/technos/node45/freepdk45/etesian.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.etesian +from ...common import etesian diff --git a/crlcore/etc/node45/freepdk45/kite.py b/crlcore/python/technos/node45/freepdk45/kite.py similarity index 97% rename from crlcore/etc/node45/freepdk45/kite.py rename to crlcore/python/technos/node45/freepdk45/kite.py index fff00d91..bf2ca604 100644 --- a/crlcore/etc/node45/freepdk45/kite.py +++ b/crlcore/python/technos/node45/freepdk45/kite.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,17 +13,15 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +import coriolis.Cgf as Cfg +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -from Hurricane import DataBase -from CRL import AllianceFramework -from CRL import RoutingGauge -from CRL import RoutingLayerGauge -from CRL import CellGauge -from helpers import l, n, u -import common.kite +from coriolis.Hurricane import DataBase +from coriolis.CRL import AllianceFramework, RoutingGauge, \ + RoutingLayerGauge, CellGauge +from ...common import kite p = Cfg.getParamDouble ( 'lefImport.minTerminalWidth' ).setDouble ( 0.0 ) diff --git a/crlcore/etc/node45/freepdk45/misc.py b/crlcore/python/technos/node45/freepdk45/misc.py similarity index 74% rename from crlcore/etc/node45/freepdk45/misc.py rename to crlcore/python/technos/node45/freepdk45/misc.py index 155a4762..fea3dd1a 100644 --- a/crlcore/etc/node45/freepdk45/misc.py +++ b/crlcore/python/technos/node45/freepdk45/misc.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.misc +from ...common import misc diff --git a/crlcore/etc/node45/freepdk45/patterns.py b/crlcore/python/technos/node45/freepdk45/patterns.py similarity index 74% rename from crlcore/etc/node45/freepdk45/patterns.py rename to crlcore/python/technos/node45/freepdk45/patterns.py index a70984b2..c555278e 100644 --- a/crlcore/etc/node45/freepdk45/patterns.py +++ b/crlcore/python/technos/node45/freepdk45/patterns.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.patterns +from ...common import patterns diff --git a/crlcore/etc/node45/freepdk45/plugins.py b/crlcore/python/technos/node45/freepdk45/plugins.py similarity index 85% rename from crlcore/etc/node45/freepdk45/plugins.py rename to crlcore/python/technos/node45/freepdk45/plugins.py index 598c14c6..90b4aec2 100644 --- a/crlcore/etc/node45/freepdk45/plugins.py +++ b/crlcore/python/technos/node45/freepdk45/plugins.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,11 +13,10 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) - -from helpers import l, u, n +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) Cfg.getParamInt ( "chip.block.rails.count" ).setInt ( 5 ) Cfg.getParamInt ( "chip.block.rails.hWidth" ).setInt ( l( 24) ) diff --git a/crlcore/etc/node45/freepdk45/stratus1.py b/crlcore/python/technos/node45/freepdk45/stratus1.py similarity index 75% rename from crlcore/etc/node45/freepdk45/stratus1.py rename to crlcore/python/technos/node45/freepdk45/stratus1.py index d7c124b9..f51bbde3 100644 --- a/crlcore/etc/node45/freepdk45/stratus1.py +++ b/crlcore/python/technos/node45/freepdk45/stratus1.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,11 +13,12 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.stratus1 +from ...common import stratus1 Cfg.getParamString( "stratus1.format" ).setString( "vst" ) diff --git a/crlcore/etc/node45/freepdk45/technology.py b/crlcore/python/technos/node45/freepdk45/technology.py similarity index 97% rename from crlcore/etc/node45/freepdk45/technology.py rename to crlcore/python/technos/node45/freepdk45/technology.py index 549cd7ef..7c2fb78d 100644 --- a/crlcore/etc/node45/freepdk45/technology.py +++ b/crlcore/python/technos/node45/freepdk45/technology.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,13 +13,11 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -from helpers import l, u, n -from Hurricane import DbU -from Hurricane import DataBase -from Hurricane import Technology +from coriolis.Hurricane import DbU, DataBase, Technology def setEnclosures ( layer, subLayer, enclosures ): @@ -47,8 +45,8 @@ DbU.setSymbolicSnapGridStep( DbU.fromLambda( 1.0) ) DbU.setPolygonStep ( DbU.fromGrid ( 1.0) ) -import common -from common.technology import * +from ..common import loadGdsLayers +from ..common.technology import * # Rules for real layers. metal1 .setMinimalSpacing( u( 0.065) ) diff --git a/cumulus/src/plugins/alpha/__init__.py b/crlcore/python/technos/node600/__init__.py similarity index 100% rename from cumulus/src/plugins/alpha/__init__.py rename to crlcore/python/technos/node600/__init__.py diff --git a/crlcore/etc/node600/phenitec/__init__.py b/crlcore/python/technos/node600/phenitec/__init__.py similarity index 55% rename from crlcore/etc/node600/phenitec/__init__.py rename to crlcore/python/technos/node600/phenitec/__init__.py index de569860..69d52b7b 100644 --- a/crlcore/etc/node600/phenitec/__init__.py +++ b/crlcore/python/technos/node600/phenitec/__init__.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,30 +13,31 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 1, ' o Loading "node600/phenitec" technology.' ) -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, tagConfModules +from coriolis.helpers.io import vprint +vprint( 1, ' o Loading "node600/phenitec" technology.' ) +vprint( 2, ' - "%s".' % truncPath(__file__) ) -from Hurricane import DataBase -from CRL import System +from coriolis.Hurricane import DataBase +from coriolis.CRL import System Cfg.Configuration.pushDefaultPriority( Cfg.Parameter.Priority.ConfigurationFile ) if not DataBase.getDB(): DataBase.create() System.get() -import node600.phenitec.misc -import node600.phenitec.technology -import node600.phenitec.display -import node600.phenitec.analog -import node600.phenitec.alliance -import node600.phenitec.etesian -import node600.phenitec.kite -import node600.phenitec.plugins -import node600.phenitec.stratus1 -import node600.phenitec.devices +from .phenitec import misc +from .phenitec import technology +from .phenitec import display +from .phenitec import analog +from .phenitec import alliance +from .phenitec import etesian +from .phenitec import kite +from .phenitec import plugins +from .phenitec import stratus1 +from .phenitec import devices Cfg.Configuration.popDefaultPriority() -helpers.tagConfModules() +tagConfModules() diff --git a/crlcore/etc/node600/phenitec/alliance.py b/crlcore/python/technos/node600/phenitec/alliance.py similarity index 87% rename from crlcore/etc/node600/phenitec/alliance.py rename to crlcore/python/technos/node600/phenitec/alliance.py index 56742d99..75c53985 100644 --- a/crlcore/etc/node600/phenitec/alliance.py +++ b/crlcore/python/technos/node600/phenitec/alliance.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,13 +13,13 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) import os import os.path -from CRL import Environment -from CRL import AllianceFramework +from coriolis.CRL import Environment, AllianceFramework allianceTop = None diff --git a/crlcore/etc/node600/phenitec/analog.py b/crlcore/python/technos/node600/phenitec/analog.py similarity index 74% rename from crlcore/etc/node600/phenitec/analog.py rename to crlcore/python/technos/node600/phenitec/analog.py index b6b4aa78..7a0368a9 100644 --- a/crlcore/etc/node600/phenitec/analog.py +++ b/crlcore/python/technos/node600/phenitec/analog.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -#import common.analog +#from ...common import analog diff --git a/crlcore/etc/node600/phenitec/devices.py b/crlcore/python/technos/node600/phenitec/devices.py similarity index 95% rename from crlcore/etc/node600/phenitec/devices.py rename to crlcore/python/technos/node600/phenitec/devices.py index bf902acd..3e30b427 100644 --- a/crlcore/etc/node600/phenitec/devices.py +++ b/crlcore/python/technos/node600/phenitec/devices.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,14 +13,15 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath, sysConfDir +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.devices -from common.devices import addDevice +from ...common import devices +from ...common.devices import addDevice -chamsDir = helpers.sysConfDir + '/share/coriolis2/' +chamsDir = sysConfDir + '/share/coriolis2/' spiceDir = chamsDir + 'spice/' diff --git a/crlcore/etc/node600/phenitec/display.py b/crlcore/python/technos/node600/phenitec/display.py similarity index 71% rename from crlcore/etc/node600/phenitec/display.py rename to crlcore/python/technos/node600/phenitec/display.py index d1ebabe0..56c6332b 100644 --- a/crlcore/etc/node600/phenitec/display.py +++ b/crlcore/python/technos/node600/phenitec/display.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,10 +13,10 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.display +from ...common import display - -common.display.createStyles( scale=0.5 ) +display.createStyles( scale=0.5 ) diff --git a/crlcore/etc/node600/phenitec/etesian.py b/crlcore/python/technos/node600/phenitec/etesian.py similarity index 74% rename from crlcore/etc/node600/phenitec/etesian.py rename to crlcore/python/technos/node600/phenitec/etesian.py index 291ada86..7023d51e 100644 --- a/crlcore/etc/node600/phenitec/etesian.py +++ b/crlcore/python/technos/node600/phenitec/etesian.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.etesian +from ...common import etesian diff --git a/crlcore/etc/node600/phenitec/kite.py b/crlcore/python/technos/node600/phenitec/kite.py similarity index 97% rename from crlcore/etc/node600/phenitec/kite.py rename to crlcore/python/technos/node600/phenitec/kite.py index 3bb0cc89..519ab350 100644 --- a/crlcore/etc/node600/phenitec/kite.py +++ b/crlcore/python/technos/node600/phenitec/kite.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,17 +13,15 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -from Hurricane import DataBase -from CRL import AllianceFramework -from CRL import RoutingGauge -from CRL import RoutingLayerGauge -from CRL import CellGauge -from helpers import l, n, u -import common.kite +from coriolis.Hurricane import DataBase +from coriolis.CRL import AllianceFramework, RoutingGauge, \ + RoutingLayerGauge, CellGauge +from ...common import kite p = Cfg.getParamDouble ( 'lefImport.minTerminalWidth' ).setDouble ( 0.0 ) diff --git a/crlcore/etc/node600/phenitec/misc.py b/crlcore/python/technos/node600/phenitec/misc.py similarity index 74% rename from crlcore/etc/node600/phenitec/misc.py rename to crlcore/python/technos/node600/phenitec/misc.py index 160f5537..cb2c37a5 100644 --- a/crlcore/etc/node600/phenitec/misc.py +++ b/crlcore/python/technos/node600/phenitec/misc.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.misc +from ...common import misc diff --git a/crlcore/etc/node600/phenitec/patterns.py b/crlcore/python/technos/node600/phenitec/patterns.py similarity index 74% rename from crlcore/etc/node600/phenitec/patterns.py rename to crlcore/python/technos/node600/phenitec/patterns.py index 2a0006a5..a4dcfaa5 100644 --- a/crlcore/etc/node600/phenitec/patterns.py +++ b/crlcore/python/technos/node600/phenitec/patterns.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.patterns +from ...common import patterns diff --git a/crlcore/etc/node600/phenitec/plugins.py b/crlcore/python/technos/node600/phenitec/plugins.py similarity index 85% rename from crlcore/etc/node600/phenitec/plugins.py rename to crlcore/python/technos/node600/phenitec/plugins.py index 66784a0d..ecedd4e0 100644 --- a/crlcore/etc/node600/phenitec/plugins.py +++ b/crlcore/python/technos/node600/phenitec/plugins.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,11 +13,10 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) - -from helpers import l, u, n +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) Cfg.getParamInt ( "chip.block.rails.count" ).setInt ( 5 ) Cfg.getParamInt ( "chip.block.rails.hWidth" ).setInt ( l( 24) ) diff --git a/crlcore/etc/node600/phenitec/stratus1.py b/crlcore/python/technos/node600/phenitec/stratus1.py similarity index 75% rename from crlcore/etc/node600/phenitec/stratus1.py rename to crlcore/python/technos/node600/phenitec/stratus1.py index 51f37e37..c3b33454 100644 --- a/crlcore/etc/node600/phenitec/stratus1.py +++ b/crlcore/python/technos/node600/phenitec/stratus1.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,11 +13,12 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.stratus1 +from ...common import stratus1 Cfg.getParamString( "stratus1.format" ).setString( "vst" ) diff --git a/crlcore/etc/node600/phenitec/technology.py b/crlcore/python/technos/node600/phenitec/technology.py similarity index 95% rename from crlcore/etc/node600/phenitec/technology.py rename to crlcore/python/technos/node600/phenitec/technology.py index 10d0f68a..83098a90 100644 --- a/crlcore/etc/node600/phenitec/technology.py +++ b/crlcore/python/technos/node600/phenitec/technology.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,14 +13,11 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) - -from helpers import l, u, n -from Hurricane import DbU -from Hurricane import DataBase -from Hurricane import Technology +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) +from coriolis.Hurricane import DbU, DataBase, Technology tech = DataBase.getDB().getTechnology() if tech: @@ -35,8 +32,8 @@ DbU.setSymbolicSnapGridStep( DbU.fromLambda( 1.0) ) DbU.setPolygonStep ( DbU.fromGrid ( 150.0) ) -import common -from common.technology import * +from ...common import loadGdsLayers +from ...common.technology import * # Redefine all size from the "cmos" common part. NWELL.setExtentionCap( nWell, l(4.0) ) diff --git a/cumulus/src/plugins/alpha/block/__init__.py b/crlcore/python/technos/symbolic/__init__.py similarity index 100% rename from cumulus/src/plugins/alpha/block/__init__.py rename to crlcore/python/technos/symbolic/__init__.py diff --git a/crlcore/etc/symbolic/cmos/__init__.py b/crlcore/python/technos/symbolic/cmos/__init__.py similarity index 59% rename from crlcore/etc/symbolic/cmos/__init__.py rename to crlcore/python/technos/symbolic/cmos/__init__.py index 4cb5139a..259d36f7 100644 --- a/crlcore/etc/symbolic/cmos/__init__.py +++ b/crlcore/python/technos/symbolic/cmos/__init__.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,30 +13,30 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers -import helpers.io -helpers.io.vprint( 1, ' o Loading "symbolic.cmos" technology.' ) -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, tagConfModules +from coriolis.helpers.io import vprint +vprint( 1, ' o Loading "symbolic.cmos" technology.' ) +vprint( 2, ' - "%s".' % truncPath(__file__) ) -from Hurricane import DataBase -from CRL import System +from coriolis.Hurricane import DataBase +from coriolis.CRL import System Cfg.Configuration.pushDefaultPriority( Cfg.Parameter.Priority.ConfigurationFile ) if not DataBase.getDB(): DataBase.create() System.get() -import symbolic.cmos.misc -import symbolic.cmos.technology -import symbolic.cmos.display -import symbolic.cmos.analog -import symbolic.cmos.alliance -import symbolic.cmos.etesian -import symbolic.cmos.kite -import symbolic.cmos.plugins -import symbolic.cmos.stratus1 +from . import misc +from . import technology +from . import display +from . import analog +from . import alliance +from . import etesian +from . import kite +from . import plugins +from . import stratus1 Cfg.Configuration.popDefaultPriority() -helpers.tagConfModules() +tagConfModules() diff --git a/crlcore/etc/symbolic/cmos/alliance.py b/crlcore/python/technos/symbolic/cmos/alliance.py similarity index 88% rename from crlcore/etc/symbolic/cmos/alliance.py rename to crlcore/python/technos/symbolic/cmos/alliance.py index 1024ab15..c5925e4c 100644 --- a/crlcore/etc/symbolic/cmos/alliance.py +++ b/crlcore/python/technos/symbolic/cmos/alliance.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -15,11 +15,11 @@ import os import os.path -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -from CRL import Environment -from CRL import AllianceFramework +from coriolis.CRL import Environment, AllianceFramework allianceTop = None if 'ALLIANCE_TOP' in os.environ: diff --git a/crlcore/etc/symbolic/cmos/analog.py b/crlcore/python/technos/symbolic/cmos/analog.py similarity index 74% rename from crlcore/etc/symbolic/cmos/analog.py rename to crlcore/python/technos/symbolic/cmos/analog.py index 014f0a12..7e729487 100644 --- a/crlcore/etc/symbolic/cmos/analog.py +++ b/crlcore/python/technos/symbolic/cmos/analog.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.analog +from ...common import analog diff --git a/crlcore/etc/symbolic/cmos/display.py b/crlcore/python/technos/symbolic/cmos/display.py similarity index 72% rename from crlcore/etc/symbolic/cmos/display.py rename to crlcore/python/technos/symbolic/cmos/display.py index 6ef503fc..86d9f40e 100644 --- a/crlcore/etc/symbolic/cmos/display.py +++ b/crlcore/python/technos/symbolic/cmos/display.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,10 +13,10 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.display +from ...common import display - -common.display.createStyles( scale=1.0 ) +display.createStyles( scale=1.0 ) diff --git a/crlcore/etc/symbolic/cmos/etesian.py b/crlcore/python/technos/symbolic/cmos/etesian.py similarity index 74% rename from crlcore/etc/symbolic/cmos/etesian.py rename to crlcore/python/technos/symbolic/cmos/etesian.py index dd83ba02..c9efe220 100644 --- a/crlcore/etc/symbolic/cmos/etesian.py +++ b/crlcore/python/technos/symbolic/cmos/etesian.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.etesian +from ...common import etesian diff --git a/crlcore/etc/symbolic/cmos/kite.py b/crlcore/python/technos/symbolic/cmos/kite.py similarity index 96% rename from crlcore/etc/symbolic/cmos/kite.py rename to crlcore/python/technos/symbolic/cmos/kite.py index 9530e586..9eaafc6b 100644 --- a/crlcore/etc/symbolic/cmos/kite.py +++ b/crlcore/python/technos/symbolic/cmos/kite.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,18 +13,15 @@ # +-----------------------------------------------------------------+ -import Cfg -from Hurricane import DataBase -from CRL import AllianceFramework -from CRL import RoutingGauge -from CRL import RoutingLayerGauge -from CRL import CellGauge -import helpers -from helpers import l, n, u -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +import coriolis.Cfg as Cfg +from coriolis.Hurricane import DataBase +from coriolis.CRL import AllianceFramework, RoutingGauge, \ + RoutingLayerGauge, CellGauge +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.kite +from ...common import kite p = Cfg.getParamDouble ( 'lefImport.minTerminalWidth' ).setDouble ( 0.0 ) diff --git a/crlcore/etc/symbolic/cmos/misc.py b/crlcore/python/technos/symbolic/cmos/misc.py similarity index 75% rename from crlcore/etc/symbolic/cmos/misc.py rename to crlcore/python/technos/symbolic/cmos/misc.py index 8e8f4e72..9570d88f 100644 --- a/crlcore/etc/symbolic/cmos/misc.py +++ b/crlcore/python/technos/symbolic/cmos/misc.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.misc +from ...common import misc diff --git a/crlcore/etc/symbolic/cmos/patterns.py b/crlcore/python/technos/symbolic/cmos/patterns.py similarity index 74% rename from crlcore/etc/symbolic/cmos/patterns.py rename to crlcore/python/technos/symbolic/cmos/patterns.py index 76337ced..b8a965ad 100644 --- a/crlcore/etc/symbolic/cmos/patterns.py +++ b/crlcore/python/technos/symbolic/cmos/patterns.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.patterns +from ...common import patterns diff --git a/crlcore/etc/symbolic/cmos/plugins.py b/crlcore/python/technos/symbolic/cmos/plugins.py similarity index 86% rename from crlcore/etc/symbolic/cmos/plugins.py rename to crlcore/python/technos/symbolic/cmos/plugins.py index ff730987..0f1c1249 100644 --- a/crlcore/etc/symbolic/cmos/plugins.py +++ b/crlcore/python/technos/symbolic/cmos/plugins.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,11 +13,10 @@ # +-----------------------------------------------------------------+ -import Cfg -from helpers import l, u, n -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) - +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) Cfg.getParamInt ( "chip.block.rails.count" ).setInt ( 5 ) Cfg.getParamInt ( "chip.block.rails.hWidth" ).setInt ( l( 12) ) @@ -31,4 +30,3 @@ Cfg.getParamString( 'clockTree.placerEngine' ).setString( 'Etesian') Cfg.getParamInt ( 'block.spareSide' ).setInt ( 10 ) Cfg.getParamString( 'spares.buffer' ).setString( 'buf_x8') Cfg.getParamInt ( 'spares.maxSinks' ).setInt ( 31 ) - diff --git a/crlcore/etc/symbolic/cmos/stratus1.py b/crlcore/python/technos/symbolic/cmos/stratus1.py similarity index 73% rename from crlcore/etc/symbolic/cmos/stratus1.py rename to crlcore/python/technos/symbolic/cmos/stratus1.py index e27d8903..edf05a39 100644 --- a/crlcore/etc/symbolic/cmos/stratus1.py +++ b/crlcore/python/technos/symbolic/cmos/stratus1.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -14,14 +14,13 @@ import os.path -import Cfg -import helpers -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) - -import common.stratus1 +import coriolis.Cfg as Cfg +from coriolis.helpers import sysConfDir, truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) +from ...common import stratus1 Cfg.getParamString( "stratus1.format" ).setString( "vst" ) Cfg.getParamString( "stratus1.simulator" ).setString( "asimut" ) -Cfg.getParamString( "stratus1.mappingName" ).setString( os.path.join(helpers.sysConfDir,'symbolic/cmos/stratus2sxlib.xml') ) +Cfg.getParamString( "stratus1.mappingName" ).setString( os.path.join(sysConfDir,'symbolic/cmos/stratus2sxlib.xml') ) diff --git a/crlcore/etc/symbolic/cmos/stratus2sxlib.xml b/crlcore/python/technos/symbolic/cmos/stratus2sxlib.xml similarity index 100% rename from crlcore/etc/symbolic/cmos/stratus2sxlib.xml rename to crlcore/python/technos/symbolic/cmos/stratus2sxlib.xml diff --git a/crlcore/etc/symbolic/cmos/technology.py b/crlcore/python/technos/symbolic/cmos/technology.py similarity index 82% rename from crlcore/etc/symbolic/cmos/technology.py rename to crlcore/python/technos/symbolic/cmos/technology.py index 93160fde..67bd619d 100644 --- a/crlcore/etc/symbolic/cmos/technology.py +++ b/crlcore/python/technos/symbolic/cmos/technology.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,14 +13,11 @@ # +-----------------------------------------------------------------+ -from helpers import l, u, n -from helpers.io import WarningMessage -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import l, u, n, truncPath +from coriolis.helpers.io import WarningMessage, vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -from Hurricane import DbU -from Hurricane import DataBase -from Hurricane import Technology +from coriolis.Hurricane import DbU, DataBase, Technology tech = DataBase.getDB().getTechnology() @@ -36,7 +33,7 @@ DbU.setSymbolicSnapGridStep( DbU.fromLambda(1.0) ) DbU.setPolygonStep ( DbU.fromGrid (2.0) ) -import common.technology +from ...common import technology, loadGdsLayers gdsLayersTable = \ @@ -60,4 +57,4 @@ gdsLayersTable = \ ] -common.loadGdsLayers( gdsLayersTable ) +loadGdsLayers( gdsLayersTable ) diff --git a/crlcore/etc/symbolic/cmos45/__init__.py b/crlcore/python/technos/symbolic/cmos45/__init__.py similarity index 58% rename from crlcore/etc/symbolic/cmos45/__init__.py rename to crlcore/python/technos/symbolic/cmos45/__init__.py index 7d038c3d..76a12daf 100644 --- a/crlcore/etc/symbolic/cmos45/__init__.py +++ b/crlcore/python/technos/symbolic/cmos45/__init__.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,29 +13,30 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 1, ' o Loading "symbolic.cmos45" technology.' ) -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, tagConfModules +from coriolis.helpers.io import vprint +vprint( 1, ' o Loading "symbolic.cmos45" technology.' ) +vprint( 2, ' - "%s".' % truncPath(__file__) ) -from Hurricane import DataBase -from CRL import System +from coriolis.Hurricane import DataBase +from coriolis.CRL import System Cfg.Configuration.pushDefaultPriority( Cfg.Parameter.Priority.ConfigurationFile ) DataBase.create() System.get() -import symbolic.cmos45.misc -import symbolic.cmos45.technology -import symbolic.cmos45.display -import symbolic.cmos45.analog -import symbolic.cmos45.alliance -import symbolic.cmos45.etesian -import symbolic.cmos45.kite -import symbolic.cmos45.plugins -import symbolic.cmos45.stratus1 +from . import misc +from . import technology +from . import display +from . import analog +from . import alliance +from . import etesian +from . import kite +from . import plugins +from . import stratus1 Cfg.Configuration.popDefaultPriority() -helpers.tagConfModules() +tagConfModules() diff --git a/crlcore/etc/symbolic/cmos45/alliance.py b/crlcore/python/technos/symbolic/cmos45/alliance.py similarity index 85% rename from crlcore/etc/symbolic/cmos45/alliance.py rename to crlcore/python/technos/symbolic/cmos45/alliance.py index 5f89e95a..0017a0df 100644 --- a/crlcore/etc/symbolic/cmos45/alliance.py +++ b/crlcore/python/technos/symbolic/cmos45/alliance.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) orbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -15,11 +15,11 @@ import os import os.path -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -from CRL import Environment -from CRL import AllianceFramework +from coriolis.CRL import Environment, AllianceFramework allianceTop = None if 'ALLIANCE_TOP' in os.environ: diff --git a/crlcore/etc/symbolic/cmos45/analog.py b/crlcore/python/technos/symbolic/cmos45/analog.py similarity index 74% rename from crlcore/etc/symbolic/cmos45/analog.py rename to crlcore/python/technos/symbolic/cmos45/analog.py index 014f0a12..7e729487 100644 --- a/crlcore/etc/symbolic/cmos45/analog.py +++ b/crlcore/python/technos/symbolic/cmos45/analog.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.analog +from ...common import analog diff --git a/crlcore/etc/symbolic/cmos45/display.py b/crlcore/python/technos/symbolic/cmos45/display.py similarity index 72% rename from crlcore/etc/symbolic/cmos45/display.py rename to crlcore/python/technos/symbolic/cmos45/display.py index c45c461b..fb7e0daf 100644 --- a/crlcore/etc/symbolic/cmos45/display.py +++ b/crlcore/python/technos/symbolic/cmos45/display.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,10 +13,10 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.display +from ...common import display - -common.display.createStyles( scale=0.5 ) +display.createStyles( scale=0.5 ) diff --git a/crlcore/etc/symbolic/cmos45/etesian.py b/crlcore/python/technos/symbolic/cmos45/etesian.py similarity index 74% rename from crlcore/etc/symbolic/cmos45/etesian.py rename to crlcore/python/technos/symbolic/cmos45/etesian.py index dd83ba02..c9efe220 100644 --- a/crlcore/etc/symbolic/cmos45/etesian.py +++ b/crlcore/python/technos/symbolic/cmos45/etesian.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.etesian +from ...common import etesian diff --git a/crlcore/etc/symbolic/cmos45/kite.py b/crlcore/python/technos/symbolic/cmos45/kite.py similarity index 98% rename from crlcore/etc/symbolic/cmos45/kite.py rename to crlcore/python/technos/symbolic/cmos45/kite.py index b7ff6d45..3124c597 100644 --- a/crlcore/etc/symbolic/cmos45/kite.py +++ b/crlcore/python/technos/symbolic/cmos45/kite.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,18 +13,16 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -from Hurricane import DataBase -from CRL import AllianceFramework -from CRL import RoutingGauge -from CRL import RoutingLayerGauge -from CRL import CellGauge -from helpers import l, n, u +from coriolis.Hurricane import DataBase +from coriolis.CRL import AllianceFramework, RoutingGauge, \ + RoutingLayerGauge, CellGauge -import common.kite +from ...common import kite p = Cfg.getParamDouble ( 'lefImport.minTerminalWidth' ).setDouble ( 0.0 ) diff --git a/crlcore/etc/symbolic/cmos45/misc.py b/crlcore/python/technos/symbolic/cmos45/misc.py similarity index 75% rename from crlcore/etc/symbolic/cmos45/misc.py rename to crlcore/python/technos/symbolic/cmos45/misc.py index 8e8f4e72..9570d88f 100644 --- a/crlcore/etc/symbolic/cmos45/misc.py +++ b/crlcore/python/technos/symbolic/cmos45/misc.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.misc +from ...common import misc diff --git a/crlcore/etc/symbolic/cmos45/patterns.py b/crlcore/python/technos/symbolic/cmos45/patterns.py similarity index 74% rename from crlcore/etc/symbolic/cmos45/patterns.py rename to crlcore/python/technos/symbolic/cmos45/patterns.py index 76337ced..b8a965ad 100644 --- a/crlcore/etc/symbolic/cmos45/patterns.py +++ b/crlcore/python/technos/symbolic/cmos45/patterns.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,7 +13,8 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) -import common.patterns +from ...common import patterns diff --git a/crlcore/etc/symbolic/cmos45/plugins.py b/crlcore/python/technos/symbolic/cmos45/plugins.py similarity index 85% rename from crlcore/etc/symbolic/cmos45/plugins.py rename to crlcore/python/technos/symbolic/cmos45/plugins.py index 5fef81c1..0d307838 100644 --- a/crlcore/etc/symbolic/cmos45/plugins.py +++ b/crlcore/python/technos/symbolic/cmos45/plugins.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,11 +13,10 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) - -from helpers import l, u, n +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) Cfg.getParamInt ( "chip.block.rails.count" ).setInt ( 6 ) Cfg.getParamInt ( "chip.block.rails.hWidth" ).setInt ( l( 24) ) diff --git a/crlcore/etc/symbolic/cmos45/stratus1.py b/crlcore/python/technos/symbolic/cmos45/stratus1.py similarity index 75% rename from crlcore/etc/symbolic/cmos45/stratus1.py rename to crlcore/python/technos/symbolic/cmos45/stratus1.py index 4d4807ec..2821725b 100644 --- a/crlcore/etc/symbolic/cmos45/stratus1.py +++ b/crlcore/python/technos/symbolic/cmos45/stratus1.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) UPMC 2019-2019, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,12 +13,12 @@ # +-----------------------------------------------------------------+ -import Cfg -import helpers.io -helpers.io.vprint( 2, ' - "%s".' % helpers.truncPath(__file__) ) - -import common.stratus1 +import coriolis.Cfg as Cfg +from coriolis.helpers import truncPath +from coriolis.helpers.io import vprint +vprint( 2, ' - "%s".' % truncPath(__file__) ) +from ...common import stratus1 Cfg.getParamString( "stratus1.format" ).setString( "vst" ) Cfg.getParamString( "stratus1.simulator" ).setString( "asimut" ) diff --git a/crlcore/etc/symbolic/cmos45/technology.py b/crlcore/python/technos/symbolic/cmos45/technology.py similarity index 95% rename from crlcore/etc/symbolic/cmos45/technology.py rename to crlcore/python/technos/symbolic/cmos45/technology.py index 26c589e6..58fa5d72 100644 --- a/crlcore/etc/symbolic/cmos45/technology.py +++ b/crlcore/python/technos/symbolic/cmos45/technology.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -13,13 +13,11 @@ # +-----------------------------------------------------------------+ -import helpers.io -helpers.io.vprint( 2, ' - "{}".'.format(helpers.truncPath(__file__)) ) +from coriolis.helpers import truncPath, l, u, n +from coriolis.helpers.io import vprint, WarningMessage +vprint( 2, ' - "{}".'.format(truncPath(__file__)) ) -from helpers import l, u, n -from Hurricane import DbU -from Hurricane import DataBase -from Hurricane import Technology +from coriolis.Hurricane import DbU, DataBase, Technology tech = DataBase.getDB().getTechnology() @@ -35,8 +33,8 @@ DbU.setSymbolicSnapGridStep( DbU.fromLambda( 1.0) ) DbU.setPolygonStep ( DbU.fromGrid (10.0) ) -import common -from common.technology import * +from ...common import loadGdsLayers +from ...common.technology import * # Redefine all size from the "cmos" common part. NWELL.setExtentionCap( nWell, l(4.0) ) @@ -228,4 +226,4 @@ gdsLayersTable = \ ] -common.loadGdsLayers( gdsLayersTable ) +loadGdsLayers( gdsLayersTable ) diff --git a/crlcore/etc/symbolic/ispd05/alliance.conf b/crlcore/python/technos/symbolic/ispd05/alliance.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/alliance.conf rename to crlcore/python/technos/symbolic/ispd05/alliance.conf diff --git a/crlcore/etc/symbolic/ispd05/analog.conf b/crlcore/python/technos/symbolic/ispd05/analog.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/analog.conf rename to crlcore/python/technos/symbolic/ispd05/analog.conf diff --git a/crlcore/etc/symbolic/ispd05/display.conf b/crlcore/python/technos/symbolic/ispd05/display.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/display.conf rename to crlcore/python/technos/symbolic/ispd05/display.conf diff --git a/crlcore/etc/symbolic/ispd05/etesian.conf b/crlcore/python/technos/symbolic/ispd05/etesian.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/etesian.conf rename to crlcore/python/technos/symbolic/ispd05/etesian.conf diff --git a/crlcore/etc/symbolic/ispd05/hMetis.conf b/crlcore/python/technos/symbolic/ispd05/hMetis.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/hMetis.conf rename to crlcore/python/technos/symbolic/ispd05/hMetis.conf diff --git a/crlcore/etc/symbolic/ispd05/kite.conf b/crlcore/python/technos/symbolic/ispd05/kite.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/kite.conf rename to crlcore/python/technos/symbolic/ispd05/kite.conf diff --git a/crlcore/etc/symbolic/ispd05/mauka.conf b/crlcore/python/technos/symbolic/ispd05/mauka.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/mauka.conf rename to crlcore/python/technos/symbolic/ispd05/mauka.conf diff --git a/crlcore/etc/symbolic/ispd05/misc.conf b/crlcore/python/technos/symbolic/ispd05/misc.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/misc.conf rename to crlcore/python/technos/symbolic/ispd05/misc.conf diff --git a/crlcore/etc/symbolic/ispd05/nimbus.conf b/crlcore/python/technos/symbolic/ispd05/nimbus.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/nimbus.conf rename to crlcore/python/technos/symbolic/ispd05/nimbus.conf diff --git a/crlcore/etc/symbolic/ispd05/patterns.conf b/crlcore/python/technos/symbolic/ispd05/patterns.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/patterns.conf rename to crlcore/python/technos/symbolic/ispd05/patterns.conf diff --git a/crlcore/etc/symbolic/ispd05/plugins.conf b/crlcore/python/technos/symbolic/ispd05/plugins.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/plugins.conf rename to crlcore/python/technos/symbolic/ispd05/plugins.conf diff --git a/crlcore/etc/symbolic/ispd05/stratus1.conf b/crlcore/python/technos/symbolic/ispd05/stratus1.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/stratus1.conf rename to crlcore/python/technos/symbolic/ispd05/stratus1.conf diff --git a/crlcore/etc/symbolic/ispd05/technology.conf b/crlcore/python/technos/symbolic/ispd05/technology.conf similarity index 100% rename from crlcore/etc/symbolic/ispd05/technology.conf rename to crlcore/python/technos/symbolic/ispd05/technology.conf diff --git a/crlcore/etc/symbolic/vsc200/alliance.conf b/crlcore/python/technos/symbolic/vsc200/alliance.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/alliance.conf rename to crlcore/python/technos/symbolic/vsc200/alliance.conf diff --git a/crlcore/etc/symbolic/vsc200/display.conf b/crlcore/python/technos/symbolic/vsc200/display.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/display.conf rename to crlcore/python/technos/symbolic/vsc200/display.conf diff --git a/crlcore/etc/symbolic/vsc200/etesian.conf b/crlcore/python/technos/symbolic/vsc200/etesian.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/etesian.conf rename to crlcore/python/technos/symbolic/vsc200/etesian.conf diff --git a/crlcore/etc/symbolic/vsc200/hMetis.conf b/crlcore/python/technos/symbolic/vsc200/hMetis.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/hMetis.conf rename to crlcore/python/technos/symbolic/vsc200/hMetis.conf diff --git a/crlcore/etc/symbolic/vsc200/kite.conf b/crlcore/python/technos/symbolic/vsc200/kite.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/kite.conf rename to crlcore/python/technos/symbolic/vsc200/kite.conf diff --git a/crlcore/etc/symbolic/vsc200/mauka.conf b/crlcore/python/technos/symbolic/vsc200/mauka.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/mauka.conf rename to crlcore/python/technos/symbolic/vsc200/mauka.conf diff --git a/crlcore/etc/symbolic/vsc200/misc.conf b/crlcore/python/technos/symbolic/vsc200/misc.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/misc.conf rename to crlcore/python/technos/symbolic/vsc200/misc.conf diff --git a/crlcore/etc/symbolic/vsc200/nimbus.conf b/crlcore/python/technos/symbolic/vsc200/nimbus.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/nimbus.conf rename to crlcore/python/technos/symbolic/vsc200/nimbus.conf diff --git a/crlcore/etc/symbolic/vsc200/patterns.conf b/crlcore/python/technos/symbolic/vsc200/patterns.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/patterns.conf rename to crlcore/python/technos/symbolic/vsc200/patterns.conf diff --git a/crlcore/etc/symbolic/vsc200/plugins.conf b/crlcore/python/technos/symbolic/vsc200/plugins.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/plugins.conf rename to crlcore/python/technos/symbolic/vsc200/plugins.conf diff --git a/crlcore/etc/symbolic/vsc200/stratus1.conf b/crlcore/python/technos/symbolic/vsc200/stratus1.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/stratus1.conf rename to crlcore/python/technos/symbolic/vsc200/stratus1.conf diff --git a/crlcore/etc/symbolic/vsc200/technology.conf b/crlcore/python/technos/symbolic/vsc200/technology.conf similarity index 100% rename from crlcore/etc/symbolic/vsc200/technology.conf rename to crlcore/python/technos/symbolic/vsc200/technology.conf diff --git a/crlcore/src/ccore/CMakeLists.txt b/crlcore/src/ccore/CMakeLists.txt index 8eddd29d..4c05f2b4 100644 --- a/crlcore/src/ccore/CMakeLists.txt +++ b/crlcore/src/ccore/CMakeLists.txt @@ -36,7 +36,7 @@ add_definitions ( -DCORIOLIS_TOP="${CORIOLIS_TOP}" -DSYS_CONF_DIR="${SYS_CONF_DIR}" - -DPYTHON_SITE_PACKAGES="${Python_CORIOLISLIB}" + -DPYTHON_SITE_PACKAGES="${Python_SITELIB}" ) set ( includes crlcore/Utilities.h diff --git a/crlcore/src/ccore/Utilities.cpp b/crlcore/src/ccore/Utilities.cpp index f3df8b15..98a6d3c7 100644 --- a/crlcore/src/ccore/Utilities.cpp +++ b/crlcore/src/ccore/Utilities.cpp @@ -319,21 +319,21 @@ namespace CRL { Utilities::Path pythonSitePackages ( PYTHON_SITE_PACKAGES ); pythonSitePackages = arguments["coriolis_top"].as() / pythonSitePackages; _pathes.insert ( make_pair("pythonSitePackages",pythonSitePackages.toString()) ); - Utilities::Path crlcoreDir = pythonSitePackages / "crlcore"; - Utilities::Path stratusDir = pythonSitePackages / "stratus"; - Utilities::Path cumulusDir = pythonSitePackages / "cumulus"; - Utilities::Path oroshiDir = pythonSitePackages / "oroshi"; - Utilities::Path karakazeDir = pythonSitePackages / "karakaze"; + // Utilities::Path crlcoreDir = pythonSitePackages / "crlcore"; + // Utilities::Path stratusDir = pythonSitePackages / "stratus"; + // Utilities::Path cumulusDir = pythonSitePackages / "cumulus"; + // Utilities::Path oroshiDir = pythonSitePackages / "oroshi"; + // Utilities::Path karakazeDir = pythonSitePackages / "karakaze"; Utilities::Path etcDir = _pathes["etc"]; Isobar::Script::addPath ( etcDir.toString() ); Isobar::Script::addPath ( sysConfDir.toString() ); Isobar::Script::addPath ( pythonSitePackages.toString() ); - Isobar::Script::addPath ( crlcoreDir.toString() ); - Isobar::Script::addPath ( stratusDir.toString() ); - Isobar::Script::addPath ( cumulusDir.toString() ); - Isobar::Script::addPath ( oroshiDir.toString() ); - Isobar::Script::addPath ( karakazeDir.toString() ); + // Isobar::Script::addPath ( crlcoreDir.toString() ); + // Isobar::Script::addPath ( stratusDir.toString() ); + // Isobar::Script::addPath ( cumulusDir.toString() ); + // Isobar::Script::addPath ( oroshiDir.toString() ); + // Isobar::Script::addPath ( karakazeDir.toString() ); // Triggers Configuration singleton creation. Cfg::Configuration::get (); diff --git a/cumulus/src/CMakeLists.txt b/cumulus/src/CMakeLists.txt index 75b225ce..2e86ea52 100644 --- a/cumulus/src/CMakeLists.txt +++ b/cumulus/src/CMakeLists.txt @@ -24,46 +24,6 @@ ${CMAKE_CURRENT_SOURCE_DIR}/designflow/routecheck.py ${CMAKE_CURRENT_SOURCE_DIR}/designflow/pnrcheck.py ${CMAKE_CURRENT_SOURCE_DIR}/designflow/alliancesynth.py - ) - set ( pySources ${CMAKE_CURRENT_SOURCE_DIR}/placeandroute.py - ${CMAKE_CURRENT_SOURCE_DIR}/ref.py - ${CMAKE_CURRENT_SOURCE_DIR}/Alliance.py - ) - set ( pyPlugins ${CMAKE_CURRENT_SOURCE_DIR}/plugins/__init__.py - #${CMAKE_CURRENT_SOURCE_DIR}/plugins/vchannels.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/clocktree.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip_cmos.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip_phlib80.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chipplace.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chiproute.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/conductor.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/matrixplacer.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/rsave.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/rsaveall.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/checks.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/s2r.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/aboutwindow.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/stats.py - ) - #set ( pyPluginBlock ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/__init__.py - # ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/vchannels.py - # ) - set ( pyPluginCTS ${CMAKE_CURRENT_SOURCE_DIR}/plugins/cts/__init__.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/cts/rsmt.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/cts/clocktree.py - ) - set ( pyPluginC2C ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/__init__.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/core2chip.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/cmos.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/phlib80.py - ) - set ( pyPluginChip ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/__init__.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/configuration.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/blockpower.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/blockcorona.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/padscorona.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/chip.py ) set ( pyTools ${CMAKE_CURRENT_SOURCE_DIR}/tools/blif2vst.py ${CMAKE_CURRENT_SOURCE_DIR}/tools/yosys.py @@ -74,59 +34,55 @@ ${CMAKE_CURRENT_SOURCE_DIR}/plugins/sram/sramplacer1.py ${CMAKE_CURRENT_SOURCE_DIR}/plugins/sram/sramplacer2.py ) - set ( pyPluginAlpha ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/__init__.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/utils.py + set ( pyPlugins ${CMAKE_CURRENT_SOURCE_DIR}/plugins/__init__.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/utils.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/checks.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/rsave.py ) - set ( pyPluginAlphaBlock ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/__init__.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/__init__.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/configuration.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/iospecs.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/bigvia.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/spares.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/block.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/htree.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/timing.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/rsmt.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/hfns1.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/hfns2.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/hfns3.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/hfns4.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/matrix.py + set ( pyPluginBlock ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/__init__.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/configuration.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/iospecs.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/bigvia.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/spares.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/block.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/htree.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/timing.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/rsmt.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/hfns1.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/hfns2.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/hfns3.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/hfns4.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/matrix.py ) - set ( pyPluginAlphaC2C ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/__init__.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/core2chip.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/cmos.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/niolib.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/libresocio.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/sky130.py + set ( pyPluginC2C ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/__init__.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/core2chip.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/cmos.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/niolib.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/libresocio.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/sky130.py ) - set ( pyPluginAlphaChip ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/__init__.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/configuration.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/power.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/powerplane.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/corona.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/pads.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/chip.py + set ( pyPluginChip ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/__init__.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/constants.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/configuration.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/power.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/powerplane.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/corona.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/pads.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/chip.py ) - set ( pyPluginAlphaMacro ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/macro/__init__.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/macro/macro.py + set ( pyPluginMacro ${CMAKE_CURRENT_SOURCE_DIR}/plugins/macro/__init__.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/macro/macro.py ) - set ( pyPluginAlphaHarness ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/harness/__init__.py - ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/harness/pads.py + set ( pyPluginHarness ${CMAKE_CURRENT_SOURCE_DIR}/plugins/harness/__init__.py + ${CMAKE_CURRENT_SOURCE_DIR}/plugins/harness/pads.py ) - install ( FILES ${pyDesignFlow} DESTINATION ${Python_CORIOLISLIB}/designflow ) - install ( FILES ${pySources} DESTINATION ${Python_CORIOLISLIB}/cumulus ) - install ( FILES ${pyPlugins} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins ) - install ( FILES ${pyPluginCTS} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/cts ) - install ( FILES ${pyPluginC2C} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/core2chip ) - install ( FILES ${pyPluginC2C} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/core2chip ) - install ( FILES ${pyPluginChip} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/chip ) - install ( FILES ${pyPluginSRAM} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/sram ) - install ( FILES ${pyPluginAlpha} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha ) - install ( FILES ${pyPluginAlphaBlock} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha/block ) - install ( FILES ${pyPluginAlphaC2C} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha/core2chip ) - install ( FILES ${pyPluginAlphaChip} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha/chip ) - install ( FILES ${pyPluginAlphaMacro} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha/macro ) - install ( FILES ${pyPluginAlphaHarness} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha/harness ) - install ( PROGRAMS ${pyTools} DESTINATION bin ) + install ( FILES ${pyDesignFlow} DESTINATION ${Python_CORIOLISLIB}/designflow ) + install ( FILES ${pyPlugins} DESTINATION ${Python_CORIOLISLIB}/plugins ) + install ( FILES ${pyPluginSRAM} DESTINATION ${Python_CORIOLISLIB}/plugins/sram ) + install ( FILES ${pyPluginBlock} DESTINATION ${Python_CORIOLISLIB}/plugins/block ) + install ( FILES ${pyPluginC2C} DESTINATION ${Python_CORIOLISLIB}/plugins/core2chip ) + install ( FILES ${pyPluginChip} DESTINATION ${Python_CORIOLISLIB}/plugins/chip ) + install ( FILES ${pyPluginMacro} DESTINATION ${Python_CORIOLISLIB}/plugins/macro ) + install ( FILES ${pyPluginHarness} DESTINATION ${Python_CORIOLISLIB}/plugins/harness ) + install ( PROGRAMS ${pyTools} DESTINATION bin ) diff --git a/cumulus/src/plugins/alpha/core2chip/__init__.py b/cumulus/src/__init__.py similarity index 100% rename from cumulus/src/plugins/alpha/core2chip/__init__.py rename to cumulus/src/__init__.py diff --git a/cumulus/src/designflow/asimut.py b/cumulus/src/designflow/asimut.py index 99fb971d..bed7f6df 100644 --- a/cumulus/src/designflow/asimut.py +++ b/cumulus/src/designflow/asimut.py @@ -35,8 +35,8 @@ class Asimut ( FlowTask ): return '<{}>'.format( ' '.join(self.command) ) def doTask ( self ): - from CRL import AllianceFramework - from helpers.io import ErrorMessage + from ..CRL import AllianceFramework + from ..helpers.io import ErrorMessage shellEnv = ShellEnv() shellEnv[ 'MBK_IN_LO' ] = 'vst' diff --git a/cumulus/src/designflow/blif2vst.py b/cumulus/src/designflow/blif2vst.py index 7c640556..3a9d9137 100644 --- a/cumulus/src/designflow/blif2vst.py +++ b/cumulus/src/designflow/blif2vst.py @@ -52,11 +52,11 @@ class Blif2Vst ( FlowTask ): return None def doTask ( self ): - from Hurricane import Cell - import CRL - import Viewer - from helpers.io import ErrorMessage - import plugins.rsave + from ..Hurricane import Cell + from .. import CRL + from .. import Viewer + from ..helpers.io import ErrorMessage + from ..plugins import rsave print( 'Blif2Vst.doTask() on "{}"'.format( self.design )) views = CRL.Catalog.State.Logical | self.flags @@ -69,7 +69,7 @@ class Blif2Vst ( FlowTask ): kw = {} kw['views'] = views kw['cell' ] = cell - plugins.rsave.scriptMain( **kw ) + rsave.scriptMain( **kw ) return self.checkTargets( 'Blif2Vst.doTask' ) diff --git a/cumulus/src/designflow/boog.py b/cumulus/src/designflow/boog.py index 4bc9a4b8..565fab90 100644 --- a/cumulus/src/designflow/boog.py +++ b/cumulus/src/designflow/boog.py @@ -45,8 +45,8 @@ class Boog ( FlowTask ): return '<{}>'.format( ' '.join(self.command) ) def doTask ( self ): - from CRL import AllianceFramework - from helpers.io import ErrorMessage + from ..CRL import AllianceFramework + from ..helpers.io import ErrorMessage shellEnv = ShellEnv() shellEnv[ 'MBK_OUT_LO' ] = self.outputFile.suffix[1:] diff --git a/cumulus/src/designflow/boom.py b/cumulus/src/designflow/boom.py index c827817f..e883f99e 100644 --- a/cumulus/src/designflow/boom.py +++ b/cumulus/src/designflow/boom.py @@ -38,8 +38,8 @@ class Boom ( FlowTask ): return '<{}>'.format( ' '.join(self.command) ) def doTask ( self ): - from CRL import AllianceFramework - from helpers.io import ErrorMessage + from ..CRL import AllianceFramework + from ..helpers.io import ErrorMessage shellEnv = ShellEnv() shellEnv.export() diff --git a/cumulus/src/designflow/copy.py b/cumulus/src/designflow/copy.py index 735998a9..d0457134 100644 --- a/cumulus/src/designflow/copy.py +++ b/cumulus/src/designflow/copy.py @@ -25,7 +25,7 @@ class Copy ( FlowTask ): return ''.format( self.sourceFile.as_posix(), self.targetFile.as_posix() ) def doTask ( self ): - from helpers.io import ErrorMessage + from ..helpers.io import ErrorMessage try: shutil.copyfile( self.sourceFile, self.targetFile ) except Exception as e: diff --git a/cumulus/src/designflow/cougar.py b/cumulus/src/designflow/cougar.py index 77248aa3..913d0f9f 100644 --- a/cumulus/src/designflow/cougar.py +++ b/cumulus/src/designflow/cougar.py @@ -41,8 +41,8 @@ class Cougar ( FlowTask ): return '<{}>'.format( ' '.join(self.command) ) def doTask ( self ): - from CRL import AllianceFramework - from helpers.io import ErrorMessage + from ..CRL import AllianceFramework + from ..helpers.io import ErrorMessage shellEnv = ShellEnv() shellEnv[ 'MBK_OUT_LO' ] = self.outputFile.suffix[1:] diff --git a/cumulus/src/designflow/druc.py b/cumulus/src/designflow/druc.py index 813a80a8..de73cd90 100644 --- a/cumulus/src/designflow/druc.py +++ b/cumulus/src/designflow/druc.py @@ -32,8 +32,8 @@ class Druc ( FlowTask ): return '<{}>'.format( ' '.join(self.command) ) def doTask ( self ): - from CRL import AllianceFramework - from helpers.io import ErrorMessage + from ..CRL import AllianceFramework + from ..helpers.io import ErrorMessage shellEnv = ShellEnv() shellEnv.export() diff --git a/cumulus/src/designflow/genpat.py b/cumulus/src/designflow/genpat.py index 2ef91010..a8d3545b 100644 --- a/cumulus/src/designflow/genpat.py +++ b/cumulus/src/designflow/genpat.py @@ -27,8 +27,8 @@ class Genpat ( FlowTask ): return '<{}>'.format( ' '.join(self.command) ) def doTask ( self ): - from CRL import AllianceFramework - from helpers.io import ErrorMessage + from coriolis.CRL import AllianceFramework + from coriolis.helpers.io import ErrorMessage shellEnv = ShellEnv() shellEnv.export() diff --git a/cumulus/src/designflow/loon.py b/cumulus/src/designflow/loon.py index 5eb8288c..97bd7dc6 100644 --- a/cumulus/src/designflow/loon.py +++ b/cumulus/src/designflow/loon.py @@ -46,8 +46,8 @@ class Loon ( FlowTask ): return '<{}>'.format( ' '.join(self.command) ) def doTask ( self ): - from CRL import AllianceFramework - from helpers.io import ErrorMessage + from ..CRL import AllianceFramework + from ..helpers.io import ErrorMessage shellEnv = ShellEnv() shellEnv[ 'MBK_OUT_LO' ] = self.outputFile.suffix[1:] diff --git a/cumulus/src/designflow/lvx.py b/cumulus/src/designflow/lvx.py index a4a8b3ce..10707e73 100644 --- a/cumulus/src/designflow/lvx.py +++ b/cumulus/src/designflow/lvx.py @@ -21,7 +21,7 @@ class Lvx ( FlowTask ): return Lvx( rule, depends, flags ) def __init__ ( self, rule, depends, flags ): - import CRL + from .. import CRL super().__init__( rule, [], depends ) self.flags = flags @@ -46,8 +46,8 @@ class Lvx ( FlowTask ): return '<{}>'.format( ' '.join(self.command) ) def doTask ( self ): - from CRL import AllianceFramework - from helpers.io import ErrorMessage + from ..CRL import AllianceFramework + from ..helpers.io import ErrorMessage shellEnv = ShellEnv() shellEnv.export() diff --git a/cumulus/src/designflow/pnr.py b/cumulus/src/designflow/pnr.py index 7aaa9379..453851ff 100644 --- a/cumulus/src/designflow/pnr.py +++ b/cumulus/src/designflow/pnr.py @@ -58,19 +58,13 @@ class PnR ( FlowTask ): return banner def doTask ( self ): - from helpers.io import ErrorMessage + from ..helpers.io import ErrorMessage if self.design: print( 'PnR.doTask() on "{}"'.format( self.design )) else: print( 'PnR.doTask() run in interactive CGT mode.' ) PnR.textMode = False - import Etesian - import Anabatic - import Katana - import Bora - import Tutorial - import Viewer - import Unicorn + from .. import Etesian, Anabatic, Katana, Bora, Tutorial, Viewer, Unicorn ShellEnv().export() if self.script and not callable(self.script): diff --git a/cumulus/src/designflow/s2r.py b/cumulus/src/designflow/s2r.py index f3ba218e..b3998072 100644 --- a/cumulus/src/designflow/s2r.py +++ b/cumulus/src/designflow/s2r.py @@ -39,8 +39,8 @@ class S2R ( FlowTask ): return '<{}>'.format( ' '.join(self.command) ) def doTask ( self ): - from CRL import AllianceFramework - from helpers.io import ErrorMessage + from ..CRL import AllianceFramework + from ..helpers.io import ErrorMessage shellEnv = ShellEnv() shellEnv[ 'RDS_OUT' ] = self.outputFile.suffix[1:] diff --git a/cumulus/src/designflow/task.py b/cumulus/src/designflow/task.py index 2c6eceb4..5b521b19 100644 --- a/cumulus/src/designflow/task.py +++ b/cumulus/src/designflow/task.py @@ -52,7 +52,7 @@ class ShellEnv ( object ): Get the default values of the environment variables from the Coriolis configuration. """ - import CRL + from .. import CRL af = CRL.AllianceFramework.get() env = af.getEnvironment() @@ -172,7 +172,7 @@ class FlowTask ( object ): Checks that all the the target files have been generated, stop on error. This is a helper for derived classes. """ - from helpers.io import ErrorMessage + from ..helpers.io import ErrorMessage for target in self.targets: path = Path( target ) if not path.is_file(): diff --git a/cumulus/src/designflow/technos.py b/cumulus/src/designflow/technos.py index ec66221a..0d69724a 100644 --- a/cumulus/src/designflow/technos.py +++ b/cumulus/src/designflow/technos.py @@ -43,12 +43,12 @@ class Where ( object ): def setupCMOS (): - import Cfg - import Viewer - import CRL - import symbolic.cmos - from helpers import overlay, l, u, n - from designflow.yosys import Yosys + from .. import Cfg + from .. import Viewer + from .. import CRL + from ..helpers import overlay, l, u, n + from .yosys import Yosys + import coriolis.technos.symbolic.cmos Where() @@ -82,12 +82,12 @@ def setupCMOS (): def setupCMOS45 ( useNsxlib=False, checkToolkit=None, cellsTop=None ): - import Cfg - import Viewer - import CRL - import symbolic.cmos45 - from helpers import overlay, l, u, n - from designflow.yosys import Yosys + from .. import Cfg + from .. import Viewer + from .. import CRL + from ..helpers import overlay, l, u, n + from .yosys import Yosys + import coriolis.technos.symbolic.cmos45 Where( checkToolkit ) if cellsTop is None: @@ -144,12 +144,11 @@ def setupCMOS45 ( useNsxlib=False, checkToolkit=None, cellsTop=None ): def setupSky130_c4m ( checkToolkit=None, pdkMasterTop=None ): - import Cfg - import Viewer - import CRL - import helpers - from helpers import overlay, l, u, n - from designflow.yosys import Yosys + from .. import Cfg + from .. import Viewer + from .. import CRL + from ..helpers import setNdaTopDir, overlay, l, u, n + from .yosys import Yosys if isinstance(pdkMasterTop,str): pdkMasterTop = Path( pdkMasterTop ) @@ -165,7 +164,7 @@ def setupSky130_c4m ( checkToolkit=None, pdkMasterTop=None ): else: ndaDirectory = Path( '/users/soft/techno/techno' ) pdkMasterTop = ndaDirectory - helpers.setNdaTopDir( ndaDirectory.as_posix() ) + setNdaTopDir( ndaDirectory.as_posix() ) if not pdkMasterTop.is_dir(): print( '[ERROR] technos.setupSky130_c4m(): pdkMasterTop directory do *not* exists:' ) print( ' "{}"'.format(pdkMasterTop.as_posix()) ) @@ -204,12 +203,11 @@ def setupSky130_c4m ( checkToolkit=None, pdkMasterTop=None ): def setupFreePDK45_c4m ( checkToolkit=None, pdkMasterTop=None ): - import Cfg - import Viewer - import CRL - import helpers - from helpers import overlay, l, u, n - from designflow.yosys import Yosys + from .. import Cfg + from .. import Viewer + from .. import CRL + from ..helpers import setNdaTopDir, overlay, l, u, n + from .yosys import Yosys if isinstance(pdkMasterTop,str): pdkMasterTop = Path( pdkMasterTop ) @@ -252,12 +250,11 @@ def setupFreePDK45_c4m ( checkToolkit=None, pdkMasterTop=None ): def setupTSMC_c180_c4m ( checkToolkit=None, ndaTop=None ): - import Cfg - import Viewer - import CRL - import helpers - from helpers import overlay, l, u, n - from designflow.yosys import Yosys + from .. import Cfg + from .. import Viewer + from .. import CRL + from ..helpers import setNdaTopDir, overlay, l, u, n + from .yosys import Yosys ndaDirectory = None if ndaTop is not None: @@ -273,7 +270,7 @@ def setupTSMC_c180_c4m ( checkToolkit=None, ndaTop=None ): print( '[ERROR] You forgot to mount the NDA encrypted directory, stupid!' ) else: ndaDirectory = '/users/soft/techno/techno' - helpers.setNdaTopDir( ndaDirectory ) + setNdaTopDir( ndaDirectory ) Where( checkToolkit ) diff --git a/cumulus/src/designflow/vasy.py b/cumulus/src/designflow/vasy.py index 6454517d..e00d178d 100644 --- a/cumulus/src/designflow/vasy.py +++ b/cumulus/src/designflow/vasy.py @@ -49,8 +49,8 @@ class Vasy ( FlowTask ): return '<{}>'.format( ' '.join(self.command) ) def doTask ( self ): - from CRL import AllianceFramework - from helpers.io import ErrorMessage + from ..CRL import AllianceFramework + from ..helpers.io import ErrorMessage shellEnv = ShellEnv() shellEnv.export() diff --git a/cumulus/src/designflow/yosys.py b/cumulus/src/designflow/yosys.py index 68ed0c26..b48b09ca 100644 --- a/cumulus/src/designflow/yosys.py +++ b/cumulus/src/designflow/yosys.py @@ -62,7 +62,7 @@ class Yosys ( FlowTask ): yosys.run_pass( command, self.tool ) def _loadDesign ( self, design ): - from helpers.io import ErrorMessage + from ..helpers.io import ErrorMessage if self.success is not True: return if not os.path.isfile(design): e = ErrorMessage( 1, 'Yosys._loadDesign(): Can\'t find design file "{}".'.format( design )) @@ -87,7 +87,7 @@ class Yosys ( FlowTask ): self._run_pass( 'hierarchy -top {}\n'.format( self.top )) def doTask ( self ): - from helpers.io import ErrorMessage + from ..helpers.io import ErrorMessage if self.liberty is None: e = ErrorMessage( 1, [ 'Yosys.doTask(): "liberty" has not been set' ] ) return TaskFailed( e ) diff --git a/cumulus/src/plugins/__init__.py b/cumulus/src/plugins/__init__.py index b793af05..b7bb92c0 100644 --- a/cumulus/src/plugins/__init__.py +++ b/cumulus/src/plugins/__init__.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2014-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -16,18 +16,12 @@ import os import sys import traceback -import Cfg -import helpers -from helpers.io import vprint -from helpers.io import ErrorMessage -from helpers.io import WarningMessage -from Hurricane import Contact -from Hurricane import Path -from Hurricane import Occurrence -from Hurricane import Instance -import Viewer -import CRL -from CRL import RoutingLayerGauge +from .. import Cfg +from .. import helpers +from ..helpers.io import vprint, ErrorMessage, WarningMessage +from ..Hurricane import Contact, Path, Occurrence, Instance +from .. import Viewer +from ..CRL import AllianceFramework, RoutingLayerGauge NoFlags = 0 @@ -140,13 +134,13 @@ class StackedVia ( object ): def getLayer ( self, fromTop ): if self._topDepth-fromTop >= self._bottomDepth: - routingGauge = CRL.AllianceFramework.get().getRoutingGauge() + routingGauge = AllianceFramework.get().getRoutingGauge() return routingGauge.getRoutingLayer(self._topDepth-fromTop) return None def getBlockageLayer ( self, fromTop ): if self._topDepth-fromTop >= self._bottomDepth: - routingGauge = CRL.AllianceFramework.get().getRoutingGauge() + routingGauge = AllianceFramework.get().getRoutingGauge() return routingGauge.getRoutingLayer(self._topDepth-fromTop).getBlockageLayer() return None @@ -160,7 +154,7 @@ class StackedVia ( object ): if self._hasLayout: return self._hasLayout = True - routingGauge = CRL.AllianceFramework.get().getRoutingGauge() + routingGauge = AllianceFramework.get().getRoutingGauge() if self._bottomDepth == self._topDepth: self._vias.append( Contact.create( self._net @@ -203,39 +197,39 @@ def loadPlugins ( pluginsDir ): .. note:: Those modules will be searched later (in ``unicornInit.py``) for any potential ``unicornHook()`` function. """ - sys.path.append( pluginsDir ) - sys.modules['plugins'].__path__.append( pluginsDir ) + sys.modules['coriolis.plugins'].__path__.append( pluginsDir ) if not os.path.isdir(pluginsDir): - print( ErrorMessage( 3, 'cumulus.__init__.py: Cannot find directory:' \ + print( ErrorMessage( 3, 'plugins.__init__.py: Cannot find directory:' \ , '"{}"'.format(pluginsDir) )) return moduleNames = [] for entry in os.listdir( pluginsDir ): - if entry == "__init__.py": continue + if entry == '__init__.py': continue + if entry == '__pycache__': continue + packageName = 'coriolis.plugins.' + entry if not entry.endswith('.py'): path = os.path.join(pluginsDir,entry) if os.path.isdir(path): - packageName = "plugins." + entry if not packageName in sys.modules: + vprint( 2, ' - "{}" (module)'.format( packageName )) module = __import__( packageName, globals(), locals() ) else: module = sys.modules[packageName] - module.__path__.append( path ) continue - moduleNames.append( entry[:-3] ) + moduleNames.append( packageName[:-3] ) moduleNames.sort() for moduleName in moduleNames: try: - vprint( 2, ' - "{}"'.format(moduleName) ) + vprint( 2, ' - "{}.py"'.format( moduleName )) module = __import__( moduleName, globals(), locals() ) except ErrorMessage as e: print( e ) - helpers.showStackTrace( e.trace ) + helpers.io.showStackTrace( e.trace ) except Exception as e: print( e ) - helpers.showPythonTrace( __file__, e ) + helpers.io.showPythonTrace( __file__, e ) return @@ -253,7 +247,7 @@ def staticInitialization (): pythonDir = os.path.join( helpers.ndaTopDir, 'python{}.{}'.format( sys.version_info.major , sys.version_info.minor )) if os.path.isdir(pythonDir): - pluginsDir = os.path.join( pythonDir, 'site-packages/cumulus/plugins' ) + pluginsDir = os.path.join( pythonDir, 'site-packages/plugins' ) loadPlugins( pluginsDir ) else: vprint( 1, ' - No NDA protected plugins directory.' ) @@ -261,7 +255,7 @@ def staticInitialization (): else: vprint( 1, ' - No NDA protected plugins.' ) except Exception as e: - helpers.showPythonTrace( __file__, e ) + helpers.io.showPythonTrace( __file__, e ) loaded = True return diff --git a/cumulus/src/plugins/aboutwindow.py b/cumulus/src/plugins/aboutwindow.py index d3a431ab..d5ec9c7a 100644 --- a/cumulus/src/plugins/aboutwindow.py +++ b/cumulus/src/plugins/aboutwindow.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2014-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -16,10 +16,8 @@ import sys import traceback import Viewer -import helpers -from helpers.io import ErrorMessage -from helpers.io import WarningMessage -import plugins +from ..helpers.io import ErrorMessage, WarningMessage, catch +from .. import plugins # -------------------------------------------------------------------- @@ -39,7 +37,7 @@ def scriptMain ( **kw ): try: Viewer.AboutWindow.show() except Exception as e: - helpers.io.catch( e ) + catch( e ) sys.stdout.flush() sys.stderr.flush() return True diff --git a/cumulus/src/plugins/alpha/chip/__init__.py b/cumulus/src/plugins/alpha/chip/__init__.py deleted file mode 100644 index 38adf3d1..00000000 --- a/cumulus/src/plugins/alpha/chip/__init__.py +++ /dev/null @@ -1,480 +0,0 @@ - -# This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved -# -# +-----------------------------------------------------------------+ -# | C O R I O L I S | -# | C u m u l u s - P y t h o n T o o l s | -# | | -# | Author : Jean-Paul CHAPUT | -# | E-mail : Jean-Paul.Chaput@lip6.fr | -# | =============================================================== | -# | Python : "./plugins/chip/__init__.py" | -# +-----------------------------------------------------------------+ - -""" -Define constants to be used through all "chip" plugin modules, along -with the importConstants() function to import then directly in the -dictionnary of other modules. - -* For corona sides: North, South, East & West. -* For corona corners: SouthWest, SouthEast, NorthWest & NorthEast. -* For rounding operation: Superior, Inferior, Inwards, - OnHorizontalPitch & OnVerticalPitch. -""" - -from Hurricane import DbU, DataBase, UpdateSession, Breakpoint, \ - Box, Transformation , Instance , Net, Pin, \ - Contact, Horizontal, Vertical, BasicLayer, \ - Layer -from CRL import RoutingGauge, RoutingLayerGauge -from helpers import trace, l, u, n, onFGrid -from helpers.io import ErrorMessage, WarningMessage -from helpers.overlay import UpdateSession -from plugins.alpha.block.bigvia import BigVia - - -North = 0x0001 -South = 0x0002 -East = 0x0004 -West = 0x0008 -SouthWest = South|West -SouthEast = South|East -NorthWest = North|West -NorthEast = North|East -HORIZONTAL = North|South -VERTICAL = East |West - -Superior = 0x0010 -Inferior = 0x0020 -Inwards = 0x0040 -OnHorizontalPitch = 0x0080 -OnVerticalPitch = 0x0100 - - -def importConstants ( symbols ): - """ - Import chip module symbol constants in the another module dictionnary - (i.e. globals()). - """ - if not isinstance(symbols,dict): - print( WarningMessage( 'plugins.chip.__init__.importConstants(), argument is not a symbol table.' )) - return - for symbol in globals().items(): - if isinstance(symbol[1],int): - if not symbol[0] in symbols: - symbols[ symbol[0] ] = symbol[1] - - -# -------------------------------------------------------------------- -# Class : "chip.CoreWire" - -class CoreWire ( object ): - """ - Draw wires to connect an external (chip/harness) terminal belonging - to a ``chipNet`` (the *internal* one) to an on-grid Pin on the edge - of the corona instance. - - Wires are created in *two* Cells: - - 1. At the chip/harness level, where they are using real layout - connecting to I/O external pads or the harness pins. - - 2. At the corona level, *outside* the corona abutment box, so - they overlap with the part draw at chip level, as we know the - placement of the corona inside the chip. - This part of the wires are *on grid*. And they may also be - symbolic if the corona+core is in symbolic layout. This just - on the outside of the corona that we make the transition - between the real outer chip and the internal symbolic core. - - In the case a complete chip with I/O pad, we can also request the - insertion of a jumper to protect against antenna effect. This is - not working yet in the case of a harness. - """ - - NoOffset = 0x0000 - AtBegin = 0x0001 - AtEnd = 0x0002 - - def __init__ ( self, corona, chipNet, padSegment, bbSegment, side, preferredDir, count ): - self.corona = corona - self.chipNet = chipNet - self.padSegment = padSegment - self.bbSegment = bbSegment - self.offset = 0 - self.offsetType = CoreWire.NoOffset - self.side = side - self.addJumper = False - self.preferredDir = preferredDir - self.inCoronaRange = True - self.arraySize = None - self.count = count - self.viaPitch = DbU.fromLambda( 4.0 ) - self.gapWidth = 0 - self._computeCoreLayers() - if self.conf.routingGauge.getName() == 'FlexLib': - self.addJumper = True - - @property - def conf ( self ): return self.corona.conf - - def updateInCorona ( self ): - coronaAb = self.conf.getInstanceAb( self.conf.icorona ) - if self.side == South or self.side == North: - xCoronaPin = self.bbSegment.getCenter().getX() - if xCoronaPin <= coronaAb.getXMin(): self.inCoronaRange = False - elif xCoronaPin >= coronaAb.getXMax(): self.inCoronaRange = False - if self.side == East or self.side == West: - yCoronaPin = self.bbSegment.getCenter().getY() - if yCoronaPin <= coronaAb.getYMin(): self.inCoronaRange = False - elif yCoronaPin >= coronaAb.getYMax(): self.inCoronaRange = False - - def setOffset ( self, offset, offsetType ): - self.offset = offset - self.offsetType = offsetType - - def _computeCoreLayers ( self ): - rg = self.conf.routingGauge - mask = self.padSegment.getLayer().getMask() - trace( 550, ',+', '\tCoreWire._computeCoreLayers()\n' ) - trace( 550, '\tbbSegment: {}\n'.format(self.bbSegment) ) - self.symSegmentLayer = None - for layerGauge in rg.getLayerGauges(): - trace( 550, '\tTrying: {}\n'.format(layerGauge) ) - if layerGauge.getType() == RoutingLayerGauge.Unusable: continue - if layerGauge.getType() == RoutingLayerGauge.BottomPowerSupply: continue - if layerGauge.getDepth() > self.conf.topLayerDepth: break - if layerGauge.getLayer().getMask() == mask: - trace( 550, '\tUsing: {}\n'.format(layerGauge) ) - self.symSegmentLayer = layerGauge.getLayer() - if self.preferredDir: - self.symContactLayer = self.symSegmentLayer - if self.side & (West|East): - self.symContactSize = ( layerGauge.getWireWidth(), self.bbSegment.getHeight() ) - else: - self.symContactSize = ( self.bbSegment.getWidth(), layerGauge.getWireWidth() ) - trace( 550, '\tsymContactSize=( {}, {} )\n' \ - .format( DbU.getValueString(self.symContactSize[0]) - , DbU.getValueString(self.symContactSize[1]) )) - else: - depth = layerGauge.getDepth() - trace( 550, '\tChoosing PP layer, {}+1 > top={}\n' \ - .format(layerGauge.getDepth(),self.conf.topLayerDepth) ) - if layerGauge.getDepth() + 1 > self.conf.topLayerDepth: - self.symSegmentLayer = rg.getLayerGauge( depth-1 ).getLayer() - depth -= 1 - trace( 550, '\tUsing below layer {}\n'.format( self.symSegmentLayer )) - else: - self.symSegmentLayer = rg.getLayerGauge( depth+1 ).getLayer() - trace( 550, '\tUsing above layer {}\n'.format( self.symSegmentLayer )) - self.symContactLayer = rg.getContactLayer( depth ) - if self.side & (West|East): - self.symContactSize = ( self.bbSegment.getHeight(), self.bbSegment.getHeight() ) - else: - self.symContactSize = ( self.bbSegment.getWidth(), self.bbSegment.getWidth() ) - self.viaPitch = self.conf.getViaPitch( self.symContactLayer ) - basicLayer = self.symSegmentLayer - if basicLayer.isSymbolic(): - basicLayer = basicLayer.getBasicLayer() - contactMinSize = 2*self.symContactLayer.getEnclosure( basicLayer - , Layer.EnclosureH|Layer.EnclosureV ) \ - + self.symContactLayer.getMinimalSize() - arrayWidth = self.symContactSize[0] - arrayCount = (arrayWidth - contactMinSize) // self.viaPitch - trace( 550, '\tcontactMinSize: {}, arrayWidth: {}, arrayCount: {}\n' \ - .format(DbU.getValueString(contactMinSize),DbU.getValueString(arrayWidth),arrayCount) ) - if arrayCount < 0: arrayCount = 0 - #if arrayCount < 3: - if self.side & (North|South): - self.arraySize = ( arrayCount+1, 2 ) - else: - self.arraySize = ( 2, arrayCount+1 ) - trace( 550, '\tarraySize = ({},{})\n'.format(self.arraySize[0], self.arraySize[1]) ) - self.gapWidth = 4*self.viaPitch - trace( 550, ',-' ) - return - raise ErrorMessage( 1, 'CoreWire._computeCoreLayers(): Layer of IO pad segment "%s" is not in routing gauge.' \ - .format(self.chipNet.getName()) ) - trace( 550, ',-' ) - - def drawWire ( self ): - trace( 550, ',+', '\tCoreWire.drawWire(): chip:"{}"\n'.format(self.chipNet.getName()) ) - coronaAb = self.conf.getInstanceAb( self.conf.icorona ) - coronaTransf = self.conf.icorona.getTransformation() - self._computeCoreLayers() - trace( 550, '\tbbSegment: {}\n'.format(self.bbSegment) ) - padLayer = self.padSegment.getLayer() - if not isinstance(padLayer,BasicLayer): - padLayer = padLayer.getBasicLayer() - trace( 550, '\tpadLayer={}\n'.format( padLayer )) - if self.side == West or self.side == East: - flags = OnHorizontalPitch - hPitch = self.conf.getPitch( self.symSegmentLayer ) - vPitch = self.conf.getPitch( self.padSegment.getLayer() ) - yCore = self.conf.toCoronaPitchInChip( self.bbSegment.getCenter().getY(), self.symSegmentLayer ) - if self.offset: - if self.offsetType == CoreWire.AtBegin: - yCore += 2*hPitch*self.offset - else: - yCore -= 2*hPitch*self.offset - if self.side == West: - accessDirection = Pin.Direction.WEST - xPadMin = self.bbSegment.getXMin() - xContact = self.corona.coreSymBb.getXMin() - self.offset * 2*vPitch - xPadMax = xContact - xCore = coronaAb.getXMin() - trace( 550, '\txPadMin: {}\n'.format(DbU.getValueString( xPadMin ))) - #if not self.preferredDir: - # #xPadMax += self.bbSegment.getHeight()//2 - # xPadMin += 3*vPitch - # trace( 550, '\txPadMin: {}\n'.format(DbU.getValueString( xPadMin ))) - else: - accessDirection = Pin.Direction.EAST - xPadMax = self.bbSegment.getXMax() - xContact = self.corona.coreSymBb.getXMax() + self.offset * 2*vPitch - xPadMin = xContact - xCore = coronaAb.getXMax() - vPitch - #if not self.preferredDir: - # #xPadMin -= self.bbSegment.getHeight()//2 - # xPadMin -= 3*vPitch - if self.addJumper: - rg = self.conf.routingGauge - gaugeM5 = rg.getLayerGauge( 4 ) - wwidthM5 = gaugeM5.getWireWidth() - jumperGap = 3*gaugeM5.getPitch() - if self.side == East: - gapCenter = xPadMin + 5*gaugeM5.getPitch() - else: - gapCenter = xPadMax - 5*gaugeM5.getPitch() - xJumpMin = gapCenter - jumperGap//2 - xJumpMax = gapCenter + jumperGap//2 - hChip1 = Horizontal.create( self.chipNet - , self.padSegment.getLayer() - , self.bbSegment.getCenter().getY() - , self.bbSegment.getHeight() - , xPadMin - , xJumpMin - ) - trace( 550, '\thChip1: %s\n' % str(hChip1) ) - hChip2 = Horizontal.create( self.chipNet - , self.padSegment.getLayer() - , self.bbSegment.getCenter().getY() - , self.bbSegment.getHeight() - , xJumpMax - , xPadMax - ) - trace( 550, '\thChip2: %s\n' % str(hChip2) ) - hChip = hChip2 if self.side == West else hChip1 - bvia1 = BigVia( self.chipNet - , rg.getLayerDepth( self.padSegment.getLayer() ) - , xJumpMin - , self.bbSegment.getCenter().getY() - , wwidthM5 - , 2*wwidthM5 - , flags=BigVia.AllowAllExpand ) - bvia1.mergeDepth( gaugeM5.getDepth() ) - trace( 550, '\tbvia1: %s\n' % str(bvia1) ) - bvia1.doLayout() - bvia2 = BigVia( self.chipNet - , rg.getLayerDepth( self.padSegment.getLayer() ) - , xJumpMax - , self.bbSegment.getCenter().getY() - , wwidthM5 - , 2*wwidthM5 - , flags=BigVia.AllowAllExpand ) - bvia2.mergeDepth( gaugeM5.getDepth() ) - bvia2.doLayout() - trace( 550, '\tbvia2: %s\n' % str(bvia2) ) - Horizontal.create( bvia1.getPlate( gaugeM5.getLayer() ) - , bvia2.getPlate( gaugeM5.getLayer() ) - , gaugeM5.getLayer() - , self.bbSegment.getCenter().getY() - , wwidthM5 - ) - else: - hChip = Horizontal.create( self.chipNet - , self.padSegment.getLayer() - , self.bbSegment.getCenter().getY() - , self.bbSegment.getHeight() - , xPadMin - , xPadMax - ) - trace( 550, '\thChip={}\n'.format( hChip )) - trace( 550, '\tself.arraySize: %s\n' % str(self.arraySize) ) - if self.arraySize: - contacts = self.conf.coronaContactArray( self.chipNet - , self.symContactLayer - , xContact - , yCore - , self.arraySize - , flags - ) - vStrapBb = Box() - for contact in contacts: - bb = contact.getBoundingBox() - coronaTransf.applyOn( bb ) - vStrapBb.merge( bb ) - else: - contact = self.conf.coronaContact( self.chipNet - , self.symContactLayer - , xContact - , yCore - , self.symContactSize[0] - , self.symContactSize[1] - , flags - ) - vStrapBb = contact.getBoundingBox( padLayer ) - coronaTransf.applyOn( vStrapBb ) - if self.arraySize: - if self.side == West: xContact = min( xContact, vStrapBb.getXMin() ) - else: xContact = max( xContact, vStrapBb.getXMax() ) - hCorona = self.conf.coronaHorizontal( self.chipNet - , self.symSegmentLayer - , yCore - , self.bbSegment.getHeight() - , xContact - , xCore - ) - trace( 550, '\thCorona={}\n'.format( hCorona )) - trace( 550, '\tCORONA PIN: {} {}\n'.format(self.chipNet, self.count) ) - pin = self.conf.coronaPin( self.chipNet - , self.count - , accessDirection - , self.symSegmentLayer - , xCore - , yCore - , DbU.fromLambda( 1.0 ) - , self.bbSegment.getHeight() - ) - hChipBb = hChip.getBoundingBox( padLayer ) - trace( 550, '\thChipBb={}\n'.format( hChipBb )) - vStrapBb.merge( vStrapBb.getXMin(), hChipBb.getYMin() ) - vStrapBb.merge( vStrapBb.getXMin(), hChipBb.getYMax() ) - #hCoronaBb = hCorona.getBoundingBox( padLayer ) - hCoronaBb = hCorona.getBoundingBox() - self.conf.icorona.getTransformation().applyOn( hCoronaBb ) - trace( 550, '\thCoronaBb={}\n'.format( hCoronaBb )) - vStrapBb.merge( vStrapBb.getXMin(), hCoronaBb.getYMin() ) - vStrapBb.merge( vStrapBb.getXMin(), hCoronaBb.getYMax() ) - if self.padSegment.getLayer().isSymbolic(): - vStrapBb.inflate( 0, -self.padSegment.getLayer().getExtentionCap() - , 0, -self.padSegment.getLayer().getExtentionCap() ) - v = Vertical.create( self.chipNet - , self.padSegment.getLayer() - , vStrapBb.getCenter().getX() - , vStrapBb.getWidth() - , vStrapBb.getYMin() - , vStrapBb.getYMax() - ) - trace( 550, '\tvChip={}\n'.format( v )) - else: - flags = OnVerticalPitch - hPitch = self.conf.getPitch( self.padSegment.getLayer() ) - vPitch = self.conf.getPitch( self.symSegmentLayer ) - trace( 550, '\t%s translated of %s\n' % (self.symSegmentLayer, DbU.getValueString( 2*vPitch*self.offset )) ) - xCore = self.conf.toCoronaPitchInChip( self.bbSegment.getCenter().getX(), self.symSegmentLayer ) - if self.offset: - if self.offsetType == CoreWire.AtBegin: - xCore += 2*vPitch*self.offset - else: - xCore -= 2*vPitch*self.offset - if self.side == South: - accessDirection = Pin.Direction.SOUTH - yPadMin = self.bbSegment.getYMin() - yPadMax = self.corona.coreSymBb.getYMin() - self.offset * 2*hPitch - yContact = yPadMax - yCore = coronaAb.getYMin() - trace( 550, '\tSouth pad: yPadMin={}\n'.format(DbU.getValueString(yPadMin) )) - #if not self.preferredDir: - # yPadMax += self.bbSegment.getWidth()//2 - # yPadMin += 3*hPitch - else: - accessDirection = Pin.Direction.NORTH - yPadMax = self.bbSegment.getYMax() - yPadMin = self.corona.coreSymBb.getYMax() + self.offset * 2*hPitch - yContact = yPadMin - yCore = coronaAb.getYMax() - vPitch - #if not self.preferredDir: - # yPadMin -= self.bbSegment.getWidth()//2 - # yPadMin -= 3*hPitch - vChip = Vertical.create( self.chipNet - , self.padSegment.getLayer() - , self.bbSegment.getCenter().getX() - , self.bbSegment.getWidth() - , yPadMin - , yPadMax - ) - trace( 550, '\tself.arraySize: %s\n' % str(self.arraySize) ) - if self.arraySize: - contacts = self.conf.coronaContactArray( self.chipNet - , self.symContactLayer - , xCore - , yContact - , self.arraySize - , flags - ) - hStrapBb = Box() - for contact in contacts: - bb = contact.getBoundingBox() - coronaTransf.applyOn( bb ) - hStrapBb.merge( bb ) - trace( 550, '\thStrapBb={} contact={}\n'.format(hStrapBb,contact) ) - else: - contact = self.conf.coronaContact( self.chipNet - , self.symContactLayer - , self.bbSegment.getCenter().getX() - , yContact - , self.symContactSize[0] - , self.symContactSize[1] - , flags - ) - hStrapBb = contact.getBoundingBox( padLayer ) - coronaTransf.applyOn( hStrapBb ) - trace( 550, '\thStrapBb={}\n'.format(hStrapBb) ) - if self.arraySize: - if self.side == South: yContact = min( yContact, hStrapBb.getYMin() ) - else: yContact = max( yContact, hStrapBb.getYMax() ) - trace( 550, '\txCore: {:<.1f}L {:<}\n'.format(DbU.toLambda(xCore ), DbU.getValueString(xCore )) ) - trace( 550, '\tyContact: {:<.1f}L {:<}\n'.format(DbU.toLambda(yContact), DbU.getValueString(yContact)) ) - trace( 550, '\tyCore: {:<.1f}L {:<}\n'.format(DbU.toLambda(yCore ), DbU.getValueString(yCore )) ) - vCorona = self.conf.coronaVertical( self.chipNet - , self.symSegmentLayer - , xCore - , self.bbSegment.getWidth() - , yContact - , yCore - ) - trace( 550, '\tvCorona={}\n'.format(vCorona) ) - pin = self.conf.coronaPin( self.chipNet - , self.count - , accessDirection - , self.symSegmentLayer - , xCore - , yCore - , self.bbSegment.getWidth() - , DbU.fromLambda( 1.0 ) - ) - vChipBb = vChip.getBoundingBox() - hStrapBb.merge( vChipBb.getXMin(), hStrapBb.getYMin() ) - hStrapBb.merge( vChipBb.getXMax(), hStrapBb.getYMin() ) - vCoronaBb = vCorona.getBoundingBox() - self.conf.icorona.getTransformation().applyOn( vCoronaBb ) - hStrapBb.merge( vCoronaBb.getXMin(), hStrapBb.getYMin() ) - hStrapBb.merge( vCoronaBb.getXMax(), hStrapBb.getYMin() ) - if self.padSegment.getLayer().isSymbolic(): - hStrapBb.inflate( -self.padSegment.getLayer().getExtentionCap(), 0 - , -self.padSegment.getLayer().getExtentionCap(), 0 ) - hStrap = Horizontal.create( self.chipNet - , self.padSegment.getLayer() - , hStrapBb.getCenter().getY() - , hStrapBb.getHeight() - , hStrapBb.getXMin() - , hStrapBb.getXMax() - ) - trace( 550, '\thStrap={}\n'.format(hStrap) ) - if self.side & North: self.corona.northSide.pins.append( pin ) - if self.side & South: self.corona.southSide.pins.append( pin ) - if self.side & East : self.corona.eastSide .pins.append( pin ) - if self.side & West : self.corona.westSide .pins.append( pin ) - trace( 550, '-' ) diff --git a/cumulus/src/plugins/alpha/chip/chip.py b/cumulus/src/plugins/alpha/chip/chip.py deleted file mode 100644 index dc1b2bc6..00000000 --- a/cumulus/src/plugins/alpha/chip/chip.py +++ /dev/null @@ -1,159 +0,0 @@ - -# This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved -# -# +-----------------------------------------------------------------+ -# | C O R I O L I S | -# | C u m u l u s - P y t h o n T o o l s | -# | | -# | Author : Jean-Paul CHAPUT | -# | E-mail : Jean-Paul.Chaput@lip6.fr | -# | =============================================================== | -# | Python : "./plugins/chip/chip.py" | -# +-----------------------------------------------------------------+ - - -import sys -import traceback -import os.path -import optparse -import math -import cProfile -import pstats -import Cfg -import Hurricane -from Hurricane import DataBase, DbU ,Point, Transformation, Box, \ - Path, Occurrence, UpdateSession, Breakpoint, \ - Net, RoutingPad, Contact, Horizontal, Vertical, \ - Instance, HyperNet, Query -import Viewer -import CRL -from CRL import RoutingLayerGauge -import helpers -from helpers import trace -from helpers.io import ErrorMessage, WarningMessage -from helpers.overlay import UpdateSession -import Etesian -import Anabatic -import Katana -import Unicorn -import plugins -import plugins.rsave -from plugins.alpha.block.block import Block -import plugins.alpha.chip.pads -import plugins.alpha.chip.power -import plugins.alpha.chip.powerplane -import plugins.alpha.chip.corona -import plugins.alpha.harness.pads - - -# -------------------------------------------------------------------- -# Class : "chip.Chip" - -class Chip ( Block ): - - def __init__ ( self, conf ): - super(Chip,self).__init__( conf ) - - def validate ( self ): - self.conf.validated = True - coreAb = self.conf.core.getAbutmentBox() - if (not coreAb.isEmpty()): - if coreAb.getWidth () <= self.conf.coreAb.getWidth() \ - and coreAb.getHeight() <= self.conf.coreAb.getHeight(): - self.conf.coreSize = (coreAb.getWidth(), coreAb.getHeight()) - else: - raise ErrorMessage( 1, [ 'Core "{}" already have an abutment box, bigger than the requested one:' \ - .format(self.conf.core.getName()) - , " Cell abutment box: {}".format(coreAb) - , " Maximum abutment box: {}".format(self.conf.coreAb) ] ) - self.conf.validated = False - return self.conf.validated - - def doChipFloorplan ( self ): - self.padsCorona = None - minHCorona = self.conf.minHCorona - minVCorona = self.conf.minVCorona - self.conf.chipValidate() - if not self.conf.useHarness: - print( ' - Chip has {} north pads.'.format(len(self.conf.chipConf.northPads)) ) - print( ' - Chip has {} south pads.'.format(len(self.conf.chipConf.southPads)) ) - print( ' - Chip has {} east pads.' .format(len(self.conf.chipConf.eastPads )) ) - print( ' - Chip has {} west pads.' .format(len(self.conf.chipConf.westPads )) ) - self.conf.computeCoronaBorder() - if not self.conf.validated: - raise ErrorMessage( 1, 'chip.doChipFloorplan(): Chip is not valid, aborting.' ) - self.conf.chip.setAbutmentBox( self.conf.chipAb ) - trace( 550, '\tSet chip ab:{}\n'.format(self.conf.chip.getAbutmentBox()) ) - trace( 550, '\tUsing core ab:{}\n'.format(self.conf.core.getAbutmentBox()) ) - self.padsCorona = plugins.alpha.chip.pads.Corona( self ) - self.conf.validated = self.padsCorona.validate() - if not self.conf.validated: - return False - self.padsCorona.doLayout() - self.validate() - minHCorona = self.conf.minHCorona - minVCorona = self.conf.minVCorona - trace( 550, '\tminHCorona={}\n'.format(DbU.getValueString( minHCorona ))) - trace( 550, '\tminVCorona={}\n'.format(DbU.getValueString( minVCorona ))) - else: - self.padsCorona = plugins.alpha.harness.pads.Corona( self ) - self.padsCorona.doLayout() - innerBb = Box( self.conf.coreAb ) - innerBb.inflate( minHCorona, minVCorona ) - coronaAb = self.conf.corona.getAbutmentBox() - if innerBb.getWidth() > coronaAb.getWidth(): - raise ErrorMessage( 1, 'Core is too wide to fit into the corona, needs {} but only has {}.' \ - .format( DbU.getValueString(innerBb .getWidth()) - , DbU.getValueString(coronaAb.getWidth()) ) ) - if innerBb.getHeight() > coronaAb.getHeight(): - raise ErrorMessage( 1, 'Core is too tall to fit into the corona, needs {} but only has {}.' \ - .format( DbU.getValueString(innerBb .getHeight()) - , DbU.getValueString(coronaAb.getHeight()) ) ) - with UpdateSession(): - self.conf.core.setAbutmentBox( self.conf.coreAb ) - x = (coronaAb.getWidth () - self.conf.coreAb.getWidth ()) // 2 - y = (coronaAb.getHeight() - self.conf.coreAb.getHeight()) // 2 - trace( 550, '\tCore X, {} '.format(DbU.getValueString(x)) ) - x = x - (x % self.conf.sliceHeight) - trace( 550, ' adjusted on {}, {}\n'.format( DbU.getValueString(self.conf.sliceHeight) - , DbU.getValueString(x)) ) - y = y - (y % self.conf.sliceHeight) - self.conf.icore.setTransformation ( Transformation(x,y,Transformation.Orientation.ID) ) - self.conf.icore.setPlacementStatus( Instance.PlacementStatus.FIXED ) - self.conf.refresh() - - def doConnectCore ( self ): - if self.padsCorona: - self.padsCorona.doPowerLayout() - if self.conf.routingGauge.hasPowerSupply(): - power = plugins.alpha.chip.powerplane.Builder( self.conf ) - power.connectPower() - #power.connectHTrees( self.hTrees ) - power.doLayout() - else: - if self.conf.useHarness: - return - power = plugins.alpha.chip.power.Builder( self.conf ) - power.connectPower() - power.connectClocks() - power.doLayout() - self.conf.refresh() - corona = plugins.alpha.chip.corona.Builder( power ) - corona.connectPads( self.padsCorona ) - corona.connectCore() - corona.doLayout() - self.conf.refresh() - - def doPnR ( self ): - status = super(Chip,self).doPnR() - self.conf.refresh( self.conf.chip ) - return self.conf.validated and status - - def save ( self, flags=0 ): - if not self.conf.validated: - raise ErrorMessage( 1, 'chip.save(): Chip is not valid, aborting.' ) - views = CRL.Catalog.State.Logical - if self.conf.routingGauge.isSymbolic(): - views = views | CRL.Catalog.State.Physical - super(Chip,self).save( flags ) diff --git a/cumulus/src/plugins/alpha/chip/configuration.py b/cumulus/src/plugins/alpha/chip/configuration.py deleted file mode 100644 index ab6cdffd..00000000 --- a/cumulus/src/plugins/alpha/chip/configuration.py +++ /dev/null @@ -1,715 +0,0 @@ - -# This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved -# -# +-----------------------------------------------------------------+ -# | C O R I O L I S | -# | C u m u l u s - P y t h o n T o o l s | -# | | -# | Author : Jean-Paul CHAPUT | -# | E-mail : Jean-Paul.Chaput@lip6.fr | -# | =============================================================== | -# | Python : "./plugins/chip/configuration.py" | -# +-----------------------------------------------------------------+ - -import sys -import os.path -import Cfg -from Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ - Path, Layer, Occurrence, Net, RoutingPad, \ - Horizontal, Vertical, Contact, Pin, Plug, \ - Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace -from helpers.utils import classdecorator -from helpers.overlay import UpdateSession -from helpers.io import ErrorMessage, WarningMessage, \ - vprint, catch -import plugins.chip -from plugins.alpha.block.configuration import BlockConf - -__all__ = [ 'ChipConf' ] - - -plugins.alpha.chip.importConstants( globals() ) -af = CRL.AllianceFramework.get() - - -# ------------------------------------------------------------------- -# Class : "Configuration.ChipConf". - -class ChipConf ( BlockConf ): - - @staticmethod - def _toSymbolic ( u, rounding ): - """ - Pitch the coordinates ``u`` to the symbolic grid, according - to ``rounding`` (Superior or Inferior). - """ - oneLambda = DbU.fromLambda( 1.0 ) - remainder = u % oneLambda - if remainder: - if rounding == Superior: u = u + (oneLambda - remainder) - else: u = u - remainder - return u - - @staticmethod - def toSymbolic ( v, rounding ): - """ - Pitch the coordinates of object ``v`` to the symbolic grid, - according to ``rounding``. Were ``v`` can be: - - * A scalar, then rounding is Inferior or Superior. - * A Box, then rounding is: - - * Inwards: the pitched box will be fully enclosed in the - original box. - * Outwards: the pitched box will fully enclose the original - box. - """ - if isinstance(v,int): return ChipConf._toSymbolic( v, rounding ) - if isinstance(v,Box): - if rounding & Inwards: - roundings = [ Superior - , Superior - , Inferior - , Inferior ] - else: - roundings = [ Inferior - , Inferior - , Superior - , Superior ] - xMin = ChipConf._toSymbolic( v.getXMin(), roundings[0] ) - yMin = ChipConf._toSymbolic( v.getYMin(), roundings[1] ) - xMax = ChipConf._toSymbolic( v.getXMax(), roundings[2] ) - yMax = ChipConf._toSymbolic( v.getYMax(), roundings[3] ) - return Box( xMin, yMin, xMax, yMax ) - return v - - def __init__ ( self, cell, ioPins=[], ioPads=[] ): - trace( 550, ',+', 'ChipConf.__init__(): "{}"'.format(cell.getName()) ) - super(ChipConf,self).__init__( cell, ioPins, ioPads ) - #trace( 550, '\tONE LAMBDA = %s\n' % DbU.getValueString(DbU.fromLambda(1.0)) ) - self.validated = True - # Block Corona parameters (triggers loading from disk). - self.cfg.chip.padCoreSide = None - self.cfg.chip.supplyRailWidth = None - self.cfg.chip.supplyRailPitch = None - self.cfg.chip.block.rails.count = None - self.cfg.chip.block.rails.hWidth = None - self.cfg.chip.block.rails.vWidth = None - self.cfg.chip.block.rails.hSpacing = None - self.cfg.chip.block.rails.vSpacing = None - self._railsCount = self.cfg.chip.block.rails.count - # Global Net names. - self.blockageName = "blockagenet" - # Global Nets. - self.coronaVdd = None - self.coronaVss = None - self.coronaCks = [] - self.blockageNet = None - self.padsHavePosition = False - self.chipLogos = [] - self.minHCorona = 0 - self.minVCorona = 0 - trace( 550, '-' ) - - @property - def padCoreSide ( self ): - return self.cfg.chip.padCoreSide - - @property - def railsCount ( self ): - return self._railsCount - - @railsCount.setter - def railsCount ( self, count ): - self._railsCount = count - - @property - def hRailWidth ( self ): - return self.cfg.chip.block.rails.hWidth - - @property - def vRailWidth ( self ): - return self.cfg.chip.block.rails.vWidth - - @property - def hRailSpace ( self ): - return self.cfg.chip.block.rails.hSpacing - - @property - def vRailSpace ( self ): - return self.cfg.chip.block.rails.vSpacing - - def computeCoronaBorder ( self ): - global af - if self.useClockTree: - clockNets = [] - for net in self.cellPnR.getNets(): - if net.isClock(): - clockNets.append( net ) - self.railsCount = self.cfg.chip.block.rails.count + len(clockNets) - trace( 550, '\tself.railsCount: {}\n'.format(self.railsCount) ) - hRailsSize = self.railsCount*(self.hRailWidth + self.hRailSpace) + self.hRailSpace - trace( 550, '\thRailsSize={}\n'.format(DbU.getValueString( hRailsSize ))) - if hRailsSize % self.sliceHeight: - hRailsSize += self.sliceHeight - (hRailsSize % self.sliceHeight) - trace( 550, '\thRailsSize (sliceHeight)={}\n'.format(DbU.getValueString( hRailsSize ))) - self.minHCorona = hRailsSize #+ self.sliceHeight - vRailsSize = self.railsCount*(self.vRailWidth + self.vRailSpace) + self.vRailSpace - if vRailsSize % self.sliceHeight: - vRailsSize += self.sliceHeight - (vRailsSize % self.sliceHeight) - self.minVCorona = vRailsSize #+ self.sliceHeight - - def chipValidate ( self ): - #self.checkPads() - #self.checkCorona() - #self.computeChipSize() - #self.checkChipSize() - self.findPowerAndClockNets() - return - - def getInstanceAb ( self, instance ): - ab = instance.getMasterCell().getAbutmentBox() - instance.getTransformation().applyOn( ab ) - if instance.getCell() == self.chip: return ab - if instance.getCell() != self.corona: - raise ErrorMessage( 1, 'ChipConf.getInstanceAb(): Instance "{}" neither belong to chip or corona.' \ - .format(instance.getName()) ) - return ab - self.icorona.getTransformation().applyOn( ab ) - return ab - - def setupICore ( self ): - """ - Setup the abutment box of the *core* master cell and position it's unique - instance (*icore*) in the center of the *corona* master cell. - """ - with UpdateSession(): - trace( 550, ',+', '\tChipConf.setupICore()\n' ) - ab = self.getInstanceAb( self.icorona ) - if ab.isEmpty(): - raise ErrorMessage( 1, 'ChipConf.setupICore(): Attempt to setup core *before* corona.' ) - return - #ab.inflate( -gapX1, -gapY1, -gapX2, -gapY2 ) - ab = self.toSymbolic( ab, Inwards ) - trace( 550, '\tself.coreAb:{}\n'.format(self.coreAb) ) - if self.core.getAbutmentBox().isEmpty(): - if not self.coreAb.isEmpty(): - trace( 550, '\tUsing user-defined CORE size:{}\n'.format(self.coreSize) ) - ab = self.coreAb - else: - ab.inflate( -self.minHCorona, -self.minVCorona ) - self.coreSize = (ab.getWidth(), ab.getHeight()) - trace( 550, '\tSetting CORE abutment box:{}\n'.format(ab) ) - self.core.setAbutmentBox( Box( 0, 0, ab.getWidth(), ab.getHeight() ) ) - self.coreSize = ( self.coreSize[0] - self.coreSize[0] % self.sliceStep - , self.coreSize[1] - self.coreSize[1] % self.sliceHeight ) - self.core.setAbutmentBox( Box( 0, 0, self.coreAb.getWidth(), self.coreAb.getHeight() ) ) - trace( 550, '\tCORE ab:{}\n'.format(self.coreAb) ) - coreX = (self.coronaAb.getWidth () - self.coreAb.getWidth ()) // 2 - trace( 550, '\tCore X, {} '.format(DbU.getValueString(coreX)) ) - coreX = coreX - (coreX % self.sliceHeight) - trace( 550, ' adjusted on {}, {}\n'.format( DbU.getValueString(self.sliceHeight) - , DbU.getValueString(coreX)) ) - coreY = (self.coronaAb.getHeight() - self.coreAb.getHeight()) // 2 - coreY = coreY - (coreY % self.sliceHeight) - self.icore.setTransformation( Transformation( coreX, coreY, Transformation.Orientation.ID ) ) - self.icore.setPlacementStatus( Instance.PlacementStatus.FIXED ) - trace( 550, '-' ) - - def getCoronaNet ( self, chipNet ): - for plug in chipNet.getPlugs(): - if plug.getInstance() == self.icorona: - return plug.getMasterNet() - return None - - def toRoutingGauge ( self, uMin, uMax, layer ): - trace( 550, ',+', '\ttoRoutingGauge() [{} {}] {}\n' \ - .format(DbU.getValueString(uMin), DbU.getValueString(uMax), layer) ) - ab = self.corona.getAbutmentBox() - lg = None - mask = layer.getMask() - for layerGauge in self.routingGauge.getLayerGauges(): - if layerGauge.getLayer().getMask() == mask: - lg = layerGauge - trace( 550, '\tUsing layer gauge {}\n'.format(lg) ) - break - if uMax < uMin: uMin, uMax = uMax, uMin - if lg: - if lg.getDirection() == RoutingLayerGauge.Horizontal: - abMin = ab.getYMin() - abMax = ab.getYMax() - else: - abMin = ab.getXMin() - abMax = ab.getXMax() - if uMin <= abMin: - shiftRight = abMin - uMin + lg.getPitch() - uMin += shiftRight - uMax += shiftRight - if uMax >= abMax: - shiftLeft = uMax - abMax + lg.getPitch() - uMin -= shiftLeft - uMax -= shiftLeft - iTrackMin = lg.getTrackIndex( abMin, abMax, uMin, RoutingLayerGauge.Superior ) - iTrackMax = lg.getTrackIndex( abMin, abMax, uMax, RoutingLayerGauge.Inferior ) - if iTrackMax < iTrackMin: iTrackMax = iTrackMin - uTrackMin = lg.getTrackPosition( abMin, iTrackMin ) - uTrackMax = lg.getTrackPosition( abMin, iTrackMax ) - axis = (uTrackMax + uTrackMin) // 2 - width = (iTrackMax - iTrackMin) * lg.getPitch() + lg.getWireWidth() - if self.routingGauge.isSymbolic(): - trace( 550, '\tRoutingGauge is symbolic, adjust on lambda.\n' ) - oneLambda = DbU.fromLambda( 1.0 ) - if axis % oneLambda: - axis -= oneLambda // 2 - width -= oneLambda - trace( 550, '\t[{} {}] -> [{} {}]\n'.format( iTrackMin - , iTrackMax - , DbU.getValueString(uTrackMin) - , DbU.getValueString(uTrackMax) ) ) - trace( 550, '\taxis: {:.1f}L {}\n'.format(DbU.toLambda(axis ), DbU.getValueString(axis )) ) - trace( 550, '\twidth: {:.1f}L {}\n'.format(DbU.toLambda(width), DbU.getValueString(width)) ) - else: - axis = (uMax + uMin) // 2 - width = (uMax - uMin) - trace( 550, '-' ) - return axis, width - - def toCoronaPitchInChip ( self, uCore, layer ): - trace( 550, ',+', '\tChipConf.toCoronaPitchInChip(): uCore: {:.1f}L {}\n' \ - .format(DbU.toLambda(uCore), DbU.getValueString(uCore)) ) - coronaAb = self.getInstanceAb( self.icorona ) - lg = None - mask = layer.getMask() - for layerGauge in self.routingGauge.getLayerGauges(): - if layerGauge.getLayer().getMask() == mask: - lg = layerGauge - break - if not lg: - trace( 550, '-' ) - return 0 - trace( 550, '\t{}\n'.format(lg) ) - if lg: - if lg.getDirection() == RoutingLayerGauge.Horizontal: - uCorona = uCore - coronaAb.getYMin() - else: - uCorona = uCore - coronaAb.getXMin() - uCorona, width = self.toRoutingGauge( uCorona, uCorona, layer ) - trace( 550, '\ttoCoronaPitchInChip(): uCorona: {:.1f}L {}\n' \ - .format(DbU.toLambda(uCorona), DbU.getValueString(uCorona)) ) - if lg: - if lg.getDirection() == RoutingLayerGauge.Horizontal: - uCore = uCorona + coronaAb.getYMin() - else: - uCore = uCorona + coronaAb.getXMin() - trace( 550, '\ttoCoronaPitchInChip(): uCorona: {:.1f}L {}\n'.format(DbU.toLambda(uCorona), DbU.getValueString(uCorona)) ) - trace( 550, '\ttoCoronaPitchInChip(): uCore: {:.1f}L {}\n'.format(DbU.toLambda(uCore ), DbU.getValueString(uCore )) ) - trace( 550, '-' ) - return uCore - - def coronaHorizontal ( self, chipNet, layer, chipY, width, chipXMin, chipXMax ): - trace( 550, ',+', '\tChipConf.coronaHorizontal\n' ) - coronaAb = self.getInstanceAb( self.icorona ) - coronaNet = self.getCoronaNet ( chipNet ) - if not coronaNet: return None - coronaY = chipY - coronaAb.getYMin() - dxMin = ChipConf.toSymbolic( chipXMin - coronaAb.getXMin(), Superior ) - dxMax = ChipConf.toSymbolic( chipXMax - coronaAb.getXMin(), Inferior ) - trace( 550, '\t| chipNet: {} {}\n'.format(chipNet, layer) ) - trace( 550, '\t| Real\n' ) - trace( 550, '\t| axis: {}\n'.format(DbU.getValueString(coronaY)) ) - trace( 550, '\t| width:{}\n'.format(DbU.getValueString(width)) ) - trace( 550, '\t| dxMin:{} ({:.1f}L)\n' \ - .format( DbU.getValueString(chipXMin - coronaAb.getXMin()) - , DbU.toLambda(chipXMin - coronaAb.getXMin()) ) ) - trace( 550, '\t| dxMax:{}\n'.format(DbU.getValueString(chipXMax - coronaAb.getXMin())) ) - coronaY, width = self.toRoutingGauge( coronaY - width//2, coronaY + width//2, layer ) - trace( 550, '\t| On Grid\n' ) - trace( 550, '\t| axis: {:.1f}L or {}\n'.format(DbU.toLambda(coronaY), DbU.getValueString(coronaY)) ) - trace( 550, '\t| width:{:.1f}L or {}\n'.format(DbU.toLambda(width) , DbU.getValueString(width)) ) - trace( 550, '\t| dxMin:{:.1f}L\n'.format(DbU.toLambda(dxMin)) ) - trace( 550, '\t| dxMax:{:.1f}L\n'.format(DbU.toLambda(dxMax)) ) - h = Horizontal.create( coronaNet, layer, coronaY, width, dxMin, dxMax ) - trace( 550, '\t| {}\n'.format(h) ) - trace( 550, '-' ) - return h - - def coronaVertical ( self, chipNet, layer, chipX, width, chipYMin, chipYMax ): - trace( 550, ',+', '\tChipConf.coronaVertical\n' ) - coronaAb = self.getInstanceAb( self.icorona ) - coronaNet = self.getCoronaNet( chipNet ) - if not coronaNet: return None - coronaX = chipX - coronaAb.getXMin() - dyMin = ChipConf.toSymbolic( chipYMin - coronaAb.getYMin(), Superior ) - dyMax = ChipConf.toSymbolic( chipYMax - coronaAb.getYMin(), Inferior ) - trace( 550, '\t| chipNet: {} {}\n'.format(chipNet, layer) ) - trace( 550, '\t| Real\n' ) - trace( 550, '\t| axis: {}\n'.format(DbU.getValueString(coronaX)) ) - trace( 550, '\t| width:{}\n'.format(DbU.getValueString(width)) ) - coronaX, width = self.toRoutingGauge( coronaX - width//2, coronaX + width//2, layer ) - trace( 550, '\t| On Grid\n' ) - trace( 550, '\t| axis: {:.1f}L or {}\n'.format(DbU.toLambda(coronaX), DbU.getValueString(coronaX)) ) - trace( 550, '\t| width:{:.1f}L or {}\n'.format(DbU.toLambda(width) , DbU.getValueString(width)) ) - v = Vertical.create( coronaNet, layer, coronaX, width, dyMin, dyMax ) - trace( 550, '\t| {}\n'.format(v) ) - trace( 550, '-' ) - return v - - def coronaContact ( self, chipNet, layer, chipX, chipY, width, height, flags=0 ): - trace( 550, ',+', '\tChipConf.coronaContact\n' ) - coronaAb = self.getInstanceAb( self.icorona ) - coronaNet = self.getCoronaNet( chipNet ) - if not coronaNet: return None - coronaX = chipX - coronaAb.getXMin() - coronaY = chipY - coronaAb.getYMin() - trace( 550, '\t| chipNet: {} {}\n'.format(chipNet,layer) ) - trace( 550, '\t| Real\n' ) - trace( 550, '\t| center: {:>12} {:>12}\n'.format(DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) - trace( 550, '\t| WxH: {:>12} {:>12}\n'.format(DbU.getValueString(width ), DbU.getValueString(height )) ) - topLayer = layer.getTop() - botLayer = layer.getBottom() - if self.isHorizontal(topLayer): - coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, botLayer ) - coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, topLayer ) - else: - coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, topLayer ) - coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, botLayer ) - if not (flags & OnHorizontalPitch): - trace( 550, '\tNot on horizontal routing pitch, Y on lambda only.\n' ) - coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) - if not (flags & OnVerticalPitch ): - trace( 550, '\tNot on vertical routing pitch, X on lambda only.\n' ) - coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) - trace( 550, '\t| On Grid\n' ) - trace( 550, '\t| X axis: {:>12.1f}L or {:>12}\n'.format(DbU.toLambda(coronaX) , DbU.getValueString(coronaX)) ) - trace( 550, '\t| Y axis: {:>12.1f}L or {:>12}\n'.format(DbU.toLambda(coronaY) , DbU.getValueString(coronaY)) ) - trace( 550, '\t| center: {:>12} {:>12}\n' .format(DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) - trace( 550, '\t| WxH: {:>12} {:>12}\n' .format(DbU.getValueString(width ), DbU.getValueString(height )) ) - c = Contact.create( coronaNet - , layer - , coronaX - , coronaY - , width - , height - ) - trace( 550, '\t| {}\n'.format(c) ) - trace( 550, '-' ) - return c - - def getViaPitch ( self, viaLayer ): - topLayer = viaLayer.getTop() - if topLayer.isSymbolic(): - topLayer = topLayer.getBasicLayer() - topEnclosure = viaLayer.getEnclosure( topLayer, Layer.EnclosureH|Layer.EnclosureV ) - topPitch = 2*topEnclosure + viaLayer.getMinimalSize() + topLayer.getMinimalSpacing() - botLayer = viaLayer.getBottom() - if botLayer.isSymbolic(): - botLayer = botLayer.getBasicLayer() - botEnclosure = viaLayer.getEnclosure( botLayer, Layer.EnclosureH|Layer.EnclosureV ) - botPitch = 2*botEnclosure + viaLayer.getMinimalSize() + botLayer.getMinimalSpacing() - viaPitch = max( topPitch, botPitch ) - trace( 550, '\tgetViaPitch of {}: {}\n'.format(viaLayer.getName(),DbU.getValueString(viaPitch)) ) - trace( 550, '\t| minimal size of {}: {}\n'.format(viaLayer.getName(),DbU.getValueString(viaLayer.getMinimalSize())) ) - trace( 550, '\t| enclosure of {}: {}\n'.format(topLayer.getName(),DbU.getValueString(topEnclosure)) ) - trace( 550, '\t| enclosure of {}: {}\n'.format(botLayer.getName(),DbU.getValueString(botEnclosure)) ) - return viaPitch - - def coronaContactArray ( self, chipNet, layer, chipX, chipY, array, flags ): - trace( 550, ',+', '\tChipConf.coronaContactArray\n' ) - viaPitch = self.getViaPitch( layer ) - coronaAb = self.getInstanceAb( self.icorona ) - coronaNet = self.getCoronaNet( chipNet ) - if not coronaNet: return None - trace( 550, '\t| chipNet: {} {}\n'.format(chipNet, layer) ) - coronaX = chipX - coronaAb.getXMin() - coronaY = chipY - coronaAb.getYMin() - topLayer = layer.getTop() - if self.isHorizontal(topLayer): - coronaX, width = self.toRoutingGauge( coronaX, coronaX, layer.getBottom() ) - coronaY, height = self.toRoutingGauge( coronaY, coronaY, topLayer ) - else: - coronaX, width = self.toRoutingGauge( coronaX, coronaX, topLayer ) - coronaY, height = self.toRoutingGauge( coronaY, coronaY, layer.getBottom() ) - if not (flags & OnHorizontalPitch): - trace( 550, '\tNot on horizontal routing pitch, Y on lambda only.\n' ) - coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) - if not (flags & OnVerticalPitch ): - trace( 550, '\tNot on vertical routing pitch, X on lambda only.\n' ) - coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) - contacts = [] - xContact = coronaX - viaPitch * (array[0]-1)//2 - yContact = coronaY - viaPitch * (array[1]-1)//2 - contactSize = layer.getMinimalSize() - trace( 550, '\txContact:{} yContact:{}\n'.format(DbU.getValueString(xContact),DbU.getValueString(yContact)) ) - for i in range(array[0]): - for j in range(array[1]): - c = Contact.create( coronaNet - , layer - , xContact + i*viaPitch - , yContact + j*viaPitch - , contactSize - , contactSize - ) - trace( 550, '\t+ {}\n'.format(c) ) - contacts.append( c ) - trace( 550, '-' ) - return contacts - - def coronaPin ( self, chipNet, count, direction, layer, chipX, chipY, width, height ): - trace( 550, ',+', '\tChipConf.coronaPin\n' ) - coronaAb = self.getInstanceAb( self.icorona ) - coronaNet = self.getCoronaNet( chipNet ) - if not coronaNet: return None - coronaX = chipX - coronaAb.getXMin() - coronaY = chipY - coronaAb.getYMin() - trace( 550, '\t| chipNet: {} ({}) {}\n'.format(chipNet, count, layer) ) - trace( 550, '\t| Real\n' ) - trace( 550, '\t| center: {} {}\n'.format(DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) - trace( 550, '\t| WxH: {} {}\n'.format(DbU.getValueString(width ), DbU.getValueString(height )) ) - topLayer = layer.getTop() - if self.isHorizontal(topLayer): - coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, layer.getBottom() ) - coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, topLayer ) - else: - coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, topLayer ) - coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, layer.getBottom() ) - if direction == Pin.Direction.NORTH or direction == Pin.Direction.SOUTH: - trace( 550, '\tEast/West not on horizontal routing pitch, Y on lambda only.\n' ) - coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) - if direction == Pin.Direction.EAST or direction == Pin.Direction.WEST: - trace( 550, '\tNorth/South not on vertical routing pitch, X on lambda only.\n' ) - coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) - trace( 550, '\t| On Grid\n' ) - trace( 550, '\t| X axis: {:.1f}L or {}\n'.format(DbU.toLambda(coronaY) , DbU.getValueString(coronaY)) ) - trace( 550, '\t| Y axis: {:.1f}L or {}\n'.format(DbU.toLambda(coronaX) , DbU.getValueString(coronaX)) ) - trace( 550, '\t| center: {} {}\n' .format(DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) - trace( 550, '\t| WxH: {} {}\n' .format(DbU.getValueString(width ), DbU.getValueString(height )) ) - c = Pin.create( coronaNet - , '{}.{}'.format(coronaNet.getName(),count) - , direction - , Pin.PlacementStatus.FIXED - , layer - , coronaX - , coronaY - , width - , height - ) - trace( 550, '\t| {}\n'.format(c) ) - trace( 550, '-' ) - return c - - def checkPads ( self ): - - def contains ( padList, side, padInstance ): - for i in range(len(padList)): - if padList[i][1] == padInstance.getName(): - if (padInstance.getMasterCell().getAbutmentBox().getHeight() != self.ioPadHeight): - raise ErrorMessage( 1, 'The pad [{}] {} ({}) on {} side is not an instance of a pad cell.' \ - .format(i,padInstance.getName(),padInstance.getMasterCell().getName(),side) ) - padList[i][1] = padInstance - return True - return False - - def checkNotFounds ( padList, side ): - for i in range(len(padList)): - if not isinstance(padList[i][1],Instance): - print( ErrorMessage( 1, 'The pad [{}] ({}) of list {} do not exists in netlist (skipped).' - .format(i,padList[i][1],side) )) - return - - global af - cellPads = [] - for instance in self.chip.getInstances(): - if contains(self.southPads,'south',instance): continue - if contains(self.northPads,'north',instance): continue - if contains(self.eastPads ,'east' ,instance): continue - if contains(self.westPads ,'west' ,instance): continue - if (instance.getMasterCell().getAbutmentBox().getHeight() == self.ioPadHeight): - raise ErrorMessage( 1, 'Pad "{}" is not on any side (N/S/E/W).'.format(instance.getName()) ) - self.validated = False - else: - self.coronas.append( instance ) - checkNotFounds( self.southPads, 'south' ) - checkNotFounds( self.northPads, 'north' ) - checkNotFounds( self.eastPads , 'east' ) - checkNotFounds( self.westPads , 'west' ) - if len(self.coronas) > 1: - message = [ 'Chip "{}" have more than one corona:'.format(self.chip.getName()) ] - for i in range(len(self.coronas)): - message.append( '{}: {}'.format(i,self.coronas[i].getName()) ) - raise ErrorMessage( 1, message ) - self.validated = False - if len(self.coronas) < 1: - raise ErrorMessage( 1, 'Chip "{}" doesn\'t seems to have a corona.' \ - .format(self.chip.getName()) ) - self.validated = False - else: - for instance in self.corona.getInstances(): - self.cores.append( instance ) - if len(self.cores) > 1: - message = [ 'Chip "{}" have more than one core:'.format(self.chip.getName()) ] - for i in range(len(self.cores)): - message.append( '{}: {}'.format(i,self.cores[i].getName()) ) - raise ErrorMessage( 1, message ) - self.validated = False - - if len(self.cores) < 1: - raise ErrorMessage( 1, 'Chip "{} doesn\'t seems to have a core.' \ - .format(self.chip.getName()) ) - self.validated = False - return - - def findPowerAndClockNets ( self ): - if self.icore: - for plug in self.icore.getPlugs(): - masterNet = plug.getMasterNet() - netType = masterNet.getType() - if netType != Net.Type.POWER \ - and netType != Net.Type.GROUND \ - and netType != Net.Type.CLOCK: - continue - net = plug.getNet() - if not net: - net = self.corona.getNet( masterNet.getName() ) - if not net: - raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Missing global net "{}" at corona level.' \ - .format(masterNet.getName()) ) - self._validated = False - continue - if netType == Net.Type.GROUND: - if self.coronaVss and self.coronaVss != net: - raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Multiple ground nets "{}" and "{}" at corona level.' \ - .format(self.coronaVss.getName(), net.getName()) ) - self._validated = False - continue - else: - self.coronaVss = net - - if netType == Net.Type.POWER: - if self.coronaVdd and self.coronaVdd != net: - raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Multiple power nets "{}" and "{}" at corona level.' \ - .format(self.coronaVdd.getName(), net.getName()) ) - self._validated = False - continue - else: - self.coronaVdd = net - - if netType == Net.Type.CLOCK: - if not net in self.coronaCks: - self.coronaCks.append( net ) - vprint( 2, ' - Using clock "{}".'.format(net.getName()) ) - for net in self.corona.getNets(): - if net.getType() == Net.Type.BLOCKAGE: - self.blockageNet = net - self.blockageName = net.getName() - if not self.blockageNet: - self.blockageNet = Net.create( self.corona, self.blockageName ) - self.blockageNet.setType( Net.Type.BLOCKAGE ) - return - - def checkChipSize ( self ): - if self.chipSize[0] % self.sliceStep: - print( WarningMessage( 'ChipConf.checkChipSize(): Width of "{}" ({})is not on sliceStep ({}), ajusted.' \ - .format( self.chipConf.name - , DbU.getValueString(self.chipSize[0]) - , DbU.getValueString(self.sliceStep))) ) - adjust = self.sliceStep - self.chipSize[0] % self.sliceStep - self.chipSize = (self.chipSize[0] + adjust, self.chipSize[1]) - if self.chipSize[1] % self.sliceStep: - print( WarningMessage( 'ChipConf.checkChipSize(): Height of "{}" ({})is not on sliceStep ({}), ajusted.' \ - .format( self.chipConf.name - , DbU.getValueString(self.chipSize[1]) - , DbU.getValueString(self.sliceStep))) ) - adjust = self.sliceStep - self.chipSize[1] % self.sliceStep - self.chipSize = (self.chipSize[0], self.chipSize[1] + adjust) - - #if self._coreSize.isEmpty(): return - # - #minWidth = self._coreSize.getWidth () + self._minCorona + 2*self._padHeight - #minHeight = self._coreSize.getHeight() + self._minCorona + 2*self._padHeight - # - #if self._chipSize.getWidth() < minWidth: - # raise ErrorMessage( 1, 'Core is too wide to fit into the chip. Needs: %d, but has %d' \ - # % ( DbU.toLambda(minWidth), DbU.toLambda(self._chipSize.getWidth()) ) ) - # self._validated = False - # - #if self._chipSize.getHeight() < minHeight: - # raise ErrorMessage( 1, 'Core is too wide to fit into the chip. Needs: %d, but has %d' \ - # % ( DbU.toLambda(minHeight), DbU.toLambda(self._chipSize.getHeight()) ) ) - # self._validated = False - return - - def checkCorona ( self ): - trace( 550, ',+', 'Configuration.checkCorona()\n' ) - netPads = {} - for plug in self.icorona.getPlugs(): - padNet = plug.getNet() - coronaNet = plug.getMasterNet() - if not padNet and coronaNet.isGlobal(): - padNet = self.chip.getNet( coronaNet.getName() ) - if padNet: - if not padNet in netPads: - trace( 550, '\t{:>20} <-> {:<20}\n'.format(padNet.getName(),coronaNet.getName()) ) - netPads[ padNet ] = coronaNet - else: - raise ErrorMessage( 1, 'ChipConf.checkCorona(): Corona nets "{}" and "{}" connected to the same pad net "{}".' \ - .format(coronaNet.getName(),netPads[padNet].getName(),padNet.getName()) ) - self._validated = False - trace( 550, '-' ) - return - - def computeChipSize ( self ): - - def getSideLength ( pads ): - sideLength = self.ioPadHeight * 2 - for pad in pads: sideLength += pad.getMasterCell().getAbutmentBox().getWidth() - return sideLength - - if not self.chipSize.isEmpty(): return - southPadsLength = getSideLength( self.southPads ) - northPadsLength = getSideLength( self.northPads ) - eastPadsLength = getSideLength( self.eastPads ) - westPadsLength = getSideLength( self.westPads ) - horizontalPads = max( len(self.southPads), len(self.northPads) ) - verticalPads = max( len(self.eastPads ), len(self.westPads ) ) - self.chipSize = ( max( southPadsLength, northPadsLength ) - , max( westPadsLength, eastPadsLength ) ) - - def setupCorona ( self, gapX1, gapY1, gapX2, gapY2 ): - ab = self.chip.getAbutmentBox() - ab.inflate ( -gapX1, -gapY1, -gapX2, -gapY2 ) - ab.inflate ( - self.ioPadHeight ) - ab.translate( - self.ioPadHeight, - self.ioPadHeight) - ab = self.toSymbolic( ab, Inwards ) - - self. corona.setAbutmentBox( Box( 0, 0, ab.getWidth(), ab.getHeight() ) ) - self.icorona.setTransformation( - Transformation( self.toSymbolic( self.ioPadHeight + ab.getXMin(), Superior ) - , self.toSymbolic( self.ioPadHeight + ab.getYMin(), Superior ) - , Transformation.Orientation.ID ) ) - self.icorona.setPlacementStatus( Instance.PlacementStatus.FIXED ) - self.setRoutingBb( self.corona.getAbutmentBox() ) - - def setupCore ( self, gapX1, gapY1, gapX2, gapY2 ): - trace( 550, ',+', '\tChipConf.setupCore()\n' ) - ab = self.getInstanceAb( self.icorona ) - if ab.isEmpty(): - raise ErrorMessage( 1, 'ChipConf.setupCore(): Attempt to setup core *before* corona.' ) - return - ab.inflate( -gapX1, -gapY1, -gapX2, -gapY2 ) - ab = self.toSymbolic( ab, Inwards ) - tracee( 550, '\tself.coreAb:{}\n'.format(self.coreAb) ) - if not self.coreAb.isEmpty(): - trace( 550, '\tUsing user-defined CORE size:{}\n'.format(self.coreSize) ) - ab = self.coreAb - trace( 550, '\tSetting CORE abutment box:{}\n'.format(ab) ) - self.core.setAbutmentBox( Box( 0, 0, ab.getWidth(), ab.getHeight() ) ) - self.icore.setTransformation( - Transformation( ChipConf.toSymbolic(ab.getXMin(),Inferior) - self.icorona.getTransformation().getTx() - , ChipConf.toSymbolic(ab.getYMin(),Inferior) - self.icorona.getTransformation().getTy() - , Transformation.Orientation.ID ) ) - self.icore.setPlacementStatus( Instance.PlacementStatus.FIXED ) - trace( 550, '-' ) diff --git a/cumulus/src/plugins/alpha/core2chip/cmos.py b/cumulus/src/plugins/alpha/core2chip/cmos.py deleted file mode 100644 index 1d154db6..00000000 --- a/cumulus/src/plugins/alpha/core2chip/cmos.py +++ /dev/null @@ -1,184 +0,0 @@ - -# -*- coding: utf-8 -*- -# -# This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved -# -# +-----------------------------------------------------------------+ -# | C O R I O L I S | -# | C u m u l u s - P y t h o n T o o l s | -# | | -# | Author : Jean-Paul CHAPUT | -# | E-mail : Jean-Paul.Chaput@lip6.fr | -# | =============================================================== | -# | Python : "./plugins/core2chip/cmos.py" | -# +-----------------------------------------------------------------+ - -""" -Core2Chip configuration for the SxLib/PxLib Alliance historical -standard cell library. -""" - -import sys -import re -from Hurricane import DbU -from Hurricane import DataBase -from Hurricane import UpdateSession -from Hurricane import Breakpoint -from Hurricane import Transformation -from Hurricane import Instance -from Hurricane import Net -import Viewer -from CRL import Catalog -from CRL import AllianceFramework -from helpers import trace -from helpers.io import ErrorMessage -from plugins.alpha.core2chip.core2chip import CoreToChip as BaseCoreToChip -from plugins.alpha.core2chip.core2chip import IoNet -from plugins.alpha.core2chip.core2chip import IoPad - - -class CoreToChip ( BaseCoreToChip ): - - def __init__ ( self, core ): - BaseCoreToChip.__init__ ( self, core ) - self.ringNetNames = { 'vsse' : None - , 'vssi' : None - , 'vdde' : None - , 'vddi' : None - , 'ck' : None # Go through the pads from pck_px. - } - self.ioPadInfos = [ BaseCoreToChip.IoPadInfo( IoPad.IN , 'pi_px' , 'pad', ['t',] ) - , BaseCoreToChip.IoPadInfo( IoPad.OUT , 'po_px' , 'pad', ['i',] ) - , BaseCoreToChip.IoPadInfo( IoPad.TRI_OUT, 'pot_px' , 'pad', ['i', 'b'] ) - , BaseCoreToChip.IoPadInfo( IoPad.BIDIR , 'piot_px', 'pad', ['i', 't', 'b'] ) - ] - self._getPadLib() - return - - def _getPadLib ( self ): - self.padLib = AllianceFramework.get().getLibrary( "pxlib" ) - if not self.padLib: - message = [ 'CoreToChip.cmos._getPadLib(): Unable to find Alliance "pxlib" library' ] - raise ErrorMessage( 1, message ) - - def getNetType ( self, netName ): - if netName.startswith('vss'): return Net.Type.GROUND - if netName.startswith('vdd'): return Net.Type.POWER - if netName in ('cki', 'ck'): return Net.Type.CLOCK - return Net.Type.LOGICAL - - def isGlobal ( self, netName ): - if netName in self.ringNetNames: return True - return False - - def getCell ( self, masterCellName ): - #cell = self.padLib.getCell( masterCellName ) - cell = AllianceFramework.get().getCell( masterCellName, Catalog.State.Views ) - if not cell: - raise ErrorMessage( 1, 'cmos.getCell(): I/O pad library "%s" does not contain cell named "%s"' \ - % (self.padLib.getName(),masterCellName) ) - return cell - - def _buildAllGroundPads ( self, ioPadConf ): - coreNet = self.core .getNet( ioPadConf.coreSupplyNetName ) - coronaNet = self.corona.getNet( ioPadConf.coreSupplyNetName ) - chipNet = self.chip .getNet( ioPadConf.coreSupplyNetName ) - padNet = self.chip .getNet( ioPadConf.padSupplyNetName ) - if not coronaNet: - coronaNet = Net.create( self.corona, ioPadConf.coreSupplyNetName ) - coronaNet.setExternal( True ) - coronaNet.setGlobal ( True ) - coronaNet.setType ( Net.Type.GROUND ) - self.icore.getPlug( coreNet ).setNet( coronaNet ) - if not chipNet: - chipNet = Net.create( self.chip, ioPadConf.coreSupplyNetName ) - chipNet.setExternal( True ) - chipNet.setType ( Net.Type.GROUND ) - self.icorona.getPlug( coronaNet ).setNet( chipNet ) - self.ringNetNames['vssi'] = chipNet - if not padNet: - padNet = Net.create( self.chip, ioPadConf.padSupplyNetName ) - padNet.setExternal( True ) - padNet.setType ( Net.Type.GROUND ) - self.ringNetNames['vsse'] = padNet - ioPadConf.pads.append( Instance.create( self.chip - , 'p_vssick_{}'.format(ioPadConf.index) - , self.getCell('pvssick_px') ) ) - ioPadConf.pads.append( Instance.create( self.chip - , 'p_vsseck_{}'.format(ioPadConf.index) - , self.getCell('pvsseck_px') ) ) - self._connect( ioPadConf.pads[0], chipNet, 'vssi' ) - self._connect( ioPadConf.pads[1], padNet , 'vsse' ) - self.groundPadCount += 1 - self.chipPads += ioPadConf.pads - - def _buildAllPowerPads ( self, ioPadConf ): - coreNet = self.core .getNet( ioPadConf.coreSupplyNetName ) - coronaNet = self.corona.getNet( ioPadConf.coreSupplyNetName ) - chipNet = self.chip .getNet( ioPadConf.coreSupplyNetName ) - padNet = self.chip .getNet( ioPadConf.padSupplyNetName ) - if not coronaNet: - coronaNet = Net.create( self.corona, ioPadConf.coreSupplyNetName ) - coronaNet.setExternal( True ) - coronaNet.setGlobal ( True ) - coronaNet.setType ( Net.Type.POWER ) - self.icore.getPlug( coreNet ).setNet( coronaNet ) - if not chipNet: - chipNet = Net.create( self.chip, ioPadConf.coreSupplyNetName ) - chipNet.setExternal( True ) - chipNet.setType ( Net.Type.POWER ) - self.icorona.getPlug( coronaNet ).setNet( chipNet ) - self.ringNetNames['vddi'] = chipNet - if not padNet: - padNet = Net.create( self.chip, ioPadConf.padSupplyNetName ) - padNet.setExternal( True ) - padNet.setType ( Net.Type.POWER ) - self.ringNetNames['vdde'] = padNet - ioPadConf.pads.append( Instance.create( self.chip - , 'p_vddick_{}'.format(ioPadConf.index) - , self.getCell('pvddick_px') ) ) - ioPadConf.pads.append( Instance.create( self.chip - , 'p_vddeck_{}'.format(ioPadConf.index) - , self.getCell('pvddeck_px') ) ) - self._connect( ioPadConf.pads[0], chipNet, 'vddi' ) - self._connect( ioPadConf.pads[1], padNet , 'vdde' ) - self.powerPadCount += 1 - self.chipPads += ioPadConf.pads - - def _buildClockPads ( self, ioPadConf ): - coreNet = self.core .getNet( ioPadConf.coreSupplyNetName ) - coronaNet = self.corona.getNet( ioPadConf.coreSupplyNetName ) - chipNet = self.chip .getNet( ioPadConf.coreSupplyNetName+'_core' ) - ringNet = self.chip .getNet( ioPadConf.coreSupplyNetName+'_ring' ) - padNet = self.chip .getNet( ioPadConf.padSupplyNetName ) - if not coronaNet: - coronaNet = Net.create( self.corona, ioPadConf.coreSupplyNetName ) - coronaNet.setExternal( True ) - coronaNet.setType( Net.Type.CLOCK ) - self.icore.getPlug( coreNet ).setNet( coronaNet ) - if not chipNet: - chipNet = Net.create( self.chip, ioPadConf.coreSupplyNetName+'_core' ) - chipNet.setType ( Net.Type.CLOCK ) - self.icorona.getPlug( coronaNet ).setNet( chipNet ) - self.coreClock = chipNet - if not ringNet: - ringNet = Net.create( self.chip, ioPadConf.coreSupplyNetName+'_ring' ) - ringNet.setType( Net.Type.CLOCK ) - self.ringNetNames['ck'] = ringNet - if not padNet: - padNet = Net.create( self.chip, ioPadConf.padSupplyNetName ) - padNet.setExternal( True ) - padNet.setType ( Net.Type.CLOCK ) - ioPadConf.pads.append( Instance.create( self.chip - , 'p_ck_{}'.format(ioPadConf.index) - , self.getCell('pck_px') ) ) - self._connect( ioPadConf.pads[0], padNet, 'pad' ) - self.clockPadCount += 1 - self.chipPads += ioPadConf.pads - - def _connectClocks ( self ): - p = re.compile( r'pv[ds]{2}[ei]ck_px' ) - for pad in self.chipPads: - if p.match( pad.getMasterCell().getName() ): - self._connect( pad, self.coreClock, 'cko' ) diff --git a/cumulus/src/plugins/alpha/core2chip/core2chip.py b/cumulus/src/plugins/alpha/core2chip/core2chip.py deleted file mode 100644 index 1a9ea415..00000000 --- a/cumulus/src/plugins/alpha/core2chip/core2chip.py +++ /dev/null @@ -1,786 +0,0 @@ - -# -*- coding: utf-8 -*- -# -# This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved -# -# +-----------------------------------------------------------------+ -# | C O R I O L I S | -# | C u m u l u s - P y t h o n T o o l s | -# | | -# | Author : Jean-Paul CHAPUT | -# | E-mail : Jean-Paul.Chaput@lip6.fr | -# | =============================================================== | -# | Python : "./plugins/core2chip/core2chip.py" | -# +-----------------------------------------------------------------+ - -""" -Automatically generates the chip+corona hierarchical netlists from -the *core* of a design. - -* *corona* will contains: - - 1. Exactly **one** instance of the *core* Cell. - 2. All the complex wiring to the pads, typically the *ouput enable* - (``oe``) signal connected to the I/O pads of all bits of a bus. - -* *chip* will contains: - - 1. Exactly **one** instance of the *corona* Cell. - 2. All the I/O pads. - -The double level chip+corona serves two purpose: - -1. The standard router will be run on the *corona* only, removing - the need for it to be able to manages the I/O pads. The routing at - chip level, that is connecting the external pins from the *corona* - to the inner sides of the pads, is straightforward. Mostly a straight - wire. - -2. In cases were the *corona* is symbolic layout, but we are required to - use the I/O pads from the foundry (so they are *real* layout), the - boundary between symbolic and real is much easier to manage at - corona/chip level. In that case, the connexion may look like a - small dogleg instead of a straight wire. -""" - -#from exceptions import NotImplementedError -import re -from Hurricane import DbU, UpdateSession, Net, Instance, Transformation, Box -from CRL import Catalog, AllianceFramework, Spice, DefImport -from helpers import trace, netDirectionToStr -from helpers.overlay import UpdateSession -from helpers.io import ErrorMessage, WarningMessage -import plugins.chip -from plugins.rsave import rsave -from plugins.checks import oneDriver -from plugins.alpha.utils import getPlugByName -from plugins.alpha.block.block import Block -from plugins.alpha.block.configuration import BlockConf, IoPadConf, ConstantsConf - - -# ------------------------------------------------------------------- -# Class : "IoNet". - -class IoNet ( object ): - """ - Handle/create the four following nets: - - 1. ``self.coreNet`` : The original net from the *core*. - 2. ``self.coronaNet`` : The same net at *corona* level. - 3. ``self.chipIntNet`` : The same net at *chip* level (connected to the - *internal* terminal of the I/O pad. - 4. ``self.chipExtNet`` : The corresponding net on the *outside* of the - I/O pad, that is the bonding area. They make the interface of the - chip itself. - - From the name of the core signal we derives the names of those four - signals and the instance name of the I/O pad itself. - - It also check: - - * If the signal is a bit from a vector (flag ``IsElem``), to keep - vectorization across hierarchical level and index the I/O pad name. - * If the signal is an *output enable*, in that case, no I/O pad - nor chip external signal should be generated. - """ - - IsElem = 0x0001 - IsEnable = 0x0002 - IsAnalog = 0x0004 - DoExtNet = 0x0008 - PadPassthrough = 0x0010 - reVHDLVector = re.compile( r'(?P[^(]*)\((?P[\d]+)\)$' ) - - def __init__ ( self, coreToChip, coreNet ): - self.coreToChip = coreToChip - self._flags = 0 - self._chipExtNetName = None # In the case of bidir pad, force external net name. - self.coreNet = coreNet - self.coronaNet = None # Corona net going from core to corona. - self.chipIntNet = None # Chip net going from corona to I/O pad. - self.chipExtNet = None # Chip net going from I/O pad to the outside world. - m = IoNet.reVHDLVector.match( self.coreNet.getName() ) - if m: - self._flags |= IoNet.IsElem - self._name = m.group('name') - self._index = m.group('index') - else: - self._name = self.coreNet.getName() - self._index = 0 - if self.coreToChip.useHarness(): self._flags |= IoNet.PadPassthrough - self._type = self.coreToChip.getNetType( self._name ) - trace( 550, '\tIoNet.__init__(): {}\n'.format(self) ) - - def __repr__ ( self ): - return ''.format( self.coreNet.getName() - , self.chipExtNet - , self.chipIntNet ) - - def isElem ( self ): return self._flags & IoNet.IsElem - def isEnable ( self ): return self._flags & IoNet.IsEnable - def isAnalog ( self ): return self._flags & IoNet.IsAnalog - def isGlobal ( self ): return self.isGlobal( self._name ) - def isSpecial ( self ): return self._type != Net.Type.LOGICAL - def setFlags ( self, flags ): self._flags |= flags - def resetFlags ( self, flags ): self._flags &= ~flags - - @property - def name ( self ): - if self.isSpecial() and self._chipExtNetName: - return self._chipExtNetName - return self._name - - @property - def index ( self ): return self._index - - @property - def coreNetName ( self ): return self.coreNet.getName() - - @property - def coronaNetName ( self ): - s = self._name - if self.coreNet.isSupply(): return s - if self.coreNet.getDirection() & Net.Direction.IN: - s += '_from_pad' - elif self.coreNet.getDirection() & Net.Direction.OUT: - s += '_to_pad' - if self._flags & IoNet.IsElem: s += '({})'.format(self._index) - return s - - @property - def chipIntNetName ( self ): - return self.chipIntNet.getName() if self.chipIntNet else self.coronaNetName - - @property - def chipExtNetName ( self ): - if self._chipExtNetName is not None: return self._chipExtNetName - if self._flags & IoNet.IsEnable: - if self.coreToChip.useHarness(): - return 'io_oeb({})'.format( self._index ) - return 'None' - if self.chipExtNet: return self.chipExtNet.getName() - s = self._name - if self._flags & IoNet.IsElem: s += '({})'.format(self._index) - return s - - @chipExtNetName.setter - def chipExtNetName ( self, name ): self._chipExtNetName = name - - @property - def padInstanceName ( self ): - s = self._name - if self._flags & IoNet.IsElem: s += '_{}'.format(self._index) - return s - - @property - def enableNetName ( self ): - if self.coreToChip.useHarness(): - m = IoNet.reVHDLVector.match(self.chipExtNetName) - if m: - return 'io_oeb({})'.format( m.group('index') ) - return '{}_enable'.format(self.padInstanceName) - - def setEnable ( self, state ): - if state == True: self._flags |= IoNet.IsEnable - else: self._flags &= ~IoNet.IsEnable - - def setAnalog ( self, state ): - if state == True: self._flags |= IoNet.IsAnalog - else: self._flags &= ~IoNet.IsAnalog - - def buildNets ( self ): - """ - Creates the signals in corona and chip Cells, then connect them - together. - """ - netType = Net.Type.LOGICAL - if self.coreNet.isPower (): netType = Net.Type.POWER - if self.coreNet.isGround(): netType = Net.Type.GROUND - if self.coreNet.isClock (): netType = Net.Type.CLOCK - # Corona net, connect to Core instance net. - if not self.coronaNet: - self.coronaNet = Net.create( self.coreToChip.corona, self.coronaNetName ) - self.coronaNet.setExternal ( True ) - self.coronaNet.setDirection( self.coreNet.getDirection() ) - if netType != Net.Type.LOGICAL: - self.coronaNet.setType ( netType ) - self.coronaNet.setGlobal( True ) - self.coreToChip.icore.getPlug( self.coreNet ).setNet( self.coronaNet ) - # In case of harness, the chip external net should already exists. - if self.coreToChip.useHarness(): - self.chipExtNet = self.coreToChip.chip.getNet( self.chipExtNetName ) - self.chipIntNet = self.chipExtNet - if not self.chipExtNet: - raise ErrorMessage( 1, 'IoNet.buildNets(): No harness net "{}" to connect core net "{}".' \ - .format( self.chipExtNetName, self.coreNet.getName() )) - # Chip "internal" net, connect Corona instance net to I/O inside the chip. - if not self.chipIntNet: - chipIntNetName = "internal_" + self.coronaNetName - #if self._flags & IoNet.IsAnalog: - # chipIntNetName = self.coronaNetName - self.chipIntNet = Net.create( self.coreToChip.chip, chipIntNetName ) - if netType != Net.Type.LOGICAL: - self.chipIntNet.setType( netType ) - coronaNetPlug = self.coreToChip.icorona.getPlug( self.coronaNet ) - if not coronaNetPlug.getNet(): - coronaNetPlug.setNet( self.chipIntNet ) - # Chip "external" net, connected to the pad I/O to the outside world. - #if self._flags & (IoNet.PadPassthrough | IoNet.IsAnalog): - if self._flags & IoNet.PadPassthrough: - self.chipExtNet = self.chipIntNet - elif not self.chipExtNet and (self._flags & IoNet.DoExtNet): - self.chipExtNet = self.coreToChip.chip.getNet( self.chipExtNetName ) - if not self.chipExtNet: - self.chipExtNet = Net.create( self.coreToChip.chip, self.chipExtNetName ) - if self.chipExtNet: - self.chipExtNet.setExternal ( True ) - self.chipExtNet.setDirection( self.coreNet.getDirection() ) - trace( 550, '\tIoNet.buildNets() {}\n'.format( self )) - - -# ------------------------------------------------------------------- -# Class : "IoPad". - -class IoPad ( object ): - """ - Manage I/O pad instanciation. Gather between one and three IoNet. - The number of IoNet implies the kind of I/O pad to be used. - - 1. One IoNet mean either an input pad or an output pad. - 2. Two IoNets mean an tristate output pad (the signal and it's - output enable). - 3. Three IoNets mean a bidirectional I/O pad (the signal as input, - the signal as output and it's direction). - """ - - IN = 0x0001 - OUT = 0x0002 - BIDIR = 0x0004 - TRI_OUT = 0x0008 - ANALOG = 0x0010 - UNSUPPORTED = 0x0020 - - @staticmethod - def directionToStr ( direction ): - if direction == IoPad.IN: return "IN" - if direction == IoPad.OUT: return "OUT" - if direction == IoPad.BIDIR: return "BIDIR" - if direction == IoPad.TRI_OUT: return "TRI_OUT" - if direction == IoPad.ANALOG: return "ANALOG" - if direction == IoPad.UNSUPPORTED: return "UNSUPPORTED" - return "Invalid value" - - def __init__ ( self, coreToChip, ioPadConf ): - self.coreToChip = coreToChip - self.ioPadConf = ioPadConf - self.direction = 0 - self.nets = [] - return - - @property - def padInstanceName ( self ): return self.ioPadConf.instanceName - - @property - def pads ( self ): - return self.ioPadConf.pads - - def __str__ ( self ): - s = '' \ .format( self.net.getName() , rg.getRoutingLayer(self.bottomDepth).getName() @@ -123,7 +122,7 @@ class BigVia ( object ): def doLayout ( self ): global rg - if rg is None: rg = CRL.AllianceFramework.get().getRoutingGauge() + if rg is None: rg = AllianceFramework.get().getRoutingGauge() for depth in range(self.bottomDepth,self.topDepth+1): minSize = rg.getRoutingLayer( depth ).getMinimalSize() if self.widths[depth] < minSize and (self.flags & BigVia.AllowHorizontalExpand): diff --git a/cumulus/src/plugins/alpha/block/block.py b/cumulus/src/plugins/block/block.py similarity index 96% rename from cumulus/src/plugins/alpha/block/block.py rename to cumulus/src/plugins/block/block.py index 57f39940..741b2fcb 100644 --- a/cumulus/src/plugins/alpha/block/block.py +++ b/cumulus/src/plugins/block/block.py @@ -1,6 +1,6 @@ # # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2020-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2020-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -15,32 +15,28 @@ import sys import os.path -from copy import deepcopy -import Cfg -from Hurricane import Breakpoint, DbU, Box, Transformation, Point, \ - Box, Path, Layer, Occurrence, Net, \ - NetExternalComponents, RoutingPad, Pad, \ - Horizontal, Vertical, Contact, Pin, Plug, \ - Cell, Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace, dots, l, u, n -from helpers.io import ErrorMessage, WarningMessage, catch -from helpers.overlay import UpdateSession -import Etesian -import Anabatic -import Katana -import plugins.rsave -from plugins import getParameter -from plugins.alpha.macro.macro import Macro -from plugins.alpha.block import timing -from plugins.alpha.block.spares import Spares -from plugins.alpha.block.htree import HTree -#from plugins.alpha.block.hfns1 import BufferTree -#from plugins.alpha.block.hfns2 import BufferTree -#from plugins.alpha.block.hfns3 import BufferTree -from plugins.alpha.block.hfns4 import BufferTree -from plugins.alpha.block.configuration import IoPin, BlockConf, GaugeConf +from copy import deepcopy +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation, Point, \ + Box, Path, Layer, Occurrence, Net, \ + NetExternalComponents, RoutingPad, Pad, \ + Horizontal, Vertical, Contact, Pin, Plug, \ + Cell, Instance +from ...CRL import AllianceFramework, RoutingLayerGauge +from ...helpers import trace, dots, l, u, n +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import UpdateSession +from ... import Etesian, Anabatic, Katana +from .. import getParameter +from ..macro.macro import Macro +from . import timing +from .spares import Spares +from .htree import HTree +#from . hfns1 import BufferTree +#from . hfns2 import BufferTree +#from . hfns3 import BufferTree +from .hfns4 import BufferTree +from .configuration import IoPin, BlockConf, GaugeConf timing.staticInit() @@ -501,7 +497,7 @@ class Block ( object ): def addHTrees ( self ): """Create the trunk of all the clock trees (recursive H-Tree).""" print( ' o Building H-Tree(s).' ) - af = CRL.AllianceFramework.get() + af = AllianceFramework.get() hTreeNets = [] netOcc = None self.flattenNets() @@ -736,7 +732,7 @@ class Block ( object ): if area.isEmpty(): print( ErrorMessage( 1, 'Block.addPlaceHolder(): Request for an empty place holder area.' )) return - af = CRL.AllianceFramework.get() + af = AllianceFramework.get() phCellName = 'placeholder_{}'.format(self.placeHolderCount) placeHolder = Cell.create( af.getLibrary(0), phCellName ) if inCore: diff --git a/cumulus/src/plugins/alpha/block/configuration.py b/cumulus/src/plugins/block/configuration.py similarity index 97% rename from cumulus/src/plugins/alpha/block/configuration.py rename to cumulus/src/plugins/block/configuration.py index fae3162c..f9d62f1a 100644 --- a/cumulus/src/plugins/alpha/block/configuration.py +++ b/cumulus/src/plugins/block/configuration.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2020-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2020-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -15,20 +15,20 @@ import sys import re import os.path -from operator import itemgetter -import Cfg -from Hurricane import DataBase, Breakpoint, DbU, Box, Transformation, \ - Path, Layer, Occurrence, Net, \ - NetExternalComponents, RoutingPad, Horizontal, \ - Vertical, Contact, Pin, Plug, Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace, l, u, n -from helpers.io import ErrorMessage, WarningMessage, catch -from helpers.overlay import CfgCache, UpdateSession -from plugins import getParameter -from plugins.rsave import rsave -from plugins.alpha.utils import getPlugByName +from operator import itemgetter +from ... import Cfg +from ...Hurricane import DataBase, Breakpoint, DbU, Box, Transformation, \ + Path, Layer, Occurrence, Net, \ + NetExternalComponents, RoutingPad, Horizontal, \ + Vertical, Contact, Pin, Plug, Instance +from ...CRL import AllianceFramework, RoutingLayerGauge, Catalog, \ + Gds, Spice +from ...helpers import trace, l, u, n +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import CfgCache, UpdateSession +from .. import getParameter +from ..rsave import rsave +from ..utils import getPlugByName def findCellOutput ( cell, callerName, parameterId ): @@ -141,8 +141,8 @@ class GaugeConf ( object ): cellGaugeName = Cfg.getParamString('anabatic.cellGauge').asString() if not cellGaugeName or cellGaugeName == '': cellGaugeName = gaugeName - self._cellGauge = CRL.AllianceFramework.get().getCellGauge( cellGaugeName ) - self._routingGauge = CRL.AllianceFramework.get().getRoutingGauge( gaugeName ) + self._cellGauge = AllianceFramework.get().getCellGauge( cellGaugeName ) + self._routingGauge = AllianceFramework.get().getRoutingGauge( gaugeName ) if not self._routingGauge: trace( 500, '-' ) @@ -193,7 +193,7 @@ class GaugeConf ( object ): def _loadIoPadGauge ( self, ioPadGaugeName ): trace( 550, ',+', '\tGaugeConf._loadIoPadGauge(): "{}".\n'.format(ioPadGaugeName) ) - self._ioPadGauge = CRL.AllianceFramework.get().getCellGauge( ioPadGaugeName ) + self._ioPadGauge = AllianceFramework.get().getCellGauge( ioPadGaugeName ) if not self._ioPadGauge: print( WarningMessage( 'IO pad gauge "{}" not found.'.format(ioPadGaugeName) )) trace( 550, '-' ) @@ -884,7 +884,7 @@ class BufferConf ( object ): trace( 550, ',+', '\tBufferConf.__init__()\n' ) self.maxSinks = Cfg.getParamInt('spares.maxSinks').asInt() self.masterCell = framework.getCell( Cfg.getParamString('spares.buffer').asString() - , CRL.Catalog.State.Views ) + , Catalog.State.Views ) if not self.masterCell: trace( 550, '-' ) raise ErrorMessage( 3, [ 'BufferConf.__init__(): Buffer cell "{}" not found in library,' \ @@ -956,8 +956,8 @@ class ConstantsConf ( object ): trace( 550, ',+', '\tConstantsConf.__init__()\n' ) cfg.etesian.cell.zero = None cfg.etesian.cell.one = None - self.zeroCell = framework.getCell( cfg.etesian.cell.zero, CRL.Catalog.State.Views ) - self.oneCell = framework.getCell( cfg.etesian.cell.one , CRL.Catalog.State.Views ) + self.zeroCell = framework.getCell( cfg.etesian.cell.zero, Catalog.State.Views ) + self.oneCell = framework.getCell( cfg.etesian.cell.one , Catalog.State.Views ) if not self.zeroCell: trace( 550, '-' ) raise ErrorMessage( 3, [ 'ConstantsConf.__init__(): Zero cell "{}" not found in library,' \ @@ -1042,7 +1042,7 @@ class FeedsConf ( object ): self.feeds = [] self.defaultFeed = 0 for feedName in feeds: - feedCell = framework.getCell( feedName, CRL.Catalog.State.Views ) + feedCell = framework.getCell( feedName, Catalog.State.Views ) if not feedCell: print( WarningMessage( 'FeedConf.__init__(): Feed cell "{}" not found in library (skipped).' \ .format(feedName)) ) @@ -1120,7 +1120,7 @@ class PowersConf ( object ): powerName = cfg.etesian.cell.power self.count = 0 if cfg.etesian.cell.power: - self.power = framework.getCell( powerName, CRL.Catalog.State.Views ) + self.power = framework.getCell( powerName, Catalog.State.Views ) if not self.power: print( WarningMessage( 'PowersConf.__init__(): Power cell "{}" not found in library (skipped).' \ .format(powerName)) ) @@ -1364,7 +1364,7 @@ class BlockConf ( GaugeConf ): super(BlockConf,self).__init__() self.validated = True self.editor = None - self.framework = CRL.AllianceFramework.get() + self.framework = AllianceFramework.get() self.cfg = CfgCache('',Cfg.Parameter.Priority.Interactive) self.bufferConf = None self.constantsConf = None @@ -1522,9 +1522,9 @@ class BlockConf ( GaugeConf ): cells, then call rsave(). """ trace( 550,'\tBlockConf.save() on "{}"\n'.format(self.cell.getName()) ) - views = CRL.Catalog.State.Logical + views = Catalog.State.Logical if self.routingGauge.isSymbolic(): - views = views | CRL.Catalog.State.Physical + views = views | Catalog.State.Physical for cell in self.cloneds: trace( 550, '\tRenaming cloned cell: "{}"\n'.format(cell) ) cell.setName( cell.getName()+'_cts' ) @@ -1541,8 +1541,8 @@ class BlockConf ( GaugeConf ): rsave( self.chip , views|flags, enableSpice=True ) if not self.routingGauge.isSymbolic(): print( ' + {} (GDSII).'.format( topCell.getName() )) - CRL.Gds.save( topCell ) - CRL.Spice.clearProperties() + Gds.save( topCell ) + Spice.clearProperties() return def toXPitch ( self, x, superior=False ): diff --git a/cumulus/src/plugins/alpha/block/hfns1.py b/cumulus/src/plugins/block/hfns1.py similarity index 96% rename from cumulus/src/plugins/alpha/block/hfns1.py rename to cumulus/src/plugins/block/hfns1.py index c60ebf8e..89326dff 100644 --- a/cumulus/src/plugins/alpha/block/hfns1.py +++ b/cumulus/src/plugins/block/hfns1.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2020-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2020-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -19,41 +19,23 @@ Manage High Fanout Net Synthesis (HFNS). import sys import os.path import re -from operator import itemgetter, attrgetter, methodcaller -import Cfg -from Hurricane import Breakpoint -from Hurricane import DbU -from Hurricane import Box -from Hurricane import Transformation -from Hurricane import Box -from Hurricane import Path -from Hurricane import Layer -from Hurricane import Occurrence -from Hurricane import Net -from Hurricane import HyperNet -from Hurricane import RoutingPad -from Hurricane import Horizontal -from Hurricane import Vertical -from Hurricane import Contact -from Hurricane import Pin -from Hurricane import Plug -from Hurricane import Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace, l, u, n -from helpers.io import ErrorMessage -from helpers.io import WarningMessage -from helpers.io import catch -from helpers.overlay import UpdateSession -from plugins import getParameter -from plugins import utils -from plugins.alpha.block.configuration import GaugeConf -from plugins.alpha.block.spares import Spares -from plugins.alpha.block import timing +from operator import itemgetter, attrgetter, methodcaller +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ + Path, Layer, Occurrence, Net, HyperNet, RoutingPad, \ + Horizontal, Vertical, Contact, Pin, Plug, Instance +from ...CRL import AllianceFramework, RoutingLayerGauge +from ...helpers import trace, l, u, n +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import UpdateSession +from .. import getParameter, utils +from .configuration import GaugeConf +from .spares import Spares +from . import timing timing.staticInit() -af = CRL.AllianceFramework.get() +af = AllianceFramework.get() # ---------------------------------------------------------------------------- diff --git a/cumulus/src/plugins/alpha/block/hfns2.py b/cumulus/src/plugins/block/hfns2.py similarity index 89% rename from cumulus/src/plugins/alpha/block/hfns2.py rename to cumulus/src/plugins/block/hfns2.py index c369aecb..04894666 100644 --- a/cumulus/src/plugins/alpha/block/hfns2.py +++ b/cumulus/src/plugins/block/hfns2.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2020-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2020-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -19,39 +19,22 @@ Manage High Fanout Net Synthesis (HFNS). import sys import os.path import re -from operator import itemgetter, attrgetter, methodcaller -import Cfg -from Hurricane import Breakpoint -from Hurricane import DbU -from Hurricane import Box -from Hurricane import Transformation -from Hurricane import Box -from Hurricane import Path -from Hurricane import Layer -from Hurricane import Occurrence -from Hurricane import Net -from Hurricane import HyperNet -from Hurricane import RoutingPad -from Hurricane import Horizontal -from Hurricane import Vertical -from Hurricane import Contact -from Hurricane import Pin -from Hurricane import Plug -from Hurricane import Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace, l, u, n -from helpers.io import ErrorMessage -from helpers.io import WarningMessage -from helpers.io import catch -from helpers.overlay import UpdateSession -from plugins import getParameter -from plugins import utils -from plugins.alpha.block.configuration import GaugeConf -from plugins.alpha.block.spares import Spares +from operator import itemgetter, attrgetter, methodcaller +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation, \ + Box, Path, Layer, Occurrence, Net, HyperNet, \ + RoutingPad, Horizontal, Vertical, Contact, Pin, \ + Plug, Instance +from ...CRL import AllianceFramework, RoutingLayerGauge +from ...helpers import trace, l, u, n +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import UpdateSession +from .. import getParameter, utils +from .configuration import GaugeConf +from .spares import Spares -af = CRL.AllianceFramework.get() +af = AllianceFramework.get() # ---------------------------------------------------------------------------- diff --git a/cumulus/src/plugins/alpha/block/hfns3.py b/cumulus/src/plugins/block/hfns3.py similarity index 94% rename from cumulus/src/plugins/alpha/block/hfns3.py rename to cumulus/src/plugins/block/hfns3.py index 28c7d5bc..777e162c 100644 --- a/cumulus/src/plugins/alpha/block/hfns3.py +++ b/cumulus/src/plugins/block/hfns3.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2020-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2020-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -19,43 +19,25 @@ Manage High Fanout Net Synthesis (HFNS). import sys import os.path import re -from operator import itemgetter, attrgetter, methodcaller -import Cfg -from Hurricane import Breakpoint -from Hurricane import DbU -from Hurricane import Box -from Hurricane import Transformation -from Hurricane import Box -from Hurricane import Path -from Hurricane import Layer -from Hurricane import Occurrence -from Hurricane import Net -from Hurricane import HyperNet -from Hurricane import RoutingPad -from Hurricane import Horizontal -from Hurricane import Vertical -from Hurricane import Contact -from Hurricane import Pin -from Hurricane import Plug -from Hurricane import Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace, l, u, n -from helpers.io import ErrorMessage -from helpers.io import WarningMessage -from helpers.io import catch -from helpers.overlay import UpdateSession -from plugins import getParameter -from plugins import utils -from plugins.alpha.block.configuration import GaugeConf -from plugins.alpha.block.spares import Spares -from plugins.alpha.block import timing -from plugins.alpha.block import rsmt +from operator import itemgetter, attrgetter, methodcaller +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation, \ + Box, Path, Layer, Occurrence, Net, HyperNet, \ + RoutingPad, Horizontal, Vertical, Contact, Pin, \ + Plug, Instance +from ...CRL import AllianceFramework, RoutingLayerGauge +from ...helpers import trace, l, u, n +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import UpdateSession +from .. import getParameter, utils +from .configuration import GaugeConf +from .spares import Spares +from . import timing, rsmt timing.staticInit() rsmt.staticInit() -af = CRL.AllianceFramework.get() +af = AllianceFramework.get() # ---------------------------------------------------------------------------- diff --git a/cumulus/src/plugins/alpha/block/hfns4.py b/cumulus/src/plugins/block/hfns4.py similarity index 92% rename from cumulus/src/plugins/alpha/block/hfns4.py rename to cumulus/src/plugins/block/hfns4.py index 3aed3ed0..d773c528 100644 --- a/cumulus/src/plugins/alpha/block/hfns4.py +++ b/cumulus/src/plugins/block/hfns4.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2020-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2020-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -15,7 +15,7 @@ """ Manage High Fanout Net Synthesis (HFNS). -Fourth variant, quck and simple. Just break the net into subnets, +Fourth variant, quick and simple. Just break the net into subnets, so each of them is under the fanout threshold. Basic method, do not take into account the placement or the global wirelength. """ @@ -23,23 +23,22 @@ take into account the placement or the global wirelength. import sys import os.path import re -from operator import itemgetter, attrgetter, methodcaller -import Cfg -from Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ - Path, Layer, Occurrence, Net, HyperNet, \ - RoutingPad, Horizontal, Vertical, Contact, \ - Pin, Plug, Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace, l, u, n -from helpers.io import ErrorMessage, WarningMessage, catch -from helpers.overlay import UpdateSession -from plugins import getParameter, utils -from plugins.alpha.block.configuration import GaugeConf -from plugins.alpha.block.spares import Spares +from operator import itemgetter, attrgetter, methodcaller +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ + Path, Layer, Occurrence, Net, HyperNet, \ + RoutingPad, Horizontal, Vertical, Contact, \ + Pin, Plug, Instance +from ...CRL import AllianceFramework, RoutingLayerGauge +from ...helpers import trace, l, u, n +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import UpdateSession +from .. import getParameter, utils +from .configuration import GaugeConf +from .spares import Spares -af = CRL.AllianceFramework.get() +af = AllianceFramework.get() # ---------------------------------------------------------------------------- diff --git a/cumulus/src/plugins/alpha/block/htree.py b/cumulus/src/plugins/block/htree.py similarity index 95% rename from cumulus/src/plugins/alpha/block/htree.py rename to cumulus/src/plugins/block/htree.py index ce6ecb3e..be962e30 100644 --- a/cumulus/src/plugins/alpha/block/htree.py +++ b/cumulus/src/plugins/block/htree.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2020-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2020-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -16,20 +16,18 @@ import sys import os.path import re -import Cfg -from Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ - Path, Layer, Occurrence, Net, HyperNet, \ - RoutingPad, Horizontal, Vertical, Contact, \ - Pin, Plug, Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace -from helpers.io import ErrorMessage, WarningMessage, catch -from helpers.overlay import UpdateSession -from plugins import getParameter -from plugins.alpha import utils -from plugins.alpha.block.configuration import GaugeConf -from plugins.alpha.block.spares import Spares +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ + Path, Layer, Occurrence, Net, HyperNet, \ + RoutingPad, Horizontal, Vertical, Contact, \ + Pin, Plug, Instance +from ...CRL import RoutingLayerGauge +from ...helpers import trace +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import UpdateSession +from .. import getParameter, utils +from .configuration import GaugeConf +from .spares import Spares def unbitify ( rawName ): diff --git a/cumulus/src/plugins/alpha/block/iospecs.py b/cumulus/src/plugins/block/iospecs.py similarity index 92% rename from cumulus/src/plugins/alpha/block/iospecs.py rename to cumulus/src/plugins/block/iospecs.py index 0f12aee7..f23110d7 100644 --- a/cumulus/src/plugins/alpha/block/iospecs.py +++ b/cumulus/src/plugins/block/iospecs.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne University 2020-2021, All Rights Reserved +# Copyright (c) Sorbonne University 2020-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -16,15 +16,15 @@ import sys import re import os.path import json -from operator import itemgetter -import Cfg -from Hurricane import Breakpoint, DbU, Box, Transformation -import CRL -from helpers import trace, l, u, n -from helpers.utils import classdecorator -from helpers.io import ErrorMessage, WarningMessage, catch -from helpers.overlay import CfgCache -from plugins.alpha.block.configuration import IoPin +from operator import itemgetter +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation +from ... import CRL +from ...helpers import trace, l, u, n +from ...helpers.utils import classdecorator +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import CfgCache +from .block.configuration import IoPin __all__ = [ 'IoSpecs' ] diff --git a/cumulus/src/plugins/alpha/block/matrix.py b/cumulus/src/plugins/block/matrix.py similarity index 88% rename from cumulus/src/plugins/alpha/block/matrix.py rename to cumulus/src/plugins/block/matrix.py index 82a36e8d..b0973d84 100644 --- a/cumulus/src/plugins/alpha/block/matrix.py +++ b/cumulus/src/plugins/block/matrix.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2021-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2021-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -16,28 +16,26 @@ import re import sys import os.path -import Cfg -from operator import itemgetter -from Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ - Path, Layer, Occurrence, Net, RoutingPad, \ - Horizontal, Vertical, Contact, Pin, Plug, \ - Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace, l, u, n -from helpers import dots -from helpers.io import ErrorMessage, WarningMessage, catch -from helpers.overlay import UpdateSession -from plugins import getParameter -from plugins.alpha import utils +from operator import itemgetter +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ + Path, Layer, Occurrence, Net, RoutingPad, \ + Horizontal, Vertical, Contact, Pin, Plug, \ + Instance +from ...CRL import RoutingLayerGauge, AllianceFramework, Catalog +from ...helpers import trace, l, u, n +from ...helpers import dots +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import UpdateSession +from .. import getParameter, utils -af = CRL.AllianceFramework.get() +af = AllianceFramework.get() class RegisterMatrix ( object ): - registerCell = af.getCell( 'sff1_x4', CRL.Catalog.State.Views ) + registerCell = af.getCell( 'sff1_x4', Catalog.State.Views ) def __init__ ( self, conf, cell, pattern ): if not RegisterMatrix.registerCell: diff --git a/cumulus/src/plugins/alpha/block/rsmt.py b/cumulus/src/plugins/block/rsmt.py similarity index 95% rename from cumulus/src/plugins/alpha/block/rsmt.py rename to cumulus/src/plugins/block/rsmt.py index e623bdb6..b7eb50f6 100644 --- a/cumulus/src/plugins/alpha/block/rsmt.py +++ b/cumulus/src/plugins/block/rsmt.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2014-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -29,31 +29,14 @@ References: """ import sys -import Cfg -import Hurricane -from Hurricane import DbU -from Hurricane import Box -from Hurricane import Point -from Hurricane import Path -from Hurricane import Occurrence -from Hurricane import Breakpoint -from Hurricane import DataBase -from Hurricane import UpdateSession -from Hurricane import Net -from Hurricane import RoutingPad -from Hurricane import Contact -from Hurricane import Horizontal -from Hurricane import Vertical -from Hurricane import Instance -import Flute -import Viewer -import CRL -from CRL import RoutingLayerGauge -import helpers -from helpers import trace -from helpers.io import ErrorMessage -from helpers.io import WarningMessage -import plugins +from ... import Cfg, Flute +from ...Hurricane import DbU, Box, Point, Path, Occurrence, Breakpoint, \ + DataBase, UpdateSession, Net, RoutingPad, Contact, \ + Horizontal, Vertical, Instance +from ...CRL import RoutingLayerGauge +from ...helpers import trace +from ...helpers.io import ErrorMessage, WarningMessage +from ... import plugins # ---------------------------------------------------------------------------- diff --git a/cumulus/src/plugins/alpha/block/spares.py b/cumulus/src/plugins/block/spares.py similarity index 98% rename from cumulus/src/plugins/alpha/block/spares.py rename to cumulus/src/plugins/block/spares.py index 8dd5b813..6677a801 100644 --- a/cumulus/src/plugins/alpha/block/spares.py +++ b/cumulus/src/plugins/block/spares.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2020-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2020-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -16,23 +16,20 @@ import sys import os.path import math -import Cfg -from operator import itemgetter -from Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ - Path, Layer, Occurrence, Net, RoutingPad, \ - Horizontal, Vertical, Contact, Pin, Plug, \ - Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace, l, u, n -from helpers import dots -from helpers.io import ErrorMessage, WarningMessage, catch -from helpers.overlay import UpdateSession -from plugins import getParameter -from plugins.alpha import utils +from operator import itemgetter +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ + Path, Layer, Occurrence, Net, RoutingPad, \ + Horizontal, Vertical, Contact, Pin, Plug, \ + Instance +from ...CRL import AllianceFramework, RoutingLayerGauge +from ...helpers import trace, dots, l, u, n +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import UpdateSession +from .. import getParameter, utils -framework = CRL.AllianceFramework.get() +framework = AllianceFramework.get() # ---------------------------------------------------------------------------- diff --git a/cumulus/src/plugins/alpha/block/timing.py b/cumulus/src/plugins/block/timing.py similarity index 79% rename from cumulus/src/plugins/alpha/block/timing.py rename to cumulus/src/plugins/block/timing.py index 4a30039a..0aaa83b3 100644 --- a/cumulus/src/plugins/alpha/block/timing.py +++ b/cumulus/src/plugins/block/timing.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2020-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2020-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -23,34 +23,16 @@ from __future__ import print_function import sys import os.path import re -from operator import itemgetter, attrgetter, methodcaller -import Cfg -from Hurricane import Breakpoint -from Hurricane import DbU -from Hurricane import Box -from Hurricane import Transformation -from Hurricane import Box -from Hurricane import Path -from Hurricane import Layer -from Hurricane import Occurrence -from Hurricane import Net -from Hurricane import HyperNet -from Hurricane import RoutingPad -from Hurricane import Horizontal -from Hurricane import Vertical -from Hurricane import Contact -from Hurricane import Pin -from Hurricane import Plug -from Hurricane import Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace, l, u, n -from helpers.io import ErrorMessage -from helpers.io import WarningMessage -from helpers.io import catch -from helpers.overlay import UpdateSession -from plugins import getParameter -from plugins import utils +from operator import itemgetter, attrgetter, methodcaller +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ + Path, Layer, Occurrence, Net, HyperNet, RoutingPad, \ + Horizontal, Vertical, Contact, Pin, Plug, Instance +from ...CRL import AllianceFramework, Catalog, RoutingLayerGauge +from ...helpers import trace, l, u, n +from ...helpers.io import ErrorMessage, WarningMessage, catch +from ...helpers.overlay import UpdateSession +from .. import getParameter, utils class CellTimings ( object ): @@ -139,13 +121,13 @@ def staticInit (): global tech if tech is not None: return - af = CRL.AllianceFramework.get() + af = AllianceFramework.get() tech = TechTimings() tech.capaAvgFanin = 10.0 tech.capaBaseDrive = 125.0 tech.capaPerLambda = 0.3 for cellName, drive in cellsTimingsDatas: - cell = af.getCell( cellName, CRL.Catalog.State.Views ) + cell = af.getCell( cellName, Catalog.State.Views ) if not cell: print( WarningMessage('timing.staticInit(): Library do not provides "{}", skipped.' \ .format(cellName)) ) diff --git a/cumulus/src/plugins/checks.py b/cumulus/src/plugins/checks.py index 9f53d26b..6ca3c373 100644 --- a/cumulus/src/plugins/checks.py +++ b/cumulus/src/plugins/checks.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2021-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2021-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -18,15 +18,13 @@ import traceback import os.path try: - import Cfg - import CRL - import helpers - from helpers.io import ErrorMessage - from helpers.io import WarningMessage - import plugins - from Hurricane import Net, Plug + from .. import Cfg, CRL + from ..Hurricane import Net, Plug + from ..helpers import setTraceLevel + from ..helpers.io import ErrorMessage, WarningMessage, catch + from .. import plugins except Exception as e: - helpers.io.catch( e ) + catch( e ) sys.exit(2) @@ -84,14 +82,14 @@ def unicornHook ( **kw ): def scriptMain ( **kw ): """Called when run as a stand alone script through Unicorn/CGT.""" try: - #helpers.setTraceLevel( 550 ) + #setTraceLevel( 550 ) cell, editor = plugins.kwParseMain( **kw ) if not cell: print( WarningMessage( 'No Cell loaded in the editor (yet), nothing done.' ) ) return 0 oneDriver( cell ) except Exception as e: - helpers.io.catch( e ) + catch( e ) sys.stdout.flush() sys.stderr.flush() return 0 diff --git a/cumulus/src/plugins/chip/__init__.py b/cumulus/src/plugins/chip/__init__.py index f94ebb8b..25894a18 100644 --- a/cumulus/src/plugins/chip/__init__.py +++ b/cumulus/src/plugins/chip/__init__.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2014-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -12,40 +12,441 @@ # | Python : "./plugins/chip/__init__.py" | # +-----------------------------------------------------------------+ +""" +Define constants to be used through all "chip" plugin modules, along +with the importConstants() function to import then directly in the +dictionnary of other modules. -from helpers.io import WarningMessage +* For corona sides: North, South, East & West. +* For corona corners: SouthWest, SouthEast, NorthWest & NorthEast. +* For rounding operation: Superior, Inferior, Inwards, + OnHorizontalPitch & OnVerticalPitch. +""" + +from ...Hurricane import DbU, DataBase, UpdateSession, Breakpoint, \ + Box, Transformation , Instance , Net, Pin, \ + Contact, Horizontal, Vertical, BasicLayer, \ + Layer +from ...CRL import RoutingGauge, RoutingLayerGauge +from ...helpers import trace, l, u, n, onFGrid +from ...helpers.io import ErrorMessage, WarningMessage +from ...helpers.overlay import UpdateSession +from ..block.bigvia import BigVia +from .constants import importConstants -# Common constants used through all modules. - -# For Corona's sides. -North = 0x0001 -South = 0x0002 -East = 0x0004 -West = 0x0008 - -# For Corona's corners. -SouthWest = South|West -SouthEast = South|East -NorthWest = North|West -NorthEast = North|East - -# For rounding functions. -Superior = 0x0010 -Inferior = 0x0020 -Inwards = 0x0040 -OnHorizontalPitch = 0x0080 -OnVerticalPitch = 0x0100 +importConstants( globals() ) -def importConstants ( symbols ): - if not isinstance(symbols,dict): - print( WarningMessage( 'plugins.chip.__init__.importConstants(), argument is not a symbol table.' )) - return +# -------------------------------------------------------------------- +# Class : "chip.CoreWire" - for symbol in globals().items(): - if isinstance(symbol[1],int): - if not symbol[0] in symbols: - symbols[ symbol[0] ] = symbol[1] +class CoreWire ( object ): + """ + Draw wires to connect an external (chip/harness) terminal belonging + to a ``chipNet`` (the *internal* one) to an on-grid Pin on the edge + of the corona instance. + + Wires are created in *two* Cells: + + 1. At the chip/harness level, where they are using real layout + connecting to I/O external pads or the harness pins. + + 2. At the corona level, *outside* the corona abutment box, so + they overlap with the part draw at chip level, as we know the + placement of the corona inside the chip. + This part of the wires are *on grid*. And they may also be + symbolic if the corona+core is in symbolic layout. This just + on the outside of the corona that we make the transition + between the real outer chip and the internal symbolic core. + + In the case a complete chip with I/O pad, we can also request the + insertion of a jumper to protect against antenna effect. This is + not working yet in the case of a harness. + """ + + NoOffset = 0x0000 + AtBegin = 0x0001 + AtEnd = 0x0002 - return + def __init__ ( self, corona, chipNet, padSegment, bbSegment, side, preferredDir, count ): + self.corona = corona + self.chipNet = chipNet + self.padSegment = padSegment + self.bbSegment = bbSegment + self.offset = 0 + self.offsetType = CoreWire.NoOffset + self.side = side + self.addJumper = False + self.preferredDir = preferredDir + self.inCoronaRange = True + self.arraySize = None + self.count = count + self.viaPitch = DbU.fromLambda( 4.0 ) + self.gapWidth = 0 + self._computeCoreLayers() + if self.conf.routingGauge.getName() == 'FlexLib': + self.addJumper = True + + @property + def conf ( self ): return self.corona.conf + + def updateInCorona ( self ): + coronaAb = self.conf.getInstanceAb( self.conf.icorona ) + if self.side == South or self.side == North: + xCoronaPin = self.bbSegment.getCenter().getX() + if xCoronaPin <= coronaAb.getXMin(): self.inCoronaRange = False + elif xCoronaPin >= coronaAb.getXMax(): self.inCoronaRange = False + if self.side == East or self.side == West: + yCoronaPin = self.bbSegment.getCenter().getY() + if yCoronaPin <= coronaAb.getYMin(): self.inCoronaRange = False + elif yCoronaPin >= coronaAb.getYMax(): self.inCoronaRange = False + + def setOffset ( self, offset, offsetType ): + self.offset = offset + self.offsetType = offsetType + + def _computeCoreLayers ( self ): + rg = self.conf.routingGauge + mask = self.padSegment.getLayer().getMask() + trace( 550, ',+', '\tCoreWire._computeCoreLayers()\n' ) + trace( 550, '\tbbSegment: {}\n'.format(self.bbSegment) ) + self.symSegmentLayer = None + for layerGauge in rg.getLayerGauges(): + trace( 550, '\tTrying: {}\n'.format(layerGauge) ) + if layerGauge.getType() == RoutingLayerGauge.Unusable: continue + if layerGauge.getType() == RoutingLayerGauge.BottomPowerSupply: continue + if layerGauge.getDepth() > self.conf.topLayerDepth: break + if layerGauge.getLayer().getMask() == mask: + trace( 550, '\tUsing: {}\n'.format(layerGauge) ) + self.symSegmentLayer = layerGauge.getLayer() + if self.preferredDir: + self.symContactLayer = self.symSegmentLayer + if self.side & (West|East): + self.symContactSize = ( layerGauge.getWireWidth(), self.bbSegment.getHeight() ) + else: + self.symContactSize = ( self.bbSegment.getWidth(), layerGauge.getWireWidth() ) + trace( 550, '\tsymContactSize=( {}, {} )\n' \ + .format( DbU.getValueString(self.symContactSize[0]) + , DbU.getValueString(self.symContactSize[1]) )) + else: + depth = layerGauge.getDepth() + trace( 550, '\tChoosing PP layer, {}+1 > top={}\n' \ + .format(layerGauge.getDepth(),self.conf.topLayerDepth) ) + if layerGauge.getDepth() + 1 > self.conf.topLayerDepth: + self.symSegmentLayer = rg.getLayerGauge( depth-1 ).getLayer() + depth -= 1 + trace( 550, '\tUsing below layer {}\n'.format( self.symSegmentLayer )) + else: + self.symSegmentLayer = rg.getLayerGauge( depth+1 ).getLayer() + trace( 550, '\tUsing above layer {}\n'.format( self.symSegmentLayer )) + self.symContactLayer = rg.getContactLayer( depth ) + if self.side & (West|East): + self.symContactSize = ( self.bbSegment.getHeight(), self.bbSegment.getHeight() ) + else: + self.symContactSize = ( self.bbSegment.getWidth(), self.bbSegment.getWidth() ) + self.viaPitch = self.conf.getViaPitch( self.symContactLayer ) + basicLayer = self.symSegmentLayer + if basicLayer.isSymbolic(): + basicLayer = basicLayer.getBasicLayer() + contactMinSize = 2*self.symContactLayer.getEnclosure( basicLayer + , Layer.EnclosureH|Layer.EnclosureV ) \ + + self.symContactLayer.getMinimalSize() + arrayWidth = self.symContactSize[0] + arrayCount = (arrayWidth - contactMinSize) // self.viaPitch + trace( 550, '\tcontactMinSize: {}, arrayWidth: {}, arrayCount: {}\n' \ + .format(DbU.getValueString(contactMinSize),DbU.getValueString(arrayWidth),arrayCount) ) + if arrayCount < 0: arrayCount = 0 + #if arrayCount < 3: + if self.side & (North|South): + self.arraySize = ( arrayCount+1, 2 ) + else: + self.arraySize = ( 2, arrayCount+1 ) + trace( 550, '\tarraySize = ({},{})\n'.format(self.arraySize[0], self.arraySize[1]) ) + self.gapWidth = 4*self.viaPitch + trace( 550, ',-' ) + return + raise ErrorMessage( 1, 'CoreWire._computeCoreLayers(): Layer of IO pad segment "%s" is not in routing gauge.' \ + .format(self.chipNet.getName()) ) + trace( 550, ',-' ) + + def drawWire ( self ): + trace( 550, ',+', '\tCoreWire.drawWire(): chip:"{}"\n'.format(self.chipNet.getName()) ) + coronaAb = self.conf.getInstanceAb( self.conf.icorona ) + coronaTransf = self.conf.icorona.getTransformation() + self._computeCoreLayers() + trace( 550, '\tbbSegment: {}\n'.format(self.bbSegment) ) + padLayer = self.padSegment.getLayer() + if not isinstance(padLayer,BasicLayer): + padLayer = padLayer.getBasicLayer() + trace( 550, '\tpadLayer={}\n'.format( padLayer )) + if self.side == West or self.side == East: + flags = OnHorizontalPitch + hPitch = self.conf.getPitch( self.symSegmentLayer ) + vPitch = self.conf.getPitch( self.padSegment.getLayer() ) + yCore = self.conf.toCoronaPitchInChip( self.bbSegment.getCenter().getY(), self.symSegmentLayer ) + if self.offset: + if self.offsetType == CoreWire.AtBegin: + yCore += 2*hPitch*self.offset + else: + yCore -= 2*hPitch*self.offset + if self.side == West: + accessDirection = Pin.Direction.WEST + xPadMin = self.bbSegment.getXMin() + xContact = self.corona.coreSymBb.getXMin() - self.offset * 2*vPitch + xPadMax = xContact + xCore = coronaAb.getXMin() + trace( 550, '\txPadMin: {}\n'.format(DbU.getValueString( xPadMin ))) + #if not self.preferredDir: + # #xPadMax += self.bbSegment.getHeight()//2 + # xPadMin += 3*vPitch + # trace( 550, '\txPadMin: {}\n'.format(DbU.getValueString( xPadMin ))) + else: + accessDirection = Pin.Direction.EAST + xPadMax = self.bbSegment.getXMax() + xContact = self.corona.coreSymBb.getXMax() + self.offset * 2*vPitch + xPadMin = xContact + xCore = coronaAb.getXMax() - vPitch + #if not self.preferredDir: + # #xPadMin -= self.bbSegment.getHeight()//2 + # xPadMin -= 3*vPitch + if self.addJumper: + rg = self.conf.routingGauge + gaugeM5 = rg.getLayerGauge( 4 ) + wwidthM5 = gaugeM5.getWireWidth() + jumperGap = 3*gaugeM5.getPitch() + if self.side == East: + gapCenter = xPadMin + 5*gaugeM5.getPitch() + else: + gapCenter = xPadMax - 5*gaugeM5.getPitch() + xJumpMin = gapCenter - jumperGap//2 + xJumpMax = gapCenter + jumperGap//2 + hChip1 = Horizontal.create( self.chipNet + , self.padSegment.getLayer() + , self.bbSegment.getCenter().getY() + , self.bbSegment.getHeight() + , xPadMin + , xJumpMin + ) + trace( 550, '\thChip1: %s\n' % str(hChip1) ) + hChip2 = Horizontal.create( self.chipNet + , self.padSegment.getLayer() + , self.bbSegment.getCenter().getY() + , self.bbSegment.getHeight() + , xJumpMax + , xPadMax + ) + trace( 550, '\thChip2: %s\n' % str(hChip2) ) + hChip = hChip2 if self.side == West else hChip1 + bvia1 = BigVia( self.chipNet + , rg.getLayerDepth( self.padSegment.getLayer() ) + , xJumpMin + , self.bbSegment.getCenter().getY() + , wwidthM5 + , 2*wwidthM5 + , flags=BigVia.AllowAllExpand ) + bvia1.mergeDepth( gaugeM5.getDepth() ) + trace( 550, '\tbvia1: %s\n' % str(bvia1) ) + bvia1.doLayout() + bvia2 = BigVia( self.chipNet + , rg.getLayerDepth( self.padSegment.getLayer() ) + , xJumpMax + , self.bbSegment.getCenter().getY() + , wwidthM5 + , 2*wwidthM5 + , flags=BigVia.AllowAllExpand ) + bvia2.mergeDepth( gaugeM5.getDepth() ) + bvia2.doLayout() + trace( 550, '\tbvia2: %s\n' % str(bvia2) ) + Horizontal.create( bvia1.getPlate( gaugeM5.getLayer() ) + , bvia2.getPlate( gaugeM5.getLayer() ) + , gaugeM5.getLayer() + , self.bbSegment.getCenter().getY() + , wwidthM5 + ) + else: + hChip = Horizontal.create( self.chipNet + , self.padSegment.getLayer() + , self.bbSegment.getCenter().getY() + , self.bbSegment.getHeight() + , xPadMin + , xPadMax + ) + trace( 550, '\thChip={}\n'.format( hChip )) + trace( 550, '\tself.arraySize: %s\n' % str(self.arraySize) ) + if self.arraySize: + contacts = self.conf.coronaContactArray( self.chipNet + , self.symContactLayer + , xContact + , yCore + , self.arraySize + , flags + ) + vStrapBb = Box() + for contact in contacts: + bb = contact.getBoundingBox() + coronaTransf.applyOn( bb ) + vStrapBb.merge( bb ) + else: + contact = self.conf.coronaContact( self.chipNet + , self.symContactLayer + , xContact + , yCore + , self.symContactSize[0] + , self.symContactSize[1] + , flags + ) + vStrapBb = contact.getBoundingBox( padLayer ) + coronaTransf.applyOn( vStrapBb ) + if self.arraySize: + if self.side == West: xContact = min( xContact, vStrapBb.getXMin() ) + else: xContact = max( xContact, vStrapBb.getXMax() ) + hCorona = self.conf.coronaHorizontal( self.chipNet + , self.symSegmentLayer + , yCore + , self.bbSegment.getHeight() + , xContact + , xCore + ) + trace( 550, '\thCorona={}\n'.format( hCorona )) + trace( 550, '\tCORONA PIN: {} {}\n'.format(self.chipNet, self.count) ) + pin = self.conf.coronaPin( self.chipNet + , self.count + , accessDirection + , self.symSegmentLayer + , xCore + , yCore + , DbU.fromLambda( 1.0 ) + , self.bbSegment.getHeight() + ) + hChipBb = hChip.getBoundingBox( padLayer ) + trace( 550, '\thChipBb={}\n'.format( hChipBb )) + vStrapBb.merge( vStrapBb.getXMin(), hChipBb.getYMin() ) + vStrapBb.merge( vStrapBb.getXMin(), hChipBb.getYMax() ) + #hCoronaBb = hCorona.getBoundingBox( padLayer ) + hCoronaBb = hCorona.getBoundingBox() + self.conf.icorona.getTransformation().applyOn( hCoronaBb ) + trace( 550, '\thCoronaBb={}\n'.format( hCoronaBb )) + vStrapBb.merge( vStrapBb.getXMin(), hCoronaBb.getYMin() ) + vStrapBb.merge( vStrapBb.getXMin(), hCoronaBb.getYMax() ) + if self.padSegment.getLayer().isSymbolic(): + vStrapBb.inflate( 0, -self.padSegment.getLayer().getExtentionCap() + , 0, -self.padSegment.getLayer().getExtentionCap() ) + v = Vertical.create( self.chipNet + , self.padSegment.getLayer() + , vStrapBb.getCenter().getX() + , vStrapBb.getWidth() + , vStrapBb.getYMin() + , vStrapBb.getYMax() + ) + trace( 550, '\tvChip={}\n'.format( v )) + else: + flags = OnVerticalPitch + hPitch = self.conf.getPitch( self.padSegment.getLayer() ) + vPitch = self.conf.getPitch( self.symSegmentLayer ) + trace( 550, '\t%s translated of %s\n' % (self.symSegmentLayer, DbU.getValueString( 2*vPitch*self.offset )) ) + xCore = self.conf.toCoronaPitchInChip( self.bbSegment.getCenter().getX(), self.symSegmentLayer ) + if self.offset: + if self.offsetType == CoreWire.AtBegin: + xCore += 2*vPitch*self.offset + else: + xCore -= 2*vPitch*self.offset + if self.side == South: + accessDirection = Pin.Direction.SOUTH + yPadMin = self.bbSegment.getYMin() + yPadMax = self.corona.coreSymBb.getYMin() - self.offset * 2*hPitch + yContact = yPadMax + yCore = coronaAb.getYMin() + trace( 550, '\tSouth pad: yPadMin={}\n'.format(DbU.getValueString(yPadMin) )) + #if not self.preferredDir: + # yPadMax += self.bbSegment.getWidth()//2 + # yPadMin += 3*hPitch + else: + accessDirection = Pin.Direction.NORTH + yPadMax = self.bbSegment.getYMax() + yPadMin = self.corona.coreSymBb.getYMax() + self.offset * 2*hPitch + yContact = yPadMin + yCore = coronaAb.getYMax() - vPitch + #if not self.preferredDir: + # yPadMin -= self.bbSegment.getWidth()//2 + # yPadMin -= 3*hPitch + vChip = Vertical.create( self.chipNet + , self.padSegment.getLayer() + , self.bbSegment.getCenter().getX() + , self.bbSegment.getWidth() + , yPadMin + , yPadMax + ) + trace( 550, '\tself.arraySize: %s\n' % str(self.arraySize) ) + if self.arraySize: + contacts = self.conf.coronaContactArray( self.chipNet + , self.symContactLayer + , xCore + , yContact + , self.arraySize + , flags + ) + hStrapBb = Box() + for contact in contacts: + bb = contact.getBoundingBox() + coronaTransf.applyOn( bb ) + hStrapBb.merge( bb ) + trace( 550, '\thStrapBb={} contact={}\n'.format(hStrapBb,contact) ) + else: + contact = self.conf.coronaContact( self.chipNet + , self.symContactLayer + , self.bbSegment.getCenter().getX() + , yContact + , self.symContactSize[0] + , self.symContactSize[1] + , flags + ) + hStrapBb = contact.getBoundingBox( padLayer ) + coronaTransf.applyOn( hStrapBb ) + trace( 550, '\thStrapBb={}\n'.format(hStrapBb) ) + if self.arraySize: + if self.side == South: yContact = min( yContact, hStrapBb.getYMin() ) + else: yContact = max( yContact, hStrapBb.getYMax() ) + trace( 550, '\txCore: {:<.1f}L {:<}\n'.format(DbU.toLambda(xCore ), DbU.getValueString(xCore )) ) + trace( 550, '\tyContact: {:<.1f}L {:<}\n'.format(DbU.toLambda(yContact), DbU.getValueString(yContact)) ) + trace( 550, '\tyCore: {:<.1f}L {:<}\n'.format(DbU.toLambda(yCore ), DbU.getValueString(yCore )) ) + vCorona = self.conf.coronaVertical( self.chipNet + , self.symSegmentLayer + , xCore + , self.bbSegment.getWidth() + , yContact + , yCore + ) + trace( 550, '\tvCorona={}\n'.format(vCorona) ) + pin = self.conf.coronaPin( self.chipNet + , self.count + , accessDirection + , self.symSegmentLayer + , xCore + , yCore + , self.bbSegment.getWidth() + , DbU.fromLambda( 1.0 ) + ) + vChipBb = vChip.getBoundingBox() + hStrapBb.merge( vChipBb.getXMin(), hStrapBb.getYMin() ) + hStrapBb.merge( vChipBb.getXMax(), hStrapBb.getYMin() ) + vCoronaBb = vCorona.getBoundingBox() + self.conf.icorona.getTransformation().applyOn( vCoronaBb ) + hStrapBb.merge( vCoronaBb.getXMin(), hStrapBb.getYMin() ) + hStrapBb.merge( vCoronaBb.getXMax(), hStrapBb.getYMin() ) + if self.padSegment.getLayer().isSymbolic(): + hStrapBb.inflate( -self.padSegment.getLayer().getExtentionCap(), 0 + , -self.padSegment.getLayer().getExtentionCap(), 0 ) + hStrap = Horizontal.create( self.chipNet + , self.padSegment.getLayer() + , hStrapBb.getCenter().getY() + , hStrapBb.getHeight() + , hStrapBb.getXMin() + , hStrapBb.getXMax() + ) + trace( 550, '\thStrap={}\n'.format(hStrap) ) + if self.side & North: self.corona.northSide.pins.append( pin ) + if self.side & South: self.corona.southSide.pins.append( pin ) + if self.side & East : self.corona.eastSide .pins.append( pin ) + if self.side & West : self.corona.westSide .pins.append( pin ) + trace( 550, '-' ) diff --git a/cumulus/src/plugins/chip/chip.py b/cumulus/src/plugins/chip/chip.py index c1f68bfb..6f7cd418 100644 --- a/cumulus/src/plugins/chip/chip.py +++ b/cumulus/src/plugins/chip/chip.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2014-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -20,221 +20,131 @@ import optparse import math import cProfile import pstats -import Cfg -import Hurricane -from Hurricane import DataBase -from Hurricane import DbU -from Hurricane import Point -from Hurricane import Transformation -from Hurricane import Box -from Hurricane import Path -from Hurricane import Occurrence -from Hurricane import UpdateSession -from Hurricane import Breakpoint -from Hurricane import Net -from Hurricane import RoutingPad -from Hurricane import Contact -from Hurricane import Horizontal -from Hurricane import Vertical -from Hurricane import Instance -from Hurricane import HyperNet -from Hurricane import Query -import Viewer -import CRL -from CRL import RoutingLayerGauge -import helpers -from helpers.io import ErrorMessage -from helpers.io import WarningMessage -import Etesian -import Anabatic -import Katana -import Unicorn -import plugins -import plugins.cts.clocktree -import plugins.chip -import plugins.chip.padscorona -import plugins.chip.blockpower -import plugins.chip.blockcorona +from ... import Cfg +from ...Hurricane import DataBase, DbU ,Point, Transformation, Box, \ + Path, Occurrence, UpdateSession, Breakpoint, \ + Net, RoutingPad, Contact, Horizontal, Vertical, \ + Instance, HyperNet, Query +from ...CRL import Catalog, RoutingLayerGauge +from ...helpers import trace +from ...helpers.io import ErrorMessage, WarningMessage +from ...helpers.overlay import UpdateSession +from ... import Etesian, Anabatic, Katana, Unicorn +from ..block.block import Block +from . import pads as chipPads +from . import power as chipPower +from . import powerplane as chipPowerplane +from . import corona as chipCorona +from ..harness import pads as harnessPads # -------------------------------------------------------------------- -# PlaceRoute class +# Class : "chip.Chip" +class Chip ( Block ): -class PlaceRoute ( object ): + def __init__ ( self, conf ): + super(Chip,self).__init__( conf ) + + def validate ( self ): + self.conf.validated = True + coreAb = self.conf.core.getAbutmentBox() + if (not coreAb.isEmpty()): + if coreAb.getWidth () <= self.conf.coreAb.getWidth() \ + and coreAb.getHeight() <= self.conf.coreAb.getHeight(): + self.conf.coreSize = (coreAb.getWidth(), coreAb.getHeight()) + else: + raise ErrorMessage( 1, [ 'Core "{}" already have an abutment box, bigger than the requested one:' \ + .format(self.conf.core.getName()) + , " Cell abutment box: {}".format(coreAb) + , " Maximum abutment box: {}".format(self.conf.coreAb) ] ) + self.conf.validated = False + return self.conf.validated + + def doChipFloorplan ( self ): + self.padsCorona = None + minHCorona = self.conf.minHCorona + minVCorona = self.conf.minVCorona + self.conf.chipValidate() + if not self.conf.useHarness: + print( ' - Chip has {} north pads.'.format(len(self.conf.chipConf.northPads)) ) + print( ' - Chip has {} south pads.'.format(len(self.conf.chipConf.southPads)) ) + print( ' - Chip has {} east pads.' .format(len(self.conf.chipConf.eastPads )) ) + print( ' - Chip has {} west pads.' .format(len(self.conf.chipConf.westPads )) ) + self.conf.computeCoronaBorder() + if not self.conf.validated: + raise ErrorMessage( 1, 'chip.doChipFloorplan(): Chip is not valid, aborting.' ) + self.conf.chip.setAbutmentBox( self.conf.chipAb ) + trace( 550, '\tSet chip ab:{}\n'.format(self.conf.chip.getAbutmentBox()) ) + trace( 550, '\tUsing core ab:{}\n'.format(self.conf.core.getAbutmentBox()) ) + self.padsCorona = chipPads.Corona( self ) + self.conf.validated = self.padsCorona.validate() + if not self.conf.validated: + return False + self.padsCorona.doLayout() + self.validate() + minHCorona = self.conf.minHCorona + minVCorona = self.conf.minVCorona + trace( 550, '\tminHCorona={}\n'.format(DbU.getValueString( minHCorona ))) + trace( 550, '\tminVCorona={}\n'.format(DbU.getValueString( minVCorona ))) + else: + self.padsCorona = harnessPads.Corona( self ) + self.padsCorona.doLayout() + innerBb = Box( self.conf.coreAb ) + innerBb.inflate( minHCorona, minVCorona ) + coronaAb = self.conf.corona.getAbutmentBox() + if innerBb.getWidth() > coronaAb.getWidth(): + raise ErrorMessage( 1, 'Core is too wide to fit into the corona, needs {} but only has {}.' \ + .format( DbU.getValueString(innerBb .getWidth()) + , DbU.getValueString(coronaAb.getWidth()) ) ) + if innerBb.getHeight() > coronaAb.getHeight(): + raise ErrorMessage( 1, 'Core is too tall to fit into the corona, needs {} but only has {}.' \ + .format( DbU.getValueString(innerBb .getHeight()) + , DbU.getValueString(coronaAb.getHeight()) ) ) + with UpdateSession(): + self.conf.core.setAbutmentBox( self.conf.coreAb ) + x = (coronaAb.getWidth () - self.conf.coreAb.getWidth ()) // 2 + y = (coronaAb.getHeight() - self.conf.coreAb.getHeight()) // 2 + trace( 550, '\tCore X, {} '.format(DbU.getValueString(x)) ) + x = x - (x % self.conf.sliceHeight) + trace( 550, ' adjusted on {}, {}\n'.format( DbU.getValueString(self.conf.sliceHeight) + , DbU.getValueString(x)) ) + y = y - (y % self.conf.sliceHeight) + self.conf.icore.setTransformation ( Transformation(x,y,Transformation.Orientation.ID) ) + self.conf.icore.setPlacementStatus( Instance.PlacementStatus.FIXED ) + self.conf.refresh() - def __init__ ( self, conf ): - self.conf = conf - self.validated = True - return - - - def _refresh ( self ): - if self.conf.viewer: self.conf.viewer.fit() - return - - - def validate ( self ): - self.validated = True - if len(self.conf.cores) < 1: self.validated = False - - coreAb = self.conf.core.getAbutmentBox() - if (not coreAb.isEmpty()): - if coreAb.getWidth () <= self.conf.coreSize.getWidth() \ - and coreAb.getHeight() <= self.conf.coreSize.getHeight(): - self.conf.coreSize = coreAb - else: - raise ErrorMessage( 1, [ 'Core %s already have an abutment box, bigger than the requested one:' - % self.conf.cores[0].getName() - , " Cell abutment box: %s" % str(coreAb) - , " Maximum abutment box: %s" % str(self.conf.coreSize) ] ) - self.validated = False - - return self.validated - - - def doCoronaFloorplan ( self ): - if not self.validated: - raise ErrorMessage( 1, 'chip.doCoronaFloorplan(): Chip is not valid, aborting.' ) - return - - self.railsNb = Cfg.getParamInt('chip.block.rails.count' ).asInt() - self.hRailWidth = Cfg.getParamInt('chip.block.rails.hWidth' ).asInt() - self.vRailWidth = Cfg.getParamInt('chip.block.rails.vWidth' ).asInt() - self.hRailSpace = Cfg.getParamInt('chip.block.rails.hSpacing').asInt() - self.vRailSpace = Cfg.getParamInt('chip.block.rails.vSpacing').asInt() - - if not self.conf.useClockTree: self.railsNb -= 1 - - innerBb = Box( self.conf.coreSize ) - innerBb.inflate( self.railsNb * self.vRailWidth + (self.railsNb+1) * self.vRailSpace - , self.railsNb * self.hRailWidth + (self.railsNb+1) * self.hRailSpace ) - - coronaAb = self.conf.corona.getAbutmentBox() - if innerBb.getWidth() > coronaAb.getWidth(): - raise ErrorMessage( 1, 'Core is too wide to fit into the corona, needs %s but only has %s.' - % ( DbU.getValueString(innerBb .getWidth()) - , DbU.getValueString(coronaAb.getWidth()) ) ) - - if innerBb.getHeight() > coronaAb.getHeight(): - raise ErrorMessage( 1, 'Core is too tall to fit into the corona, needs %s but only has %s.' - % ( DbU.getValueString(innerBb .getHeight()) - , DbU.getValueString(coronaAb.getHeight()) ) ) - - UpdateSession.open() - self.conf.core.setAbutmentBox( self.conf.coreSize ) - x = (coronaAb.getWidth () - self.conf.coreSize.getWidth ()) // 2 - y = (coronaAb.getHeight() - self.conf.coreSize.getHeight()) // 2 - x = x - (x % self.conf.getSliceHeight()) - y = y - (y % self.conf.getSliceHeight()) - self.conf.icore.setTransformation ( Transformation(x,y,Transformation.Orientation.ID) ) - self.conf.icore.setPlacementStatus( Instance.PlacementStatus.FIXED ) - UpdateSession.close() - return - - - def doCorePlacement ( self ): - if not self.validated: - raise ErrorMessage( 1, 'chip.doCorePlacement(): Chip is not valid, aborting.' ) - return - - coreCell = self.conf.core - - checkUnplaced = plugins.CheckUnplaced( coreCell, plugins.NoFlags ) - if not checkUnplaced.check(): return - - coreCk = None - if self.conf.coronaCk: - for plug in self.conf.coronaCk.getPlugs(): - if plug.getInstance() == self.conf.icore: - coreCk = plug.getMasterNet() - if not coreCk: - print( WarningMessage( 'Core "{}" is not connected to chip clock.'.format(self.conf.icore.getName()) )) - - if self.conf.useClockTree and coreCk: - ht = plugins.cts.clocktree.HTree.create( self.conf, coreCell, coreCk, coreCell.getAbutmentBox() ) - ht.addCloned( self.conf.cell ) - ht.addCloned( self.conf.corona ) - etesian = Etesian.EtesianEngine.create( self.conf.corona ) - etesian.setBlock( self.conf.icore ) - etesian.setViewer( self.conf.viewer ) - etesian.place() - etesian.toHurricane() - etesian.flattenPower() - etesian.destroy() - - ht.connectLeaf() - ht.route() - ht.save( self.conf.cell ) - else: - etesian = Etesian.EtesianEngine.create( self.conf.corona ) - etesian.setBlock( self.conf.icore ) - etesian.place() - etesian.toHurricane() - etesian.flattenPower() - etesian.destroy() - return - - - def doChipPlacement ( self ): - if not self.validated: - raise ErrorMessage( 1, 'chip.doChipPlacement(): Chip is not valid, aborting.' ) - return - - padsCorona = plugins.chip.padscorona.Corona( self.conf ) - self.validated = padsCorona.validate() - if not self.validated: return False - - padsCorona.doLayout() - self.validate() - self.doCoronaFloorplan() - self._refresh() - - self.doCorePlacement() - self._refresh() - - coreBlock = plugins.chip.blockpower.Block( self.conf ) - coreBlock.connectPower() - coreBlock.connectClock() - coreBlock.doLayout() - self._refresh() - - coreCorona = plugins.chip.blockcorona.Corona( coreBlock ) - coreCorona.connectPads ( padsCorona ) - coreCorona.connectBlock() - coreCorona.doLayout() - self._refresh() - - return - - - def doChipRouting ( self ): - if not self.validated: - raise ErrorMessage( 1, 'chip.doChipRouting(): Chip is not valid, aborting.' ) - return - - self.conf.corona.setName( self.conf.corona.getName()+"_r" ) - katana = Katana.KatanaEngine.create( self.conf.corona ) - #katana.printConfiguration () - katana.digitalInit () - #katana.runNegociatePreRouted() - katana.runGlobalRouter ( Katana.Flags.NoFlags ) - katana.loadGlobalRouting ( Anabatic.EngineLoadGrByNet ) - katana.layerAssign ( Anabatic.EngineNoNetLayerAssign ) - katana.runNegociate ( Katana.Flags.NoFlags ) - success = katana.getSuccessState() - katana.finalizeLayout() - katana.destroy() - - return - - - def save ( self ): - if not self.validated: - raise ErrorMessage( 1, 'chip.save(): Chip is not valid, aborting.' ) - return - - af = CRL.AllianceFramework.get() - af.saveCell( self.conf.cell , CRL.Catalog.State.Views ) - af.saveCell( self.conf.corona, CRL.Catalog.State.Views ) - return + def doConnectCore ( self ): + if self.padsCorona: + self.padsCorona.doPowerLayout() + if self.conf.routingGauge.hasPowerSupply(): + power = chipPowerplane.Builder( self.conf ) + power.connectPower() + #power.connectHTrees( self.hTrees ) + power.doLayout() + else: + if self.conf.useHarness: + return + power = chipPower.Builder( self.conf ) + power.connectPower() + power.connectClocks() + power.doLayout() + self.conf.refresh() + corona = chipCorona.Builder( power ) + corona.connectPads( self.padsCorona ) + corona.connectCore() + corona.doLayout() + self.conf.refresh() + + def doPnR ( self ): + status = super(Chip,self).doPnR() + self.conf.refresh( self.conf.chip ) + return self.conf.validated and status + + def save ( self, flags=0 ): + if not self.conf.validated: + raise ErrorMessage( 1, 'chip.save(): Chip is not valid, aborting.' ) + views = Catalog.State.Logical + if self.conf.routingGauge.isSymbolic(): + views = views | Catalog.State.Physical + super(Chip,self).save( flags ) diff --git a/cumulus/src/plugins/chip/configuration.py b/cumulus/src/plugins/chip/configuration.py index 851f12a0..3fdb0aa7 100644 --- a/cumulus/src/plugins/chip/configuration.py +++ b/cumulus/src/plugins/chip/configuration.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2014-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -12,1292 +12,703 @@ # | Python : "./plugins/chip/configuration.py" | # +-----------------------------------------------------------------+ - import sys import os.path -import Cfg -from Hurricane import Breakpoint -from Hurricane import DbU -from Hurricane import Box -from Hurricane import Transformation -from Hurricane import Box -from Hurricane import Path -from Hurricane import Layer -from Hurricane import Occurrence -from Hurricane import Net -from Hurricane import RoutingPad -from Hurricane import Horizontal -from Hurricane import Vertical -from Hurricane import Contact -from Hurricane import Pin -from Hurricane import Plug -from Hurricane import Instance -import CRL -from CRL import RoutingLayerGauge -from helpers import trace -from helpers.io import ErrorMessage -from helpers.io import WarningMessage -from helpers.io import catch -from plugins import getParameter -import plugins.chip - - -plugins.chip.importConstants( globals() ) - - -def breakpoint ( editor, level, message ): - if editor: - editor.fit() - editor.refresh() - Breakpoint.stop( level, message ) - return - - -def getPlugByName ( instance, netName ): - masterCell = instance.getMasterCell() - masterNet = masterCell.getNet( netName ) - if masterNet: - return instance.getPlug( masterNet ) - return None - - -def getPlugByNet ( instance, net ): - for plug in net.getPlugs(): - if plug.getInstance() == instance: - return plug - return None - - -def getRpBb ( instance, netName ): - bb = Box() - for net in instance.getMasterCell().getNets(): - if net.isExternal() and net.getName() == netName: - for component in net.getExternalComponents(): - if isinstance(component,Vertical): - bb = component.getBoundingBox() - instance.getTransformation().applyOn( bb ) - return bb - - -def showNet ( cell, netName ): - net = cell.getNet(netName) - if not net: - print( ErrorMessage( 3, 'Cell {} doesn\'t have net {}'.format(cell.getName(),netName) )) - return - - print( 'Components of', netName ) - for component in net.getComponents(): - print( '| ', component, component.getBoundingBox() ) - return - - -def destroyNetComponents ( net ): - # 1. We cannot iterate over a Hurricane Collection if we are deleting - # some of it's elements at the same time (could be improved as it - # is an intrusive map. - # 2. Lazy programming: as we don't know the destruction order, some - # components can be deleted by (previous) others so we can endup - # on dangling Python proxy which send an exception that we catch. - # 3. Plugs are not destroyed (they cannot as they are part of the - # Instance). They stay connected to the net. - toDestroy = [] - for component in net.getComponents(): - if not isinstance(component,Plug): - toDestroy.append( component ) - for component in toDestroy: - try: - component.destroy() - except: - pass - return - - -# ------------------------------------------------------------------- -# Class : "IoPadConf". - -class IoPadConf ( object ): - # self._datas is a table of 6 elements, the five first coming from - # the configuration itself. Direction are taken from the core point - # of view. - # - # Meaning of the table element's: - # - # +---------+-----------------------------------------------------------+ - # | Index | Type | - # +=========+===========================================================+ - # | 0 | Pad instance name | - # +---------+-----------------------------------------------------------+ - # | 1 | Pad connected signal name. | - # | | The name of the external signal at chip level | - # +---------+-----------------------------------------------------------+ - # | 2 | The name of the signal going *from* the pad to the core. | - # | | OUT direction in the core | - # +---------+-----------------------------------------------------------+ - # | 3 | The name of the signal going *to* the pad from the core. | - # | | IN direction in core | - # +---------+-----------------------------------------------------------+ - # | 4 | The enable signal, coming from the core | - # +---------+-----------------------------------------------------------+ - # | 5 | The IoPad associated object. It is set to None initially | - # +---------+-----------------------------------------------------------+ - - def __init__ ( self, datas ): - if not isinstance(datas,list): - raise ErrorMessage( 1, [ 'IoPadConf.__init__(): The "datas" parameter is not a list.' - , str(datas) ] ) - if len(datas) < 3 and len(datas) > 5: - raise ErrorMessage( 1, [ 'IoPadConf.__init__(): The "datas" list must have between 3 to 5 elements.' - , str(datas) ] ) - - self._datas = datas - self._datas.append( None ) - return - - @property - def padInstanceName ( self ): return self._datas[0] - - @property - def padNetName ( self ): return self._datas[1] - - @property - def fromCoreNet ( self ): return self._datas[2] - - @property - def toCoreNet ( self ): return self._datas[3] - - @property - def enableNet ( self ): return self._datas[-2] - - @property - def nets ( self ): return self._datas[2:-1] - - @property - def udata ( self ): return self._datas[-1] - - @udata.setter - def udata ( self, data ): self._datas[-1] = data - - def isTristate ( self ): return len(self._datas) == 5 - def isBidir ( self ): return len(self._datas) == 6 - - def __repr__ ( self ): - s = ' self.verticalDepth: depth -= 1 - - trace( 550, '\t%s, horizontalDepth:%d, gaugeDepth:%d\n' - % (self.routingGauge,self.horizontalDepth,self.routingGauge.getDepth())) - return Contact.create( net - , self.routingGauge.getContactLayer(depth) - , x, y - , self.routingGauge.getLayerGauge(depth).getViaWidth() - , self.routingGauge.getLayerGauge(depth).getViaWidth() - ) - - def _getNearestHorizontalTrack ( self, bb, y, flags ): - if flags & GaugeConf.DeepDepth: depth = self.horizontalDeepDepth - else: depth = self.horizontalDepth - - index = self.routingGauge.getLayerGauge(depth).getTrackIndex( bb.getYMin(), bb.getYMax(), y, RoutingLayerGauge.Nearest ) - return self.routingGauge.getLayerGauge(depth).getTrackPosition( bb.getYMin(), index ) - - def _getNearestVerticalTrack ( self, bb, x, flags ): - if flags & GaugeConf.DeepDepth: depth = self.verticalDeepDepth - else: depth = self.verticalDepth - - index = self.routingGauge.getLayerGauge(depth).getTrackIndex( bb.getXMin(), bb.getXMax(), x, RoutingLayerGauge.Nearest ) - return self.routingGauge.getLayerGauge(depth).getTrackPosition( bb.getXMin(), index ) - - def _createHorizontal ( self, source, target, y, flags ): - if flags & GaugeConf.DeepDepth: depth = self.horizontalDeepDepth - else: depth = self.horizontalDepth - - layer = self.routingGauge.getRoutingLayer(depth) - - if flags & GaugeConf.UseContactWidth: width = source.getBoundingBox(layer.getBasicLayer()).getHeight() - else: width = self.routingGauge.getLayerGauge(depth).getWireWidth() - if flags & GaugeConf.ExpandWidth: width += DbU.fromLambda( 1.0 ) - - segment = Horizontal.create( source, target, layer, y, width ) - trace( 550, segment ) - return segment - - def _createVertical ( self, source, target, x, flags ): - if flags & GaugeConf.DeepDepth: depth = self.verticalDeepDepth - else: depth = self.verticalDepth - - layer = self.routingGauge.getRoutingLayer(depth) - - if flags & GaugeConf.UseContactWidth: width = source.getBoundingBox(layer.getBasicLayer()).getWidth() - else: width = self.routingGauge.getLayerGauge(depth).getWireWidth() - if flags & GaugeConf.ExpandWidth: width += DbU.fromLambda( 1.0 ) - - segment = Vertical.create( source, target, layer, x, width ) - trace( 550, segment ) - return segment - - def _rpAccess ( self, rp, flags ): - trace( 550, ',+', '\t_rpAccess() %s\n' % str(rp) ) - - if rp in self._rpToAccess: - trace( 550, '-' ) - return self._rpToAccess[rp] - - if flags & GaugeConf.DeepDepth: - hdepth = self.horizontalDeepDepth - vdepth = self.verticalDeepDepth - else: - hdepth = self.horizontalDepth - vdepth = self.verticalDepth - - hpitch = self.routingGauge.getLayerGauge(hdepth).getPitch() - hoffset = self.routingGauge.getLayerGauge(hdepth).getOffset() - contact1 = Contact.create( rp, self.routingGauge.getContactLayer(0), 0, 0 ) - midSliceY = contact1.getY() - (contact1.getY() % self.cellGauge.getSliceHeight()) \ - + self.cellGauge.getSliceHeight() // 2 - midTrackY = midSliceY - ((midSliceY - hoffset) % hpitch) - dy = midSliceY - contact1.getY() - - if flags & GaugeConf.OffsetBottom1: dy += hpitch - if flags & GaugeConf.OffsetTop1: dy -= hpitch - contact1.setDy( dy ) - - trace( 550, contact1 ) - - if flags & GaugeConf.HAccess: stopDepth = hdepth - else: stopDepth = vdepth - trace( 550, '\tstopDepth:%d\n' % stopDepth ) - - for depth in range(1,stopDepth): - xoffset = 0 - if flags & GaugeConf.OffsetRight1 and depth == 1: - xoffset = self.routingGauge.getLayerGauge(depth+1).getPitch() - contact2 = Contact.create( rp.getNet() - , self.routingGauge.getContactLayer(depth) - , contact1.getX() + xoffset - , contact1.getY() - , self.routingGauge.getLayerGauge(depth).getViaWidth() - , self.routingGauge.getLayerGauge(depth).getViaWidth() - ) - trace( 550, contact2 ) - if self.routingGauge.getLayerGauge(depth).getDirection() == RoutingLayerGauge.Horizontal: - segment = Horizontal.create( contact1 - , contact2 - , self.routingGauge.getRoutingLayer(depth) - , contact1.getY() - , self.routingGauge.getLayerGauge(depth).getWireWidth() - ) - trace( 550, segment ) - else: - segment = Vertical.create( contact1 - , contact2 - , self.routingGauge.getRoutingLayer(depth) - , contact1.getX() - , self.routingGauge.getLayerGauge(depth).getWireWidth() - ) - trace( 550, segment ) - contact1 = contact2 - - self._rpToAccess[rp] = contact1 - - trace( 550, '-' ) - return contact1 - - def _rpByOccurrence ( self, occurrence, net ): - plug = occurrence.getEntity() - if plug in self._plugToRp: - rp = self._plugToRp[plug] - else: - rp = RoutingPad.create( net, occurrence, RoutingPad.BiggestArea ) - self._plugToRp[plug] = rp - - return rp - - def _rpAccessByOccurrence ( self, occurrence, net, flags ): - plug = occurrence.getEntity() - if plug in self._plugToRp: - rp = self._plugToRp[plug] - else: - rp = RoutingPad.create( net, occurrence, RoutingPad.BiggestArea ) - self._plugToRp[plug] = rp - - return self._rpAccess( self._rpByOccurrence(occurrence,net), flags ) - - def _rpByPlug ( self, plug, net ): - if plug in self._plugToRp: - rp = self._plugToRp[plug] - else: - occurrence = Occurrence( plug, Path(net.getCell(),'') ) - rp = RoutingPad.create( net, occurrence, RoutingPad.BiggestArea ) - self._plugToRp[plug] = rp - - return rp - - def _rpByPlugName ( self, instance, plugName, net ): - return self._rpByPlug( getPlugByName(instance,plugName), net ) - - def _rpAccessByPlug ( self, plug, net, flags ): - return self._rpAccess( self._rpByPlug(plug,net), flags ) - - def _rpAccessByPlugName ( self, instance, plugName, net, flags=0 ): - return self._rpAccess( self._rpByPlugName(instance,plugName,net), flags ) - - def _setStackPosition ( self, topContact, x, y ): - topContact.setX( x ) - topContact.setY( y ) - - count = 0 - for component in topContact.getSlaveComponents(): - segment = component - count += 1 - if count > 1: - raise ErrorMessage( 1, 'GaugeConf::_setStackPosition(): There must be exactly one segment connected to %s, not %d.' % (topContact,count) ) - - if count == 1: - if isinstance(segment,Horizontal): - segment.setY( y ) - segment.getOppositeAnchor( topContact ).setY( y ) - elif isinstance(segment,Vertical): - segment.setX( x ) - segment.getOppositeAnchor( topContact ).setX( x ) - return +from ... import Cfg +from ...Hurricane import Breakpoint, DbU, Box, Transformation, Box, \ + Path, Layer, Occurrence, Net, RoutingPad, \ + Horizontal, Vertical, Contact, Pin, Plug, \ + Instance +from ...CRL import AllianceFramework, RoutingLayerGauge +from ...helpers import trace +from ...helpers.overlay import UpdateSession +from ...helpers.io import ErrorMessage, WarningMessage, \ + vprint, catch +from . import chip +from ..block.configuration import BlockConf +from .constants import importConstants + +__all__ = [ 'ChipConf' ] + + +importConstants( globals() ) +af = AllianceFramework.get() # ------------------------------------------------------------------- # Class : "Configuration.ChipConf". -class ChipConf ( object ): +class ChipConf ( BlockConf ): @staticmethod def _toSymbolic ( u, rounding ): - oneLambda = DbU.fromLambda( 1.0 ) - remainder = u % oneLambda - if remainder: - if rounding == Superior: u = u + (oneLambda - remainder) - else: u = u - remainder - return u - + """ + Pitch the coordinates ``u`` to the symbolic grid, according + to ``rounding`` (Superior or Inferior). + """ + oneLambda = DbU.fromLambda( 1.0 ) + remainder = u % oneLambda + if remainder: + if rounding == Superior: u = u + (oneLambda - remainder) + else: u = u - remainder + return u @staticmethod def toSymbolic ( v, rounding ): - if isinstance(v,int): return ChipConf._toSymbolic( v, rounding ) - if isinstance(v,Box): - if rounding & Inwards: - roundings = [ Superior - , Superior - , Inferior - , Inferior ] - else: - roundings = [ Inferior - , Inferior - , Superior - , Superior ] - xMin = ChipConf._toSymbolic( v.getXMin(), roundings[0] ) - yMin = ChipConf._toSymbolic( v.getYMin(), roundings[1] ) - xMax = ChipConf._toSymbolic( v.getXMax(), roundings[2] ) - yMax = ChipConf._toSymbolic( v.getYMax(), roundings[3] ) - return Box( xMin, yMin, xMax, yMax ) - return v + """ + Pitch the coordinates of object ``v`` to the symbolic grid, + according to ``rounding``. Were ``v`` can be: + * A scalar, then rounding is Inferior or Superior. + * A Box, then rounding is: + + * Inwards: the pitched box will be fully enclosed in the + original box. + * Outwards: the pitched box will fully enclose the original + box. + """ + if isinstance(v,int): return ChipConf._toSymbolic( v, rounding ) + if isinstance(v,Box): + if rounding & Inwards: + roundings = [ Superior + , Superior + , Inferior + , Inferior ] + else: + roundings = [ Inferior + , Inferior + , Superior + , Superior ] + xMin = ChipConf._toSymbolic( v.getXMin(), roundings[0] ) + yMin = ChipConf._toSymbolic( v.getYMin(), roundings[1] ) + xMax = ChipConf._toSymbolic( v.getXMax(), roundings[2] ) + yMax = ChipConf._toSymbolic( v.getYMax(), roundings[3] ) + return Box( xMin, yMin, xMax, yMax ) + return v - @staticmethod - def _readChipSize( chipConfigDict ): - if not 'chip.size' in chipConfigDict: return Box() - chipSize = chipConfigDict['chip.size'] - if not isinstance(chipSize,tuple): - print( ErrorMessage( 1, 'The Chip size parameter is *not* a tuple.' )) - return Box() - if len(chipSize) != 2: - print( ErrorMessage( 1, 'The Chip size parameter is *not* a tuple of exactly two items.' )) - return Box() - return Box( 0, 0, chipSize[0], chipSize[1] ) + def __init__ ( self, cell, ioPins=[], ioPads=[] ): + trace( 550, ',+', 'ChipConf.__init__(): "{}"'.format(cell.getName()) ) + super(ChipConf,self).__init__( cell, ioPins, ioPads ) + #trace( 550, '\tONE LAMBDA = %s\n' % DbU.getValueString(DbU.fromLambda(1.0)) ) + self.validated = True + # Block Corona parameters (triggers loading from disk). + self.cfg.chip.padCoreSide = None + self.cfg.chip.supplyRailWidth = None + self.cfg.chip.supplyRailPitch = None + self.cfg.chip.block.rails.count = None + self.cfg.chip.block.rails.hWidth = None + self.cfg.chip.block.rails.vWidth = None + self.cfg.chip.block.rails.hSpacing = None + self.cfg.chip.block.rails.vSpacing = None + self._railsCount = self.cfg.chip.block.rails.count + # Global Net names. + self.blockageName = "blockagenet" + # Global Nets. + self.coronaVdd = None + self.coronaVss = None + self.coronaCks = [] + self.blockageNet = None + self.padsHavePosition = False + self.chipLogos = [] + self.minHCorona = 0 + self.minVCorona = 0 + trace( 550, '-' ) + @property + def padCoreSide ( self ): + return self.cfg.chip.padCoreSide - @staticmethod - def _readCoreSize( chipConfigDict ): - if not 'core.size' in chipConfigDict: - print( ErrorMessage( 1, 'The Core size parameter is missing.' )) - return Box() - coreSize = chipConfigDict['core.size'] - if not isinstance(coreSize,tuple): - print( ErrorMessage( 1, 'The Core size parameter is *not* a tuple.' )) - return Box() - if len(coreSize) != 2: - print( ErrorMessage( 1, 'The Core size parameter is *not* a tuple of exactly two items.' )) - return Box() - return Box( 0, 0, coreSize[0], coreSize[1] ) + @property + def railsCount ( self ): + return self._railsCount + @railsCount.setter + def railsCount ( self, count ): + self._railsCount = count - @staticmethod - def _readClockTree( chipConfigDict ): - useClockTree = False - if 'chip.clockTree' in chipConfigDict: - if chipConfigDict['chip.clockTree']: - useClockTree = True - return useClockTree + @property + def hRailWidth ( self ): + return self.cfg.chip.block.rails.hWidth + @property + def vRailWidth ( self ): + return self.cfg.chip.block.rails.vWidth - @staticmethod - def _readChipName( chipConfigDict ): - if 'chip.name' in chipConfigDict: return chipConfigDict['chip.name'] - return 'chip' + @property + def hRailSpace ( self ): + return self.cfg.chip.block.rails.hSpacing + @property + def vRailSpace ( self ): + return self.cfg.chip.block.rails.vSpacing - def _loadIoPadGauge ( self, chipConfigDict ): - if not 'pads.ioPadGauge' in chipConfigDict: - #raise ErrorMessage( 1, 'The IO pad gauge configuration parameter "pads.ioPadGauge" is missing.' ) - return - self.gaugeConf._loadIoPadGauge( chipConfigDict['pads.ioPadGauge'] ) - return - - - def _readPads ( self, chipConfigDict, keyword ): - if not keyword in chipConfigDict: return [] - padConfList = chipConfigDict[keyword] - if not isinstance(padConfList,list): - raise ErrorMessage( 1, 'The "%s" entry is not a list.' ) - return [] - - af = CRL.AllianceFramework.get() - padList = [] - for i in range(len(padConfList)): - position = None - instanceName = None - if isinstance(padConfList[i],str): - instanceName = padConfList[i] - elif isinstance(padConfList[i],list): - self.padsHavePosition = True - if isinstance(padConfList[i][0],int) and isinstance(padConfList[i][1],str): - position = padConfList[i][0] - instanceName = padConfList[i][1] - - if not instanceName: - raise ErrorMessage( 1, 'The element [%d] of list %s is neither a string nor a list "[pos,name]" (skipped).' - % (i,keyword) ) - continue - - padList.append( [ position, instanceName ] ) - - return padList - - - def _readPadInstances ( self, chipConfigDict ): - if not 'pads.instances' in chipConfigDict: return [ ] - - padInstancesConf = chipConfigDict['pads.instances'] - if not isinstance(padInstancesConf,list): - raise ErrorMessage( 1, 'The "%s" entry is not a list.' ) - return [ ] - - padInstances = [ ] - for entry in padInstancesConf: - padInstances.append( IoPadConf( entry ) ) - return padInstances - - - def __init__ ( self, chipConfigDict, cell, viewer=None ): - trace( 550, '\tONE LAMBDA = %s\n' % DbU.getValueString(DbU.fromLambda(1.0)) ) - - if not isinstance(chipConfigDict,dict): - raise ErrorMessage( 1, 'The "chip" variable is not a dictionnary.' ) - - self.validated = True - self.gaugeConf = GaugeConf() - self.cell = cell - self.viewer = viewer - # Block Corona parameters. - self.railsNb = getParameter('chip','chip.block.rails.count' ).asInt() - self.hRailWidth = getParameter('chip','chip.block.rails.hWidth' ).asInt() - self.vRailWidth = getParameter('chip','chip.block.rails.vWidth' ).asInt() - self.hRailSpace = getParameter('chip','chip.block.rails.hSpacing').asInt() - self.vRailSpace = getParameter('chip','chip.block.rails.vSpacing').asInt() - # Global Net names. - self.blockageName = "blockagenet" - # Global Nets. - self.coronaVdd = None - self.coronaVss = None - self.coronaCk = None - self.blockageNet = None - self.coronas = [] - self.cores = [] - - self._loadIoPadGauge( chipConfigDict ) - - self.padsHavePosition = False - self.padInstances = self._readPadInstances( chipConfigDict ) - self.southPads = self._readPads( chipConfigDict, 'pads.south' ) - self.northPads = self._readPads( chipConfigDict, 'pads.north' ) - self.eastPads = self._readPads( chipConfigDict, 'pads.east' ) - self.westPads = self._readPads( chipConfigDict, 'pads.west' ) - self.coreSize = ChipConf._readCoreSize ( chipConfigDict ) - self.chipSize = ChipConf._readChipSize ( chipConfigDict ) - self.useClockTree = ChipConf._readClockTree( chipConfigDict ) - self.chipName = ChipConf._readChipName ( chipConfigDict ) - - minHCorona = self.railsNb*(self.hRailWidth + self.hRailSpace) + self.hRailSpace - minVCorona = self.railsNb*(self.vRailWidth + self.vRailSpace) + self.vRailSpace - if minHCorona > minVCorona: self.minCorona = minHCorona*2 - else: self.minCorona = minVCorona*2 - - return - + def computeCoronaBorder ( self ): + global af + if self.useClockTree: + clockNets = [] + for net in self.cellPnR.getNets(): + if net.isClock(): + clockNets.append( net ) + self.railsCount = self.cfg.chip.block.rails.count + len(clockNets) + trace( 550, '\tself.railsCount: {}\n'.format(self.railsCount) ) + hRailsSize = self.railsCount*(self.hRailWidth + self.hRailSpace) + self.hRailSpace + trace( 550, '\thRailsSize={}\n'.format(DbU.getValueString( hRailsSize ))) + if hRailsSize % self.sliceHeight: + hRailsSize += self.sliceHeight - (hRailsSize % self.sliceHeight) + trace( 550, '\thRailsSize (sliceHeight)={}\n'.format(DbU.getValueString( hRailsSize ))) + self.minHCorona = hRailsSize #+ self.sliceHeight + vRailsSize = self.railsCount*(self.vRailWidth + self.vRailSpace) + self.vRailSpace + if vRailsSize % self.sliceHeight: + vRailsSize += self.sliceHeight - (vRailsSize % self.sliceHeight) + self.minVCorona = vRailsSize #+ self.sliceHeight def chipValidate ( self ): - self.checkPads() - self.checkCorona() - self.computeChipSize() - #self.checkChipSize() - self.findPowerAndClockNets() - return - - - @property - def icorona ( self ): return self.coronas[0] - - @property - def corona ( self ): return self.coronas[0].getMasterCell() - - @property - def icore ( self ): return self.cores[0] - - @property - def core ( self ): return self.cores[0].getMasterCell() - - @property - def chip ( self ): return self.cell - + #self.checkPads() + #self.checkCorona() + #self.computeChipSize() + #self.checkChipSize() + self.findPowerAndClockNets() + return def getInstanceAb ( self, instance ): - ab = instance.getMasterCell().getAbutmentBox() - instance.getTransformation().applyOn( ab ) - - if instance.getCell() == self.cell: return ab - - if instance.getCell() != self.corona: - raise ErrorMessage( 1, 'ChipConf.getInstanceAb(): Instance "%s" neither belong to chip or corona.' % instance.getName() ) + ab = instance.getMasterCell().getAbutmentBox() + instance.getTransformation().applyOn( ab ) + if instance.getCell() == self.chip: return ab + if instance.getCell() != self.corona: + raise ErrorMessage( 1, 'ChipConf.getInstanceAb(): Instance "{}" neither belong to chip or corona.' \ + .format(instance.getName()) ) + return ab + self.icorona.getTransformation().applyOn( ab ) return ab - self.icorona.getTransformation().applyOn( ab ) - return ab - + def setupICore ( self ): + """ + Setup the abutment box of the *core* master cell and position it's unique + instance (*icore*) in the center of the *corona* master cell. + """ + with UpdateSession(): + trace( 550, ',+', '\tChipConf.setupICore()\n' ) + ab = self.getInstanceAb( self.icorona ) + if ab.isEmpty(): + raise ErrorMessage( 1, 'ChipConf.setupICore(): Attempt to setup core *before* corona.' ) + return + #ab.inflate( -gapX1, -gapY1, -gapX2, -gapY2 ) + ab = self.toSymbolic( ab, Inwards ) + trace( 550, '\tself.coreAb:{}\n'.format(self.coreAb) ) + if self.core.getAbutmentBox().isEmpty(): + if not self.coreAb.isEmpty(): + trace( 550, '\tUsing user-defined CORE size:{}\n'.format(self.coreSize) ) + ab = self.coreAb + else: + ab.inflate( -self.minHCorona, -self.minVCorona ) + self.coreSize = (ab.getWidth(), ab.getHeight()) + trace( 550, '\tSetting CORE abutment box:{}\n'.format(ab) ) + self.core.setAbutmentBox( Box( 0, 0, ab.getWidth(), ab.getHeight() ) ) + self.coreSize = ( self.coreSize[0] - self.coreSize[0] % self.sliceStep + , self.coreSize[1] - self.coreSize[1] % self.sliceHeight ) + self.core.setAbutmentBox( Box( 0, 0, self.coreAb.getWidth(), self.coreAb.getHeight() ) ) + trace( 550, '\tCORE ab:{}\n'.format(self.coreAb) ) + coreX = (self.coronaAb.getWidth () - self.coreAb.getWidth ()) // 2 + trace( 550, '\tCore X, {} '.format(DbU.getValueString(coreX)) ) + coreX = coreX - (coreX % self.sliceHeight) + trace( 550, ' adjusted on {}, {}\n'.format( DbU.getValueString(self.sliceHeight) + , DbU.getValueString(coreX)) ) + coreY = (self.coronaAb.getHeight() - self.coreAb.getHeight()) // 2 + coreY = coreY - (coreY % self.sliceHeight) + self.icore.setTransformation( Transformation( coreX, coreY, Transformation.Orientation.ID ) ) + self.icore.setPlacementStatus( Instance.PlacementStatus.FIXED ) + trace( 550, '-' ) def getCoronaNet ( self, chipNet ): - for plug in chipNet.getPlugs(): - if plug.getInstance() == self.icorona: - return plug.getMasterNet() - return None - + for plug in chipNet.getPlugs(): + if plug.getInstance() == self.icorona: + return plug.getMasterNet() + return None def toRoutingGauge ( self, uMin, uMax, layer ): - trace( 550, ',+', '\ttoRoutingGauge() [%s %s] %s\n' \ - % (DbU.getValueString(uMin), DbU.getValueString(uMax), layer) ) - - ab = self.corona.getAbutmentBox() - lg = None - mask = layer.getMask() - for layerGauge in self.gaugeConf.routingGauge.getLayerGauges(): - if layerGauge.getLayer().getMask() == mask: - lg = layerGauge - trace( 550, '\tUsing layer gauge %s\n' % str(lg) ) - break - - if uMax < uMin: uMin, uMax = uMax, uMin - if lg: - if lg.getDirection() == RoutingLayerGauge.Horizontal: - abMin = ab.getYMin() - abMax = ab.getYMax() + trace( 550, ',+', '\ttoRoutingGauge() [{} {}] {}\n' \ + .format(DbU.getValueString(uMin), DbU.getValueString(uMax), layer) ) + ab = self.corona.getAbutmentBox() + lg = None + mask = layer.getMask() + for layerGauge in self.routingGauge.getLayerGauges(): + if layerGauge.getLayer().getMask() == mask: + lg = layerGauge + trace( 550, '\tUsing layer gauge {}\n'.format(lg) ) + break + if uMax < uMin: uMin, uMax = uMax, uMin + if lg: + if lg.getDirection() == RoutingLayerGauge.Horizontal: + abMin = ab.getYMin() + abMax = ab.getYMax() + else: + abMin = ab.getXMin() + abMax = ab.getXMax() + if uMin <= abMin: + shiftRight = abMin - uMin + lg.getPitch() + uMin += shiftRight + uMax += shiftRight + if uMax >= abMax: + shiftLeft = uMax - abMax + lg.getPitch() + uMin -= shiftLeft + uMax -= shiftLeft + iTrackMin = lg.getTrackIndex( abMin, abMax, uMin, RoutingLayerGauge.Superior ) + iTrackMax = lg.getTrackIndex( abMin, abMax, uMax, RoutingLayerGauge.Inferior ) + if iTrackMax < iTrackMin: iTrackMax = iTrackMin + uTrackMin = lg.getTrackPosition( abMin, iTrackMin ) + uTrackMax = lg.getTrackPosition( abMin, iTrackMax ) + axis = (uTrackMax + uTrackMin) // 2 + width = (iTrackMax - iTrackMin) * lg.getPitch() + lg.getWireWidth() + if self.routingGauge.isSymbolic(): + trace( 550, '\tRoutingGauge is symbolic, adjust on lambda.\n' ) + oneLambda = DbU.fromLambda( 1.0 ) + if axis % oneLambda: + axis -= oneLambda // 2 + width -= oneLambda + trace( 550, '\t[{} {}] -> [{} {}]\n'.format( iTrackMin + , iTrackMax + , DbU.getValueString(uTrackMin) + , DbU.getValueString(uTrackMax) ) ) + trace( 550, '\taxis: {:.1f}L {}\n'.format(DbU.toLambda(axis ), DbU.getValueString(axis )) ) + trace( 550, '\twidth: {:.1f}L {}\n'.format(DbU.toLambda(width), DbU.getValueString(width)) ) else: - abMin = ab.getXMin() - abMax = ab.getXMax() - - if uMin <= abMin: - shiftRight = abMin - uMin + lg.getPitch() - uMin += shiftRight - uMax += shiftRight - if uMax >= abMax: - shiftLeft = uMax - abMax + lg.getPitch() - uMin -= shiftLeft - uMax -= shiftLeft - - iTrackMin = lg.getTrackIndex( abMin, abMax, uMin, RoutingLayerGauge.Superior ) - iTrackMax = lg.getTrackIndex( abMin, abMax, uMax, RoutingLayerGauge.Inferior ) - if iTrackMax < iTrackMin: iTrackMax = iTrackMin - - uTrackMin = lg.getTrackPosition( abMin, iTrackMin ) - uTrackMax = lg.getTrackPosition( abMin, iTrackMax ) - - axis = (uTrackMax + uTrackMin) // 2 - width = (iTrackMax - iTrackMin) * lg.getPitch() + lg.getWireWidth() - - if self.gaugeConf.routingGauge.isSymbolic(): - oneLambda = DbU.fromLambda( 1.0 ) - if axis % oneLambda: - axis -= oneLambda // 2 - width -= oneLambda - - trace( 550, '\t[%i %i]\n' % (iTrackMin, iTrackMax) ) - trace( 550, '\taxis: %sl %s\n' % (DbU.toLambda(axis ), DbU.getValueString(axis )) ) - trace( 550, '\twidth: %sl %s\n' % (DbU.toLambda(width), DbU.getValueString(width)) ) - else: - axis = (uMax + uMin) // 2 - width = (uMax - uMin) - - trace( 550, '-' ) - return axis, width - + axis = (uMax + uMin) // 2 + width = (uMax - uMin) + trace( 550, '-' ) + return axis, width def toCoronaPitchInChip ( self, uCore, layer ): - trace( 550, ',+', '\tChipConf.toCoronaPitchInChip(): uCore: %sl %s\n' % (DbU.toLambda(uCore), DbU.getValueString(uCore)) ) - - coronaAb = self.getInstanceAb( self.icorona ) - lg = None - mask = layer.getMask() - for layerGauge in self.gaugeConf.routingGauge.getLayerGauges(): - if layerGauge.getLayer().getMask() == mask: - lg = layerGauge - break - - if not lg: + trace( 550, ',+', '\tChipConf.toCoronaPitchInChip(): uCore: {:.1f}L {}\n' \ + .format(DbU.toLambda(uCore), DbU.getValueString(uCore)) ) + coronaAb = self.getInstanceAb( self.icorona ) + lg = None + mask = layer.getMask() + for layerGauge in self.routingGauge.getLayerGauges(): + if layerGauge.getLayer().getMask() == mask: + lg = layerGauge + break + if not lg: + trace( 550, '-' ) + return 0 + trace( 550, '\t{}\n'.format(lg) ) + if lg: + if lg.getDirection() == RoutingLayerGauge.Horizontal: + uCorona = uCore - coronaAb.getYMin() + else: + uCorona = uCore - coronaAb.getXMin() + uCorona, width = self.toRoutingGauge( uCorona, uCorona, layer ) + trace( 550, '\ttoCoronaPitchInChip(): uCorona: {:.1f}L {}\n' \ + .format(DbU.toLambda(uCorona), DbU.getValueString(uCorona)) ) + if lg: + if lg.getDirection() == RoutingLayerGauge.Horizontal: + uCore = uCorona + coronaAb.getYMin() + else: + uCore = uCorona + coronaAb.getXMin() + trace( 550, '\ttoCoronaPitchInChip(): uCorona: {:.1f}L {}\n'.format(DbU.toLambda(uCorona), DbU.getValueString(uCorona)) ) + trace( 550, '\ttoCoronaPitchInChip(): uCore: {:.1f}L {}\n'.format(DbU.toLambda(uCore ), DbU.getValueString(uCore )) ) trace( 550, '-' ) - return 0 - - trace( 550, '\t%s\n' % str(lg) ) - if lg: - if lg.getDirection() == RoutingLayerGauge.Horizontal: - uCorona = uCore - coronaAb.getYMin() - else: - uCorona = uCore - coronaAb.getXMin() - - uCorona, width = self.toRoutingGauge( uCorona, uCorona, layer ) - - trace( 550, '\ttoCoronaPitchInChip(): uCorona: %sl %s\n' % (DbU.toLambda(uCorona), DbU.getValueString(uCorona)) ) - - if lg: - if lg.getDirection() == RoutingLayerGauge.Horizontal: - uCore = uCorona + coronaAb.getYMin() - else: - uCore = uCorona + coronaAb.getXMin() - - trace( 550, '\ttoCoronaPitchInChip(): uCorona: %sl %s\n' % (DbU.toLambda(uCorona), DbU.getValueString(uCorona)) ) - trace( 550, '\ttoCoronaPitchInChip(): uCore: %sl %s\n' % (DbU.toLambda(uCore ), DbU.getValueString(uCore )) ) - trace( 550, '-' ) - return uCore - - + return uCore def coronaHorizontal ( self, chipNet, layer, chipY, width, chipXMin, chipXMax ): - trace( 550, ',+', '\tChipConf.coronaHorizontal\n' ) - - coronaAb = self.getInstanceAb( self.icorona ) - coronaNet = self.getCoronaNet ( chipNet ) - if not coronaNet: return None - - coronaY = chipY - coronaAb.getYMin() - dxMin = ChipConf.toSymbolic( chipXMin - coronaAb.getXMin(), Superior ) - dxMax = ChipConf.toSymbolic( chipXMax - coronaAb.getXMin(), Inferior ) - - trace( 550, '\t| chipNet: %s %s\n' % (chipNet, layer) ) - trace( 550, '\t| Real\n' ) - trace( 550, '\t| axis: %10s\n' % DbU.getValueString(coronaY) ) - trace( 550, '\t| width:%10s\n' % DbU.getValueString(width) ) - trace( 550, '\t| dxMin:%10s (%sl)\n' \ - % (DbU.getValueString(chipXMin - coronaAb.getXMin()), DbU.toLambda(chipXMin - coronaAb.getXMin()) ) ) - trace( 550, '\t| dxMax:%10s\n' % DbU.getValueString(chipXMax - coronaAb.getXMin()) ) - - coronaY, width = self.toRoutingGauge( coronaY - width//2, coronaY + width//2, layer ) - - trace( 550, '\t| On Grid\n' ) - trace( 550, '\t| axis: %10sl or %10s\n' % (DbU.toLambda(coronaY), DbU.getValueString(coronaY)) ) - trace( 550, '\t| width:%10sl or %10s\n' % (DbU.toLambda(width) , DbU.getValueString(width)) ) - trace( 550, '\t| dxMin:%10sl\n' % DbU.toLambda(dxMin) ) - trace( 550, '\t| dxMax:%10sl\n' % DbU.toLambda(dxMax) ) - - h = Horizontal.create( coronaNet, layer, coronaY, width, dxMin, dxMax ) - - trace( 550, '\t| %s\n' % str(h) ) - trace( 550, '-' ) - return h - + trace( 550, ',+', '\tChipConf.coronaHorizontal\n' ) + coronaAb = self.getInstanceAb( self.icorona ) + coronaNet = self.getCoronaNet ( chipNet ) + if not coronaNet: return None + coronaY = chipY - coronaAb.getYMin() + dxMin = ChipConf.toSymbolic( chipXMin - coronaAb.getXMin(), Superior ) + dxMax = ChipConf.toSymbolic( chipXMax - coronaAb.getXMin(), Inferior ) + trace( 550, '\t| chipNet: {} {}\n'.format(chipNet, layer) ) + trace( 550, '\t| Real\n' ) + trace( 550, '\t| axis: {}\n'.format(DbU.getValueString(coronaY)) ) + trace( 550, '\t| width:{}\n'.format(DbU.getValueString(width)) ) + trace( 550, '\t| dxMin:{} ({:.1f}L)\n' \ + .format( DbU.getValueString(chipXMin - coronaAb.getXMin()) + , DbU.toLambda(chipXMin - coronaAb.getXMin()) ) ) + trace( 550, '\t| dxMax:{}\n'.format(DbU.getValueString(chipXMax - coronaAb.getXMin())) ) + coronaY, width = self.toRoutingGauge( coronaY - width//2, coronaY + width//2, layer ) + trace( 550, '\t| On Grid\n' ) + trace( 550, '\t| axis: {:.1f}L or {}\n'.format(DbU.toLambda(coronaY), DbU.getValueString(coronaY)) ) + trace( 550, '\t| width:{:.1f}L or {}\n'.format(DbU.toLambda(width) , DbU.getValueString(width)) ) + trace( 550, '\t| dxMin:{:.1f}L\n'.format(DbU.toLambda(dxMin)) ) + trace( 550, '\t| dxMax:{:.1f}L\n'.format(DbU.toLambda(dxMax)) ) + h = Horizontal.create( coronaNet, layer, coronaY, width, dxMin, dxMax ) + trace( 550, '\t| {}\n'.format(h) ) + trace( 550, '-' ) + return h def coronaVertical ( self, chipNet, layer, chipX, width, chipYMin, chipYMax ): - trace( 550, ',+', '\tChipConf.coronaVertical\n' ) - - coronaAb = self.getInstanceAb( self.icorona ) - coronaNet = self.getCoronaNet( chipNet ) - if not coronaNet: return None - - coronaX = chipX - coronaAb.getXMin() - dyMin = ChipConf.toSymbolic( chipYMin - coronaAb.getYMin(), Superior ) - dyMax = ChipConf.toSymbolic( chipYMax - coronaAb.getYMin(), Inferior ) - - trace( 550, '\t| chipNet: %s %s\n' % (chipNet, layer) ) - trace( 550, '\t| Real\n' ) - trace( 550, '\t| axis: %s\n' % DbU.getValueString(coronaX) ) - trace( 550, '\t| width:%s\n' % DbU.getValueString(width) ) - - coronaX, width = self.toRoutingGauge( coronaX - width//2, coronaX + width//2, layer ) - - trace( 550, '\t| On Grid\n' ) - trace( 550, '\t| axis: %s or %s\n' % (DbU.toLambda(coronaX), DbU.getValueString(coronaX)) ) - trace( 550, '\t| width:%s or %s\n' % (DbU.toLambda(width) , DbU.getValueString(width)) ) - - v = Vertical.create( coronaNet, layer, coronaX, width, dyMin, dyMax ) - - trace( 550, '\t| %s\n' % str(v) ) - trace( 550, '-' ) - return v - + trace( 550, ',+', '\tChipConf.coronaVertical\n' ) + coronaAb = self.getInstanceAb( self.icorona ) + coronaNet = self.getCoronaNet( chipNet ) + if not coronaNet: return None + coronaX = chipX - coronaAb.getXMin() + dyMin = ChipConf.toSymbolic( chipYMin - coronaAb.getYMin(), Superior ) + dyMax = ChipConf.toSymbolic( chipYMax - coronaAb.getYMin(), Inferior ) + trace( 550, '\t| chipNet: {} {}\n'.format(chipNet, layer) ) + trace( 550, '\t| Real\n' ) + trace( 550, '\t| axis: {}\n'.format(DbU.getValueString(coronaX)) ) + trace( 550, '\t| width:{}\n'.format(DbU.getValueString(width)) ) + coronaX, width = self.toRoutingGauge( coronaX - width//2, coronaX + width//2, layer ) + trace( 550, '\t| On Grid\n' ) + trace( 550, '\t| axis: {:.1f}L or {}\n'.format(DbU.toLambda(coronaX), DbU.getValueString(coronaX)) ) + trace( 550, '\t| width:{:.1f}L or {}\n'.format(DbU.toLambda(width) , DbU.getValueString(width)) ) + v = Vertical.create( coronaNet, layer, coronaX, width, dyMin, dyMax ) + trace( 550, '\t| {}\n'.format(v) ) + trace( 550, '-' ) + return v def coronaContact ( self, chipNet, layer, chipX, chipY, width, height, flags=0 ): - trace( 550, ',+', '\tChipConf.coronaContact\n' ) - - coronaAb = self.getInstanceAb( self.icorona ) - coronaNet = self.getCoronaNet( chipNet ) - if not coronaNet: return None - - coronaX = chipX - coronaAb.getXMin() - coronaY = chipY - coronaAb.getYMin() - - trace( 550, '\t| chipNet: %s %s\n' % (chipNet, layer) ) - trace( 550, '\t| Real\n' ) - trace( 550, '\t| center: %12s %12s\n' % (DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) - trace( 550, '\t| WxH: %12s %12s\n' % (DbU.getValueString(width ), DbU.getValueString(height )) ) - - topLayer = layer.getTop() - if self.gaugeConf.isHorizontal(topLayer): - coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, layer.getBottom() ) - coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, topLayer ) - else: - coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, topLayer ) - coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, layer.getBottom() ) - - if not (flags & OnHorizontalPitch): - trace( 550, '\tNot on horizontal routing pitch, Y on lambda only.\n' ) - coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) - if not (flags & OnVerticalPitch ): - trace( 550, '\tNot on vertical routing pitch, X on lambda only.\n' ) - coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) - - trace( 550, '\t| On Grid\n' ) - trace( 550, '\t| X axis: %12s or %12s\n' % (DbU.toLambda(coronaX) , DbU.getValueString(coronaX)) ) - trace( 550, '\t| Y axis: %12s or %12s\n' % (DbU.toLambda(coronaY) , DbU.getValueString(coronaY)) ) - trace( 550, '\t| center: %12s %12s\n' % (DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) - trace( 550, '\t| WxH: %12s %12s\n' % (DbU.getValueString(width ), DbU.getValueString(height )) ) - - c = Contact.create( coronaNet - , layer - , coronaX - , coronaY - , width - , height - ) - - trace( 550, '\t| %s\n' % str(c) ) - trace( 550, '-' ) - return c + trace( 550, ',+', '\tChipConf.coronaContact\n' ) + coronaAb = self.getInstanceAb( self.icorona ) + coronaNet = self.getCoronaNet( chipNet ) + if not coronaNet: return None + coronaX = chipX - coronaAb.getXMin() + coronaY = chipY - coronaAb.getYMin() + trace( 550, '\t| chipNet: {} {}\n'.format(chipNet,layer) ) + trace( 550, '\t| Real\n' ) + trace( 550, '\t| center: {:>12} {:>12}\n'.format(DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) + trace( 550, '\t| WxH: {:>12} {:>12}\n'.format(DbU.getValueString(width ), DbU.getValueString(height )) ) + topLayer = layer.getTop() + botLayer = layer.getBottom() + if self.isHorizontal(topLayer): + coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, botLayer ) + coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, topLayer ) + else: + coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, topLayer ) + coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, botLayer ) + if not (flags & OnHorizontalPitch): + trace( 550, '\tNot on horizontal routing pitch, Y on lambda only.\n' ) + coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) + if not (flags & OnVerticalPitch ): + trace( 550, '\tNot on vertical routing pitch, X on lambda only.\n' ) + coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) + trace( 550, '\t| On Grid\n' ) + trace( 550, '\t| X axis: {:>12.1f}L or {:>12}\n'.format(DbU.toLambda(coronaX) , DbU.getValueString(coronaX)) ) + trace( 550, '\t| Y axis: {:>12.1f}L or {:>12}\n'.format(DbU.toLambda(coronaY) , DbU.getValueString(coronaY)) ) + trace( 550, '\t| center: {:>12} {:>12}\n' .format(DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) + trace( 550, '\t| WxH: {:>12} {:>12}\n' .format(DbU.getValueString(width ), DbU.getValueString(height )) ) + c = Contact.create( coronaNet + , layer + , coronaX + , coronaY + , width + , height + ) + trace( 550, '\t| {}\n'.format(c) ) + trace( 550, '-' ) + return c + def getViaPitch ( self, viaLayer ): + topLayer = viaLayer.getTop() + if topLayer.isSymbolic(): + topLayer = topLayer.getBasicLayer() + topEnclosure = viaLayer.getEnclosure( topLayer, Layer.EnclosureH|Layer.EnclosureV ) + topPitch = 2*topEnclosure + viaLayer.getMinimalSize() + topLayer.getMinimalSpacing() + botLayer = viaLayer.getBottom() + if botLayer.isSymbolic(): + botLayer = botLayer.getBasicLayer() + botEnclosure = viaLayer.getEnclosure( botLayer, Layer.EnclosureH|Layer.EnclosureV ) + botPitch = 2*botEnclosure + viaLayer.getMinimalSize() + botLayer.getMinimalSpacing() + viaPitch = max( topPitch, botPitch ) + trace( 550, '\tgetViaPitch of {}: {}\n'.format(viaLayer.getName(),DbU.getValueString(viaPitch)) ) + trace( 550, '\t| minimal size of {}: {}\n'.format(viaLayer.getName(),DbU.getValueString(viaLayer.getMinimalSize())) ) + trace( 550, '\t| enclosure of {}: {}\n'.format(topLayer.getName(),DbU.getValueString(topEnclosure)) ) + trace( 550, '\t| enclosure of {}: {}\n'.format(botLayer.getName(),DbU.getValueString(botEnclosure)) ) + return viaPitch def coronaContactArray ( self, chipNet, layer, chipX, chipY, array, flags ): - trace( 550, ',+', '\tChipConf.coronaContactArray\n' ) - - viaPitch = layer.getMinimalSize() + layer.getMinimalSpacing() - coronaAb = self.getInstanceAb( self.icorona ) - coronaNet = self.getCoronaNet( chipNet ) - if not coronaNet: return None - - trace( 550, '\t| chipNet: %s %s\n' % (chipNet, layer) ) - - coronaX = chipX - coronaAb.getXMin() - coronaY = chipY - coronaAb.getYMin() - - topLayer = layer.getTop() - if self.gaugeConf.isHorizontal(topLayer): - coronaX, width = self.toRoutingGauge( coronaX, coronaX, layer.getBottom() ) - coronaY, height = self.toRoutingGauge( coronaY, coronaY, topLayer ) - else: - coronaX, width = self.toRoutingGauge( coronaX, coronaX, topLayer ) - coronaY, height = self.toRoutingGauge( coronaY, coronaY, layer.getBottom() ) - - if not (flags & OnHorizontalPitch): - trace( 550, '\tNot on horizontal routing pitch, Y on lambda only.\n' ) - coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) - if not (flags & OnVerticalPitch ): - trace( 550, '\tNot on vertical routing pitch, X on lambda only.\n' ) - coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) - - contacts = [] - xContact = coronaX - viaPitch * (array[0]-1)//2 - yContact = coronaY - viaPitch * (array[1]-1)//2 - contactSize = layer.getMinimalSize() - - trace( 550, '\txContact:%sl yContact:%sl\n' % (DbU.toLambda(xContact),DbU.toLambda(yContact)) ) - - for i in range(array[0]): - for j in range(array[1]): - c = Contact.create( coronaNet - , layer - , xContact + i*viaPitch - , yContact + j*viaPitch - , contactSize - , contactSize - ) - trace( 550, '\t+ %s\n' % str(c) ) - contacts.append( c ) - - trace( 550, '-' ) - return contacts - + trace( 550, ',+', '\tChipConf.coronaContactArray\n' ) + viaPitch = self.getViaPitch( layer ) + coronaAb = self.getInstanceAb( self.icorona ) + coronaNet = self.getCoronaNet( chipNet ) + if not coronaNet: return None + trace( 550, '\t| chipNet: {} {}\n'.format(chipNet, layer) ) + coronaX = chipX - coronaAb.getXMin() + coronaY = chipY - coronaAb.getYMin() + topLayer = layer.getTop() + if self.isHorizontal(topLayer): + coronaX, width = self.toRoutingGauge( coronaX, coronaX, layer.getBottom() ) + coronaY, height = self.toRoutingGauge( coronaY, coronaY, topLayer ) + else: + coronaX, width = self.toRoutingGauge( coronaX, coronaX, topLayer ) + coronaY, height = self.toRoutingGauge( coronaY, coronaY, layer.getBottom() ) + if not (flags & OnHorizontalPitch): + trace( 550, '\tNot on horizontal routing pitch, Y on lambda only.\n' ) + coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) + if not (flags & OnVerticalPitch ): + trace( 550, '\tNot on vertical routing pitch, X on lambda only.\n' ) + coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) + contacts = [] + xContact = coronaX - viaPitch * (array[0]-1)//2 + yContact = coronaY - viaPitch * (array[1]-1)//2 + contactSize = layer.getMinimalSize() + trace( 550, '\txContact:{} yContact:{}\n'.format(DbU.getValueString(xContact),DbU.getValueString(yContact)) ) + for i in range(array[0]): + for j in range(array[1]): + c = Contact.create( coronaNet + , layer + , xContact + i*viaPitch + , yContact + j*viaPitch + , contactSize + , contactSize + ) + trace( 550, '\t+ {}\n'.format(c) ) + contacts.append( c ) + trace( 550, '-' ) + return contacts def coronaPin ( self, chipNet, count, direction, layer, chipX, chipY, width, height ): - trace( 550, ',+', '\tChipConf.coronaPin\n' ) - - coronaAb = self.getInstanceAb( self.icorona ) - coronaNet = self.getCoronaNet( chipNet ) - if not coronaNet: return None - - coronaX = chipX - coronaAb.getXMin() - coronaY = chipY - coronaAb.getYMin() - - trace( 550, '\t| chipNet: %s (%d) %s\n' % (chipNet, count, layer) ) - trace( 550, '\t| Real\n' ) - trace( 550, '\t| center: %s %s\n' % (DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) - trace( 550, '\t| WxH: %s %s\n' % (DbU.getValueString(width ), DbU.getValueString(height )) ) - - topLayer = layer.getTop() - if self.gaugeConf.isHorizontal(topLayer): - coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, layer.getBottom() ) - coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, topLayer ) - else: - coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, topLayer ) - coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, layer.getBottom() ) - - if direction == Pin.Direction.NORTH or direction == Pin.Direction.SOUTH: - trace( 550, '\tEast/West not on horizontal routing pitch, Y on lambda only.\n' ) - coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) - if direction == Pin.Direction.EAST or direction == Pin.Direction.WEST: - trace( 550, '\tNorth/South not on vertical routing pitch, X on lambda only.\n' ) - coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) - - trace( 550, '\t| On Grid\n' ) - trace( 550, '\t| X axis: %s or %s\n' % (DbU.toLambda(coronaY) , DbU.getValueString(coronaY)) ) - trace( 550, '\t| Y axis: %s or %s\n' % (DbU.toLambda(coronaX) , DbU.getValueString(coronaX)) ) - trace( 550, '\t| center: %s %s\n' % (DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) - trace( 550, '\t| WxH: %s %s\n' % (DbU.getValueString(width ), DbU.getValueString(height )) ) - - c = Pin.create( coronaNet - , '%s.%d' % (coronaNet.getName(),count) - , direction - , Pin.PlacementStatus.FIXED - , layer - , coronaX - , coronaY - , width - , height - ) - - trace( 550, '\t| %s\n' % str(c) ) - trace( 550, '-' ) - return c - + trace( 550, ',+', '\tChipConf.coronaPin\n' ) + coronaAb = self.getInstanceAb( self.icorona ) + coronaNet = self.getCoronaNet( chipNet ) + if not coronaNet: return None + coronaX = chipX - coronaAb.getXMin() + coronaY = chipY - coronaAb.getYMin() + trace( 550, '\t| chipNet: {} ({}) {}\n'.format(chipNet, count, layer) ) + trace( 550, '\t| Real\n' ) + trace( 550, '\t| center: {} {}\n'.format(DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) + trace( 550, '\t| WxH: {} {}\n'.format(DbU.getValueString(width ), DbU.getValueString(height )) ) + topLayer = layer.getTop() + if self.isHorizontal(topLayer): + coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, layer.getBottom() ) + coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, topLayer ) + else: + coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, topLayer ) + coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, layer.getBottom() ) + if direction == Pin.Direction.NORTH or direction == Pin.Direction.SOUTH: + trace( 550, '\tEast/West not on horizontal routing pitch, Y on lambda only.\n' ) + coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) + if direction == Pin.Direction.EAST or direction == Pin.Direction.WEST: + trace( 550, '\tNorth/South not on vertical routing pitch, X on lambda only.\n' ) + coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) + trace( 550, '\t| On Grid\n' ) + trace( 550, '\t| X axis: {:.1f}L or {}\n'.format(DbU.toLambda(coronaY) , DbU.getValueString(coronaY)) ) + trace( 550, '\t| Y axis: {:.1f}L or {}\n'.format(DbU.toLambda(coronaX) , DbU.getValueString(coronaX)) ) + trace( 550, '\t| center: {} {}\n' .format(DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) + trace( 550, '\t| WxH: {} {}\n' .format(DbU.getValueString(width ), DbU.getValueString(height )) ) + c = Pin.create( coronaNet + , '{}.{}'.format(coronaNet.getName(),count) + , direction + , Pin.PlacementStatus.FIXED + , layer + , coronaX + , coronaY + , width + , height + ) + trace( 550, '\t| {}\n'.format(c) ) + trace( 550, '-' ) + return c def checkPads ( self ): - def contains ( padList, side, padInstance ): - for i in range(len(padList)): - if padList[i][1] == padInstance.getName(): - if (padInstance.getMasterCell().getAbutmentBox().getHeight() != self.gaugeConf.getIoPadHeight()): - raise ErrorMessage( 1, 'The pad [%d] %s (%s) on %s side is not an instance of a pad cell.' - % (i,padInstance.getName(),padInstance.getMasterCell().getName(),side) ) - padList[i][1] = padInstance - return True - return False - - def checkNotFounds ( padList, side ): - for i in range(len(padList)): - if not isinstance(padList[i][1],Instance): - print( ErrorMessage( 1, 'The pad [{}] ({}) of list %s do not exists in netlist (skipped).' \ - .format(i,padList[i][1],side) )) - return - - - af = CRL.AllianceFramework.get() - cellPads = [] - for instance in self.cell.getInstances(): - if contains(self.southPads,'south',instance): continue - if contains(self.northPads,'north',instance): continue - if contains(self.eastPads ,'east' ,instance): continue - if contains(self.westPads ,'west' ,instance): continue - if (instance.getMasterCell().getAbutmentBox().getHeight() == self.gaugeConf.getIoPadHeight()): - raise ErrorMessage( 1, 'Pad "%s" is not on any side (N/S/E/W).' % instance.getName() ) - self.validated = False - else: - self.coronas.append( instance ) - - checkNotFounds( self.southPads, 'south' ) - checkNotFounds( self.northPads, 'north' ) - checkNotFounds( self.eastPads , 'east' ) - checkNotFounds( self.westPads , 'west' ) - - if len(self.coronas) > 1: - message = [ 'Chip "%s" have more than one corona:' % self.cell.getName() ] - for i in range(len(self.coronas)): - message.append( '%4d: %s' % (i,self.coronas[i].getName()) ) - raise ErrorMessage( 1, message ) - self.validated = False - - if len(self.coronas) < 1: - raise ErrorMessage( 1, 'Chip "%s" doesn\'t seems to have a corona.' % self.cell.getName() ) - self.validated = False - else: - for instance in self.corona.getInstances(): - self.cores.append( instance ) - - if len(self.cores) > 1: - message = [ 'Chip "%s" have more than one core:' % self.cell.getName() ] - for i in range(len(self.cores)): - message.append( '%4d: %s' % (i,self.cores[i].getName()) ) - raise ErrorMessage( 1, message ) - self.validated = False - - if len(self.cores) < 1: - raise ErrorMessage( 1, 'Chip "%s" doesn\'t seems to have a core.' % self.cell.getName() ) + def contains ( padList, side, padInstance ): + for i in range(len(padList)): + if padList[i][1] == padInstance.getName(): + if (padInstance.getMasterCell().getAbutmentBox().getHeight() != self.ioPadHeight): + raise ErrorMessage( 1, 'The pad [{}] {} ({}) on {} side is not an instance of a pad cell.' \ + .format(i,padInstance.getName(),padInstance.getMasterCell().getName(),side) ) + padList[i][1] = padInstance + return True + return False + + def checkNotFounds ( padList, side ): + for i in range(len(padList)): + if not isinstance(padList[i][1],Instance): + print( ErrorMessage( 1, 'The pad [{}] ({}) of list {} do not exists in netlist (skipped).' + .format(i,padList[i][1],side) )) + return + + global af + cellPads = [] + for instance in self.chip.getInstances(): + if contains(self.southPads,'south',instance): continue + if contains(self.northPads,'north',instance): continue + if contains(self.eastPads ,'east' ,instance): continue + if contains(self.westPads ,'west' ,instance): continue + if (instance.getMasterCell().getAbutmentBox().getHeight() == self.ioPadHeight): + raise ErrorMessage( 1, 'Pad "{}" is not on any side (N/S/E/W).'.format(instance.getName()) ) + self.validated = False + else: + self.coronas.append( instance ) + checkNotFounds( self.southPads, 'south' ) + checkNotFounds( self.northPads, 'north' ) + checkNotFounds( self.eastPads , 'east' ) + checkNotFounds( self.westPads , 'west' ) + if len(self.coronas) > 1: + message = [ 'Chip "{}" have more than one corona:'.format(self.chip.getName()) ] + for i in range(len(self.coronas)): + message.append( '{}: {}'.format(i,self.coronas[i].getName()) ) + raise ErrorMessage( 1, message ) self.validated = False - - return - + if len(self.coronas) < 1: + raise ErrorMessage( 1, 'Chip "{}" doesn\'t seems to have a corona.' \ + .format(self.chip.getName()) ) + self.validated = False + else: + for instance in self.corona.getInstances(): + self.cores.append( instance ) + if len(self.cores) > 1: + message = [ 'Chip "{}" have more than one core:'.format(self.chip.getName()) ] + for i in range(len(self.cores)): + message.append( '{}: {}'.format(i,self.cores[i].getName()) ) + raise ErrorMessage( 1, message ) + self.validated = False + + if len(self.cores) < 1: + raise ErrorMessage( 1, 'Chip "{} doesn\'t seems to have a core.' \ + .format(self.chip.getName()) ) + self.validated = False + return def findPowerAndClockNets ( self ): - if self.icore: - for plug in self.icore.getPlugs(): - masterNet = plug.getMasterNet() - netType = masterNet.getType() - if netType != Net.Type.POWER \ - and netType != Net.Type.GROUND \ - and netType != Net.Type.CLOCK: - continue - - net = plug.getNet() - if not net: - net = self.corona.getNet( masterNet.getName() ) - if not net: - raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Missing global net "%s" at corona level.' - % masterNet.getName() ) - self._validated = False - continue - - if netType == Net.Type.GROUND: - if self.coronaVss and self.coronaVss != net: - raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Multiple ground nets "%s" and "%s" at corona level.' - % (self.coronaVss.getName(), net.getName()) ) - self._validated = False - continue - else: - self.coronaVss = net - - if netType == Net.Type.POWER: - if self.coronaVdd and self.coronaVdd != net: - raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Multiple power nets "%s" and "%s" at corona level.' - % (self.coronaVdd.getName(), net.getName()) ) - self._validated = False - continue - else: - self.coronaVdd = net - - if netType == Net.Type.CLOCK: - if self.coronaCk and self.coronaCk != net: - raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Multiple clock nets "%s" and "%s" at corona level.' - % (self.coronaCk.getName(), net.getName()) ) - self._validated = False - continue - else: - self.coronaCk = net - - for net in self.corona.getNets(): - if net.getType() == Net.Type.BLOCKAGE: - self.blockageNet = net - self.blockageName = net.getName() - - if not self.blockageNet: - self.blockageNet = Net.create( self.corona, self.blockageName ) - self.blockageNet.setType( Net.Type.BLOCKAGE ) - - return + if self.icore: + for plug in self.icore.getPlugs(): + masterNet = plug.getMasterNet() + netType = masterNet.getType() + if netType != Net.Type.POWER \ + and netType != Net.Type.GROUND \ + and netType != Net.Type.CLOCK: + continue + net = plug.getNet() + if not net: + net = self.corona.getNet( masterNet.getName() ) + if not net: + raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Missing global net "{}" at corona level.' \ + .format(masterNet.getName()) ) + self._validated = False + continue + if netType == Net.Type.GROUND: + if self.coronaVss and self.coronaVss != net: + raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Multiple ground nets "{}" and "{}" at corona level.' \ + .format(self.coronaVss.getName(), net.getName()) ) + self._validated = False + continue + else: + self.coronaVss = net + + if netType == Net.Type.POWER: + if self.coronaVdd and self.coronaVdd != net: + raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Multiple power nets "{}" and "{}" at corona level.' \ + .format(self.coronaVdd.getName(), net.getName()) ) + self._validated = False + continue + else: + self.coronaVdd = net + + if netType == Net.Type.CLOCK: + if not net in self.coronaCks: + self.coronaCks.append( net ) + vprint( 2, ' - Using clock "{}".'.format(net.getName()) ) + for net in self.corona.getNets(): + if net.getType() == Net.Type.BLOCKAGE: + self.blockageNet = net + self.blockageName = net.getName() + if not self.blockageNet: + self.blockageNet = Net.create( self.corona, self.blockageName ) + self.blockageNet.setType( Net.Type.BLOCKAGE ) + return def checkChipSize ( self ): - #if self._coreSize.isEmpty(): return - # - #minWidth = self._coreSize.getWidth () + self._minCorona + 2*self._padHeight - #minHeight = self._coreSize.getHeight() + self._minCorona + 2*self._padHeight - # - #if self._chipSize.getWidth() < minWidth: - # raise ErrorMessage( 1, 'Core is too wide to fit into the chip. Needs: %d, but has %d' \ - # % ( DbU.toLambda(minWidth), DbU.toLambda(self._chipSize.getWidth()) ) ) - # self._validated = False - # - #if self._chipSize.getHeight() < minHeight: - # raise ErrorMessage( 1, 'Core is too wide to fit into the chip. Needs: %d, but has %d' \ - # % ( DbU.toLambda(minHeight), DbU.toLambda(self._chipSize.getHeight()) ) ) - # self._validated = False - return + if self.chipSize[0] % self.sliceStep: + print( WarningMessage( 'ChipConf.checkChipSize(): Width of "{}" ({})is not on sliceStep ({}), ajusted.' \ + .format( self.chipConf.name + , DbU.getValueString(self.chipSize[0]) + , DbU.getValueString(self.sliceStep))) ) + adjust = self.sliceStep - self.chipSize[0] % self.sliceStep + self.chipSize = (self.chipSize[0] + adjust, self.chipSize[1]) + if self.chipSize[1] % self.sliceStep: + print( WarningMessage( 'ChipConf.checkChipSize(): Height of "{}" ({})is not on sliceStep ({}), ajusted.' \ + .format( self.chipConf.name + , DbU.getValueString(self.chipSize[1]) + , DbU.getValueString(self.sliceStep))) ) + adjust = self.sliceStep - self.chipSize[1] % self.sliceStep + self.chipSize = (self.chipSize[0], self.chipSize[1] + adjust) + + #if self._coreSize.isEmpty(): return + # + #minWidth = self._coreSize.getWidth () + self._minCorona + 2*self._padHeight + #minHeight = self._coreSize.getHeight() + self._minCorona + 2*self._padHeight + # + #if self._chipSize.getWidth() < minWidth: + # raise ErrorMessage( 1, 'Core is too wide to fit into the chip. Needs: %d, but has %d' \ + # % ( DbU.toLambda(minWidth), DbU.toLambda(self._chipSize.getWidth()) ) ) + # self._validated = False + # + #if self._chipSize.getHeight() < minHeight: + # raise ErrorMessage( 1, 'Core is too wide to fit into the chip. Needs: %d, but has %d' \ + # % ( DbU.toLambda(minHeight), DbU.toLambda(self._chipSize.getHeight()) ) ) + # self._validated = False + return def checkCorona ( self ): - trace( 550, ',+', 'Configuration.checkCorona()\n' ) - netPads = {} - for plug in self.icorona.getPlugs(): - padNet = plug.getNet() - coronaNet = plug.getMasterNet() - if not padNet and coronaNet.isGlobal(): - padNet = self.cell.getNet( coronaNet.getName() ) - - if padNet: - if not padNet in netPads: - trace( 550, '\t%20s <-> %-20s\n' % (padNet.getName(),coronaNet.getName()) ) - netPads[ padNet ] = coronaNet - else: - raise ErrorMessage( 1, 'ChipConf.checkCorona(): Corona nets "%s" and "%s" connected to the same pad net "%s".' \ - % (coronaNet.getName(),netPads[padNet].getName(),padNet.getName()) ) - self._validated = False - - trace( 550, '-' ) - return - + trace( 550, ',+', 'Configuration.checkCorona()\n' ) + netPads = {} + for plug in self.icorona.getPlugs(): + padNet = plug.getNet() + coronaNet = plug.getMasterNet() + if not padNet and coronaNet.isGlobal(): + padNet = self.chip.getNet( coronaNet.getName() ) + if padNet: + if not padNet in netPads: + trace( 550, '\t{:>20} <-> {:<20}\n'.format(padNet.getName(),coronaNet.getName()) ) + netPads[ padNet ] = coronaNet + else: + raise ErrorMessage( 1, 'ChipConf.checkCorona(): Corona nets "{}" and "{}" connected to the same pad net "{}".' \ + .format(coronaNet.getName(),netPads[padNet].getName(),padNet.getName()) ) + self._validated = False + trace( 550, '-' ) + return def computeChipSize ( self ): - def getSideLength ( pads ): - sideLength = self.gaugeConf.getIoPadHeight() * 2 - for pad in pads: sideLength += pad.getMasterCell().getAbutmentBox().getWidth() - return sideLength - - - if not self.chipSize.isEmpty(): return - - southPadsLength = getSideLength( self.southPads ) - northPadsLength = getSideLength( self.northPads ) - eastPadsLength = getSideLength( self.eastPads ) - westPadsLength = getSideLength( self.westPads ) - - horizontalPads = max( len(self.southPads), len(self.northPads) ) - verticalPads = max( len(self.eastPads ), len(self.westPads ) ) - self.chipSize = Box( 0 - , 0 - , max( southPadsLength, northPadsLength ) - , max( westPadsLength, eastPadsLength ) - ) - return - + def getSideLength ( pads ): + sideLength = self.ioPadHeight * 2 + for pad in pads: sideLength += pad.getMasterCell().getAbutmentBox().getWidth() + return sideLength + + if not self.chipSize.isEmpty(): return + southPadsLength = getSideLength( self.southPads ) + northPadsLength = getSideLength( self.northPads ) + eastPadsLength = getSideLength( self.eastPads ) + westPadsLength = getSideLength( self.westPads ) + horizontalPads = max( len(self.southPads), len(self.northPads) ) + verticalPads = max( len(self.eastPads ), len(self.westPads ) ) + self.chipSize = ( max( southPadsLength, northPadsLength ) + , max( westPadsLength, eastPadsLength ) ) def setupCorona ( self, gapX1, gapY1, gapX2, gapY2 ): - ab = self.cell.getAbutmentBox() - ab.inflate ( -gapX1, -gapY1, -gapX2, -gapY2 ) - ab.inflate ( - self.getIoPadHeight() ) - ab.translate( - self.getIoPadHeight(), - self.getIoPadHeight()) - ab = self.toSymbolic( ab, Inwards ) - - self. corona.setAbutmentBox( Box( 0, 0, ab.getWidth(), ab.getHeight() ) ) - self.icorona.setTransformation( - Transformation( self.toSymbolic( self.getIoPadHeight() + ab.getXMin(), Superior ) - , self.toSymbolic( self.getIoPadHeight() + ab.getYMin(), Superior ) - , Transformation.Orientation.ID ) ) - self.icorona.setPlacementStatus( Instance.PlacementStatus.FIXED ) - return - + ab = self.chip.getAbutmentBox() + ab.inflate ( -gapX1, -gapY1, -gapX2, -gapY2 ) + ab.inflate ( - self.ioPadHeight ) + ab.translate( - self.ioPadHeight, - self.ioPadHeight) + ab = self.toSymbolic( ab, Inwards ) + + self. corona.setAbutmentBox( Box( 0, 0, ab.getWidth(), ab.getHeight() ) ) + self.icorona.setTransformation( + Transformation( self.toSymbolic( self.ioPadHeight + ab.getXMin(), Superior ) + , self.toSymbolic( self.ioPadHeight + ab.getYMin(), Superior ) + , Transformation.Orientation.ID ) ) + self.icorona.setPlacementStatus( Instance.PlacementStatus.FIXED ) + self.setRoutingBb( self.corona.getAbutmentBox() ) def setupCore ( self, gapX1, gapY1, gapX2, gapY2 ): - ab = self.getInstanceAb( self.icorona ) - if ab.isEmpty(): - raise ErrorMessage( 1, 'ChipConf.setupCore(): Attempt to setup core *before* corona.' ) - return - - ab.inflate( -gapX1, -gapY1, -gapX2, -gapY2 ) - ab = self.toSymbolic( ab, Inwards ) - - trace( 550, '\tChipConf.setupCore(): Abutment box:%s\n' % str(ab) ) - - self.core.setAbutmentBox( Box( 0, 0, ab.getWidth(), ab.getHeight() ) ) - self.icore.setTransformation( - Transformation( ChipConf.toSymbolic(ab.getXMin(),Inferior) - self.icorona.getTransformation().getTx() - , ChipConf.toSymbolic(ab.getYMin(),Inferior) - self.icorona.getTransformation().getTy() - , Transformation.Orientation.ID ) ) - self.icore.setPlacementStatus( Instance.PlacementStatus.FIXED ) - return - - - @property - def cellGauge ( self ): return self.gaugeConf.cellGauge - - @property - def routingGauge ( self ): return self.gaugeConf.routingGauge - - @property - def verticalDepth ( self ): return self.gaugeConf.verticalDepth - - @property - def horizontalDepth ( self ): return self.gaugeConf.horizontalDepth - - def getSliceHeight ( self ): return self.gaugeConf.getSliceHeight() - def getSliceStep ( self ): return self.gaugeConf.getSliceStep() - def getIoPadHeight ( self ): return self.gaugeConf.getIoPadHeight() - def getIoPadStep ( self ): return self.gaugeConf.getIoPadStep() - def getIoPadPitch ( self ): return self.gaugeConf.getIoPadPitch() - def getIoPadGauge ( self ): return self.gaugeConf.getIoPadGauge() - def getHRoutingGauge ( self ): return self.gaugeConf.getHRoutingGauge() - def getVRoutingGauge ( self ): return self.gaugeConf.getVRoutingGauge() - - def rpByOccurrence ( self, occurrence, net ): - return self.gaugeConf._rpByOccurrence ( occurrence, net ) - - def rpByPlugName ( self, instance, plugName, net ): - return self.gaugeConf._rpByPlugName ( instance, plugName, net ) - - def rpAccess ( self, rp, flags=0 ): - return self.gaugeConf._rpAccess( rp, flags ) - - def rpAccessByOccurrence ( self, occurrence, net, flags=0 ): - return self.gaugeConf._rpAccessByOccurrence ( occurrence, net, flags ) - - def rpAccessByPlugName ( self, instance, plugName, net, flags=0 ): - return self.gaugeConf._rpAccessByPlugName( instance, plugName, net, flags ) - - def createContact ( self, net, x, y, flags=0 ): - return self.gaugeConf._createContact( net, x, y, flags ) - - def createHorizontal ( self, source, target, y, flags=0 ): - return self.gaugeConf._createHorizontal( source, target, y, flags ) - - def createVertical ( self, source, target, x, flags=0 ): - return self.gaugeConf._createVertical( source, target, x, flags ) - - def getNearestHorizontalTrack ( self, bb, y, flags ): - return self.gaugeConf._getNearestHorizontalTrack ( bb, y, flags ) - - def getNearestVerticalTrack ( self, bb, x, flags ): - return self.gaugeConf._getNearestVerticalTrack( bb, x, flags ) - - def setStackPosition ( self, topContact, x, y ): - self.gaugeConf._setStackPosition( topContact, x, y ) - - -def loadConfiguration ( cell, viewer=None ): - sys.path.append( os.getcwd() ) - - try: - confFile = 'coriolis2/ioring.py' - if not os.path.isfile(confFile): - raise ErrorMessage( 1, 'ChipPlugin, configuration file "%s" is missing.' % confFile ) - else: - if not os.path.isfile('coriolis2/__init__.py'): - raise ErrorMessage( 1, 'ChipPlugin, configuration directory "./coriolis2/" is missing "__init__.py".' ) - - from coriolis2.ioring import chip - except Exception as e: - catch( e ) - - return ChipConf( chip, cell, viewer ) + trace( 550, ',+', '\tChipConf.setupCore()\n' ) + ab = self.getInstanceAb( self.icorona ) + if ab.isEmpty(): + raise ErrorMessage( 1, 'ChipConf.setupCore(): Attempt to setup core *before* corona.' ) + return + ab.inflate( -gapX1, -gapY1, -gapX2, -gapY2 ) + ab = self.toSymbolic( ab, Inwards ) + tracee( 550, '\tself.coreAb:{}\n'.format(self.coreAb) ) + if not self.coreAb.isEmpty(): + trace( 550, '\tUsing user-defined CORE size:{}\n'.format(self.coreSize) ) + ab = self.coreAb + trace( 550, '\tSetting CORE abutment box:{}\n'.format(ab) ) + self.core.setAbutmentBox( Box( 0, 0, ab.getWidth(), ab.getHeight() ) ) + self.icore.setTransformation( + Transformation( ChipConf.toSymbolic(ab.getXMin(),Inferior) - self.icorona.getTransformation().getTx() + , ChipConf.toSymbolic(ab.getYMin(),Inferior) - self.icorona.getTransformation().getTy() + , Transformation.Orientation.ID ) ) + self.icore.setPlacementStatus( Instance.PlacementStatus.FIXED ) + trace( 550, '-' ) diff --git a/cumulus/src/plugins/chip/constants.py b/cumulus/src/plugins/chip/constants.py new file mode 100644 index 00000000..2fc8abc7 --- /dev/null +++ b/cumulus/src/plugins/chip/constants.py @@ -0,0 +1,45 @@ + +# This file is part of the Coriolis Software. +# Copyright (c) Sorbonne Université 2023-2023, All Rights Reserved +# +# +-----------------------------------------------------------------+ +# | C O R I O L I S | +# | C u m u l u s - P y t h o n T o o l s | +# | | +# | Author : Jean-Paul CHAPUT | +# | E-mail : Jean-Paul.Chaput@lip6.fr | +# | =============================================================== | +# | Python : "./plugins/chip/constants.py" | +# +-----------------------------------------------------------------+ + + +North = 0x0001 +South = 0x0002 +East = 0x0004 +West = 0x0008 +SouthWest = South|West +SouthEast = South|East +NorthWest = North|West +NorthEast = North|East +HORIZONTAL = North|South +VERTICAL = East |West + +Superior = 0x0010 +Inferior = 0x0020 +Inwards = 0x0040 +OnHorizontalPitch = 0x0080 +OnVerticalPitch = 0x0100 + + +def importConstants ( symbols ): + """ + Import chip module symbol constants in another module dictionnary + (i.e. globals()). + """ + if not isinstance(symbols,dict): + print( WarningMessage( 'plugins.chip.__init__.importConstants(), argument is not a symbol table.' )) + return + for symbol in globals().items(): + if isinstance(symbol[1],int): + if not symbol[0] in symbols: + symbols[ symbol[0] ] = symbol[1] diff --git a/cumulus/src/plugins/alpha/chip/corona.py b/cumulus/src/plugins/chip/corona.py similarity index 97% rename from cumulus/src/plugins/alpha/chip/corona.py rename to cumulus/src/plugins/chip/corona.py index aa61d69f..0acef1da 100644 --- a/cumulus/src/plugins/alpha/chip/corona.py +++ b/cumulus/src/plugins/chip/corona.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2014-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -15,22 +15,20 @@ import sys import bisect -from operator import methodcaller, xor -import Cfg -from Hurricane import DbU, Point, Interval, Box, Transformation, \ - Path, Occurrence, Net, Contact, Horizontal, \ - Vertical, Pad -import CRL -from CRL import RoutingLayerGauge -from helpers import trace -from helpers.io import ErrorMessage, WarningMessage -from helpers.overlay import UpdateSession -import plugins -import plugins.alpha.chip -from plugins.alpha.block.bigvia import BigVia +from operator import methodcaller, xor +from ... import Cfg +from ...Hurricane import DbU, Point, Interval, Box, Transformation, \ + Path, Occurrence, Net, Contact, Horizontal, \ + Vertical, Pad +from ...CRL import RoutingLayerGauge +from ...helpers import trace +from ...helpers.io import ErrorMessage, WarningMessage +from ...helpers.overlay import UpdateSession +from ..block.bigvia import BigVia +from .constants import importConstants -plugins.alpha.chip.importConstants( globals() ) +importConstants( globals() ) # -------------------------------------------------------------------- diff --git a/cumulus/src/plugins/alpha/chip/pads.py b/cumulus/src/plugins/chip/pads.py similarity index 97% rename from cumulus/src/plugins/alpha/chip/pads.py rename to cumulus/src/plugins/chip/pads.py index 5334ea52..5bc05f54 100644 --- a/cumulus/src/plugins/alpha/chip/pads.py +++ b/cumulus/src/plugins/chip/pads.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2014-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -16,28 +16,27 @@ import sys import re import copy -from operator import itemgetter -from Hurricane import DbU, Point, Transformation, Interval, Box, \ - Path, Occurrence, UpdateSession, Layer, \ - BasicLayer, Net, Pin, Contact, Segment, Pad, \ - Horizontal, Vertical, Diagonal, RoutingPad, \ - Instance, DataBase, NetExternalComponents, \ - Library -import CRL -from CRL import RoutingGauge, RoutingLayerGauge -import helpers -from helpers import trace, l, u, n, onFGrid -from helpers.io import ErrorMessage, WarningMessage -from helpers.overlay import UpdateSession -import plugins.alpha.chip -from plugins.alpha.chip import CoreWire -from plugins.alpha.block.block import Block -from plugins.alpha.block.bigvia import BigVia +from operator import itemgetter +from ...Hurricane import DbU, Point, Transformation, Interval, Box, \ + Path, Occurrence, UpdateSession, Layer, \ + BasicLayer, Net, Pin, Contact, Segment, Pad, \ + Horizontal, Vertical, Diagonal, RoutingPad, \ + Instance, DataBase, NetExternalComponents, \ + Library +from ...CRL import AllianceFramework, RoutingGauge, RoutingLayerGauge, \ + Gds +from ...helpers import trace, l, u, n, onFGrid +from ...helpers.io import ErrorMessage, WarningMessage +from ...helpers.overlay import UpdateSession +from . import CoreWire +from ..block.block import Block +from ..block.bigvia import BigVia +from .constants import importConstants -plugins.alpha.chip.importConstants( globals() ) +importConstants( globals() ) -af = CRL.AllianceFramework.get() +af = AllianceFramework.get() # -------------------------------------------------------------------- @@ -1091,7 +1090,7 @@ class Corona ( object ): count = 0 for logo in self.conf.chipLogos: print( ' - GDS Logo "{0}.gds".'.format(logo) ) - CRL.Gds.load( logosLib, './{}.gds'.format(logo) ) + Gds.load( logosLib, './{}.gds'.format(logo) ) logoCell = logosLib.getCell( 'gds_{}'.format(logo) ) logoInstance = Instance.create( self.conf.chip, logo, logoCell ) Block.abPlace( logoInstance diff --git a/cumulus/src/plugins/alpha/chip/power.py b/cumulus/src/plugins/chip/power.py similarity index 94% rename from cumulus/src/plugins/alpha/chip/power.py rename to cumulus/src/plugins/chip/power.py index e32a8563..54a2eef8 100644 --- a/cumulus/src/plugins/alpha/chip/power.py +++ b/cumulus/src/plugins/chip/power.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2014-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -9,25 +9,22 @@ # | Author : Jean-Paul CHAPUT | # | E-mail : Jean-Paul.Chaput@lip6.fr | # | =============================================================== | -# | Python : "./plugins/chip/blockpower.py" | +# | Python : "./plugins/chip/power.py" | # +-----------------------------------------------------------------+ import sys -from Hurricane import DbU, Point, Transformation, Box, Interval, \ - Path, Occurrence, UpdateSession, Net, \ - Contact, Horizontal, Vertical, Query -import CRL -import helpers -from helpers import trace -from helpers.io import ErrorMessage, WarningMessage -from helpers.overlay import UpdateSession -import plugins -import plugins.chip +from ...Hurricane import DbU, Point, Transformation, Box, Interval, \ + Path, Occurrence, UpdateSession, Net, \ + Contact, Horizontal, Vertical, Query +from ...helpers import trace +from ...helpers.io import ErrorMessage, WarningMessage +from ...helpers.overlay import UpdateSession +from .constants import importConstants __all__ = [ 'Builder' ] -plugins.chip.importConstants( globals() ) +importConstants( globals() ) # -------------------------------------------------------------------- diff --git a/cumulus/src/plugins/alpha/chip/powerplane.py b/cumulus/src/plugins/chip/powerplane.py similarity index 96% rename from cumulus/src/plugins/alpha/chip/powerplane.py rename to cumulus/src/plugins/chip/powerplane.py index 5b39a4e4..a57f76bd 100644 --- a/cumulus/src/plugins/alpha/chip/powerplane.py +++ b/cumulus/src/plugins/chip/powerplane.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2021-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2021-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -14,24 +14,21 @@ import sys -from operator import methodcaller -from Hurricane import DbU, Point, Transformation, Box, Interval, \ - Path, Occurrence, UpdateSession, Net, \ - Contact, Horizontal, Vertical, Cell, Query, \ - DataBase, Pin, NetExternalComponents, Layer -import CRL -import helpers -from helpers import trace -from helpers.io import ErrorMessage, WarningMessage -from helpers.overlay import UpdateSession -import plugins -import plugins.chip -from plugins.alpha.block.bigvia import BigVia -from plugins.alpha.block.configuration import GaugeConf +from operator import methodcaller +from ...Hurricane import DbU, Point, Transformation, Box, Interval, \ + Path, Occurrence, UpdateSession, Net, \ + Contact, Horizontal, Vertical, Cell, Query, \ + DataBase, Pin, NetExternalComponents, Layer +from ...helpers import trace +from ...helpers.io import ErrorMessage, WarningMessage +from ...helpers.overlay import UpdateSession +from ..block.bigvia import BigVia +from ..block.configuration import GaugeConf +from .constants import importConstants __all__ = [ 'Builder' ] -plugins.chip.importConstants( globals() ) +importConstants( globals() ) # -------------------------------------------------------------------- diff --git a/cumulus/src/plugins/conductor.py b/cumulus/src/plugins/conductor.py index 7350a751..4267d684 100644 --- a/cumulus/src/plugins/conductor.py +++ b/cumulus/src/plugins/conductor.py @@ -1,6 +1,6 @@ # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -18,23 +18,13 @@ import traceback import os.path import math try: - import Cfg - import Hurricane - from Hurricane import DbU - from Hurricane import Breakpoint - from Hurricane import UpdateSession - import Viewer - import CRL - from CRL import RoutingLayerGauge - import helpers - from helpers import trace - from helpers.io import ErrorMessage, catch - from helpers import l, u, n - import Anabatic - import Etesian - import Katana - import Unicorn - import plugins + from .. import Cfg + from ..Hurricane import DbU, Breakpoint, UpdateSession + from .. import Viewer + from ..CRL import RoutingLayerGauge + from ..helpers import setTraceLevel, trace, l, u, n + from ..helpers.io import ErrorMessage, catch + from .. import Anabatic, Etesian, Katana, Unicorn, plugins except Exception as e: catch( e ) sys.exit(2) @@ -58,7 +48,7 @@ def unicornHook ( **kw ): def scriptMain ( **kw ): try: - #helpers.setTraceLevel( 550 ) + #setTraceLevel( 550 ) errorCode = 0 stopLevel = 1 diff --git a/cumulus/src/plugins/core2chip/cmos.py b/cumulus/src/plugins/core2chip/cmos.py index 847dc379..b0abc00d 100644 --- a/cumulus/src/plugins/core2chip/cmos.py +++ b/cumulus/src/plugins/core2chip/cmos.py @@ -2,7 +2,7 @@ # -*- coding: utf-8 -*- # # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -14,44 +14,45 @@ # | Python : "./plugins/core2chip/cmos.py" | # +-----------------------------------------------------------------+ +""" +Core2Chip configuration for the SxLib/PxLib Alliance historical +standard cell library. +""" + import sys import re -from Hurricane import DbU -from Hurricane import DataBase -from Hurricane import UpdateSession -from Hurricane import Breakpoint -from Hurricane import Transformation -from Hurricane import Instance -from Hurricane import Net -import Viewer -from CRL import Catalog -from CRL import AllianceFramework -from helpers.io import ErrorMessage -from plugins.core2chip.core2chip import IoPad -from plugins.core2chip.core2chip import CoreToChip +from ...Hurricane import DbU, DataBase, UpdateSession, Breakpoint, \ + Transformation, Instance, Net +from ...CRL import Catalog, AllianceFramework +from ...helpers import trace +from ...helpers.io import ErrorMessage +from .core2chip import CoreToChip as BaseCoreToChip +from .core2chip import IoNet, IoPad -class cmos ( CoreToChip ): +class CoreToChip ( BaseCoreToChip ): def __init__ ( self, core ): - CoreToChip.__init__ ( self, core ) - self.ringNetNames = [ 'vsse', 'vssi', 'vdde', 'vddi', ('cki', 'ck') ] - self.ioPadInfos = { IoPad.IN : CoreToChip.IoPadInfo( 'pi_px' , 'pad', ['t',] ) - , IoPad.OUT : CoreToChip.IoPadInfo( 'po_px' , 'pad', ['i',] ) - , IoPad.TRI_OUT : CoreToChip.IoPadInfo( 'pot_px' , 'pad', ['i', 'b' ] ) - , IoPad.BIDIR : CoreToChip.IoPadInfo( 'piot_px', 'pad', ['i', 't', 'b' ] ) + BaseCoreToChip.__init__ ( self, core ) + self.ringNetNames = { 'vsse' : None + , 'vssi' : None + , 'vdde' : None + , 'vddi' : None + , 'ck' : None # Go through the pads from pck_px. } + self.ioPadInfos = [ BaseCoreToChip.IoPadInfo( IoPad.IN , 'pi_px' , 'pad', ['t',] ) + , BaseCoreToChip.IoPadInfo( IoPad.OUT , 'po_px' , 'pad', ['i',] ) + , BaseCoreToChip.IoPadInfo( IoPad.TRI_OUT, 'pot_px' , 'pad', ['i', 'b'] ) + , BaseCoreToChip.IoPadInfo( IoPad.BIDIR , 'piot_px', 'pad', ['i', 't', 'b'] ) + ] self._getPadLib() return def _getPadLib ( self ): self.padLib = AllianceFramework.get().getLibrary( "pxlib" ) - if not self.padLib: - message = [ 'CoreToChip.cmos._getPadLib(): Unable to find Alliance "pxlib" library' ] - raise ErrorMessage( 1, message ) - - return + message = [ 'CoreToChip.cmos._getPadLib(): Unable to find Alliance "pxlib" library' ] + raise ErrorMessage( 1, message ) def getNetType ( self, netName ): if netName.startswith('vss'): return Net.Type.GROUND @@ -67,89 +68,109 @@ class cmos ( CoreToChip ): #cell = self.padLib.getCell( masterCellName ) cell = AllianceFramework.get().getCell( masterCellName, Catalog.State.Views ) if not cell: - raise ErrorMessage( 1, 'cmos.getCell(): I/O pad library "%s" does not contain cell named "%s"' \ - % (self.padLib.getName(),masterCellName) ) + raise ErrorMessage( 1, 'cmos.getCell(): I/O pad library "%s" does not contain cell named "%s"' \ + % (self.padLib.getName(),masterCellName) ) return cell - def _buildGroundPads ( self, ioNet ): - ioNet.buildNets() - vssi = self.chip.getNet( 'vssi' ) - vssi.setExternal( True ) - vssi.setGlobal ( True ) - vssi.setType ( Net.Type.GROUND ) - vssi.merge( ioNet.chipIntNet ) - ioNet.chipIntNet = vssi - - vsse = self.chip.getNet( 'vsse' ) - vsse.setExternal( True ) - vsse.setGlobal ( True ) - vsse.setType ( Net.Type.GROUND ) - vsse.merge( ioNet.chipExtNet ) - ioNet.chipExtNet = vsse - - pads = [] - pads.append( Instance.create( self.chip - , 'p_' + ioNet.padInstanceName + 'ick_%d' % self.groundPadCount - , self.getCell('pvssick_px') ) ) - pads.append( Instance.create( self.chip - , 'p_' + ioNet.padInstanceName + 'eck_%d' % self.groundPadCount - , self.getCell('pvsseck_px') ) ) - - CoreToChip._connect( pads[0], ioNet.chipIntNet, 'vssi' ) - CoreToChip._connect( pads[1], ioNet.chipExtNet, 'vsse' ) - - for pad in pads: self._connectRing( pad ) + def _buildAllGroundPads ( self, ioPadConf ): + coreNet = self.core .getNet( ioPadConf.coreSupplyNetName ) + coronaNet = self.corona.getNet( ioPadConf.coreSupplyNetName ) + chipNet = self.chip .getNet( ioPadConf.coreSupplyNetName ) + padNet = self.chip .getNet( ioPadConf.padSupplyNetName ) + if not coronaNet: + coronaNet = Net.create( self.corona, ioPadConf.coreSupplyNetName ) + coronaNet.setExternal( True ) + coronaNet.setGlobal ( True ) + coronaNet.setType ( Net.Type.GROUND ) + self.icore.getPlug( coreNet ).setNet( coronaNet ) + if not chipNet: + chipNet = Net.create( self.chip, ioPadConf.coreSupplyNetName ) + chipNet.setExternal( True ) + chipNet.setType ( Net.Type.GROUND ) + self.icorona.getPlug( coronaNet ).setNet( chipNet ) + self.ringNetNames['vssi'] = chipNet + if not padNet: + padNet = Net.create( self.chip, ioPadConf.padSupplyNetName ) + padNet.setExternal( True ) + padNet.setType ( Net.Type.GROUND ) + self.ringNetNames['vsse'] = padNet + ioPadConf.pads.append( Instance.create( self.chip + , 'p_vssick_{}'.format(ioPadConf.index) + , self.getCell('pvssick_px') ) ) + ioPadConf.pads.append( Instance.create( self.chip + , 'p_vsseck_{}'.format(ioPadConf.index) + , self.getCell('pvsseck_px') ) ) + self._connect( ioPadConf.pads[0], chipNet, 'vssi' ) + self._connect( ioPadConf.pads[1], padNet , 'vsse' ) self.groundPadCount += 1 - self.chipPads += pads - return + self.chipPads += ioPadConf.pads - def _buildPowerPads ( self, ioNet ): - ioNet.buildNets() - vddi = self.chip.getNet( 'vddi' ) - vddi.setExternal( True ) - vddi.setGlobal ( True ) - vddi.setType ( Net.Type.POWER ) - vddi.merge( ioNet.chipIntNet ) - ioNet.chipIntNet = vddi - - vdde = self.chip.getNet( 'vdde' ) - vdde.setExternal( True ) - vdde.setGlobal ( True ) - vdde.setType ( Net.Type.POWER ) - vdde.merge( ioNet.chipExtNet ) - ioNet.chipExtNet = vdde - - pads = [ ] - pads.append( Instance.create( self.chip - , 'p_' + ioNet.padInstanceName + 'ick_%d' % self.powerPadCount - , self.getCell('pvddick_px') ) ) - pads.append( Instance.create( self.chip - , 'p_' + ioNet.padInstanceName + 'eck_%d' % self.powerPadCount - , self.getCell('pvddeck_px') ) ) - - CoreToChip._connect( pads[0], ioNet.chipIntNet, 'vddi' ) - CoreToChip._connect( pads[1], ioNet.chipExtNet, 'vdde' ) - - for pad in pads: self._connectRing( pad ) + def _buildAllPowerPads ( self, ioPadConf ): + coreNet = self.core .getNet( ioPadConf.coreSupplyNetName ) + coronaNet = self.corona.getNet( ioPadConf.coreSupplyNetName ) + chipNet = self.chip .getNet( ioPadConf.coreSupplyNetName ) + padNet = self.chip .getNet( ioPadConf.padSupplyNetName ) + if not coronaNet: + coronaNet = Net.create( self.corona, ioPadConf.coreSupplyNetName ) + coronaNet.setExternal( True ) + coronaNet.setGlobal ( True ) + coronaNet.setType ( Net.Type.POWER ) + self.icore.getPlug( coreNet ).setNet( coronaNet ) + if not chipNet: + chipNet = Net.create( self.chip, ioPadConf.coreSupplyNetName ) + chipNet.setExternal( True ) + chipNet.setType ( Net.Type.POWER ) + self.icorona.getPlug( coronaNet ).setNet( chipNet ) + self.ringNetNames['vddi'] = chipNet + if not padNet: + padNet = Net.create( self.chip, ioPadConf.padSupplyNetName ) + padNet.setExternal( True ) + padNet.setType ( Net.Type.POWER ) + self.ringNetNames['vdde'] = padNet + ioPadConf.pads.append( Instance.create( self.chip + , 'p_vddick_{}'.format(ioPadConf.index) + , self.getCell('pvddick_px') ) ) + ioPadConf.pads.append( Instance.create( self.chip + , 'p_vddeck_{}'.format(ioPadConf.index) + , self.getCell('pvddeck_px') ) ) + self._connect( ioPadConf.pads[0], chipNet, 'vddi' ) + self._connect( ioPadConf.pads[1], padNet , 'vdde' ) self.powerPadCount += 1 - self.chipPads += pads - return + self.chipPads += ioPadConf.pads - def _buildClockPads ( self, ioNet ): - ioNet.buildNets() - pads = [ ] - pads.append( Instance.create( self.chip - , 'p_' + ioNet.padInstanceName + '_%d' % self.clockPadCount - , self.getCell('pck_px') ) ) - - CoreToChip._connect( pads[0], ioNet.chipExtNet, 'pad' ) - - for pad in pads: self._connectRing( pad ) + def _buildClockPads ( self, ioPadConf ): + coreNet = self.core .getNet( ioPadConf.coreSupplyNetName ) + coronaNet = self.corona.getNet( ioPadConf.coreSupplyNetName ) + chipNet = self.chip .getNet( ioPadConf.coreSupplyNetName+'_core' ) + ringNet = self.chip .getNet( ioPadConf.coreSupplyNetName+'_ring' ) + padNet = self.chip .getNet( ioPadConf.padSupplyNetName ) + if not coronaNet: + coronaNet = Net.create( self.corona, ioPadConf.coreSupplyNetName ) + coronaNet.setExternal( True ) + coronaNet.setType( Net.Type.CLOCK ) + self.icore.getPlug( coreNet ).setNet( coronaNet ) + if not chipNet: + chipNet = Net.create( self.chip, ioPadConf.coreSupplyNetName+'_core' ) + chipNet.setType ( Net.Type.CLOCK ) + self.icorona.getPlug( coronaNet ).setNet( chipNet ) + self.coreClock = chipNet + if not ringNet: + ringNet = Net.create( self.chip, ioPadConf.coreSupplyNetName+'_ring' ) + ringNet.setType( Net.Type.CLOCK ) + self.ringNetNames['ck'] = ringNet + if not padNet: + padNet = Net.create( self.chip, ioPadConf.padSupplyNetName ) + padNet.setExternal( True ) + padNet.setType ( Net.Type.CLOCK ) + ioPadConf.pads.append( Instance.create( self.chip + , 'p_ck_{}'.format(ioPadConf.index) + , self.getCell('pck_px') ) ) + self._connect( ioPadConf.pads[0], padNet, 'pad' ) self.clockPadCount += 1 - self.chipPads += pads + self.chipPads += ioPadConf.pads + def _connectClocks ( self ): p = re.compile( r'pv[ds]{2}[ei]ck_px' ) for pad in self.chipPads: - if p.match( pad.getMasterCell().getName() ): - CoreToChip._connect( pad, ioNet.chipIntNet, 'cko' ) - return + if p.match( pad.getMasterCell().getName() ): + self._connect( pad, self.coreClock, 'cko' ) diff --git a/cumulus/src/plugins/core2chip/core2chip.py b/cumulus/src/plugins/core2chip/core2chip.py index 267a2abc..f36728c6 100644 --- a/cumulus/src/plugins/core2chip/core2chip.py +++ b/cumulus/src/plugins/core2chip/core2chip.py @@ -2,7 +2,7 @@ # -*- coding: utf-8 -*- # # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2019-2018, All Rights Reserved +# Copyright (c) Sorbonne Université 2019-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -14,438 +14,772 @@ # | Python : "./plugins/core2chip/core2chip.py" | # +-----------------------------------------------------------------+ -import re -from Hurricane import UpdateSession -from Hurricane import Net -from Hurricane import Instance -from CRL import Catalog -from CRL import AllianceFramework -from helpers import netDirectionToStr -from helpers.io import ErrorMessage -import plugins.chip +""" +Automatically generates the chip+corona hierarchical netlists from +the *core* of a design. +* *corona* will contains: + + 1. Exactly **one** instance of the *core* Cell. + 2. All the complex wiring to the pads, typically the *ouput enable* + (``oe``) signal connected to the I/O pads of all bits of a bus. + +* *chip* will contains: + + 1. Exactly **one** instance of the *corona* Cell. + 2. All the I/O pads. + +The double level chip+corona serves two purpose: + +1. The standard router will be run on the *corona* only, removing + the need for it to be able to manages the I/O pads. The routing at + chip level, that is connecting the external pins from the *corona* + to the inner sides of the pads, is straightforward. Mostly a straight + wire. + +2. In cases were the *corona* is symbolic layout, but we are required to + use the I/O pads from the foundry (so they are *real* layout), the + boundary between symbolic and real is much easier to manage at + corona/chip level. In that case, the connexion may look like a + small dogleg instead of a straight wire. +""" + +#from exceptions import NotImplementedError +import re +from ...Hurricane import DbU, UpdateSession, Net, Instance, Transformation, Box +from ...CRL import Catalog, AllianceFramework, Spice, DefImport +from ...helpers import trace, netDirectionToStr +from ...helpers.overlay import UpdateSession +from ...helpers.io import ErrorMessage, WarningMessage +from ..rsave import rsave +from ..checks import oneDriver +from ..utils import getPlugByName +from ..block.block import Block +from ..block.configuration import BlockConf, IoPadConf, ConstantsConf + # ------------------------------------------------------------------- # Class : "IoNet". - class IoNet ( object ): + """ + Handle/create the four following nets: - IsElem = 0x0001 - IsEnable = 0x0002 - DoExtNet = 0x0008 - reVHDLVector = re.compile( r'(?P[^(]*)\((?P[\d]+)\)$' ) + 1. ``self.coreNet`` : The original net from the *core*. + 2. ``self.coronaNet`` : The same net at *corona* level. + 3. ``self.chipIntNet`` : The same net at *chip* level (connected to the + *internal* terminal of the I/O pad. + 4. ``self.chipExtNet`` : The corresponding net on the *outside* of the + I/O pad, that is the bonding area. They make the interface of the + chip itself. - def __init__ ( self, coreToChip, coreNet ): - self.coreToChip = coreToChip - self._flags = 0 - self._chipExtNetName = None # In the case of bidir pad, force external net name. - self.coreNet = coreNet - self.coronaNet = None # Corona net going from core to corona. - self.chipIntNet = None # Chip net going from corona to I/O pad. - self.chipExtNet = None # Chip net going from I/O pad to the outside world. + From the name of the core signal we derives the names of those four + signals and the instance name of the I/O pad itself. + + It also check: + + * If the signal is a bit from a vector (flag ``IsElem``), to keep + vectorization across hierarchical level and index the I/O pad name. + * If the signal is an *output enable*, in that case, no I/O pad + nor chip external signal should be generated. + """ + + IsElem = 0x0001 + IsEnable = 0x0002 + IsAnalog = 0x0004 + DoExtNet = 0x0008 + PadPassthrough = 0x0010 + reVHDLVector = re.compile( r'(?P[^(]*)\((?P[\d]+)\)$' ) - m = IoNet.reVHDLVector.match( self.coreNet.getName() ) - if m: - self._flags |= IoNet.IsElem - self._name = m.group('name') - self._index = m.group('index') - else: - self._name = self.coreNet.getName() - self._index = 0 + def __init__ ( self, coreToChip, coreNet ): + self.coreToChip = coreToChip + self._flags = 0 + self._chipExtNetName = None # In the case of bidir pad, force external net name. + self.coreNet = coreNet + self.coronaNet = None # Corona net going from core to corona. + self.chipIntNet = None # Chip net going from corona to I/O pad. + self.chipExtNet = None # Chip net going from I/O pad to the outside world. + m = IoNet.reVHDLVector.match( self.coreNet.getName() ) + if m: + self._flags |= IoNet.IsElem + self._name = m.group('name') + self._index = m.group('index') + else: + self._name = self.coreNet.getName() + self._index = 0 + if self.coreToChip.useHarness(): self._flags |= IoNet.PadPassthrough + self._type = self.coreToChip.getNetType( self._name ) + trace( 550, '\tIoNet.__init__(): {}\n'.format(self) ) + + def __repr__ ( self ): + return ''.format( self.coreNet.getName() + , self.chipExtNet + , self.chipIntNet ) + + def isElem ( self ): return self._flags & IoNet.IsElem + def isEnable ( self ): return self._flags & IoNet.IsEnable + def isAnalog ( self ): return self._flags & IoNet.IsAnalog + def isGlobal ( self ): return self.isGlobal( self._name ) + def isSpecial ( self ): return self._type != Net.Type.LOGICAL + def setFlags ( self, flags ): self._flags |= flags + def resetFlags ( self, flags ): self._flags &= ~flags + + @property + def name ( self ): + if self.isSpecial() and self._chipExtNetName: + return self._chipExtNetName + return self._name + + @property + def index ( self ): return self._index + + @property + def coreNetName ( self ): return self.coreNet.getName() + + @property + def coronaNetName ( self ): + s = self._name + if self.coreNet.isSupply(): return s + if self.coreNet.getDirection() & Net.Direction.IN: + s += '_from_pad' + elif self.coreNet.getDirection() & Net.Direction.OUT: + s += '_to_pad' + if self._flags & IoNet.IsElem: s += '({})'.format(self._index) + return s + + @property + def chipIntNetName ( self ): + return self.chipIntNet.getName() if self.chipIntNet else self.coronaNetName + + @property + def chipExtNetName ( self ): + if self._chipExtNetName is not None: return self._chipExtNetName + if self._flags & IoNet.IsEnable: + if self.coreToChip.useHarness(): + return 'io_oeb({})'.format( self._index ) + return 'None' + if self.chipExtNet: return self.chipExtNet.getName() + s = self._name + if self._flags & IoNet.IsElem: s += '({})'.format(self._index) + return s + + @chipExtNetName.setter + def chipExtNetName ( self, name ): self._chipExtNetName = name + + @property + def padInstanceName ( self ): + s = self._name + if self._flags & IoNet.IsElem: s += '_{}'.format(self._index) + return s - self._type = self.coreToChip.getNetType( self._name ) - return + @property + def enableNetName ( self ): + if self.coreToChip.useHarness(): + m = IoNet.reVHDLVector.match(self.chipExtNetName) + if m: + return 'io_oeb({})'.format( m.group('index') ) + return '{}_enable'.format(self.padInstanceName) - def __repr__ ( self ): - s = ' modules. + +# For Corona's sides. +North = 0x0001 +South = 0x0002 +East = 0x0004 +West = 0x0008 + +# For Corona's corners. +SouthWest = South|West +SouthEast = South|East +NorthWest = North|West +NorthEast = North|East + +# For rounding functions. +Superior = 0x0010 +Inferior = 0x0020 +Inwards = 0x0040 +OnHorizontalPitch = 0x0080 +OnVerticalPitch = 0x0100 + + +def importConstants ( symbols ): + if not isinstance(symbols,dict): + print( WarningMessage( 'plugins.chip.__init__.importConstants(), argument is not a symbol table.' )) + return + + for symbol in globals().items(): + if isinstance(symbol[1],int): + if not symbol[0] in symbols: + symbols[ symbol[0] ] = symbol[1] + + return diff --git a/cumulus/src/plugins/chip/blockcorona.py b/deprecated/cumulus/src/plugins/chip/blockcorona.py similarity index 100% rename from cumulus/src/plugins/chip/blockcorona.py rename to deprecated/cumulus/src/plugins/chip/blockcorona.py diff --git a/cumulus/src/plugins/chip/blockpower.py b/deprecated/cumulus/src/plugins/chip/blockpower.py similarity index 100% rename from cumulus/src/plugins/chip/blockpower.py rename to deprecated/cumulus/src/plugins/chip/blockpower.py diff --git a/deprecated/cumulus/src/plugins/chip/chip.py b/deprecated/cumulus/src/plugins/chip/chip.py new file mode 100644 index 00000000..c1f68bfb --- /dev/null +++ b/deprecated/cumulus/src/plugins/chip/chip.py @@ -0,0 +1,240 @@ + +# This file is part of the Coriolis Software. +# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# +# +-----------------------------------------------------------------+ +# | C O R I O L I S | +# | C u m u l u s - P y t h o n T o o l s | +# | | +# | Author : Jean-Paul CHAPUT | +# | E-mail : Jean-Paul.Chaput@lip6.fr | +# | =============================================================== | +# | Python : "./plugins/chip/chip.py" | +# +-----------------------------------------------------------------+ + + +import sys +import traceback +import os.path +import optparse +import math +import cProfile +import pstats +import Cfg +import Hurricane +from Hurricane import DataBase +from Hurricane import DbU +from Hurricane import Point +from Hurricane import Transformation +from Hurricane import Box +from Hurricane import Path +from Hurricane import Occurrence +from Hurricane import UpdateSession +from Hurricane import Breakpoint +from Hurricane import Net +from Hurricane import RoutingPad +from Hurricane import Contact +from Hurricane import Horizontal +from Hurricane import Vertical +from Hurricane import Instance +from Hurricane import HyperNet +from Hurricane import Query +import Viewer +import CRL +from CRL import RoutingLayerGauge +import helpers +from helpers.io import ErrorMessage +from helpers.io import WarningMessage +import Etesian +import Anabatic +import Katana +import Unicorn +import plugins +import plugins.cts.clocktree +import plugins.chip +import plugins.chip.padscorona +import plugins.chip.blockpower +import plugins.chip.blockcorona + + +# -------------------------------------------------------------------- +# PlaceRoute class + + +class PlaceRoute ( object ): + + def __init__ ( self, conf ): + self.conf = conf + self.validated = True + return + + + def _refresh ( self ): + if self.conf.viewer: self.conf.viewer.fit() + return + + + def validate ( self ): + self.validated = True + if len(self.conf.cores) < 1: self.validated = False + + coreAb = self.conf.core.getAbutmentBox() + if (not coreAb.isEmpty()): + if coreAb.getWidth () <= self.conf.coreSize.getWidth() \ + and coreAb.getHeight() <= self.conf.coreSize.getHeight(): + self.conf.coreSize = coreAb + else: + raise ErrorMessage( 1, [ 'Core %s already have an abutment box, bigger than the requested one:' + % self.conf.cores[0].getName() + , " Cell abutment box: %s" % str(coreAb) + , " Maximum abutment box: %s" % str(self.conf.coreSize) ] ) + self.validated = False + + return self.validated + + + def doCoronaFloorplan ( self ): + if not self.validated: + raise ErrorMessage( 1, 'chip.doCoronaFloorplan(): Chip is not valid, aborting.' ) + return + + self.railsNb = Cfg.getParamInt('chip.block.rails.count' ).asInt() + self.hRailWidth = Cfg.getParamInt('chip.block.rails.hWidth' ).asInt() + self.vRailWidth = Cfg.getParamInt('chip.block.rails.vWidth' ).asInt() + self.hRailSpace = Cfg.getParamInt('chip.block.rails.hSpacing').asInt() + self.vRailSpace = Cfg.getParamInt('chip.block.rails.vSpacing').asInt() + + if not self.conf.useClockTree: self.railsNb -= 1 + + innerBb = Box( self.conf.coreSize ) + innerBb.inflate( self.railsNb * self.vRailWidth + (self.railsNb+1) * self.vRailSpace + , self.railsNb * self.hRailWidth + (self.railsNb+1) * self.hRailSpace ) + + coronaAb = self.conf.corona.getAbutmentBox() + if innerBb.getWidth() > coronaAb.getWidth(): + raise ErrorMessage( 1, 'Core is too wide to fit into the corona, needs %s but only has %s.' + % ( DbU.getValueString(innerBb .getWidth()) + , DbU.getValueString(coronaAb.getWidth()) ) ) + + if innerBb.getHeight() > coronaAb.getHeight(): + raise ErrorMessage( 1, 'Core is too tall to fit into the corona, needs %s but only has %s.' + % ( DbU.getValueString(innerBb .getHeight()) + , DbU.getValueString(coronaAb.getHeight()) ) ) + + UpdateSession.open() + self.conf.core.setAbutmentBox( self.conf.coreSize ) + x = (coronaAb.getWidth () - self.conf.coreSize.getWidth ()) // 2 + y = (coronaAb.getHeight() - self.conf.coreSize.getHeight()) // 2 + x = x - (x % self.conf.getSliceHeight()) + y = y - (y % self.conf.getSliceHeight()) + self.conf.icore.setTransformation ( Transformation(x,y,Transformation.Orientation.ID) ) + self.conf.icore.setPlacementStatus( Instance.PlacementStatus.FIXED ) + UpdateSession.close() + return + + + def doCorePlacement ( self ): + if not self.validated: + raise ErrorMessage( 1, 'chip.doCorePlacement(): Chip is not valid, aborting.' ) + return + + coreCell = self.conf.core + + checkUnplaced = plugins.CheckUnplaced( coreCell, plugins.NoFlags ) + if not checkUnplaced.check(): return + + coreCk = None + if self.conf.coronaCk: + for plug in self.conf.coronaCk.getPlugs(): + if plug.getInstance() == self.conf.icore: + coreCk = plug.getMasterNet() + if not coreCk: + print( WarningMessage( 'Core "{}" is not connected to chip clock.'.format(self.conf.icore.getName()) )) + + if self.conf.useClockTree and coreCk: + ht = plugins.cts.clocktree.HTree.create( self.conf, coreCell, coreCk, coreCell.getAbutmentBox() ) + ht.addCloned( self.conf.cell ) + ht.addCloned( self.conf.corona ) + etesian = Etesian.EtesianEngine.create( self.conf.corona ) + etesian.setBlock( self.conf.icore ) + etesian.setViewer( self.conf.viewer ) + etesian.place() + etesian.toHurricane() + etesian.flattenPower() + etesian.destroy() + + ht.connectLeaf() + ht.route() + ht.save( self.conf.cell ) + else: + etesian = Etesian.EtesianEngine.create( self.conf.corona ) + etesian.setBlock( self.conf.icore ) + etesian.place() + etesian.toHurricane() + etesian.flattenPower() + etesian.destroy() + return + + + def doChipPlacement ( self ): + if not self.validated: + raise ErrorMessage( 1, 'chip.doChipPlacement(): Chip is not valid, aborting.' ) + return + + padsCorona = plugins.chip.padscorona.Corona( self.conf ) + self.validated = padsCorona.validate() + if not self.validated: return False + + padsCorona.doLayout() + self.validate() + self.doCoronaFloorplan() + self._refresh() + + self.doCorePlacement() + self._refresh() + + coreBlock = plugins.chip.blockpower.Block( self.conf ) + coreBlock.connectPower() + coreBlock.connectClock() + coreBlock.doLayout() + self._refresh() + + coreCorona = plugins.chip.blockcorona.Corona( coreBlock ) + coreCorona.connectPads ( padsCorona ) + coreCorona.connectBlock() + coreCorona.doLayout() + self._refresh() + + return + + + def doChipRouting ( self ): + if not self.validated: + raise ErrorMessage( 1, 'chip.doChipRouting(): Chip is not valid, aborting.' ) + return + + self.conf.corona.setName( self.conf.corona.getName()+"_r" ) + katana = Katana.KatanaEngine.create( self.conf.corona ) + #katana.printConfiguration () + katana.digitalInit () + #katana.runNegociatePreRouted() + katana.runGlobalRouter ( Katana.Flags.NoFlags ) + katana.loadGlobalRouting ( Anabatic.EngineLoadGrByNet ) + katana.layerAssign ( Anabatic.EngineNoNetLayerAssign ) + katana.runNegociate ( Katana.Flags.NoFlags ) + success = katana.getSuccessState() + katana.finalizeLayout() + katana.destroy() + + return + + + def save ( self ): + if not self.validated: + raise ErrorMessage( 1, 'chip.save(): Chip is not valid, aborting.' ) + return + + af = CRL.AllianceFramework.get() + af.saveCell( self.conf.cell , CRL.Catalog.State.Views ) + af.saveCell( self.conf.corona, CRL.Catalog.State.Views ) + return diff --git a/deprecated/cumulus/src/plugins/chip/configuration.py b/deprecated/cumulus/src/plugins/chip/configuration.py new file mode 100644 index 00000000..851f12a0 --- /dev/null +++ b/deprecated/cumulus/src/plugins/chip/configuration.py @@ -0,0 +1,1303 @@ + +# This file is part of the Coriolis Software. +# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# +# +-----------------------------------------------------------------+ +# | C O R I O L I S | +# | C u m u l u s - P y t h o n T o o l s | +# | | +# | Author : Jean-Paul CHAPUT | +# | E-mail : Jean-Paul.Chaput@lip6.fr | +# | =============================================================== | +# | Python : "./plugins/chip/configuration.py" | +# +-----------------------------------------------------------------+ + + +import sys +import os.path +import Cfg +from Hurricane import Breakpoint +from Hurricane import DbU +from Hurricane import Box +from Hurricane import Transformation +from Hurricane import Box +from Hurricane import Path +from Hurricane import Layer +from Hurricane import Occurrence +from Hurricane import Net +from Hurricane import RoutingPad +from Hurricane import Horizontal +from Hurricane import Vertical +from Hurricane import Contact +from Hurricane import Pin +from Hurricane import Plug +from Hurricane import Instance +import CRL +from CRL import RoutingLayerGauge +from helpers import trace +from helpers.io import ErrorMessage +from helpers.io import WarningMessage +from helpers.io import catch +from plugins import getParameter +import plugins.chip + + +plugins.chip.importConstants( globals() ) + + +def breakpoint ( editor, level, message ): + if editor: + editor.fit() + editor.refresh() + Breakpoint.stop( level, message ) + return + + +def getPlugByName ( instance, netName ): + masterCell = instance.getMasterCell() + masterNet = masterCell.getNet( netName ) + if masterNet: + return instance.getPlug( masterNet ) + return None + + +def getPlugByNet ( instance, net ): + for plug in net.getPlugs(): + if plug.getInstance() == instance: + return plug + return None + + +def getRpBb ( instance, netName ): + bb = Box() + for net in instance.getMasterCell().getNets(): + if net.isExternal() and net.getName() == netName: + for component in net.getExternalComponents(): + if isinstance(component,Vertical): + bb = component.getBoundingBox() + instance.getTransformation().applyOn( bb ) + return bb + + +def showNet ( cell, netName ): + net = cell.getNet(netName) + if not net: + print( ErrorMessage( 3, 'Cell {} doesn\'t have net {}'.format(cell.getName(),netName) )) + return + + print( 'Components of', netName ) + for component in net.getComponents(): + print( '| ', component, component.getBoundingBox() ) + return + + +def destroyNetComponents ( net ): + # 1. We cannot iterate over a Hurricane Collection if we are deleting + # some of it's elements at the same time (could be improved as it + # is an intrusive map. + # 2. Lazy programming: as we don't know the destruction order, some + # components can be deleted by (previous) others so we can endup + # on dangling Python proxy which send an exception that we catch. + # 3. Plugs are not destroyed (they cannot as they are part of the + # Instance). They stay connected to the net. + toDestroy = [] + for component in net.getComponents(): + if not isinstance(component,Plug): + toDestroy.append( component ) + for component in toDestroy: + try: + component.destroy() + except: + pass + return + + +# ------------------------------------------------------------------- +# Class : "IoPadConf". + +class IoPadConf ( object ): + # self._datas is a table of 6 elements, the five first coming from + # the configuration itself. Direction are taken from the core point + # of view. + # + # Meaning of the table element's: + # + # +---------+-----------------------------------------------------------+ + # | Index | Type | + # +=========+===========================================================+ + # | 0 | Pad instance name | + # +---------+-----------------------------------------------------------+ + # | 1 | Pad connected signal name. | + # | | The name of the external signal at chip level | + # +---------+-----------------------------------------------------------+ + # | 2 | The name of the signal going *from* the pad to the core. | + # | | OUT direction in the core | + # +---------+-----------------------------------------------------------+ + # | 3 | The name of the signal going *to* the pad from the core. | + # | | IN direction in core | + # +---------+-----------------------------------------------------------+ + # | 4 | The enable signal, coming from the core | + # +---------+-----------------------------------------------------------+ + # | 5 | The IoPad associated object. It is set to None initially | + # +---------+-----------------------------------------------------------+ + + def __init__ ( self, datas ): + if not isinstance(datas,list): + raise ErrorMessage( 1, [ 'IoPadConf.__init__(): The "datas" parameter is not a list.' + , str(datas) ] ) + if len(datas) < 3 and len(datas) > 5: + raise ErrorMessage( 1, [ 'IoPadConf.__init__(): The "datas" list must have between 3 to 5 elements.' + , str(datas) ] ) + + self._datas = datas + self._datas.append( None ) + return + + @property + def padInstanceName ( self ): return self._datas[0] + + @property + def padNetName ( self ): return self._datas[1] + + @property + def fromCoreNet ( self ): return self._datas[2] + + @property + def toCoreNet ( self ): return self._datas[3] + + @property + def enableNet ( self ): return self._datas[-2] + + @property + def nets ( self ): return self._datas[2:-1] + + @property + def udata ( self ): return self._datas[-1] + + @udata.setter + def udata ( self, data ): self._datas[-1] = data + + def isTristate ( self ): return len(self._datas) == 5 + def isBidir ( self ): return len(self._datas) == 6 + + def __repr__ ( self ): + s = ' self.verticalDepth: depth -= 1 + + trace( 550, '\t%s, horizontalDepth:%d, gaugeDepth:%d\n' + % (self.routingGauge,self.horizontalDepth,self.routingGauge.getDepth())) + return Contact.create( net + , self.routingGauge.getContactLayer(depth) + , x, y + , self.routingGauge.getLayerGauge(depth).getViaWidth() + , self.routingGauge.getLayerGauge(depth).getViaWidth() + ) + + def _getNearestHorizontalTrack ( self, bb, y, flags ): + if flags & GaugeConf.DeepDepth: depth = self.horizontalDeepDepth + else: depth = self.horizontalDepth + + index = self.routingGauge.getLayerGauge(depth).getTrackIndex( bb.getYMin(), bb.getYMax(), y, RoutingLayerGauge.Nearest ) + return self.routingGauge.getLayerGauge(depth).getTrackPosition( bb.getYMin(), index ) + + def _getNearestVerticalTrack ( self, bb, x, flags ): + if flags & GaugeConf.DeepDepth: depth = self.verticalDeepDepth + else: depth = self.verticalDepth + + index = self.routingGauge.getLayerGauge(depth).getTrackIndex( bb.getXMin(), bb.getXMax(), x, RoutingLayerGauge.Nearest ) + return self.routingGauge.getLayerGauge(depth).getTrackPosition( bb.getXMin(), index ) + + def _createHorizontal ( self, source, target, y, flags ): + if flags & GaugeConf.DeepDepth: depth = self.horizontalDeepDepth + else: depth = self.horizontalDepth + + layer = self.routingGauge.getRoutingLayer(depth) + + if flags & GaugeConf.UseContactWidth: width = source.getBoundingBox(layer.getBasicLayer()).getHeight() + else: width = self.routingGauge.getLayerGauge(depth).getWireWidth() + if flags & GaugeConf.ExpandWidth: width += DbU.fromLambda( 1.0 ) + + segment = Horizontal.create( source, target, layer, y, width ) + trace( 550, segment ) + return segment + + def _createVertical ( self, source, target, x, flags ): + if flags & GaugeConf.DeepDepth: depth = self.verticalDeepDepth + else: depth = self.verticalDepth + + layer = self.routingGauge.getRoutingLayer(depth) + + if flags & GaugeConf.UseContactWidth: width = source.getBoundingBox(layer.getBasicLayer()).getWidth() + else: width = self.routingGauge.getLayerGauge(depth).getWireWidth() + if flags & GaugeConf.ExpandWidth: width += DbU.fromLambda( 1.0 ) + + segment = Vertical.create( source, target, layer, x, width ) + trace( 550, segment ) + return segment + + def _rpAccess ( self, rp, flags ): + trace( 550, ',+', '\t_rpAccess() %s\n' % str(rp) ) + + if rp in self._rpToAccess: + trace( 550, '-' ) + return self._rpToAccess[rp] + + if flags & GaugeConf.DeepDepth: + hdepth = self.horizontalDeepDepth + vdepth = self.verticalDeepDepth + else: + hdepth = self.horizontalDepth + vdepth = self.verticalDepth + + hpitch = self.routingGauge.getLayerGauge(hdepth).getPitch() + hoffset = self.routingGauge.getLayerGauge(hdepth).getOffset() + contact1 = Contact.create( rp, self.routingGauge.getContactLayer(0), 0, 0 ) + midSliceY = contact1.getY() - (contact1.getY() % self.cellGauge.getSliceHeight()) \ + + self.cellGauge.getSliceHeight() // 2 + midTrackY = midSliceY - ((midSliceY - hoffset) % hpitch) + dy = midSliceY - contact1.getY() + + if flags & GaugeConf.OffsetBottom1: dy += hpitch + if flags & GaugeConf.OffsetTop1: dy -= hpitch + contact1.setDy( dy ) + + trace( 550, contact1 ) + + if flags & GaugeConf.HAccess: stopDepth = hdepth + else: stopDepth = vdepth + trace( 550, '\tstopDepth:%d\n' % stopDepth ) + + for depth in range(1,stopDepth): + xoffset = 0 + if flags & GaugeConf.OffsetRight1 and depth == 1: + xoffset = self.routingGauge.getLayerGauge(depth+1).getPitch() + contact2 = Contact.create( rp.getNet() + , self.routingGauge.getContactLayer(depth) + , contact1.getX() + xoffset + , contact1.getY() + , self.routingGauge.getLayerGauge(depth).getViaWidth() + , self.routingGauge.getLayerGauge(depth).getViaWidth() + ) + trace( 550, contact2 ) + if self.routingGauge.getLayerGauge(depth).getDirection() == RoutingLayerGauge.Horizontal: + segment = Horizontal.create( contact1 + , contact2 + , self.routingGauge.getRoutingLayer(depth) + , contact1.getY() + , self.routingGauge.getLayerGauge(depth).getWireWidth() + ) + trace( 550, segment ) + else: + segment = Vertical.create( contact1 + , contact2 + , self.routingGauge.getRoutingLayer(depth) + , contact1.getX() + , self.routingGauge.getLayerGauge(depth).getWireWidth() + ) + trace( 550, segment ) + contact1 = contact2 + + self._rpToAccess[rp] = contact1 + + trace( 550, '-' ) + return contact1 + + def _rpByOccurrence ( self, occurrence, net ): + plug = occurrence.getEntity() + if plug in self._plugToRp: + rp = self._plugToRp[plug] + else: + rp = RoutingPad.create( net, occurrence, RoutingPad.BiggestArea ) + self._plugToRp[plug] = rp + + return rp + + def _rpAccessByOccurrence ( self, occurrence, net, flags ): + plug = occurrence.getEntity() + if plug in self._plugToRp: + rp = self._plugToRp[plug] + else: + rp = RoutingPad.create( net, occurrence, RoutingPad.BiggestArea ) + self._plugToRp[plug] = rp + + return self._rpAccess( self._rpByOccurrence(occurrence,net), flags ) + + def _rpByPlug ( self, plug, net ): + if plug in self._plugToRp: + rp = self._plugToRp[plug] + else: + occurrence = Occurrence( plug, Path(net.getCell(),'') ) + rp = RoutingPad.create( net, occurrence, RoutingPad.BiggestArea ) + self._plugToRp[plug] = rp + + return rp + + def _rpByPlugName ( self, instance, plugName, net ): + return self._rpByPlug( getPlugByName(instance,plugName), net ) + + def _rpAccessByPlug ( self, plug, net, flags ): + return self._rpAccess( self._rpByPlug(plug,net), flags ) + + def _rpAccessByPlugName ( self, instance, plugName, net, flags=0 ): + return self._rpAccess( self._rpByPlugName(instance,plugName,net), flags ) + + def _setStackPosition ( self, topContact, x, y ): + topContact.setX( x ) + topContact.setY( y ) + + count = 0 + for component in topContact.getSlaveComponents(): + segment = component + count += 1 + if count > 1: + raise ErrorMessage( 1, 'GaugeConf::_setStackPosition(): There must be exactly one segment connected to %s, not %d.' % (topContact,count) ) + + if count == 1: + if isinstance(segment,Horizontal): + segment.setY( y ) + segment.getOppositeAnchor( topContact ).setY( y ) + elif isinstance(segment,Vertical): + segment.setX( x ) + segment.getOppositeAnchor( topContact ).setX( x ) + return + + +# ------------------------------------------------------------------- +# Class : "Configuration.ChipConf". + +class ChipConf ( object ): + + @staticmethod + def _toSymbolic ( u, rounding ): + oneLambda = DbU.fromLambda( 1.0 ) + remainder = u % oneLambda + if remainder: + if rounding == Superior: u = u + (oneLambda - remainder) + else: u = u - remainder + return u + + + @staticmethod + def toSymbolic ( v, rounding ): + if isinstance(v,int): return ChipConf._toSymbolic( v, rounding ) + if isinstance(v,Box): + if rounding & Inwards: + roundings = [ Superior + , Superior + , Inferior + , Inferior ] + else: + roundings = [ Inferior + , Inferior + , Superior + , Superior ] + xMin = ChipConf._toSymbolic( v.getXMin(), roundings[0] ) + yMin = ChipConf._toSymbolic( v.getYMin(), roundings[1] ) + xMax = ChipConf._toSymbolic( v.getXMax(), roundings[2] ) + yMax = ChipConf._toSymbolic( v.getYMax(), roundings[3] ) + return Box( xMin, yMin, xMax, yMax ) + return v + + + @staticmethod + def _readChipSize( chipConfigDict ): + if not 'chip.size' in chipConfigDict: return Box() + chipSize = chipConfigDict['chip.size'] + if not isinstance(chipSize,tuple): + print( ErrorMessage( 1, 'The Chip size parameter is *not* a tuple.' )) + return Box() + if len(chipSize) != 2: + print( ErrorMessage( 1, 'The Chip size parameter is *not* a tuple of exactly two items.' )) + return Box() + return Box( 0, 0, chipSize[0], chipSize[1] ) + + + @staticmethod + def _readCoreSize( chipConfigDict ): + if not 'core.size' in chipConfigDict: + print( ErrorMessage( 1, 'The Core size parameter is missing.' )) + return Box() + coreSize = chipConfigDict['core.size'] + if not isinstance(coreSize,tuple): + print( ErrorMessage( 1, 'The Core size parameter is *not* a tuple.' )) + return Box() + if len(coreSize) != 2: + print( ErrorMessage( 1, 'The Core size parameter is *not* a tuple of exactly two items.' )) + return Box() + return Box( 0, 0, coreSize[0], coreSize[1] ) + + + @staticmethod + def _readClockTree( chipConfigDict ): + useClockTree = False + if 'chip.clockTree' in chipConfigDict: + if chipConfigDict['chip.clockTree']: + useClockTree = True + return useClockTree + + + @staticmethod + def _readChipName( chipConfigDict ): + if 'chip.name' in chipConfigDict: return chipConfigDict['chip.name'] + return 'chip' + + + def _loadIoPadGauge ( self, chipConfigDict ): + if not 'pads.ioPadGauge' in chipConfigDict: + #raise ErrorMessage( 1, 'The IO pad gauge configuration parameter "pads.ioPadGauge" is missing.' ) + return + self.gaugeConf._loadIoPadGauge( chipConfigDict['pads.ioPadGauge'] ) + return + + + def _readPads ( self, chipConfigDict, keyword ): + if not keyword in chipConfigDict: return [] + padConfList = chipConfigDict[keyword] + if not isinstance(padConfList,list): + raise ErrorMessage( 1, 'The "%s" entry is not a list.' ) + return [] + + af = CRL.AllianceFramework.get() + padList = [] + for i in range(len(padConfList)): + position = None + instanceName = None + if isinstance(padConfList[i],str): + instanceName = padConfList[i] + elif isinstance(padConfList[i],list): + self.padsHavePosition = True + if isinstance(padConfList[i][0],int) and isinstance(padConfList[i][1],str): + position = padConfList[i][0] + instanceName = padConfList[i][1] + + if not instanceName: + raise ErrorMessage( 1, 'The element [%d] of list %s is neither a string nor a list "[pos,name]" (skipped).' + % (i,keyword) ) + continue + + padList.append( [ position, instanceName ] ) + + return padList + + + def _readPadInstances ( self, chipConfigDict ): + if not 'pads.instances' in chipConfigDict: return [ ] + + padInstancesConf = chipConfigDict['pads.instances'] + if not isinstance(padInstancesConf,list): + raise ErrorMessage( 1, 'The "%s" entry is not a list.' ) + return [ ] + + padInstances = [ ] + for entry in padInstancesConf: + padInstances.append( IoPadConf( entry ) ) + return padInstances + + + def __init__ ( self, chipConfigDict, cell, viewer=None ): + trace( 550, '\tONE LAMBDA = %s\n' % DbU.getValueString(DbU.fromLambda(1.0)) ) + + if not isinstance(chipConfigDict,dict): + raise ErrorMessage( 1, 'The "chip" variable is not a dictionnary.' ) + + self.validated = True + self.gaugeConf = GaugeConf() + self.cell = cell + self.viewer = viewer + # Block Corona parameters. + self.railsNb = getParameter('chip','chip.block.rails.count' ).asInt() + self.hRailWidth = getParameter('chip','chip.block.rails.hWidth' ).asInt() + self.vRailWidth = getParameter('chip','chip.block.rails.vWidth' ).asInt() + self.hRailSpace = getParameter('chip','chip.block.rails.hSpacing').asInt() + self.vRailSpace = getParameter('chip','chip.block.rails.vSpacing').asInt() + # Global Net names. + self.blockageName = "blockagenet" + # Global Nets. + self.coronaVdd = None + self.coronaVss = None + self.coronaCk = None + self.blockageNet = None + self.coronas = [] + self.cores = [] + + self._loadIoPadGauge( chipConfigDict ) + + self.padsHavePosition = False + self.padInstances = self._readPadInstances( chipConfigDict ) + self.southPads = self._readPads( chipConfigDict, 'pads.south' ) + self.northPads = self._readPads( chipConfigDict, 'pads.north' ) + self.eastPads = self._readPads( chipConfigDict, 'pads.east' ) + self.westPads = self._readPads( chipConfigDict, 'pads.west' ) + self.coreSize = ChipConf._readCoreSize ( chipConfigDict ) + self.chipSize = ChipConf._readChipSize ( chipConfigDict ) + self.useClockTree = ChipConf._readClockTree( chipConfigDict ) + self.chipName = ChipConf._readChipName ( chipConfigDict ) + + minHCorona = self.railsNb*(self.hRailWidth + self.hRailSpace) + self.hRailSpace + minVCorona = self.railsNb*(self.vRailWidth + self.vRailSpace) + self.vRailSpace + if minHCorona > minVCorona: self.minCorona = minHCorona*2 + else: self.minCorona = minVCorona*2 + + return + + + def chipValidate ( self ): + self.checkPads() + self.checkCorona() + self.computeChipSize() + #self.checkChipSize() + self.findPowerAndClockNets() + return + + + @property + def icorona ( self ): return self.coronas[0] + + @property + def corona ( self ): return self.coronas[0].getMasterCell() + + @property + def icore ( self ): return self.cores[0] + + @property + def core ( self ): return self.cores[0].getMasterCell() + + @property + def chip ( self ): return self.cell + + + def getInstanceAb ( self, instance ): + ab = instance.getMasterCell().getAbutmentBox() + instance.getTransformation().applyOn( ab ) + + if instance.getCell() == self.cell: return ab + + if instance.getCell() != self.corona: + raise ErrorMessage( 1, 'ChipConf.getInstanceAb(): Instance "%s" neither belong to chip or corona.' % instance.getName() ) + return ab + + self.icorona.getTransformation().applyOn( ab ) + return ab + + + def getCoronaNet ( self, chipNet ): + for plug in chipNet.getPlugs(): + if plug.getInstance() == self.icorona: + return plug.getMasterNet() + return None + + + def toRoutingGauge ( self, uMin, uMax, layer ): + trace( 550, ',+', '\ttoRoutingGauge() [%s %s] %s\n' \ + % (DbU.getValueString(uMin), DbU.getValueString(uMax), layer) ) + + ab = self.corona.getAbutmentBox() + lg = None + mask = layer.getMask() + for layerGauge in self.gaugeConf.routingGauge.getLayerGauges(): + if layerGauge.getLayer().getMask() == mask: + lg = layerGauge + trace( 550, '\tUsing layer gauge %s\n' % str(lg) ) + break + + if uMax < uMin: uMin, uMax = uMax, uMin + if lg: + if lg.getDirection() == RoutingLayerGauge.Horizontal: + abMin = ab.getYMin() + abMax = ab.getYMax() + else: + abMin = ab.getXMin() + abMax = ab.getXMax() + + if uMin <= abMin: + shiftRight = abMin - uMin + lg.getPitch() + uMin += shiftRight + uMax += shiftRight + if uMax >= abMax: + shiftLeft = uMax - abMax + lg.getPitch() + uMin -= shiftLeft + uMax -= shiftLeft + + iTrackMin = lg.getTrackIndex( abMin, abMax, uMin, RoutingLayerGauge.Superior ) + iTrackMax = lg.getTrackIndex( abMin, abMax, uMax, RoutingLayerGauge.Inferior ) + if iTrackMax < iTrackMin: iTrackMax = iTrackMin + + uTrackMin = lg.getTrackPosition( abMin, iTrackMin ) + uTrackMax = lg.getTrackPosition( abMin, iTrackMax ) + + axis = (uTrackMax + uTrackMin) // 2 + width = (iTrackMax - iTrackMin) * lg.getPitch() + lg.getWireWidth() + + if self.gaugeConf.routingGauge.isSymbolic(): + oneLambda = DbU.fromLambda( 1.0 ) + if axis % oneLambda: + axis -= oneLambda // 2 + width -= oneLambda + + trace( 550, '\t[%i %i]\n' % (iTrackMin, iTrackMax) ) + trace( 550, '\taxis: %sl %s\n' % (DbU.toLambda(axis ), DbU.getValueString(axis )) ) + trace( 550, '\twidth: %sl %s\n' % (DbU.toLambda(width), DbU.getValueString(width)) ) + else: + axis = (uMax + uMin) // 2 + width = (uMax - uMin) + + trace( 550, '-' ) + return axis, width + + + def toCoronaPitchInChip ( self, uCore, layer ): + trace( 550, ',+', '\tChipConf.toCoronaPitchInChip(): uCore: %sl %s\n' % (DbU.toLambda(uCore), DbU.getValueString(uCore)) ) + + coronaAb = self.getInstanceAb( self.icorona ) + lg = None + mask = layer.getMask() + for layerGauge in self.gaugeConf.routingGauge.getLayerGauges(): + if layerGauge.getLayer().getMask() == mask: + lg = layerGauge + break + + if not lg: + trace( 550, '-' ) + return 0 + + trace( 550, '\t%s\n' % str(lg) ) + if lg: + if lg.getDirection() == RoutingLayerGauge.Horizontal: + uCorona = uCore - coronaAb.getYMin() + else: + uCorona = uCore - coronaAb.getXMin() + + uCorona, width = self.toRoutingGauge( uCorona, uCorona, layer ) + + trace( 550, '\ttoCoronaPitchInChip(): uCorona: %sl %s\n' % (DbU.toLambda(uCorona), DbU.getValueString(uCorona)) ) + + if lg: + if lg.getDirection() == RoutingLayerGauge.Horizontal: + uCore = uCorona + coronaAb.getYMin() + else: + uCore = uCorona + coronaAb.getXMin() + + trace( 550, '\ttoCoronaPitchInChip(): uCorona: %sl %s\n' % (DbU.toLambda(uCorona), DbU.getValueString(uCorona)) ) + trace( 550, '\ttoCoronaPitchInChip(): uCore: %sl %s\n' % (DbU.toLambda(uCore ), DbU.getValueString(uCore )) ) + trace( 550, '-' ) + return uCore + + + + def coronaHorizontal ( self, chipNet, layer, chipY, width, chipXMin, chipXMax ): + trace( 550, ',+', '\tChipConf.coronaHorizontal\n' ) + + coronaAb = self.getInstanceAb( self.icorona ) + coronaNet = self.getCoronaNet ( chipNet ) + if not coronaNet: return None + + coronaY = chipY - coronaAb.getYMin() + dxMin = ChipConf.toSymbolic( chipXMin - coronaAb.getXMin(), Superior ) + dxMax = ChipConf.toSymbolic( chipXMax - coronaAb.getXMin(), Inferior ) + + trace( 550, '\t| chipNet: %s %s\n' % (chipNet, layer) ) + trace( 550, '\t| Real\n' ) + trace( 550, '\t| axis: %10s\n' % DbU.getValueString(coronaY) ) + trace( 550, '\t| width:%10s\n' % DbU.getValueString(width) ) + trace( 550, '\t| dxMin:%10s (%sl)\n' \ + % (DbU.getValueString(chipXMin - coronaAb.getXMin()), DbU.toLambda(chipXMin - coronaAb.getXMin()) ) ) + trace( 550, '\t| dxMax:%10s\n' % DbU.getValueString(chipXMax - coronaAb.getXMin()) ) + + coronaY, width = self.toRoutingGauge( coronaY - width//2, coronaY + width//2, layer ) + + trace( 550, '\t| On Grid\n' ) + trace( 550, '\t| axis: %10sl or %10s\n' % (DbU.toLambda(coronaY), DbU.getValueString(coronaY)) ) + trace( 550, '\t| width:%10sl or %10s\n' % (DbU.toLambda(width) , DbU.getValueString(width)) ) + trace( 550, '\t| dxMin:%10sl\n' % DbU.toLambda(dxMin) ) + trace( 550, '\t| dxMax:%10sl\n' % DbU.toLambda(dxMax) ) + + h = Horizontal.create( coronaNet, layer, coronaY, width, dxMin, dxMax ) + + trace( 550, '\t| %s\n' % str(h) ) + trace( 550, '-' ) + return h + + + def coronaVertical ( self, chipNet, layer, chipX, width, chipYMin, chipYMax ): + trace( 550, ',+', '\tChipConf.coronaVertical\n' ) + + coronaAb = self.getInstanceAb( self.icorona ) + coronaNet = self.getCoronaNet( chipNet ) + if not coronaNet: return None + + coronaX = chipX - coronaAb.getXMin() + dyMin = ChipConf.toSymbolic( chipYMin - coronaAb.getYMin(), Superior ) + dyMax = ChipConf.toSymbolic( chipYMax - coronaAb.getYMin(), Inferior ) + + trace( 550, '\t| chipNet: %s %s\n' % (chipNet, layer) ) + trace( 550, '\t| Real\n' ) + trace( 550, '\t| axis: %s\n' % DbU.getValueString(coronaX) ) + trace( 550, '\t| width:%s\n' % DbU.getValueString(width) ) + + coronaX, width = self.toRoutingGauge( coronaX - width//2, coronaX + width//2, layer ) + + trace( 550, '\t| On Grid\n' ) + trace( 550, '\t| axis: %s or %s\n' % (DbU.toLambda(coronaX), DbU.getValueString(coronaX)) ) + trace( 550, '\t| width:%s or %s\n' % (DbU.toLambda(width) , DbU.getValueString(width)) ) + + v = Vertical.create( coronaNet, layer, coronaX, width, dyMin, dyMax ) + + trace( 550, '\t| %s\n' % str(v) ) + trace( 550, '-' ) + return v + + + def coronaContact ( self, chipNet, layer, chipX, chipY, width, height, flags=0 ): + trace( 550, ',+', '\tChipConf.coronaContact\n' ) + + coronaAb = self.getInstanceAb( self.icorona ) + coronaNet = self.getCoronaNet( chipNet ) + if not coronaNet: return None + + coronaX = chipX - coronaAb.getXMin() + coronaY = chipY - coronaAb.getYMin() + + trace( 550, '\t| chipNet: %s %s\n' % (chipNet, layer) ) + trace( 550, '\t| Real\n' ) + trace( 550, '\t| center: %12s %12s\n' % (DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) + trace( 550, '\t| WxH: %12s %12s\n' % (DbU.getValueString(width ), DbU.getValueString(height )) ) + + topLayer = layer.getTop() + if self.gaugeConf.isHorizontal(topLayer): + coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, layer.getBottom() ) + coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, topLayer ) + else: + coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, topLayer ) + coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, layer.getBottom() ) + + if not (flags & OnHorizontalPitch): + trace( 550, '\tNot on horizontal routing pitch, Y on lambda only.\n' ) + coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) + if not (flags & OnVerticalPitch ): + trace( 550, '\tNot on vertical routing pitch, X on lambda only.\n' ) + coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) + + trace( 550, '\t| On Grid\n' ) + trace( 550, '\t| X axis: %12s or %12s\n' % (DbU.toLambda(coronaX) , DbU.getValueString(coronaX)) ) + trace( 550, '\t| Y axis: %12s or %12s\n' % (DbU.toLambda(coronaY) , DbU.getValueString(coronaY)) ) + trace( 550, '\t| center: %12s %12s\n' % (DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) + trace( 550, '\t| WxH: %12s %12s\n' % (DbU.getValueString(width ), DbU.getValueString(height )) ) + + c = Contact.create( coronaNet + , layer + , coronaX + , coronaY + , width + , height + ) + + trace( 550, '\t| %s\n' % str(c) ) + trace( 550, '-' ) + return c + + + def coronaContactArray ( self, chipNet, layer, chipX, chipY, array, flags ): + trace( 550, ',+', '\tChipConf.coronaContactArray\n' ) + + viaPitch = layer.getMinimalSize() + layer.getMinimalSpacing() + coronaAb = self.getInstanceAb( self.icorona ) + coronaNet = self.getCoronaNet( chipNet ) + if not coronaNet: return None + + trace( 550, '\t| chipNet: %s %s\n' % (chipNet, layer) ) + + coronaX = chipX - coronaAb.getXMin() + coronaY = chipY - coronaAb.getYMin() + + topLayer = layer.getTop() + if self.gaugeConf.isHorizontal(topLayer): + coronaX, width = self.toRoutingGauge( coronaX, coronaX, layer.getBottom() ) + coronaY, height = self.toRoutingGauge( coronaY, coronaY, topLayer ) + else: + coronaX, width = self.toRoutingGauge( coronaX, coronaX, topLayer ) + coronaY, height = self.toRoutingGauge( coronaY, coronaY, layer.getBottom() ) + + if not (flags & OnHorizontalPitch): + trace( 550, '\tNot on horizontal routing pitch, Y on lambda only.\n' ) + coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) + if not (flags & OnVerticalPitch ): + trace( 550, '\tNot on vertical routing pitch, X on lambda only.\n' ) + coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) + + contacts = [] + xContact = coronaX - viaPitch * (array[0]-1)//2 + yContact = coronaY - viaPitch * (array[1]-1)//2 + contactSize = layer.getMinimalSize() + + trace( 550, '\txContact:%sl yContact:%sl\n' % (DbU.toLambda(xContact),DbU.toLambda(yContact)) ) + + for i in range(array[0]): + for j in range(array[1]): + c = Contact.create( coronaNet + , layer + , xContact + i*viaPitch + , yContact + j*viaPitch + , contactSize + , contactSize + ) + trace( 550, '\t+ %s\n' % str(c) ) + contacts.append( c ) + + trace( 550, '-' ) + return contacts + + + def coronaPin ( self, chipNet, count, direction, layer, chipX, chipY, width, height ): + trace( 550, ',+', '\tChipConf.coronaPin\n' ) + + coronaAb = self.getInstanceAb( self.icorona ) + coronaNet = self.getCoronaNet( chipNet ) + if not coronaNet: return None + + coronaX = chipX - coronaAb.getXMin() + coronaY = chipY - coronaAb.getYMin() + + trace( 550, '\t| chipNet: %s (%d) %s\n' % (chipNet, count, layer) ) + trace( 550, '\t| Real\n' ) + trace( 550, '\t| center: %s %s\n' % (DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) + trace( 550, '\t| WxH: %s %s\n' % (DbU.getValueString(width ), DbU.getValueString(height )) ) + + topLayer = layer.getTop() + if self.gaugeConf.isHorizontal(topLayer): + coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, layer.getBottom() ) + coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, topLayer ) + else: + coronaX, width = self.toRoutingGauge( coronaX - width //2, coronaX + width //2, topLayer ) + coronaY, height = self.toRoutingGauge( coronaY - height//2, coronaY + height//2, layer.getBottom() ) + + if direction == Pin.Direction.NORTH or direction == Pin.Direction.SOUTH: + trace( 550, '\tEast/West not on horizontal routing pitch, Y on lambda only.\n' ) + coronaY = self.toSymbolic( chipY - coronaAb.getYMin(), Superior ) + if direction == Pin.Direction.EAST or direction == Pin.Direction.WEST: + trace( 550, '\tNorth/South not on vertical routing pitch, X on lambda only.\n' ) + coronaX = self.toSymbolic( chipX - coronaAb.getXMin(), Superior ) + + trace( 550, '\t| On Grid\n' ) + trace( 550, '\t| X axis: %s or %s\n' % (DbU.toLambda(coronaY) , DbU.getValueString(coronaY)) ) + trace( 550, '\t| Y axis: %s or %s\n' % (DbU.toLambda(coronaX) , DbU.getValueString(coronaX)) ) + trace( 550, '\t| center: %s %s\n' % (DbU.getValueString(coronaX), DbU.getValueString(coronaY)) ) + trace( 550, '\t| WxH: %s %s\n' % (DbU.getValueString(width ), DbU.getValueString(height )) ) + + c = Pin.create( coronaNet + , '%s.%d' % (coronaNet.getName(),count) + , direction + , Pin.PlacementStatus.FIXED + , layer + , coronaX + , coronaY + , width + , height + ) + + trace( 550, '\t| %s\n' % str(c) ) + trace( 550, '-' ) + return c + + + def checkPads ( self ): + + def contains ( padList, side, padInstance ): + for i in range(len(padList)): + if padList[i][1] == padInstance.getName(): + if (padInstance.getMasterCell().getAbutmentBox().getHeight() != self.gaugeConf.getIoPadHeight()): + raise ErrorMessage( 1, 'The pad [%d] %s (%s) on %s side is not an instance of a pad cell.' + % (i,padInstance.getName(),padInstance.getMasterCell().getName(),side) ) + padList[i][1] = padInstance + return True + return False + + def checkNotFounds ( padList, side ): + for i in range(len(padList)): + if not isinstance(padList[i][1],Instance): + print( ErrorMessage( 1, 'The pad [{}] ({}) of list %s do not exists in netlist (skipped).' \ + .format(i,padList[i][1],side) )) + return + + + af = CRL.AllianceFramework.get() + cellPads = [] + for instance in self.cell.getInstances(): + if contains(self.southPads,'south',instance): continue + if contains(self.northPads,'north',instance): continue + if contains(self.eastPads ,'east' ,instance): continue + if contains(self.westPads ,'west' ,instance): continue + if (instance.getMasterCell().getAbutmentBox().getHeight() == self.gaugeConf.getIoPadHeight()): + raise ErrorMessage( 1, 'Pad "%s" is not on any side (N/S/E/W).' % instance.getName() ) + self.validated = False + else: + self.coronas.append( instance ) + + checkNotFounds( self.southPads, 'south' ) + checkNotFounds( self.northPads, 'north' ) + checkNotFounds( self.eastPads , 'east' ) + checkNotFounds( self.westPads , 'west' ) + + if len(self.coronas) > 1: + message = [ 'Chip "%s" have more than one corona:' % self.cell.getName() ] + for i in range(len(self.coronas)): + message.append( '%4d: %s' % (i,self.coronas[i].getName()) ) + raise ErrorMessage( 1, message ) + self.validated = False + + if len(self.coronas) < 1: + raise ErrorMessage( 1, 'Chip "%s" doesn\'t seems to have a corona.' % self.cell.getName() ) + self.validated = False + else: + for instance in self.corona.getInstances(): + self.cores.append( instance ) + + if len(self.cores) > 1: + message = [ 'Chip "%s" have more than one core:' % self.cell.getName() ] + for i in range(len(self.cores)): + message.append( '%4d: %s' % (i,self.cores[i].getName()) ) + raise ErrorMessage( 1, message ) + self.validated = False + + if len(self.cores) < 1: + raise ErrorMessage( 1, 'Chip "%s" doesn\'t seems to have a core.' % self.cell.getName() ) + self.validated = False + + return + + + def findPowerAndClockNets ( self ): + if self.icore: + for plug in self.icore.getPlugs(): + masterNet = plug.getMasterNet() + netType = masterNet.getType() + if netType != Net.Type.POWER \ + and netType != Net.Type.GROUND \ + and netType != Net.Type.CLOCK: + continue + + net = plug.getNet() + if not net: + net = self.corona.getNet( masterNet.getName() ) + if not net: + raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Missing global net "%s" at corona level.' + % masterNet.getName() ) + self._validated = False + continue + + if netType == Net.Type.GROUND: + if self.coronaVss and self.coronaVss != net: + raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Multiple ground nets "%s" and "%s" at corona level.' + % (self.coronaVss.getName(), net.getName()) ) + self._validated = False + continue + else: + self.coronaVss = net + + if netType == Net.Type.POWER: + if self.coronaVdd and self.coronaVdd != net: + raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Multiple power nets "%s" and "%s" at corona level.' + % (self.coronaVdd.getName(), net.getName()) ) + self._validated = False + continue + else: + self.coronaVdd = net + + if netType == Net.Type.CLOCK: + if self.coronaCk and self.coronaCk != net: + raise ErrorMessage( 1, 'ChipConf.findPowerAndClockNets(): Multiple clock nets "%s" and "%s" at corona level.' + % (self.coronaCk.getName(), net.getName()) ) + self._validated = False + continue + else: + self.coronaCk = net + + for net in self.corona.getNets(): + if net.getType() == Net.Type.BLOCKAGE: + self.blockageNet = net + self.blockageName = net.getName() + + if not self.blockageNet: + self.blockageNet = Net.create( self.corona, self.blockageName ) + self.blockageNet.setType( Net.Type.BLOCKAGE ) + + return + + def checkChipSize ( self ): + #if self._coreSize.isEmpty(): return + # + #minWidth = self._coreSize.getWidth () + self._minCorona + 2*self._padHeight + #minHeight = self._coreSize.getHeight() + self._minCorona + 2*self._padHeight + # + #if self._chipSize.getWidth() < minWidth: + # raise ErrorMessage( 1, 'Core is too wide to fit into the chip. Needs: %d, but has %d' \ + # % ( DbU.toLambda(minWidth), DbU.toLambda(self._chipSize.getWidth()) ) ) + # self._validated = False + # + #if self._chipSize.getHeight() < minHeight: + # raise ErrorMessage( 1, 'Core is too wide to fit into the chip. Needs: %d, but has %d' \ + # % ( DbU.toLambda(minHeight), DbU.toLambda(self._chipSize.getHeight()) ) ) + # self._validated = False + return + + def checkCorona ( self ): + trace( 550, ',+', 'Configuration.checkCorona()\n' ) + netPads = {} + for plug in self.icorona.getPlugs(): + padNet = plug.getNet() + coronaNet = plug.getMasterNet() + if not padNet and coronaNet.isGlobal(): + padNet = self.cell.getNet( coronaNet.getName() ) + + if padNet: + if not padNet in netPads: + trace( 550, '\t%20s <-> %-20s\n' % (padNet.getName(),coronaNet.getName()) ) + netPads[ padNet ] = coronaNet + else: + raise ErrorMessage( 1, 'ChipConf.checkCorona(): Corona nets "%s" and "%s" connected to the same pad net "%s".' \ + % (coronaNet.getName(),netPads[padNet].getName(),padNet.getName()) ) + self._validated = False + + trace( 550, '-' ) + return + + + def computeChipSize ( self ): + + def getSideLength ( pads ): + sideLength = self.gaugeConf.getIoPadHeight() * 2 + for pad in pads: sideLength += pad.getMasterCell().getAbutmentBox().getWidth() + return sideLength + + + if not self.chipSize.isEmpty(): return + + southPadsLength = getSideLength( self.southPads ) + northPadsLength = getSideLength( self.northPads ) + eastPadsLength = getSideLength( self.eastPads ) + westPadsLength = getSideLength( self.westPads ) + + horizontalPads = max( len(self.southPads), len(self.northPads) ) + verticalPads = max( len(self.eastPads ), len(self.westPads ) ) + self.chipSize = Box( 0 + , 0 + , max( southPadsLength, northPadsLength ) + , max( westPadsLength, eastPadsLength ) + ) + return + + + def setupCorona ( self, gapX1, gapY1, gapX2, gapY2 ): + ab = self.cell.getAbutmentBox() + ab.inflate ( -gapX1, -gapY1, -gapX2, -gapY2 ) + ab.inflate ( - self.getIoPadHeight() ) + ab.translate( - self.getIoPadHeight(), - self.getIoPadHeight()) + ab = self.toSymbolic( ab, Inwards ) + + self. corona.setAbutmentBox( Box( 0, 0, ab.getWidth(), ab.getHeight() ) ) + self.icorona.setTransformation( + Transformation( self.toSymbolic( self.getIoPadHeight() + ab.getXMin(), Superior ) + , self.toSymbolic( self.getIoPadHeight() + ab.getYMin(), Superior ) + , Transformation.Orientation.ID ) ) + self.icorona.setPlacementStatus( Instance.PlacementStatus.FIXED ) + return + + + def setupCore ( self, gapX1, gapY1, gapX2, gapY2 ): + ab = self.getInstanceAb( self.icorona ) + if ab.isEmpty(): + raise ErrorMessage( 1, 'ChipConf.setupCore(): Attempt to setup core *before* corona.' ) + return + + ab.inflate( -gapX1, -gapY1, -gapX2, -gapY2 ) + ab = self.toSymbolic( ab, Inwards ) + + trace( 550, '\tChipConf.setupCore(): Abutment box:%s\n' % str(ab) ) + + self.core.setAbutmentBox( Box( 0, 0, ab.getWidth(), ab.getHeight() ) ) + self.icore.setTransformation( + Transformation( ChipConf.toSymbolic(ab.getXMin(),Inferior) - self.icorona.getTransformation().getTx() + , ChipConf.toSymbolic(ab.getYMin(),Inferior) - self.icorona.getTransformation().getTy() + , Transformation.Orientation.ID ) ) + self.icore.setPlacementStatus( Instance.PlacementStatus.FIXED ) + return + + + @property + def cellGauge ( self ): return self.gaugeConf.cellGauge + + @property + def routingGauge ( self ): return self.gaugeConf.routingGauge + + @property + def verticalDepth ( self ): return self.gaugeConf.verticalDepth + + @property + def horizontalDepth ( self ): return self.gaugeConf.horizontalDepth + + def getSliceHeight ( self ): return self.gaugeConf.getSliceHeight() + def getSliceStep ( self ): return self.gaugeConf.getSliceStep() + def getIoPadHeight ( self ): return self.gaugeConf.getIoPadHeight() + def getIoPadStep ( self ): return self.gaugeConf.getIoPadStep() + def getIoPadPitch ( self ): return self.gaugeConf.getIoPadPitch() + def getIoPadGauge ( self ): return self.gaugeConf.getIoPadGauge() + def getHRoutingGauge ( self ): return self.gaugeConf.getHRoutingGauge() + def getVRoutingGauge ( self ): return self.gaugeConf.getVRoutingGauge() + + def rpByOccurrence ( self, occurrence, net ): + return self.gaugeConf._rpByOccurrence ( occurrence, net ) + + def rpByPlugName ( self, instance, plugName, net ): + return self.gaugeConf._rpByPlugName ( instance, plugName, net ) + + def rpAccess ( self, rp, flags=0 ): + return self.gaugeConf._rpAccess( rp, flags ) + + def rpAccessByOccurrence ( self, occurrence, net, flags=0 ): + return self.gaugeConf._rpAccessByOccurrence ( occurrence, net, flags ) + + def rpAccessByPlugName ( self, instance, plugName, net, flags=0 ): + return self.gaugeConf._rpAccessByPlugName( instance, plugName, net, flags ) + + def createContact ( self, net, x, y, flags=0 ): + return self.gaugeConf._createContact( net, x, y, flags ) + + def createHorizontal ( self, source, target, y, flags=0 ): + return self.gaugeConf._createHorizontal( source, target, y, flags ) + + def createVertical ( self, source, target, x, flags=0 ): + return self.gaugeConf._createVertical( source, target, x, flags ) + + def getNearestHorizontalTrack ( self, bb, y, flags ): + return self.gaugeConf._getNearestHorizontalTrack ( bb, y, flags ) + + def getNearestVerticalTrack ( self, bb, x, flags ): + return self.gaugeConf._getNearestVerticalTrack( bb, x, flags ) + + def setStackPosition ( self, topContact, x, y ): + self.gaugeConf._setStackPosition( topContact, x, y ) + + +def loadConfiguration ( cell, viewer=None ): + sys.path.append( os.getcwd() ) + + try: + confFile = 'coriolis2/ioring.py' + if not os.path.isfile(confFile): + raise ErrorMessage( 1, 'ChipPlugin, configuration file "%s" is missing.' % confFile ) + else: + if not os.path.isfile('coriolis2/__init__.py'): + raise ErrorMessage( 1, 'ChipPlugin, configuration directory "./coriolis2/" is missing "__init__.py".' ) + + from coriolis2.ioring import chip + except Exception as e: + catch( e ) + + return ChipConf( chip, cell, viewer ) diff --git a/cumulus/src/plugins/chip/padscorona.py b/deprecated/cumulus/src/plugins/chip/padscorona.py similarity index 100% rename from cumulus/src/plugins/chip/padscorona.py rename to deprecated/cumulus/src/plugins/chip/padscorona.py diff --git a/cumulus/src/plugins/chipplace.py b/deprecated/cumulus/src/plugins/chipplace.py similarity index 100% rename from cumulus/src/plugins/chipplace.py rename to deprecated/cumulus/src/plugins/chipplace.py diff --git a/cumulus/src/plugins/chiproute.py b/deprecated/cumulus/src/plugins/chiproute.py similarity index 100% rename from cumulus/src/plugins/chiproute.py rename to deprecated/cumulus/src/plugins/chiproute.py diff --git a/cumulus/src/plugins/clocktree.py b/deprecated/cumulus/src/plugins/clocktree.py similarity index 100% rename from cumulus/src/plugins/clocktree.py rename to deprecated/cumulus/src/plugins/clocktree.py diff --git a/deprecated/cumulus/src/plugins/core2chip/__init__.py b/deprecated/cumulus/src/plugins/core2chip/__init__.py new file mode 100644 index 00000000..e69de29b diff --git a/deprecated/cumulus/src/plugins/core2chip/cmos.py b/deprecated/cumulus/src/plugins/core2chip/cmos.py new file mode 100644 index 00000000..847dc379 --- /dev/null +++ b/deprecated/cumulus/src/plugins/core2chip/cmos.py @@ -0,0 +1,155 @@ + +# -*- coding: utf-8 -*- +# +# This file is part of the Coriolis Software. +# Copyright (c) Sorbonne Université 2019-2021, All Rights Reserved +# +# +-----------------------------------------------------------------+ +# | C O R I O L I S | +# | C u m u l u s - P y t h o n T o o l s | +# | | +# | Author : Jean-Paul CHAPUT | +# | E-mail : Jean-Paul.Chaput@lip6.fr | +# | =============================================================== | +# | Python : "./plugins/core2chip/cmos.py" | +# +-----------------------------------------------------------------+ + +import sys +import re +from Hurricane import DbU +from Hurricane import DataBase +from Hurricane import UpdateSession +from Hurricane import Breakpoint +from Hurricane import Transformation +from Hurricane import Instance +from Hurricane import Net +import Viewer +from CRL import Catalog +from CRL import AllianceFramework +from helpers.io import ErrorMessage +from plugins.core2chip.core2chip import IoPad +from plugins.core2chip.core2chip import CoreToChip + + +class cmos ( CoreToChip ): + + def __init__ ( self, core ): + CoreToChip.__init__ ( self, core ) + self.ringNetNames = [ 'vsse', 'vssi', 'vdde', 'vddi', ('cki', 'ck') ] + self.ioPadInfos = { IoPad.IN : CoreToChip.IoPadInfo( 'pi_px' , 'pad', ['t',] ) + , IoPad.OUT : CoreToChip.IoPadInfo( 'po_px' , 'pad', ['i',] ) + , IoPad.TRI_OUT : CoreToChip.IoPadInfo( 'pot_px' , 'pad', ['i', 'b' ] ) + , IoPad.BIDIR : CoreToChip.IoPadInfo( 'piot_px', 'pad', ['i', 't', 'b' ] ) + } + self._getPadLib() + return + + def _getPadLib ( self ): + self.padLib = AllianceFramework.get().getLibrary( "pxlib" ) + + if not self.padLib: + message = [ 'CoreToChip.cmos._getPadLib(): Unable to find Alliance "pxlib" library' ] + raise ErrorMessage( 1, message ) + + return + + def getNetType ( self, netName ): + if netName.startswith('vss'): return Net.Type.GROUND + if netName.startswith('vdd'): return Net.Type.POWER + if netName in ('cki', 'ck'): return Net.Type.CLOCK + return Net.Type.LOGICAL + + def isGlobal ( self, netName ): + if netName in self.ringNetNames: return True + return False + + def getCell ( self, masterCellName ): + #cell = self.padLib.getCell( masterCellName ) + cell = AllianceFramework.get().getCell( masterCellName, Catalog.State.Views ) + if not cell: + raise ErrorMessage( 1, 'cmos.getCell(): I/O pad library "%s" does not contain cell named "%s"' \ + % (self.padLib.getName(),masterCellName) ) + return cell + + def _buildGroundPads ( self, ioNet ): + ioNet.buildNets() + vssi = self.chip.getNet( 'vssi' ) + vssi.setExternal( True ) + vssi.setGlobal ( True ) + vssi.setType ( Net.Type.GROUND ) + vssi.merge( ioNet.chipIntNet ) + ioNet.chipIntNet = vssi + + vsse = self.chip.getNet( 'vsse' ) + vsse.setExternal( True ) + vsse.setGlobal ( True ) + vsse.setType ( Net.Type.GROUND ) + vsse.merge( ioNet.chipExtNet ) + ioNet.chipExtNet = vsse + + pads = [] + pads.append( Instance.create( self.chip + , 'p_' + ioNet.padInstanceName + 'ick_%d' % self.groundPadCount + , self.getCell('pvssick_px') ) ) + pads.append( Instance.create( self.chip + , 'p_' + ioNet.padInstanceName + 'eck_%d' % self.groundPadCount + , self.getCell('pvsseck_px') ) ) + + CoreToChip._connect( pads[0], ioNet.chipIntNet, 'vssi' ) + CoreToChip._connect( pads[1], ioNet.chipExtNet, 'vsse' ) + + for pad in pads: self._connectRing( pad ) + self.groundPadCount += 1 + self.chipPads += pads + return + + def _buildPowerPads ( self, ioNet ): + ioNet.buildNets() + vddi = self.chip.getNet( 'vddi' ) + vddi.setExternal( True ) + vddi.setGlobal ( True ) + vddi.setType ( Net.Type.POWER ) + vddi.merge( ioNet.chipIntNet ) + ioNet.chipIntNet = vddi + + vdde = self.chip.getNet( 'vdde' ) + vdde.setExternal( True ) + vdde.setGlobal ( True ) + vdde.setType ( Net.Type.POWER ) + vdde.merge( ioNet.chipExtNet ) + ioNet.chipExtNet = vdde + + pads = [ ] + pads.append( Instance.create( self.chip + , 'p_' + ioNet.padInstanceName + 'ick_%d' % self.powerPadCount + , self.getCell('pvddick_px') ) ) + pads.append( Instance.create( self.chip + , 'p_' + ioNet.padInstanceName + 'eck_%d' % self.powerPadCount + , self.getCell('pvddeck_px') ) ) + + CoreToChip._connect( pads[0], ioNet.chipIntNet, 'vddi' ) + CoreToChip._connect( pads[1], ioNet.chipExtNet, 'vdde' ) + + for pad in pads: self._connectRing( pad ) + self.powerPadCount += 1 + self.chipPads += pads + return + + def _buildClockPads ( self, ioNet ): + ioNet.buildNets() + pads = [ ] + pads.append( Instance.create( self.chip + , 'p_' + ioNet.padInstanceName + '_%d' % self.clockPadCount + , self.getCell('pck_px') ) ) + + CoreToChip._connect( pads[0], ioNet.chipExtNet, 'pad' ) + + for pad in pads: self._connectRing( pad ) + self.clockPadCount += 1 + self.chipPads += pads + + p = re.compile( r'pv[ds]{2}[ei]ck_px' ) + for pad in self.chipPads: + if p.match( pad.getMasterCell().getName() ): + CoreToChip._connect( pad, ioNet.chipIntNet, 'cko' ) + return diff --git a/deprecated/cumulus/src/plugins/core2chip/core2chip.py b/deprecated/cumulus/src/plugins/core2chip/core2chip.py new file mode 100644 index 00000000..267a2abc --- /dev/null +++ b/deprecated/cumulus/src/plugins/core2chip/core2chip.py @@ -0,0 +1,451 @@ + +# -*- coding: utf-8 -*- +# +# This file is part of the Coriolis Software. +# Copyright (c) Sorbonne Université 2019-2018, All Rights Reserved +# +# +-----------------------------------------------------------------+ +# | C O R I O L I S | +# | C u m u l u s - P y t h o n T o o l s | +# | | +# | Author : Jean-Paul CHAPUT | +# | E-mail : Jean-Paul.Chaput@lip6.fr | +# | =============================================================== | +# | Python : "./plugins/core2chip/core2chip.py" | +# +-----------------------------------------------------------------+ + +import re +from Hurricane import UpdateSession +from Hurricane import Net +from Hurricane import Instance +from CRL import Catalog +from CRL import AllianceFramework +from helpers import netDirectionToStr +from helpers.io import ErrorMessage +import plugins.chip + + +# ------------------------------------------------------------------- +# Class : "IoNet". + + +class IoNet ( object ): + + IsElem = 0x0001 + IsEnable = 0x0002 + DoExtNet = 0x0008 + reVHDLVector = re.compile( r'(?P[^(]*)\((?P[\d]+)\)$' ) + + def __init__ ( self, coreToChip, coreNet ): + self.coreToChip = coreToChip + self._flags = 0 + self._chipExtNetName = None # In the case of bidir pad, force external net name. + self.coreNet = coreNet + self.coronaNet = None # Corona net going from core to corona. + self.chipIntNet = None # Chip net going from corona to I/O pad. + self.chipExtNet = None # Chip net going from I/O pad to the outside world. + + m = IoNet.reVHDLVector.match( self.coreNet.getName() ) + if m: + self._flags |= IoNet.IsElem + self._name = m.group('name') + self._index = m.group('index') + else: + self._name = self.coreNet.getName() + self._index = 0 + + self._type = self.coreToChip.getNetType( self._name ) + return + + def __repr__ ( self ): + s = 'getDeviceDescriptor( deviceName ); DeviceDescriptor::Layouts ddLayouts = dd->getLayouts(); - for ( auto ddLayout : ddLayouts ) _layouts.insert( ddLayout ); + for ( auto ddLayout : ddLayouts ) + _layouts.insert( ddLayout ); Choices layouts; for ( auto layout : _layouts ) layouts << getString(layout.first); diff --git a/hurricane/src/utilities/Path.cpp b/hurricane/src/utilities/Path.cpp index 1c701a5b..805c2e78 100644 --- a/hurricane/src/utilities/Path.cpp +++ b/hurricane/src/utilities/Path.cpp @@ -181,6 +181,21 @@ namespace Utilities { } return _pathcache; } + + + string Path::toPyModPath () const + { + string pyPath; + for ( size_t i=0 ; i<_elements.size() ; ++i ) { + if (i) pyPath += "."; + if (i+1 == _elements.size()) { + if (ext() == "py") + pyPath += _elements[i].substr( 0, _elements[i].size()-3 ); + } else + pyPath += _elements[i]; + } + return pyPath; + } Path Path::subpath ( size_t begin, size_t end ) const diff --git a/hurricane/src/utilities/hurricane/utilities/Path.h b/hurricane/src/utilities/hurricane/utilities/Path.h index 7ea8676b..3e1767fa 100644 --- a/hurricane/src/utilities/hurricane/utilities/Path.h +++ b/hurricane/src/utilities/hurricane/utilities/Path.h @@ -83,44 +83,45 @@ namespace Utilities { struct stat _stat; }; public: - static Path cwd (); - public: - inline Path ( const std::string& path="" ); - inline Path ( const char* ); - inline Path ( const Path& ); - inline bool absolute () const; - inline bool extension () const; - bool exists () const; - bool access ( unsigned int mode ) const; - unsigned int mode () const; - Stat stat () const; - inline bool isfile () const; - inline bool isdir () const; - inline bool islink () const; - inline bool empty () const; - inline size_t size () const; - inline Path head () const; - inline Path tail () const; - Path basename ( const std::string& ext="" ) const; - Path dirname () const; - Path stem () const; - Path subpath ( size_t begin, size_t end ) const; - Path join ( const Path& tail ) const; - std::string ext () const; - bool mkdir ( unsigned int mode=s_irwxu|s_irwxg|s_irwxo ) const; - std::vector listdir () const; - const std::string& toString () const; - inline const char* c_str () const; - Path& operator= ( const Path& ); - Path& operator/= ( const Path& ); - inline Path& operator/= ( const char* ); - inline Path& operator/= ( const std::string& ); - private: - static int _toUnistd ( unsigned int mode ); - static int _toMode_T ( unsigned int mode ); - static void _split ( const std::string&, std::vector&, unsigned int& ); - void _normalize (); - void _normalize ( const std::string& ); + static Path cwd (); + public: + inline Path ( const std::string& path="" ); + inline Path ( const char* ); + inline Path ( const Path& ); + inline bool absolute () const; + inline bool extension () const; + bool exists () const; + bool access ( unsigned int mode ) const; + unsigned int mode () const; + Stat stat () const; + inline bool isfile () const; + inline bool isdir () const; + inline bool islink () const; + inline bool empty () const; + inline size_t size () const; + inline Path head () const; + inline Path tail () const; + Path basename ( const std::string& ext="" ) const; + Path dirname () const; + Path stem () const; + Path subpath ( size_t begin, size_t end ) const; + Path join ( const Path& tail ) const; + std::string ext () const; + bool mkdir ( unsigned int mode=s_irwxu|s_irwxg|s_irwxo ) const; + std::vector listdir () const; + const std::string& toString () const; + std::string toPyModPath () const; + inline const char* c_str () const; + Path& operator= ( const Path& ); + Path& operator/= ( const Path& ); + inline Path& operator/= ( const char* ); + inline Path& operator/= ( const std::string& ); + private: + static int _toUnistd ( unsigned int mode ); + static int _toMode_T ( unsigned int mode ); + static void _split ( const std::string&, std::vector&, unsigned int& ); + void _normalize (); + void _normalize ( const std::string& ); private: mutable unsigned int _flags; std::vector _elements; diff --git a/hurricane/src/viewer/hurricane/viewer/Script.h b/hurricane/src/viewer/hurricane/viewer/Script.h index da8413c0..157be318 100644 --- a/hurricane/src/viewer/hurricane/viewer/Script.h +++ b/hurricane/src/viewer/hurricane/viewer/Script.h @@ -103,7 +103,7 @@ namespace Isobar { } inline PyObject* Script::_importHurricane ( unsigned int flags ) - { return _hurricaneModule = _importModule("Hurricane",flags); } + { return _hurricaneModule = _importModule("coriolis.Hurricane",flags); } inline PyObject* Script::_importUser ( unsigned int flags ) { return _userModule = _importModule(_moduleName,flags); } diff --git a/karakaze/python/analogdesign.py b/karakaze/python/analogdesign.py index 6b295c1f..82a4210e 100644 --- a/karakaze/python/analogdesign.py +++ b/karakaze/python/analogdesign.py @@ -1,7 +1,7 @@ # -*- Mode:Python -*- # # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2016-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2016-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -14,30 +14,27 @@ # +-----------------------------------------------------------------+ -from Hurricane import * -from Hurricane import DataBase -import CRL -import helpers -from helpers import isderived, trace -from helpers.io import ErrorMessage as Error -from Analog import Device, TransistorFamily, Transistor, \ - CommonDrain, CommonGatePair, CommonSourcePair, \ - CrossCoupledPair, DifferentialPair, LevelShifter, \ - SimpleCurrentMirror, CapacitorFamily, \ - MultiCapacitor, CapacitorFamily, MultiCapacitor, \ - ResistorFamily, Resistor, LayoutGenerator, \ - Matrix -from Bora import ParameterRange, StepParameterRange, \ - MatrixParameterRange, SlicingNode, HSlicingNode, \ - VSlicingNode, DSlicingNode, RHSlicingNode, \ - RVSlicingNode -import karakaze.oceane -import Anabatic -import Katana -import Bora +from ..Hurricane import * +from ..Hurricane import DataBase +from .. import CRL +from ..helpers import isderived, setTraceLevel, trace +from ..helpers.io import ErrorMessage as Error +from ..Analog import Device, TransistorFamily, Transistor, \ + CommonDrain, CommonGatePair, CommonSourcePair, \ + CrossCoupledPair, DifferentialPair, LevelShifter, \ + SimpleCurrentMirror, CapacitorFamily, \ + MultiCapacitor, CapacitorFamily, MultiCapacitor, \ + ResistorFamily, Resistor, LayoutGenerator, \ + Matrix +from ..Bora import ParameterRange, StepParameterRange, \ + MatrixParameterRange, SlicingNode, HSlicingNode, \ + VSlicingNode, DSlicingNode, RHSlicingNode, \ + RVSlicingNode +from . import oceane +from .. import Anabatic, Katana, Bora -#helpers.setTraceLevel( 100 ) +#setTraceLevel( 100 ) NMOS = Transistor.NMOS @@ -103,7 +100,7 @@ class AnalogDesign ( object ): self.toleranceRatioW = 0 self.toleranceBandH = 0 self.toleranceBandW = 0 - self.parameters = karakaze.oceane.Parameters() + self.parameters = oceane.Parameters() return def setCellName ( self, name ): diff --git a/katana/python/CMakeLists.txt b/katana/python/CMakeLists.txt index 9e6c90dc..ac65c34a 100644 --- a/katana/python/CMakeLists.txt +++ b/katana/python/CMakeLists.txt @@ -1,2 +1,2 @@ - install ( FILES katanaInit.py DESTINATION ${Python_CORIOLISLIB}/katana ) + install ( FILES initHook.py DESTINATION ${Python_CORIOLISLIB}/katana ) diff --git a/katana/python/katanaInit.py b/katana/python/initHook.py similarity index 60% rename from katana/python/katanaInit.py rename to katana/python/initHook.py index eec3dd3d..b1f79225 100644 --- a/katana/python/katanaInit.py +++ b/katana/python/initHook.py @@ -3,12 +3,10 @@ try: import sys import os.path - import helpers.io - from helpers.io import ErrorMessage - from helpers.io import WarningMessage - import Viewer + from coriolis.helpers.io import ErrorMessage, WarningMessage, catch + from coriolis import Viewer except Exception as e: - helpers.io.catch( e ) + catch( e ) sys.exit( 1 ) @@ -17,12 +15,13 @@ def katanaHook ( **kw ): if 'katana' in kw: katana = kw['katana'] else: - print( ErrorMessage( 3, 'katanaHook(): Must be run from a KatanaEngine.' )) + print( ErrorMessage( 3, 'katana.initHook(): Must be run from a KatanaEngine.' )) return try: + print( 'KATANA INIT' ) userInit = os.path.join( os.getcwd(), 'coriolis2/katana.py' ) if (os.path.exists(userInit)): exec( open(userInit).read() ) except Exception as e: - helpers.io.catch( e ) + catch( e ) return diff --git a/katana/src/KatanaEngine.cpp b/katana/src/KatanaEngine.cpp index 3cfb2ae6..871990f1 100644 --- a/katana/src/KatanaEngine.cpp +++ b/katana/src/KatanaEngine.cpp @@ -221,18 +221,18 @@ namespace Katana { void KatanaEngine::_runKatanaInit () { - Utilities::Path pythonSitePackages = System::getPath("pythonSitePackages"); - Utilities::Path systemConfDir = pythonSitePackages / "katana"; - Utilities::Path systemConfFile = systemConfDir / "katanaInit.py"; + Utilities::Path pythonSitePackages = System::getPath( "pythonSitePackages" ); + Utilities::Path confFile = "coriolis/katana/initHook.py"; + Utilities::Path systemConfFile = pythonSitePackages / confFile; if (systemConfFile.exists()) { - Isobar::Script::addPath( systemConfDir.toString() ); + //Isobar::Script::addPath( systemConfDir.toString() ); - dbo_ptr script = Isobar::Script::create( systemConfFile.stem().toString() ); + dbo_ptr script = Isobar::Script::create( confFile.toPyModPath() ); script->addKwArgument( "katana" , (PyObject*)PyKatanaEngine_Link(this) ); script->runFunction ( "katanaHook", getCell() ); - Isobar::Script::removePath( systemConfDir.toString() ); + //Isobar::Script::removePath( systemConfDir.toString() ); } else { cerr << Warning( "Katana system configuration file:\n <%s> not found." , systemConfFile.toString().c_str() ) << endl; diff --git a/oroshi/python/__init__.py b/oroshi/python/__init__.py index 0178f575..506c19f6 100644 --- a/oroshi/python/__init__.py +++ b/oroshi/python/__init__.py @@ -1,11 +1,10 @@ -from Hurricane import DbU -from Hurricane import DataBase -import oroshi.dtr +from ..Hurricane import DbU, DataBase +from . import dtr if not DataBase.getDB(): DataBase.create() -rules = None +rules = dtr.Rules() class Flag ( object ): @@ -17,8 +16,8 @@ class Flag ( object ): def getRules (): global rules - if not rules: - rules = oroshi.dtr.Rules( DataBase.getDB().getTechnology() ) + if not rules.isLoaded(): + rules.load( DataBase.getDB().getTechnology() ) return rules @@ -32,6 +31,6 @@ def adjustOnGrid ( unit, mode='upper' ): elif mode == 'lower': return DbU.getOnPhysicalGrid(unit, DbU.SnapModeInferior) elif mode == 'near' : return DbU.getOnPhysicalGrid(unit, DbU.SnapModeNearest ) else: - print( '[ERROR] oroshi.adjustOnGrid(): "{}" is not a valid mode.'.format(mode) ) - print( ' ("upper", "lower" or "near")' ) - return 0 + print( '[ERROR] oroshi.adjustOnGrid(): "{}" is not a valid mode.'.format(mode) ) + print( ' ("upper", "lower" or "near")' ) + return 0 diff --git a/oroshi/python/capacitormatrix.py b/oroshi/python/capacitormatrix.py index 012d8831..f7368ee5 100644 --- a/oroshi/python/capacitormatrix.py +++ b/oroshi/python/capacitormatrix.py @@ -1,15 +1,14 @@ #!/usr/bin/python import sys -from Hurricane import * -from CRL import * -from math import sqrt, ceil -from helpers.io import ErrorMessage as Error -from helpers import trace -from capacitorunit import CapacitorUnit -import helpers -import oroshi +from math import sqrt, ceil import numpy +from ..Hurricane import * +from ..CRL import * +from ..helpers.io import ErrorMessage as Error +from ..helpers import trace +from .capacitorunit import CapacitorUnit +from . import getRules def toPhY ( l ): return DbU.toPhysical ( l, DbU.UnitPowerMicro ) @@ -21,7 +20,7 @@ def toPhY ( l ): return DbU.toPhysical ( l, DbU.UnitPowerMicro ) class CapacitorStack( CapacitorUnit ): - rules = oroshi.getRules() + rules = getRules() ## This is the class constructor. Basically, the class there are three categories of attributes. There are the ones related to the capacitor caracteristics, its type, dimensions. Also, there are attributes to parametrize the class into matching mode or not and there are other attributes realted to the layout varibales. The class has defaut input values, thus, in this constructor, there are two "sub-constructors" according to the entered input parameters. The class attributes are : diff --git a/oroshi/python/capacitorrouted.py b/oroshi/python/capacitorrouted.py index c749af8c..b83d893e 100644 --- a/oroshi/python/capacitorrouted.py +++ b/oroshi/python/capacitorrouted.py @@ -1,17 +1,14 @@ #!/usr/bin/python import sys -from Hurricane import * -from CRL import * -import helpers -from helpers.io import ErrorMessage as Error -from helpers import trace -import oroshi -from capacitorunit import CapacitorUnit -from capacitormatrix import CapacitorStack -from capacitorvrtracks import VerticalRoutingTracks - - +from ..Hurricane import * +from ..CRL import * +from ..helpers.io import ErrorMessage as Error +from ..helpers import staticInitialization, trace +from . import getRules +from .capacitorunit import CapacitorUnit +from .capacitormatrix import CapacitorStack +from .capacitorvrtracks import VerticalRoutingTracks def toPhY ( l ): return DbU.toPhysical ( l, DbU.UnitPowerMicro ) @@ -21,7 +18,7 @@ def doBreak( level, message ): Breakpoint.stop( level, message ) UpdateSession.open() -helpers.staticInitialization( True ) +staticInitialization( True ) ## Routs two matched capacitors, C1 and C2, drawn in a capacitor matrix. Connections are put in place with reference to a given matching scheme. Elementary capacitor units are connected to horizontal and vertical routing tracks that represent top plates and bottom plates nets of C1 and C2 . Supported types of capacitors are Poly-Poly and Metal-Metal. Technologycal rules are provided by 350 nm AMS CMOS technology with three-four metal layers. Metal layers that are used for routing are placed similarly to horziontal-vertical (HV) symbolic Alliance CAD tool router, where horizontal metal channels are drawn in metal 2 and the vertical ones are in metal 3. Given a matrix of dimensions \f$ R*C \f$, the total number of vertical tracks is \f$ 2C+2 \f$ equivalent to \f$ C+1 \f$ couples, ensuring that every elementary capacitor is positioned between four vertical tracks, two from each side. In fact, every adjacent couple of these tracks represent top plates and bottom plates of C1 or C2 as shown in Figure 1. @@ -31,7 +28,7 @@ helpers.staticInitialization( True ) class RoutMatchedCapacitor( VerticalRoutingTracks ): - rules = oroshi.getRules() + rules = getRules() ## A special method used to customize the class instance to an initial state in which : diff --git a/oroshi/python/capacitorroutedsingle.py b/oroshi/python/capacitorroutedsingle.py index 47370233..56a52be4 100644 --- a/oroshi/python/capacitorroutedsingle.py +++ b/oroshi/python/capacitorroutedsingle.py @@ -2,15 +2,14 @@ import sys import numpy -from Hurricane import * -from CRL import * -from math import sqrt, ceil -import helpers -from helpers.io import ErrorMessage as Error -from helpers import trace -import oroshi -from capacitorunit import CapacitorUnit -from capacitormatrix import CapacitorStack +from math import sqrt, ceil +from ..Hurricane import * +from ..CRL import * +from ..helpers.io import ErrorMessage as Error +from ..helpers import trace +from . import getRules +from .capacitorunit import CapacitorUnit +from .capacitormatrix import CapacitorStack ## Route a compact or a matrix of capacitors by connecting it to routing tracks. @@ -31,7 +30,7 @@ def doBreak( level, message ): class RouteCapacitorSingle ( CapacitorUnit ): - rules = oroshi.getRules() + rules = getRules() ## The constructor computes some of the class attributes and initialises others which # will be computed later inside some of the class methods. diff --git a/oroshi/python/capacitorunit.py b/oroshi/python/capacitorunit.py index 46b25831..50cf370f 100644 --- a/oroshi/python/capacitorunit.py +++ b/oroshi/python/capacitorunit.py @@ -2,14 +2,13 @@ import sys import numpy -from Hurricane import * -from CRL import * -import Constant from math import sqrt, ceil -import helpers -from helpers.io import ErrorMessage as Error -from helpers import trace -import oroshi +from ..Hurricane import * +from ..CRL import * +from .. import Constant +from ..helpers.io import ErrorMessage as Error +from ..helpers import trace +from . import getRules def toDbU ( l ): return DbU.fromPhysical( l, DbU.UnitPowerMicro ) def toPhY ( l ): return DbU.toPhysical ( l, DbU.UnitPowerMicro ) @@ -28,7 +27,7 @@ def doBreak( level, message ): class CapacitorUnit(): - rules = oroshi.getRules() + rules = getRules() ## This is the class constructor. Few of the class attributes final values are computed in this level. Most of attributes are only initialized to zero or empty values. Then, it is computed in dedicated class method. Input parameters are : diff --git a/oroshi/python/capacitorvrtracks.py b/oroshi/python/capacitorvrtracks.py index f5df6440..fc085563 100644 --- a/oroshi/python/capacitorvrtracks.py +++ b/oroshi/python/capacitorvrtracks.py @@ -1,15 +1,14 @@ #!/usr/bin/python import sys -from Hurricane import * -from CRL import * -import helpers -from helpers.io import ErrorMessage as Error -from helpers import trace -import oroshi -from capacitorunit import CapacitorUnit -from capacitormatrix import CapacitorStack -from collections import OrderedDict +from collections import OrderedDict import numpy +from ..Hurricane import * +from ..CRL import * +from ..helpers.io import ErrorMessage as Error +from ..helpers import trace +from . import getRules +from .capacitorunit import CapacitorUnit +from .capacitormatrix import CapacitorStack ## Route two matched capacitors, C1 and C2, drawn in a capacitor matrix. @@ -40,7 +39,7 @@ import numpy class VerticalRoutingTracks ( CapacitorStack ): - rules = oroshi.getRules() + rules = getRules() def __init__( self, capacitorInstance, capacitor, minimizeVRT = False ) : diff --git a/oroshi/python/dtr.py b/oroshi/python/dtr.py index df425b39..d2457c77 100644 --- a/oroshi/python/dtr.py +++ b/oroshi/python/dtr.py @@ -1,9 +1,8 @@ # -*- coding: utf-8 -*- -from Hurricane import DbU -from Hurricane import DataBase -from helpers import trace -from helpers.io import ErrorMessage as Error +from ..Hurricane import DbU, DataBase +from ..helpers import trace +from ..helpers.io import ErrorMessage as Error class Rules ( object ): @@ -112,18 +111,31 @@ class Rules ( object ): , 'minRpolyhSquares' ] - def __init__ ( self, dtr ): + def __init__ ( self ): + """ + Create an empty rule set. The rules must be loaded afterwards by calling + ``Rules.load()``. + """ + trace( 100, '\tRules.__init__()\n' ) + self.dtr = None + + def isLoaded ( self ): + """Tells if the rules have already been loaded.""" + return self.dtr is not None + + def load ( self, dtr ): """ Load the rule set from the technology into the Rules object. - .. note:: The ``dtr`` parameter is just aother name for the currently + .. note:: The ``dtr`` parameter is just another name for the currently used Hurricane::Technology. """ - trace( 100, '\tRules.__init__()\n' ) + trace( 100, '\tRules.load()\n' ) + if self.dtr: + print( Error( 1, 'Rules.load(): Attempt to load rules from DTR a second time (ignored).' )) + return self.dtr = dtr - for rule in Rules.ruleSet: self.addAttr(rule) - return def getRealLayer ( self, stdName ): """ diff --git a/oroshi/python/multicapacitor.py b/oroshi/python/multicapacitor.py index 9b399418..48b0ef06 100644 --- a/oroshi/python/multicapacitor.py +++ b/oroshi/python/multicapacitor.py @@ -1,25 +1,18 @@ # -*- coding: utf-8 -*- -from Hurricane import DataBase -from Hurricane import UpdateSession -from Hurricane import DbU -from Hurricane import Box -from Hurricane import Net -import helpers -import helpers.io -from helpers import trace +from ..Hurricane import DataBase, UpdateSession, DbU, Box, Net +from ..Analog import Device +from ..helpers.io import catch +from ..helpers import setTraceLevel, trace -#helpers.setTraceLevel( 100 ) +#setTraceLevel( 100 ) -import Analog -from Analog import Device -import oroshi -import oroshi.paramsmatrix -from oroshi.capacitorunit import CapacitorUnit -from oroshi.capacitormatrix import CapacitorStack -from oroshi.capacitorvrtracks import VerticalRoutingTracks -from oroshi.capacitorrouted import RoutMatchedCapacitor -from oroshi.capacitorroutedsingle import RouteCapacitorSingle +from . import getRules, paramsmatrix +from .capacitorunit import CapacitorUnit +from .capacitormatrix import CapacitorStack +from .capacitorvrtracks import VerticalRoutingTracks +from .capacitorrouted import RoutMatchedCapacitor +from .capacitorroutedsingle import RouteCapacitorSingle def toMatrixArgs ( matrix ): @@ -41,7 +34,7 @@ def checkCoherency ( device, bbMode ): message = 'CapacitorMatrix.checkCoherency(): device "%s".\n' % device.getName() techno = DataBase.getDB().getTechnology() - rules = oroshi.getRules() + rules = getRules() capacities = device.getParameter( 'capacities' ) if capacities is None: @@ -98,7 +91,7 @@ def layout ( device, bbMode ): trace( 100, ',+', '\tMultiCapacitor.layout() called for "%s".\n' % device.getName()) - paramsMatrix = oroshi.paramsmatrix.ParamsMatrix() + paramsMatrix = paramsmatrix.ParamsMatrix() try: capacities = device.getParameter( 'capacities' ) @@ -167,7 +160,7 @@ def layout ( device, bbMode ): #paramsMatrix.trace() except Exception as e: - helpers.io.catch( e ) + catch( e ) trace( 100, '---' ) diff --git a/oroshi/python/nonunitcapacitor.py b/oroshi/python/nonunitcapacitor.py index 3b993f75..7dedd748 100644 --- a/oroshi/python/nonunitcapacitor.py +++ b/oroshi/python/nonunitcapacitor.py @@ -1,15 +1,13 @@ #!/usr/bin/python import sys -from Hurricane import * -from CRL import * -from math import sqrt, ceil -import helpers -from helpers.io import ErrorMessage as Error -from helpers import trace -import oroshi - -from capacitorunit import CapacitorUnit +from math import sqrt, ceil +from ..Hurricane import * +from ..CRL import * +from ..helpers.io import ErrorMessage as Error +from ..helpers import staticInitialization, trace +from . import getRules +from .capacitorunit import CapacitorUnit def toDbU ( l ): return DbU.fromPhysical( l, DbU.UnitPowerMicro ) def toPhy ( l ): return DbU.toPhysical ( l, DbU.UnitPowerMicro ) @@ -19,7 +17,7 @@ def doBreak( level, message ): Breakpoint.stop( level, message ) UpdateSession.open() -helpers.staticInitialization( True ) +staticInitialization( True ) @@ -27,7 +25,7 @@ helpers.staticInitialization( True ) class NonUnitCapacitor(CapacitorUnit): - rules = oroshi.getRules() + rules = getRules() diff --git a/oroshi/python/paramsmatrix.py b/oroshi/python/paramsmatrix.py index 0ecb2660..dc3816df 100644 --- a/oroshi/python/paramsmatrix.py +++ b/oroshi/python/paramsmatrix.py @@ -1,11 +1,8 @@ # -*- coding: utf-8 -*- -from Hurricane import DataBase -from Hurricane import DbU -from Hurricane import Box -from Hurricane import Net -from helpers.io import ErrorMessage as Error -from helpers import trace +from ..Hurricane import DataBase, DbU, Box, Net +from ..helpers.io import ErrorMessage as Error +from ..helpers import trace # Rows are stacks. diff --git a/oroshi/python/resistor.py b/oroshi/python/resistor.py index c159fec0..ea141968 100644 --- a/oroshi/python/resistor.py +++ b/oroshi/python/resistor.py @@ -1,29 +1,21 @@ # -*- coding: utf-8 -*- -from Hurricane import DataBase -from Hurricane import UpdateSession -from Hurricane import DbU -from Hurricane import Box -from Hurricane import Net -import helpers -import helpers.io -from helpers import trace, l, u, n +from ..Hurricane import DataBase, UpdateSession, DbU, Box, Net +from ..Analog import Device +from ..helpers import trace, l, u, n +from ..helpers.io import catch +from . import getRules, paramsmatrix +from .resistorsnake import Resistor #helpers.setTraceLevel( 100 ) -import Analog -from Analog import Device -import oroshi -import oroshi.paramsmatrix -from oroshi.resistorsnake import Resistor - def checkCoherency ( device, bbMode ): message = 'Resistor.checkCoherency(): device "%s".\n' % device.getName() techno = DataBase.getDB().getTechnology() - rules = oroshi.getRules() + rules = getRules() resistance = device.getParameter( 'R' ) if resistance is None: @@ -37,7 +29,7 @@ def layout ( device, bbMode ): trace( 100, ',+', '\tResistor.layout() called for "%s".\n' % device.getName()) - paramsMatrix = oroshi.paramsmatrix.ParamsMatrix() + paramsMatrix = paramsmatrix.ParamsMatrix() try: resistance = device.getParameter( 'R' ).getValue() @@ -78,7 +70,7 @@ def layout ( device, bbMode ): #paramsMatrix.trace() except Exception as e: - helpers.io.catch( e ) + catch( e ) trace( 100, '---' ) diff --git a/oroshi/python/resistorsnake.py b/oroshi/python/resistorsnake.py index 6ffd22cb..f20fcb56 100644 --- a/oroshi/python/resistorsnake.py +++ b/oroshi/python/resistorsnake.py @@ -1,14 +1,13 @@ #!/usr/bin/python import sys -from Hurricane import * -from CRL import * -import Constant -from math import sqrt, ceil -import helpers -from helpers.io import ErrorMessage as Error -from helpers import trace, u -import oroshi +from math import sqrt, ceil +from ..Hurricane import * +from ..CRL import * +from .. import Constant +from ..helpers.io import ErrorMessage as Error +from ..helpers import trace, u +from . import getRules def doBreak( level, message ): @@ -28,7 +27,7 @@ def isNearNorth ( y, ab ): return ab.getYMax() - y < y - ab.getYMin() class Resistor ( object ): - rules = oroshi.getRules() + rules = getRules() def __init__( self, device, nets, resistorType, resistance = 0, resDim = { "width" : 10, "length" : 0 }, direction = "horizontal", bends = 0, shape = 90 ): diff --git a/oroshi/python/stack.py b/oroshi/python/stack.py index efea3c22..1f83a72b 100644 --- a/oroshi/python/stack.py +++ b/oroshi/python/stack.py @@ -2,26 +2,17 @@ import copy import datetime -from Hurricane import DataBase -from Hurricane import UpdateSession -from Hurricane import DbU -from Hurricane import Box -from Hurricane import Net -from Hurricane import Horizontal -from Hurricane import Vertical -from Hurricane import Contact -from Hurricane import Pad -from Hurricane import NetExternalComponents -from CRL import AllianceFramework -import Constant -import helpers -from helpers.io import ErrorMessage as Error -from helpers import trace -from Analog import Device -import oroshi -import oroshi.dtr +from ..Hurricane import DataBase, UpdateSession, DbU, Box, Net, \ + Horizontal, Vertical, Contact, Pad, \ + NetExternalComponents +from ..CRL import AllianceFramework +from .. import Constant +from ..helpers.io import ErrorMessage as Error +from ..helpers import setTraceLevel, trace +from ..Analog import Device +from . import getRules, rules, dtr, toUnity, adjustOnGrid -#helpers.setTraceLevel( 100 ) +#setTraceLevel( 100 ) def traceMT ( mt ): trace( 100, '+', '\tMeta-Transistor Topological Datas\n' ) @@ -213,13 +204,13 @@ class Bulk ( object ): def doLayout ( self ): - active = oroshi.rules.getRealLayer( 'active' ) - metal1 = oroshi.rules.getRealLayer( 'metal1' ) - metal2 = oroshi.rules.getRealLayer( 'metal2' ) - metal3 = oroshi.rules.getRealLayer( 'metal3' ) - cut0 = oroshi.rules.getRealLayer( 'cut0' ) - cut1 = oroshi.rules.getRealLayer( 'cut1' ) - cut2 = oroshi.rules.getRealLayer( 'cut2' ) + active = rules.getRealLayer( 'active' ) + metal1 = rules.getRealLayer( 'metal1' ) + metal2 = rules.getRealLayer( 'metal2' ) + metal3 = rules.getRealLayer( 'metal3' ) + cut0 = rules.getRealLayer( 'cut0' ) + cut1 = rules.getRealLayer( 'cut1' ) + cut2 = rules.getRealLayer( 'cut2' ) bulkNet = self.stack.bulkNet self.computeContacts() @@ -476,7 +467,7 @@ class Stack ( object ): DrainShared = 0x0400 DrainMerged = 0x0800 - rules = oroshi.getRules() + rules = getRules() def __setattr__ ( self, attribute, value ): @@ -579,8 +570,8 @@ class Stack ( object ): def __init__ ( self, device, NERC, NIRC ): self.dimensioned = False self.device = device - self.w = oroshi.adjustOnGrid(device.getW() // device.getM()) - self.L = oroshi.adjustOnGrid(device.getL()) + self.w = adjustOnGrid(device.getW() // device.getM()) + self.L = adjustOnGrid(device.getL()) self.NDs = device.getExternalDummy() # Number of Dummies at each end of the stack. self.NFs = device.getM() * self.metaTnb() + self.NDs*2 # Total number of Fingers (including dummies). self.NERC = NERC @@ -605,13 +596,13 @@ class Stack ( object ): if bulkType & 0x0008: self.flags |= Stack.WestBulk if self.isNmos(): - self.tImplantLayer = oroshi.rules.getRealLayer( 'nImplant' ) - self.bImplantLayer = oroshi.rules.getRealLayer( 'pImplant' ) + self.tImplantLayer = rules.getRealLayer( 'nImplant' ) + self.bImplantLayer = rules.getRealLayer( 'pImplant' ) self.wellLayer = None else: - self.tImplantLayer = oroshi.rules.getRealLayer( 'pImplant' ) - self.bImplantLayer = oroshi.rules.getRealLayer( 'nImplant' ) - self.wellLayer = oroshi.rules.getRealLayer( 'pWell' ) + self.tImplantLayer = rules.getRealLayer( 'pImplant' ) + self.bImplantLayer = rules.getRealLayer( 'nImplant' ) + self.wellLayer = rules.getRealLayer( 'pWell' ) return @@ -1043,14 +1034,14 @@ class Stack ( object ): if self.flags & Stack.SouthBulk: self.bulks[1] = Bulk( self, southBulkY, westBulkX, eastBulkX, Stack.SouthBulk ) - self.DMCI = oroshi.toUnity( self.sideActiveWidth - - self.L//2 - - self.metal1ToGate - - self.eDiffMetal1Width//2 ) - self.DMCG = oroshi.toUnity( (self.gatePitch - self.L)//2 ) + self.DMCI = toUnity( self.sideActiveWidth + - self.L//2 + - self.metal1ToGate + - self.eDiffMetal1Width//2 ) + self.DMCG = toUnity( (self.gatePitch - self.L)//2 ) self.DMCGT = 0 - self.DGG = oroshi.toUnity( self.gatePitch - self.L ) - self.DGI = oroshi.toUnity( self.sideActiveWidth - self.L//2 ) + self.DGG = toUnity( self.gatePitch - self.L ) + self.DGI = toUnity( self.sideActiveWidth - self.L//2 ) trace( 100, '+' ) trace( 100, '\t +----------------------------------+\n' ) @@ -1133,8 +1124,8 @@ class Stack ( object ): capSpacing = self.minSpacing_metal2 + self.minWidth_metal2//2 capSpacing = max( capSpacing, self.minSpacing_metal3 + self.minWidth_metal3//2 ) - metal2 = oroshi.rules.getRealLayer( 'metal2' ) - metal3 = oroshi.rules.getRealLayer( 'metal3' ) + metal2 = rules.getRealLayer( 'metal2' ) + metal3 = rules.getRealLayer( 'metal3' ) trackNb = 0 if self.topTracks: trackNb = len(self.topTracks) for i in range(trackNb): @@ -1194,7 +1185,7 @@ class Stack ( object ): if not tImplantNet: tImplantNet = Net.create( self.device, 'nImplant' ) tImplantNet.setAutomatic( True ) - active = oroshi.rules.getRealLayer( 'active' ) + active = rules.getRealLayer( 'active' ) width = self.w length = (self.NFs - 1) * self.gatePitch + 2*self.sideActiveWidth axis = width // 2 @@ -1226,13 +1217,13 @@ class Stack ( object ): def drawGate ( self, axis, wiring ): trace( 100, '\tStack.drawGate(): %s\n' % wiring ) - gate = oroshi.rules.getRealLayer( 'poly' ) - cut0 = oroshi.rules.getRealLayer( 'cut0' ) - cut1 = oroshi.rules.getRealLayer( 'cut1' ) - cut2 = oroshi.rules.getRealLayer( 'cut2' ) - metal1 = oroshi.rules.getRealLayer( 'metal1' ) - metal2 = oroshi.rules.getRealLayer( 'metal2' ) - metal3 = oroshi.rules.getRealLayer( 'metal3' ) + gate = rules.getRealLayer( 'poly' ) + cut0 = rules.getRealLayer( 'cut0' ) + cut1 = rules.getRealLayer( 'cut1' ) + cut2 = rules.getRealLayer( 'cut2' ) + metal1 = rules.getRealLayer( 'metal1' ) + metal2 = rules.getRealLayer( 'metal2' ) + metal3 = rules.getRealLayer( 'metal3' ) width = self.L if wiring.isTop(): ytarget = self.getTopTrackY( wiring.topTrack ) @@ -1319,12 +1310,12 @@ class Stack ( object ): trace( 100, '\tStack.drawSourceDrain(): %s @%s width:%s NRC=%d\n' \ % (wiring, DbU.getValueString(axis), DbU.getValueString(width), cols ) ) - metal1 = oroshi.rules.getRealLayer( 'metal1' ) - metal2 = oroshi.rules.getRealLayer( 'metal2' ) - metal3 = oroshi.rules.getRealLayer( 'metal3' ) - cut0 = oroshi.rules.getRealLayer( 'cut0' ) - cut1 = oroshi.rules.getRealLayer( 'cut1' ) - cut2 = oroshi.rules.getRealLayer( 'cut2' ) + metal1 = rules.getRealLayer( 'metal1' ) + metal2 = rules.getRealLayer( 'metal2' ) + metal3 = rules.getRealLayer( 'metal3' ) + cut0 = rules.getRealLayer( 'cut0' ) + cut1 = rules.getRealLayer( 'cut1' ) + cut2 = rules.getRealLayer( 'cut2' ) rows = max( 1, (self.w - 2*self.minEnclosure_active_cut0) // self.contactDiffPitch ) ypitch = self.w // rows yoffset = self.activeOffsetY + ypitch//2 @@ -1333,7 +1324,7 @@ class Stack ( object ): xoffset = axis - (self.contactDiffPitch * (cols - 1))//2 if self.w < 2*self.minEnclosure_active_cut0 + self.minWidth_cut0: - active = oroshi.rules.getRealLayer( 'active' ) + active = rules.getRealLayer( 'active' ) box = Box( xoffset, yoffset, xoffset + (cols-1)*xpitch, yoffset ) box.inflate( self.minWidth_cut0 + self.minEnclosure_active_cut0 ) @@ -1451,7 +1442,7 @@ class Stack ( object ): if self.flags & Stack.WestBulk: westBulkWidth = self.bulkWidth if self.flags & Stack.EastBulk: eastBulkWidth = self.bulkWidth - L = oroshi.toUnity( self.L ) + L = toUnity( self.L ) sumA_Bsim4 = 0.0 sumB_Bsim4 = 0.0 sumA_Crolles = 0.0 @@ -1498,7 +1489,7 @@ class Stack ( object ): NSint = mt['style.NSint'] NDint = mt['style.NDint'] NF = mt['NF'] - Weff = oroshi.toUnity( self.w ) + Weff = toUnity( self.w ) DMCI = self.DMCI DMCG = self.DMCG DMCGT = self.DMCGT diff --git a/oroshi/python/wip_csp.py b/oroshi/python/wip_csp.py index 311259f0..2b07bef6 100644 --- a/oroshi/python/wip_csp.py +++ b/oroshi/python/wip_csp.py @@ -1,19 +1,16 @@ # -*- coding: utf-8 -*- -from Hurricane import DataBase -from Hurricane import UpdateSession -from Hurricane import DbU -from Hurricane import Box -import helpers -from helpers import trace +from ..Hurricane import DataBase, UpdateSession, DbU, Box +from ..helpers.io import catch +from ..helpers import setTraceLevel, trace -#helpers.setTraceLevel( 1000 ) +#setTraceLevel( 1000 ) try: - import Analog - import oroshi - import oroshi.paramsmatrix - import oroshi.stack + from .. import Analog + from . import getRules, toUnity + from . import paramsmatrix + from .stack import Stack except Exception as e: helpers.io.catch( e ) @@ -22,7 +19,7 @@ def checkCoherency ( device, bbMode ): message = '[ERROR] CommonSourcePair.checkCoherency():\n' techno = DataBase.getDB().getTechnology() - rules = oroshi.getRules() + rules = getRules() W = device.getParameter( 'W' ).getValue() M = device.getParameter( 'M' ).getValue() @@ -48,7 +45,7 @@ def layout ( device, bbMode ): nerc = device.getParameter( 'NERC' ).getValue() nirc = device.getParameter( 'NIRC' ).getValue() - stack = oroshi.stack.Stack( device, nerc, nirc ) + stack = Stack( device, nerc, nirc ) bw = str(device.getParameter( 'B.w' ).getValue()) d1w = str(device.getParameter( 'D1.w' ).getValue()) @@ -85,9 +82,9 @@ def layout ( device, bbMode ): stack.setWirings( wirings.format( **diffMap ) ) stack.doLayout ( bbMode ) - paramsMatrix = oroshi.paramsmatrix.ParamsMatrix() - paramsMatrix.setGlobalTransistorParams( oroshi.toUnity(stack.w) - , oroshi.toUnity(stack.L) + paramsMatrix = paramsmatrix.ParamsMatrix() + paramsMatrix.setGlobalTransistorParams( toUnity(stack.w) + , toUnity(stack.L) , device.getM() , stack.boundingBox ) diff --git a/oroshi/python/wip_dp.py b/oroshi/python/wip_dp.py index 30cc3ebf..982f2a28 100644 --- a/oroshi/python/wip_dp.py +++ b/oroshi/python/wip_dp.py @@ -1,28 +1,24 @@ # -*- coding: utf-8 -*- -from Hurricane import DataBase -from Hurricane import UpdateSession -from Hurricane import DbU -from Hurricane import Box -import helpers -from helpers import trace +from ..Hurricane import DataBase, UpdateSession, DbU, Box +from ..helpers import trace +from ..helpers.io import catch -#helpers.setTraceLevel( 1000 ) +#setTraceLevel( 1000 ) try: - import Analog - import oroshi - import oroshi.paramsmatrix - import oroshi.stack + from .. import Analog + from . import getRules, toUnity, paramsmatrix + from .stack import Stack except Exception as e: - helpers.io.catch( e ) + catch( e ) def checkCoherency ( device, bbMode ): message = '[ERROR] DifferentialPair.checkCoherency():\n' techno = DataBase.getDB().getTechnology() - rules = oroshi.getRules() + rules = getRules() W = device.getParameter( 'W' ).getValue() M = device.getParameter( 'M' ).getValue() @@ -48,7 +44,7 @@ def layout ( device, bbMode ): nerc = device.getParameter( 'NERC' ).getValue() nirc = device.getParameter( 'NIRC' ).getValue() - stack = oroshi.stack.Stack( device, nerc, nirc ) + stack = Stack( device, nerc, nirc ) bw = str(device.getParameter( 'B.w' ).getValue()) d1w = str(device.getParameter( 'D1.w' ).getValue()) @@ -88,9 +84,9 @@ def layout ( device, bbMode ): stack.setWirings( wirings.format( **diffMap ) ) stack.doLayout ( bbMode ) - paramsMatrix = oroshi.paramsmatrix.ParamsMatrix() - paramsMatrix.setGlobalTransistorParams( oroshi.toUnity(stack.w) - , oroshi.toUnity(stack.L) + paramsMatrix = paramsmatrix.ParamsMatrix() + paramsMatrix.setGlobalTransistorParams( toUnity(stack.w) + , toUnity(stack.L) , device.getM() , stack.boundingBox ) diff --git a/oroshi/python/wip_transistor.py b/oroshi/python/wip_transistor.py index 8b008ea5..21caa8a3 100644 --- a/oroshi/python/wip_transistor.py +++ b/oroshi/python/wip_transistor.py @@ -1,22 +1,18 @@ # -*- coding: utf-8 -*- -from Hurricane import DataBase -from Hurricane import UpdateSession -from Hurricane import DbU -from Hurricane import Box -import helpers -import helpers.io -from helpers import trace +from ..Hurricane import DataBase, UpdateSession, DbU, Box +from ..helpers.io import catch +from ..helpers import trace #helpers.setTraceLevel( 1000 ) try: - import Analog - import oroshi - import oroshi.paramsmatrix - import oroshi.stack + from .. import Analog + from . import getRules, toUnity + from . import paramsmatrix + from .stack import Stack except Exception as e: - helpers.io.catch( e ) + catch( e ) def checkCoherency ( device, bbMode ): @@ -24,7 +20,7 @@ def checkCoherency ( device, bbMode ): message = '[ERROR] Transistor.checkCoherency():\n' techno = DataBase.getDB().getTechnology() - rules = oroshi.getRules() + rules = getRules() w = device.getParameter( 'W' ).getValue() M = device.getParameter( 'M' ).getValue() @@ -37,7 +33,7 @@ def checkCoherency ( device, bbMode ): return (False, message) except Exception as e: - helpers.io.catch( e ) + catch( e ) return (False, message) return (True, "") @@ -47,13 +43,13 @@ def layout ( device, bbMode ): trace( 100, ',+', '\tWIP_Transistor.layout() called.\n' ) - paramsMatrix = oroshi.paramsmatrix.ParamsMatrix() + paramsMatrix = paramsmatrix.ParamsMatrix() try: nerc = device.getParameter( 'NERC' ).getValue() nirc = device.getParameter( 'NIRC' ).getValue() - stack = oroshi.stack.Stack( device, nerc, nirc ) + stack = Stack( device, nerc, nirc ) bw = str(device.getParameter( 'B.w' ).getValue()) dw = str(device.getParameter( 'D.w' ).getValue()) @@ -87,8 +83,8 @@ def layout ( device, bbMode ): stack.setWirings( wirings.format( **diffMap ) ) stack.doLayout ( bbMode ) - paramsMatrix.setGlobalTransistorParams( oroshi.toUnity(stack.w) - , oroshi.toUnity(stack.L) + paramsMatrix.setGlobalTransistorParams( toUnity(stack.w) + , toUnity(stack.L) , device.getM() , stack.boundingBox ) @@ -97,7 +93,7 @@ def layout ( device, bbMode ): paramsMatrix.trace() except Exception as e: - helpers.io.catch( e ) + catch( e ) trace( 100, '---' ) diff --git a/tutorial/python/runDemo.py b/tutorial/python/runDemo.py index 708264b0..1442f441 100644 --- a/tutorial/python/runDemo.py +++ b/tutorial/python/runDemo.py @@ -1,7 +1,7 @@ #!/usr/bin/env python # # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2017-2022, All Rights Reserved +# Copyright (c) Sorbonne Université 2017-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -17,16 +17,15 @@ try: import sys import os.path - import Cfg - import Viewer - import CRL - import helpers - from helpers import showPythonTrace, trace, l, u, n - from helpers.io import ErrorMessage, WarningMessage - from helpers.overlay import UpdateSession - import plugins - from Hurricane import DataBase, Breakpoint, DbU, Box, Contact, \ - Vertical, Horizontal, Net, Cell + from coriolis.Hurricane import DataBase, Breakpoint, DbU, Box, Contact, \ + Vertical, Horizontal, Net, Cell + from coriolis import Cfg + from coriolis import Viewer + from coriolis import CRL + from coriolis.helpers import trace, l, u, n + from coriolis.helpers.io import showPythonTrace, ErrorMessage, WarningMessage + from coriolis.helpers.overlay import UpdateSession + import coriolis.cumulus.plugins as plugins except ImportError as e: serror = str(e) if serror.startswith('No module named'): diff --git a/tutorial/src/tutorial.py b/tutorial/src/tutorial.py index 651af79e..7b5b4ee4 100755 --- a/tutorial/src/tutorial.py +++ b/tutorial/src/tutorial.py @@ -5,13 +5,13 @@ try: import sys import os.path import optparse - import Cfg - import Hurricane - import Viewer - import helpers.io - import CRL - import Unicorn - import Tutorial + from coriolis import Cfg + from coriolis import Hurricane + from coriolis import Viewer + from coriolis import helpers.io + from coriolis import CRL + from coriolis import Unicorn + from coriolis import Tutorial except ImportError as e: serror = str(e) if serror.startswith('No module named'): diff --git a/unicorn/python/CMakeLists.txt b/unicorn/python/CMakeLists.txt index fb63d300..1e535dfe 100644 --- a/unicorn/python/CMakeLists.txt +++ b/unicorn/python/CMakeLists.txt @@ -1,4 +1,4 @@ # -*- explicit-buffer-name: "CMakeLists.txt" -*- - install( FILES unicornInit.py DESTINATION ${Python_CORIOLISLIB}/unicorn ) + install( FILES initHook.py DESTINATION ${Python_CORIOLISLIB}/unicorn ) diff --git a/unicorn/python/unicornInit.py b/unicorn/python/initHook.py similarity index 81% rename from unicorn/python/unicornInit.py rename to unicorn/python/initHook.py index fc1616fc..329ebb3c 100644 --- a/unicorn/python/unicornInit.py +++ b/unicorn/python/initHook.py @@ -1,7 +1,7 @@ #!/usr/bin/env python # # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2014-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2014-2023, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S | @@ -10,7 +10,7 @@ # | Author : Jean-Paul CHAPUT | # | E-mail : Jean-Paul.Chaput@lip6.fr | # | =============================================================== | -# | Python : "./init/unicornInit.py" | +# | Python : "./init/initHook.py" | # +-----------------------------------------------------------------+ @@ -18,12 +18,13 @@ try: import traceback import sys import os.path - import helpers - from helpers.io import ErrorMessage - from helpers.io import WarningMessage - import plugins - import Viewer + from ..helpers import staticInitialization, setTraceLevel + from ..helpers.io import ErrorMessage, WarningMessage, showStackTrace, \ + showPythonTrace, vprint + from .. import plugins + from .. import Viewer except ImportError as e: + print( e ) serror = str(e) if serror.startswith('No module named'): module = serror.split()[-1] @@ -42,7 +43,7 @@ except ImportError as e: # sys.exit(2) -#helpers.staticInitialization( quiet=True ) +#staticInitialization( quiet=True ) def unicornConfigure ( **kw ): @@ -57,12 +58,13 @@ def unicornConfigure ( **kw ): if 'editor' in kw: editor = kw['editor'] else: - print( ErrorMessage( 3, 'unicornConfigure.py: Must be run from a CellView derived class.' )) + print( ErrorMessage( 3, 'unicorn.initHook.py: Must be run from a CellView derived class.' )) return if editor.hasMenu( 'plugins' ): print( WarningMessage( 'The menu has already been created.' )) return #editor.addMenu( 'plugins', 'Plu&gins', Viewer.CellViewer.TopMenu ) + vprint( 1, ' o Unicorn loading plugins into menus.' ) for moduleName in sys.modules: try: module = sys.modules[ moduleName ] @@ -79,10 +81,10 @@ def unicornConfigure ( **kw ): print( WarningMessage( 'Plugin "{}" do not provides the unicornHook() method, skipped.' \ .format(moduleName) )) continue + vprint( 1, ' - "{}".'.format( module.__name__ )) module.__dict__['unicornHook']( **kw ) except ErrorMessage as e: - print( e ) - helpers.showStackTrace( e.trace ) + showStackTrace( e.trace ) except Exception as e: - helpers.showPythonTrace( __file__, e ) + showPythonTrace( __file__, e ) return diff --git a/unicorn/src/UnicornGui.cpp b/unicorn/src/UnicornGui.cpp index 3d74bc75..cc6f4eb5 100644 --- a/unicorn/src/UnicornGui.cpp +++ b/unicorn/src/UnicornGui.cpp @@ -119,17 +119,17 @@ namespace Unicorn { void UnicornGui::_runUnicornInit () { Utilities::Path pythonSitePackages = System::getPath("pythonSitePackages"); - Utilities::Path systemConfDir = pythonSitePackages / "unicorn"; - Utilities::Path systemConfFile = systemConfDir / "unicornInit.py"; + Utilities::Path confFile = "coriolis/unicorn/initHook.py"; + Utilities::Path systemConfFile = pythonSitePackages / confFile; if (systemConfFile.exists()) { - Isobar::Script::addPath( systemConfDir.toString() ); + //Isobar::Script::addPath( systemConfDir.toString() ); - dbo_ptr script = Isobar::Script::create( systemConfFile.stem().toString() ); + dbo_ptr script = Isobar::Script::create( confFile.toPyModPath() ); script->addKwArgument( "editor" , (PyObject*)PyCellViewer_Link(this) ); script->runFunction ( "unicornConfigure", getCell() ); - Isobar::Script::removePath( systemConfDir.toString() ); + //Isobar::Script::removePath( systemConfDir.toString() ); } else { cerr << Warning("Unicorn system configuration file:\n <%s> not found." ,systemConfFile.toString().c_str()) << endl; diff --git a/unicorn/src/cgt.py b/unicorn/src/cgt.py index bf231390..337386cb 100755 --- a/unicorn/src/cgt.py +++ b/unicorn/src/cgt.py @@ -17,22 +17,12 @@ try: import sys import os.path import optparse - import helpers + from coriolis import helpers helpers.loadUserSettings() - import Cfg - import Hurricane - import Viewer - import CRL - import Etesian - import Anabatic - import Katana - import Katabatic - import Kite - import Bora - import Tutorial - import Unicorn + from coriolis import Cfg, Hurricane, Viewer, CRL, Etesian, Anabatic, \ + Katana, Bora, Tutorial, Unicorn except Exception as e: - helpers.showPythonTrace( sys.argv[0], e ) + helpers.io.showPythonTrace( sys.argv[0], e ) sys.exit(2) @@ -192,7 +182,7 @@ if __name__ == '__main__': unicorn = Unicorn.UnicornGui.create() unicorn.setApplicationName ('cgt') unicorn.registerTool (Etesian.GraphicEtesianEngine.grab()) - unicorn.registerTool (Kite.GraphicKiteEngine.grab()) + #unicorn.registerTool (Kite.GraphicKiteEngine.grab()) unicorn.registerTool (Katana.GraphicKatanaEngine.grab()) unicorn.registerTool (Bora.GraphicBoraEngine.grab()) unicorn.registerTool (Tutorial.GraphicTutorialEngine.grab()) @@ -240,27 +230,6 @@ if __name__ == '__main__': #katana.finalizeLayout() katana.destroy() - if runKiteTool: - if loadGlobal: globalFlags = Kite.KtLoadGlobalRouting - else: globalFlags = Kite.KtBuildGlobalRouting - - routingNets = [] - kite = Kite.KiteEngine.create(cell) - if options.showConf: kite.printConfiguration() - - kite.runGlobalRouter(globalFlags) - if saveGlobal: kite.saveGlobalSolution() - - if detailRoute: - kite.loadGlobalRouting( Katabatic.EngineLoadGrByNet, routingNets ) - kite.layerAssign ( Katabatic.EngineNoNetLayerAssign ) - kite.runNegociate () - kiteSuccess = kite.getToolSuccess() - kite.finalizeLayout() - if options.dumpMeasures: - kite.dumpMeasures() - kite.destroy() - if options.saveDesign: views = CRL.Catalog.State.Physical if options.vstUseConcat: views |= CRL.Catalog.State.VstUseConcat @@ -272,6 +241,6 @@ if __name__ == '__main__': sys.exit(not kiteSuccess) except Exception as e: - helpers.showPythonTrace( sys.argv[0], e ) + helpers.io.showPythonTrace( sys.argv[0], e ) sys.exit(0) diff --git a/unicorn/src/coriolis.py b/unicorn/src/coriolis.py index 93fac56e..35a71b2e 100755 --- a/unicorn/src/coriolis.py +++ b/unicorn/src/coriolis.py @@ -1,7 +1,7 @@ #!/usr/bin/env python3 # # This file is part of the Coriolis Software. -# Copyright (c) Sorbonne Université 2015-2021, All Rights Reserved +# Copyright (c) Sorbonne Université 2015-2022, All Rights Reserved # # +-----------------------------------------------------------------+ # | C O R I O L I S |