In cumulus, integrate CoreToChip inside Chip.
Formerly, CoreToChip was seen as building the top-level netlist of the chip only. But, when using special spacer pads, we need to have access to that specific information from inside the Chip pads builder. So we now move CoreToChip as an internal part of Chip. The right CoreToChip to use (techno dependant) must be given as a configuration parameter: "conf.coreToChipClass" It is the class, not an object that must be suplied.
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@ -1411,6 +1411,7 @@ class BlockConf ( GaugeConf ):
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self.katana = None
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def _postInit ( self ):
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trace( 550, ',+', '\tblock.configuration._postInit()\n' )
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self.cfg.apply()
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self.bufferConf = BufferConf( self.framework )
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self.constantsConf = ConstantsConf( self.framework, self.cfg )
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@ -1420,6 +1421,7 @@ class BlockConf ( GaugeConf ):
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self.ioPins.append( IoPin( *ioPinSpec ) )
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for line in range(len(self.ioPadsArg)):
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self.chipConf.addIoPad( self.ioPadsArg[line], line )
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trace( 550, ',-' )
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@property
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def isCoreBlock ( self ): return self.chip is not None
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@ -61,6 +61,17 @@ class Chip ( Block ):
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self.conf.validated = False
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return self.conf.validated
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def doChipNetlist ( self ):
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"""
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Build the netlist at chip-level around the ``core`` block. Needs the ``conf.coreToChipClass``
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configuration parameter to be set up. Otherwise assume the netlist is already a chip.
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"""
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if not hasattr(self.conf,'coreToChipClass'):
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print( WarningMessage( 'Chip.doChipNetlist(): No "conf.coreToChipClass" defined, assume we already have a chip-level netlist.' ) )
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return
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self.conf.coreToChip = self.conf.coreToChipClass( self.conf )
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self.conf.coreToChip.buildChip()
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def doChipFloorplan ( self ):
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self.padsCorona = None
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minHCorona = self.conf.minHCorona
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@ -112,6 +112,7 @@ class ChipConf ( BlockConf ):
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self.chipLogos = []
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self.minHCorona = 0
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self.minVCorona = 0
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self.coreToChip = None
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trace( 550, '-' )
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@property
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@ -259,6 +259,8 @@ class IoPad ( object ):
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TRI_OUT = 0x0008
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ANALOG = 0x0010
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UNSUPPORTED = 0x0020
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FILLER = 0x0040
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CORNER = 0x0080
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@staticmethod
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def directionToStr ( direction ):
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@ -517,7 +519,7 @@ class CoreToChip ( object ):
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.format( core.getName() )
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] )
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conf = block.state
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conf._postInit()
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#conf._postInit()
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self.conf = conf
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self.conf.useHarness = False
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self.ringNetNames = []
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