76 lines
2.7 KiB
TeX
76 lines
2.7 KiB
TeX
|
\begin{itemize}
|
||
|
\item \textbf{Name} : DpgenAnd4 -- And4 Macro-Generator
|
||
|
\item \textbf{Synopsys} :
|
||
|
\begin{verbatim}
|
||
|
Generate ( 'DpgenAnd4', modelname
|
||
|
, param = { 'nbit' : n
|
||
|
, 'drive' : d
|
||
|
, 'physical' : True
|
||
|
, 'behavioral' : True
|
||
|
}
|
||
|
)
|
||
|
\end{verbatim}
|
||
|
\item \textbf{Description} : Generates a \verb-n- bits four inputs AND with an output power of \verb-d- named \verb-modelname-.
|
||
|
\item Terminal Names :
|
||
|
\begin{itemize}
|
||
|
\item \textbf{i0} : input (\verb-n- bits)
|
||
|
\item \textbf{i1} : input (\verb-n- bits)
|
||
|
\item \textbf{i2} : input (\verb-n- bits)
|
||
|
\item \textbf{i3} : input (\verb-n- bits)
|
||
|
\item \textbf{q} : output (\verb-n- bits)
|
||
|
\item \textbf{vdd} : power
|
||
|
\item \textbf{vss} : ground
|
||
|
\end{itemize}
|
||
|
\item \textbf{Parameters} : Parameters are given in the map \verb-param-.
|
||
|
\begin{itemize}
|
||
|
\item \textbf{nbit} (mandatory) : Defines the size of the generator
|
||
|
\item \textbf{drive} (optional) : Defines the output power of the gates
|
||
|
\begin{itemize}
|
||
|
\item Valid drive are : 2 or 4
|
||
|
\item If this parameter is not defined, it's value is the smallest one permitted
|
||
|
\end{itemize}
|
||
|
\item \textbf{physical} (optional, default value : False) : In order to generate a layout
|
||
|
\item \textbf{behavioral} (optional, default value : False) : In order to generate a behavior
|
||
|
\end{itemize}
|
||
|
\item \textbf{Behavior} :
|
||
|
\begin{verbatim}
|
||
|
nq <= i0 and i1 and i2 and i3
|
||
|
\end{verbatim}
|
||
|
\item \textbf{Example} :
|
||
|
\begin{verbatim}
|
||
|
from stratus import *
|
||
|
|
||
|
class inst_and4 ( Model ) :
|
||
|
|
||
|
def Interface ( self ) :
|
||
|
self.in1 = SignalIn ( "in1", 2 )
|
||
|
self.in2 = SignalIn ( "in2", 2 )
|
||
|
self.in3 = SignalIn ( "in3", 2 )
|
||
|
self.in4 = SignalIn ( "in4", 2 )
|
||
|
self.out = SignalOut ( "o", 2 )
|
||
|
|
||
|
self.vdd = VddIn ( "vdd" )
|
||
|
self.vss = VssIn ( "vss" )
|
||
|
|
||
|
def Netlist ( self ) :
|
||
|
Generate ( 'DpgenAnd4', 'and4_2'
|
||
|
, param = { 'nbit' : 2
|
||
|
, 'physical' : True
|
||
|
}
|
||
|
)
|
||
|
self.I = Inst ( 'and4_2', 'inst'
|
||
|
, map = { 'i0' : self.in1
|
||
|
, 'i1' : self.in2
|
||
|
, 'i2' : self.in3
|
||
|
, 'i3' : self.in4
|
||
|
, 'q' : self.out
|
||
|
, 'vdd' : self.vdd
|
||
|
, 'vss' : self.vss
|
||
|
}
|
||
|
)
|
||
|
|
||
|
def Layout ( self ) :
|
||
|
Place ( self.I, NOSYM, Ref(0, 0) )
|
||
|
\end{verbatim}
|
||
|
\end{itemize}
|