coriolis/stratus1/doc/man_dpgeninv.tex

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2010-07-12 10:33:22 -05:00
\begin{itemize}
\item Name : DpgenInv -- Inverter Macro-Generator
\item Description : Generates a \verb-n- bits inverter with an output power of \verb-drive- named \verb-modelname-.
\begin{itemize}
\item Valid drive are : 1, 2, 4 or 8
\end{itemize}
\item Terminal Names :
\begin{itemize}
\item \verb-i0- : input (\verb-n- bits)
\item \verb-nq- : output (\verb-n- bits)
\item \verb-vdd- : power
\item \verb-vss- : ground
\end{itemize}
\item Parameters : Parameters are given with a map called \verb-param-.
\begin{itemize}
\item nbit : Defines the size of the generator
\item drive (optional) : Defines the output power of the gates\\If this parameter is not defined, the \verb-drive- is the smallest one permitted.
\end{itemize}
\item Behavior :
\begin{verbatim}
nq <= not ( i0 )
\end{verbatim}
\item Example :
\begin{verbatim}
class myClass ( Model ) :
def Interface ( self ) :
self._in = LogicIn ( "in", 32 )
self._out = LogicOut ( "out", 32 )
self._vdd = VddIn ( "vdd" )
self._vss = VssIn ( "vss" )
def Netlist ( self ) :
Inst ( 'DpgenInv'
, param = { 'nbit' : 32 }
, map = { 'i0' : self._in
, 'nq' : self._out
, 'vdd' : self._vdd
, 'vss' : self._vss
}
)
\end{verbatim}
\end{itemize}