73 lines
2.6 KiB
TeX
73 lines
2.6 KiB
TeX
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\begin{itemize}
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\item \textbf{Name} : DpgenRam -- RAM Macro-Generator
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\item \textbf{Synopsys} :
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\begin{verbatim}
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Generate ( 'DpgenRam', modelname
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, param = { 'nbit' : n
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, 'nword' : regNumber
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, 'physical' : True
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}
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)
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\end{verbatim}
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\item \textbf{Description} : Generates a RAM of \verb-regNumber- words of \verb-n- bits named \verb-modelname-.
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\item \textbf{Terminal Names} :
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\begin{itemize}
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\item \textbf{ck} : clock signal (input, 1 bit)
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\item \textbf{w} : write requested (input, 1 bit)
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\item \textbf{selram} : select the write bus (input, 1 bit)
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\item \textbf{ad} : the address (input, \verb-Y- bits)
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\item \textbf{datain} : write bus (input, \verb-n- bits)
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\item \textbf{dataout} : read bus (output, \verb-n- bits)
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\item \textbf{vdd} : power
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\item \textbf{vss} : ground
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\end{itemize}
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\item \textbf{Parameters} : Parameters are given in the map \verb-param-.
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\begin{itemize}
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\item \textbf{nbit} (mandatory) : Defines the size of the generator
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\item \textbf{nword} (mandatory) : Defines the size of the words
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\item \textbf{physical} (optional, default value : False) : In order to generate a layout
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\end{itemize}
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% \item Behavior :
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%\begin{verbatim}
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%\end{verbatim}
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\item \textbf{Example} :
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\begin{verbatim}
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from stratus import *
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class inst_ram ( Model ) :
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def Interface ( self ) :
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self.ck = SignalIn ( "ck", 1 )
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self.w = SignalIn ( "w", 1 )
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self.selram = SignalIn ( "selram", 1 )
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self.ad = SignalIn ( "ad", 5 )
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self.datain = SignalIn ( "datain", 32 )
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self.dataout = TriState ( "dataout", 32 )
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self.vdd = VddIn ( "vdd" )
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self.vss = VssIn ( "vss" )
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def Netlist ( self ) :
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Generate ( 'DpgenRam', 'ram_32_32'
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, param = { 'nbit' : 32
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, 'nword' : 32
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, 'physical' : True
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}
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)
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self.I = Inst ( 'ram_32_32', 'inst'
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, map = { 'ck' : self.ck
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, 'w' : self.w
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, 'selram' : self.selram
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, 'ad' : self.ad
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, 'datain' : self.datain
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, 'dataout' : self.dataout
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, 'vdd' : self.vdd
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, 'vss' : self.vss
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}
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)
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def Layout ( self ) :
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Place ( self.I, NOSYM, Ref(0, 0) )
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\end{verbatim}
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\end{itemize}
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