Support for Python plugins in CellViewer/Unicorn. ClockTree plugin.
* New: In Hurricane, in CellViewer, create a simpler API to graft menu
and actions into the menubar. Mainly addToMenu() which take care of
the QAction creation but also locate the relevant QMenu, base on
the Qt object name. Regroup all the widget & action creation inside
the body of the constructor, this way almost all actions can be
removed from the attributes of the CellViewer.
addToMenu() is supplied in three flavors:
1. For C++ callbacks in GraphicToolEngines (with a binded
member function method).
2. For running Python scripts to be used by the plugin system.
3. To insert separator in menus (to give a more homogeneous
look).
Remove the last remnants of Stratus scripts (unificated with basic
Python scripts).
* New: In Hurricane, in PyCellViewer, export the interface to graft
Python scripts into the CellViewer menu tree.
* Change: In Etesian, in GraphicEtesianEngine, use the new API to
graft menus & callbacks into the CellViewer.
* Change: In Mauka, in GraphicMaukaEngine, use the new API to
graft menus & callbacks into the CellViewer.
* Change: In Kite, in GraphicKiteEngine, use the new API to
graft menus & callbacks into the CellViewer.
* New: In Cumulus, install Python scripts as plugins for Unicorn under
<PYTHON_SITE_PACKAGES>/cumulus/plugins/.
* New: In Unicorn, in UnicornGui, make uses of the new API for creating
menus in the CellViewer. Creates the stem menu for the P&R tools.
Add a Python initialization mechanism to read the plugins
installeds into <PYTHON_SITE_PACKAGES>/cumulus/plugins/.
2014-06-25 12:50:34 -05:00
|
|
|
# -*- explicit-buffer-name: "CMakeLists.txt<cumulus/src>" -*-
|
2010-07-12 10:31:29 -05:00
|
|
|
|
2022-12-31 08:01:37 -06:00
|
|
|
set ( pyDesignFlow ${CMAKE_CURRENT_SOURCE_DIR}/designflow/task.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/copy.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/vasy.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/boom.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/boog.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/loon.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/genpat.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/asimut.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/flatph.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/cougar.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/s2r.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/lvx.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/druc.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/graal.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/dreal.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/yosys.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/blif2vst.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/pnr.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/clean.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/alias.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/technos.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/routecheck.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/pnrcheck.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/designflow/alliancesynth.py
|
|
|
|
|
)
|
2019-05-10 04:58:05 -05:00
|
|
|
set ( pySources ${CMAKE_CURRENT_SOURCE_DIR}/placeandroute.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/ref.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/Alliance.py
|
|
|
|
|
)
|
|
|
|
|
set ( pyPlugins ${CMAKE_CURRENT_SOURCE_DIR}/plugins/__init__.py
|
2020-04-08 04:24:42 -05:00
|
|
|
#${CMAKE_CURRENT_SOURCE_DIR}/plugins/vchannels.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/clocktree.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip_cmos.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip_phlib80.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/chipplace.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/chiproute.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/conductor.py
|
2020-06-06 05:16:51 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/matrixplacer.py
|
2020-08-02 11:18:40 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/block.py
|
2020-04-08 04:24:42 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/rsave.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/rsaveall.py
|
2021-06-22 17:07:25 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/checks.py
|
2020-04-08 04:24:42 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/s2r.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/aboutwindow.py
|
2020-08-02 11:18:40 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/stats.py
|
2019-05-10 04:58:05 -05:00
|
|
|
)
|
Groudwork for routing density driven placement. Compliance with clang 5.0.1.
This commit contains two set of features that should have been commited
separately.
1. Compliance with clang 5.0.1, tested with the RedHat collection
llvm-toolset-7. This allow Coriolis to be compiled under Darwin (MacOS)
with Xcode & macports. The bootstrap install system has been modificated
accordingly.
2. The basic support for routing density driven placement. Related
features are:
* Bloat property. Each Occurrence of an Instance can be individually
bloated. This property not attached to any tool to allow the placer and
router to share it as wanted. Nevertheless, it is defined in Etesian.
* BloatProfile in Katana, add individual Bloat properties to Instances
occurrences based on the East & North overflowed edges of each GCell.
* Support in ToolEngine for a "pass number" of a tool. This pass number
is mainly used to make "per pass" measurements. The MeasureSet system
is improved accordingly to support multiple values of a same measure.
* Embryo of "P&R Conductor" to perform the place & route loop until the
design is successfully placed. May be the first brick of a Silicon
Compiler.
* Change: In boostrap/FindBoostrap.cmake, in setup_boost(), added tag to
the python component for macport (ex: python27).
* Change: In boostrap/build.conf, put etesian before anabatic for
instance occurrence BloatProperty dependency.
Added option support for the "llvm-toolset-7" collection to build
against clang 5.0.1.
* Bug: In Hurricane::getRecord( const pair<T,U>& ), the getSlot<> templates
for first & second arguments must be called with <const T> and <const U>
as the pair itself is const (and not simply <T> & <U>).
* Change: In Hurricane::getSlot() temlate, only use "string" arguments and
not const string&, simpler for template argument deduction.
* Bug: In Hurricane::AnalogCellExtension, the StandardPrivateProperty<>
template has a static member "_name". Clang did show that the template
for this static number has to be put inside the namespace where the
template *is defined* (i.e. Hurricane) instead of the namespace where
it is instanciated (i.e. Analog).
* Bug: In Isobar, Matrix_FromListOfList(), PyInt_AsPlacementStatus() must
be put outside the C linkage back in the Isobar C++ namespace (clang).
* Bug: In Hurricane::DBo::~DBo, and derived add a throw() specification
(clang).
* Bug: In Hurricane::RegularLayer::getEnclosure() & setEnclosure(), change
signature so it matches the one of the base class (clang).
* Bug: In Hurricane::CellPrinter, use double brackets for initializer list
(clang).
* Change: In Hurricane::Breakpoint, reverse the meaning of the error level.
Only error level *lesser or equal* than the stop level will be enabled.
* Bug: In CRL/python/helpers/__init__.loadUserSettings(), must put the
current working directory in the sys.path as in certain configuration
it may not be included.
* Bug: In CRL::ApDriver, DumpSegments(), no longer generate segments when
encountering a RoutingPad on a top-level Pin Occurrence. The segment
was generated in the wrong direction, creating DRC violations on the
"mips_core_flat" example.
* Change: In CRL::Measures, partial re-design of the measurements management.
Now, each kind of measure can accept multiple values put in a vector.
The index is intented to match a tool run number.
* Change: In CRL::Histogram, add support for multiple sets of datas,
indexeds with tool run number.
* Change: In CRL::ToolEngine, add support for multiple pass number, add
addMeasure<> templates for the various data-types.
* Change: In CRL::gdsDriver & CRL::gdsParser(), comment out unused GDS record
name constants.
* New: Etesian::BloatProperty, property to attach to Instance occurrences
that contains the extra number of pitch to add to the cell width.
* Bug: In AutoSegment::CompareByDepthLength, the segment length comparison
was wrong, it was always returning true, which broke the "strick weak
ordering" of the comparison.
This was producing a core-dump in GCell::updateDensity() when sorting
a vector<>. The end() iterator was being dereferenced, leading to the
problem.
* Bug: In Katana::DataSymmetric::checkPairing(), the test for segments
whose axis is perpandicular to the symmetry axis was wrong
("!=" instead of "-").
* New: In Katana/GlobalRoute, new ::selectSegments(), selectOverloadedgcells()
and selectBloatedInstances() to automatically select segments from
overloaded edges, overloaded GCells and bloated cells.
* Change: In KatanaEngine, return a more detailed success state, distinguish
between global and detailed.
Add support for multiple routing iterations.
* New: In cumulus/python/plugins/ConductorPlugin.py, embryo of routing
driven placement.
2019-12-08 18:57:44 -06:00
|
|
|
#set ( pyPluginBlock ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/__init__.py
|
2020-04-08 04:24:42 -05:00
|
|
|
# ${CMAKE_CURRENT_SOURCE_DIR}/plugins/block/vchannels.py
|
Groudwork for routing density driven placement. Compliance with clang 5.0.1.
This commit contains two set of features that should have been commited
separately.
1. Compliance with clang 5.0.1, tested with the RedHat collection
llvm-toolset-7. This allow Coriolis to be compiled under Darwin (MacOS)
with Xcode & macports. The bootstrap install system has been modificated
accordingly.
2. The basic support for routing density driven placement. Related
features are:
* Bloat property. Each Occurrence of an Instance can be individually
bloated. This property not attached to any tool to allow the placer and
router to share it as wanted. Nevertheless, it is defined in Etesian.
* BloatProfile in Katana, add individual Bloat properties to Instances
occurrences based on the East & North overflowed edges of each GCell.
* Support in ToolEngine for a "pass number" of a tool. This pass number
is mainly used to make "per pass" measurements. The MeasureSet system
is improved accordingly to support multiple values of a same measure.
* Embryo of "P&R Conductor" to perform the place & route loop until the
design is successfully placed. May be the first brick of a Silicon
Compiler.
* Change: In boostrap/FindBoostrap.cmake, in setup_boost(), added tag to
the python component for macport (ex: python27).
* Change: In boostrap/build.conf, put etesian before anabatic for
instance occurrence BloatProperty dependency.
Added option support for the "llvm-toolset-7" collection to build
against clang 5.0.1.
* Bug: In Hurricane::getRecord( const pair<T,U>& ), the getSlot<> templates
for first & second arguments must be called with <const T> and <const U>
as the pair itself is const (and not simply <T> & <U>).
* Change: In Hurricane::getSlot() temlate, only use "string" arguments and
not const string&, simpler for template argument deduction.
* Bug: In Hurricane::AnalogCellExtension, the StandardPrivateProperty<>
template has a static member "_name". Clang did show that the template
for this static number has to be put inside the namespace where the
template *is defined* (i.e. Hurricane) instead of the namespace where
it is instanciated (i.e. Analog).
* Bug: In Isobar, Matrix_FromListOfList(), PyInt_AsPlacementStatus() must
be put outside the C linkage back in the Isobar C++ namespace (clang).
* Bug: In Hurricane::DBo::~DBo, and derived add a throw() specification
(clang).
* Bug: In Hurricane::RegularLayer::getEnclosure() & setEnclosure(), change
signature so it matches the one of the base class (clang).
* Bug: In Hurricane::CellPrinter, use double brackets for initializer list
(clang).
* Change: In Hurricane::Breakpoint, reverse the meaning of the error level.
Only error level *lesser or equal* than the stop level will be enabled.
* Bug: In CRL/python/helpers/__init__.loadUserSettings(), must put the
current working directory in the sys.path as in certain configuration
it may not be included.
* Bug: In CRL::ApDriver, DumpSegments(), no longer generate segments when
encountering a RoutingPad on a top-level Pin Occurrence. The segment
was generated in the wrong direction, creating DRC violations on the
"mips_core_flat" example.
* Change: In CRL::Measures, partial re-design of the measurements management.
Now, each kind of measure can accept multiple values put in a vector.
The index is intented to match a tool run number.
* Change: In CRL::Histogram, add support for multiple sets of datas,
indexeds with tool run number.
* Change: In CRL::ToolEngine, add support for multiple pass number, add
addMeasure<> templates for the various data-types.
* Change: In CRL::gdsDriver & CRL::gdsParser(), comment out unused GDS record
name constants.
* New: Etesian::BloatProperty, property to attach to Instance occurrences
that contains the extra number of pitch to add to the cell width.
* Bug: In AutoSegment::CompareByDepthLength, the segment length comparison
was wrong, it was always returning true, which broke the "strick weak
ordering" of the comparison.
This was producing a core-dump in GCell::updateDensity() when sorting
a vector<>. The end() iterator was being dereferenced, leading to the
problem.
* Bug: In Katana::DataSymmetric::checkPairing(), the test for segments
whose axis is perpandicular to the symmetry axis was wrong
("!=" instead of "-").
* New: In Katana/GlobalRoute, new ::selectSegments(), selectOverloadedgcells()
and selectBloatedInstances() to automatically select segments from
overloaded edges, overloaded GCells and bloated cells.
* Change: In KatanaEngine, return a more detailed success state, distinguish
between global and detailed.
Add support for multiple routing iterations.
* New: In cumulus/python/plugins/ConductorPlugin.py, embryo of routing
driven placement.
2019-12-08 18:57:44 -06:00
|
|
|
# )
|
2020-04-08 04:24:42 -05:00
|
|
|
set ( pyPluginCTS ${CMAKE_CURRENT_SOURCE_DIR}/plugins/cts/__init__.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/cts/rsmt.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/cts/clocktree.py
|
2019-05-10 04:58:05 -05:00
|
|
|
)
|
Support for mixing real pads & symbolic core. Wrapper around s2r.
* Change: In Hurricane::Error constructors disable the backtrace generation.
(*very* slow).
* Change: In Hurricane::Library::getHierarchicalname(), more compact
naming. Remove the name of the root library.
* New: In Hurricane::Net, new type "FUSED", for component with no net.
More efficient than having one net for each.
* Change: In CellViewer, BreakpointWidget, use Angry Birds icons.
* Change: In CellWidget::State, use the hierarchical name (cached) as key
to the state. This allow to load two cells with the same name but from
different libraries in the widget history.
* Change: In PyGraphics, export "isEnabled()" and "isHighDpi()" functions.
* Change: In CRL/etc/symbolic/cmos/plugin.conf, and
CRL/etc/common/plugin.conf use the physical dimensions converters.
* Change: In CRL/etc/symbolic/cmos/technology.conf, make the GDS layer
table coherent with the default Alliance cmos.rds.
* New: CRL/python/helpers/io.py, put ErrorMessage new implementation here,
along with a new ErrorWidget written in PyQt4. It seems finally that
PyQt4 can be used alongside Coriolis Qt widgets.
New ErrorMessage.catch() static function to manage all exceptions
in except clauses.
* Change: In CRL/python/helpers/, no longer use ErrorMessage.wrapPrint(),
directly print it.
Rewrite the utilities to display Python stack traces "textStacktrace()"
and "showStacktrace()".
* Change: In CRL::AllianceFramework, shorten the names of the libraries.
* Change: In CRL::ApParser & CRL::ApDriver, more accurate translation between
Alliance connectors (C record) and Hurricane::Pin objects. Pin are no
longer made square but thin and oriented in the connecting direction.
Use the new fused net for unnamed components.
* New: In CRL::GdsParser, implementation of SREF parsing, i.e. instances.
Due to the unordered nature of the GDS stream, instances creation are
delayed until the whole stream has been parsed and only then are they
created.
For the sake of reading back Alliance s2r GDS, we assume that any
TEXT following a boundary is the Net name the boundary (component)
belongs to.
Create abutment box for Cells, computed from the bounding box, so
the Hurricane QuadTree could work properly.
Make use of the fused net for unnamed components.
* New: In Cumulus/plugins/chip, complete rewrite of the I/O pad management.
Now we can mix real (foundry) pads and a symbolic core.
To cleanly support the de-coupling between the real part and the
symbolic one we introduce a new intermediary hierarchical level, the
corona. We have now:
Chip --> Pads + Corona --> Core.
At chip level (and if we are using real pads) the layout is fully
real (excepting the corona).
The Corona contains everything that is symbolic. It has symbolic
wires extending outward the abutment box to make contact with the
real wires coming from the pads.
In the pad ring we can use corners instances (or not), pad spacers
or directly draw wires between connectors ring pads.
Provide two flavors: placement only or full place & route.
WARNING: If routing in a second step, *do not route* the *Chip* but
the *Corona*.
* Change: In Cumulus/plugins/clocktree, give the modified Cell an
additional extension of "_cts" (Clock Tree Synthesis) instead of
"_clocked", to follow the common convention.
* New: In cumulus/plugins/S2R.py, encapsulate call to Alliance S2R and
reload the translated Cell in the editor.
* New: In cumulus/plugins/core2chip, provide an utility to automatically
create a chip from a core. To work this plugins must have a basic
understanding of the pad functionalities which may differs from
foundry to foundry. So a base class CoreToChip is created, then for
each supported pad foundry a derived class is added. Currently we
support AMS c35b4 and Alliance symbolic cmos.
* Bug: In Anabatic::Configuration, read the right configuration parameter
"anabatic.topRoutinglayer" (Katana), and not the one for Katabatic...
* Change: In Unicorn/cgt.py, process the plugins in alphabetical order
to ensure a reproductible ordering of the menus...
2019-05-22 07:34:32 -05:00
|
|
|
set ( pyPluginC2C ${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/__init__.py
|
2020-04-08 04:24:42 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/core2chip.py
|
Support for mixing real pads & symbolic core. Wrapper around s2r.
* Change: In Hurricane::Error constructors disable the backtrace generation.
(*very* slow).
* Change: In Hurricane::Library::getHierarchicalname(), more compact
naming. Remove the name of the root library.
* New: In Hurricane::Net, new type "FUSED", for component with no net.
More efficient than having one net for each.
* Change: In CellViewer, BreakpointWidget, use Angry Birds icons.
* Change: In CellWidget::State, use the hierarchical name (cached) as key
to the state. This allow to load two cells with the same name but from
different libraries in the widget history.
* Change: In PyGraphics, export "isEnabled()" and "isHighDpi()" functions.
* Change: In CRL/etc/symbolic/cmos/plugin.conf, and
CRL/etc/common/plugin.conf use the physical dimensions converters.
* Change: In CRL/etc/symbolic/cmos/technology.conf, make the GDS layer
table coherent with the default Alliance cmos.rds.
* New: CRL/python/helpers/io.py, put ErrorMessage new implementation here,
along with a new ErrorWidget written in PyQt4. It seems finally that
PyQt4 can be used alongside Coriolis Qt widgets.
New ErrorMessage.catch() static function to manage all exceptions
in except clauses.
* Change: In CRL/python/helpers/, no longer use ErrorMessage.wrapPrint(),
directly print it.
Rewrite the utilities to display Python stack traces "textStacktrace()"
and "showStacktrace()".
* Change: In CRL::AllianceFramework, shorten the names of the libraries.
* Change: In CRL::ApParser & CRL::ApDriver, more accurate translation between
Alliance connectors (C record) and Hurricane::Pin objects. Pin are no
longer made square but thin and oriented in the connecting direction.
Use the new fused net for unnamed components.
* New: In CRL::GdsParser, implementation of SREF parsing, i.e. instances.
Due to the unordered nature of the GDS stream, instances creation are
delayed until the whole stream has been parsed and only then are they
created.
For the sake of reading back Alliance s2r GDS, we assume that any
TEXT following a boundary is the Net name the boundary (component)
belongs to.
Create abutment box for Cells, computed from the bounding box, so
the Hurricane QuadTree could work properly.
Make use of the fused net for unnamed components.
* New: In Cumulus/plugins/chip, complete rewrite of the I/O pad management.
Now we can mix real (foundry) pads and a symbolic core.
To cleanly support the de-coupling between the real part and the
symbolic one we introduce a new intermediary hierarchical level, the
corona. We have now:
Chip --> Pads + Corona --> Core.
At chip level (and if we are using real pads) the layout is fully
real (excepting the corona).
The Corona contains everything that is symbolic. It has symbolic
wires extending outward the abutment box to make contact with the
real wires coming from the pads.
In the pad ring we can use corners instances (or not), pad spacers
or directly draw wires between connectors ring pads.
Provide two flavors: placement only or full place & route.
WARNING: If routing in a second step, *do not route* the *Chip* but
the *Corona*.
* Change: In Cumulus/plugins/clocktree, give the modified Cell an
additional extension of "_cts" (Clock Tree Synthesis) instead of
"_clocked", to follow the common convention.
* New: In cumulus/plugins/S2R.py, encapsulate call to Alliance S2R and
reload the translated Cell in the editor.
* New: In cumulus/plugins/core2chip, provide an utility to automatically
create a chip from a core. To work this plugins must have a basic
understanding of the pad functionalities which may differs from
foundry to foundry. So a base class CoreToChip is created, then for
each supported pad foundry a derived class is added. Currently we
support AMS c35b4 and Alliance symbolic cmos.
* Bug: In Anabatic::Configuration, read the right configuration parameter
"anabatic.topRoutinglayer" (Katana), and not the one for Katabatic...
* Change: In Unicorn/cgt.py, process the plugins in alphabetical order
to ensure a reproductible ordering of the menus...
2019-05-22 07:34:32 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/cmos.py
|
Added core2chip support for Phenitec80.
This commit degrades the run success rate of ARMv2a to 87% (40 iters).
* New: In CRLcore/etc/.../kite.conf, add configuration parameters:
katana.termSatReservedlocal
katana.termSatthreshold
for the new edge capacity computation system.
* New: In CRLcore/etc/symbolic/phenitec06/, add support for N. Shimizu
small I/O pads (supplied in phlib80). Tune various parameters of
Anabatic/Katana to increase routing success.
* Change: In CRLcore/alliance/ap/ApParser, make Pin external components,
so RoutingPad will be build upon in global routing.
Do not complain when a I/O pad has a physical instance that did
not exists in the netlist. Just create it (appeared in phlib80).
When no netlist instance exists in a pad, the pad Cell is still
considered as terminal.
* New: In Etesian::BloatCells, new profile named "3metals" better suited
for two routing metals technologies (i.e. Phenitec).
* New: In Anabatic::RawGCellsUnder, new CTOR which take only source &
target points instead of a segment. Needed to manage wide segment for
which the axis to consider is not that of the segment (one axis for
each track it intersect).
* New: In Anabatic::GCell, add a RoutingPad count attribute, for Edge
reservation computation.
* New: In AnabaticEngine::computeEdgeCapacities(), instead of decreasing
all edges of a fixed amount (hTrackReservedLocal), guess the GCell
cluttering from the number of RoutingPads that it contains.
For non-saturated GCells, the four edges are decreased by the number
of RoutingPads. We use the maximum from the two neigboring GCells.
The hTrackReservedLocal parameter is now used only as a *maximum*
that the edge reservation can reach.
If a GCell is saturated (more than 8 RoutingPads, the saturation is
propagated horizontally to 2 neigboring GCells).
* Change: In AutoContactTerminal::getNativeConstraintBox(), use a more
flexible gauge name matching for terminal vertical extensions correction.
Namely, match all "msxlib*" kind of gauges.
* Change: In AutoSegment::setAxis(), add the ability to force the axis
position, even if it is a non-canonical segment. Maybe needed in the
initialisation steo, before the first canonisation is performed.
* New: In NetBuilder, added new methods _do_1G_1PinM1() and _do_2G_1PinM1(),
to manage coronas for Phenitec designs.
To avoid various side effects from segments being too close from
the north / east side of the routing area, make those segments fixeds.
* Change: In KatanaEngine::annotateGlobalGraph(), the management of wide
wires was wrong. The axis to use to find the underlying GCells is the
one of the track, not of the segment. This was creating bad edge
capacity computation under the power ring of a block and subsequently
routing failures.
* New: In Kanata::Manipulator, added method reprocessParallels(), not used
though, but keep it anyway, might be of use later...
* New: In Kanata::Manipulator, added method avoidBlockage() for terminal
METAL2 in non-preferred direction, restrict the terminal and turn
constraint box at the current position of the perpandicular, so it
doesn't create a deadlock in METAL2.
* Change: In SegmentFsm::conflictSolveByPlaceds(), if we cannot break
using the whole overlap, try the first atomic overlap.
* New: In SegmentFsm::_slackenStrap(), manage conflict between a non-prefered
segment and a blockage, this when to call avoidBlockage()...
* New: In Katana::Configuration, management of the new edge computation
parameters:
katana.termSatReservedlocal
katana.termSatthreshold
* New: In Cumulus/plugins/Core2Chip, support for Phenitec I/O pads.
2019-09-17 10:05:54 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/core2chip/phlib80.py
|
Support for mixing real pads & symbolic core. Wrapper around s2r.
* Change: In Hurricane::Error constructors disable the backtrace generation.
(*very* slow).
* Change: In Hurricane::Library::getHierarchicalname(), more compact
naming. Remove the name of the root library.
* New: In Hurricane::Net, new type "FUSED", for component with no net.
More efficient than having one net for each.
* Change: In CellViewer, BreakpointWidget, use Angry Birds icons.
* Change: In CellWidget::State, use the hierarchical name (cached) as key
to the state. This allow to load two cells with the same name but from
different libraries in the widget history.
* Change: In PyGraphics, export "isEnabled()" and "isHighDpi()" functions.
* Change: In CRL/etc/symbolic/cmos/plugin.conf, and
CRL/etc/common/plugin.conf use the physical dimensions converters.
* Change: In CRL/etc/symbolic/cmos/technology.conf, make the GDS layer
table coherent with the default Alliance cmos.rds.
* New: CRL/python/helpers/io.py, put ErrorMessage new implementation here,
along with a new ErrorWidget written in PyQt4. It seems finally that
PyQt4 can be used alongside Coriolis Qt widgets.
New ErrorMessage.catch() static function to manage all exceptions
in except clauses.
* Change: In CRL/python/helpers/, no longer use ErrorMessage.wrapPrint(),
directly print it.
Rewrite the utilities to display Python stack traces "textStacktrace()"
and "showStacktrace()".
* Change: In CRL::AllianceFramework, shorten the names of the libraries.
* Change: In CRL::ApParser & CRL::ApDriver, more accurate translation between
Alliance connectors (C record) and Hurricane::Pin objects. Pin are no
longer made square but thin and oriented in the connecting direction.
Use the new fused net for unnamed components.
* New: In CRL::GdsParser, implementation of SREF parsing, i.e. instances.
Due to the unordered nature of the GDS stream, instances creation are
delayed until the whole stream has been parsed and only then are they
created.
For the sake of reading back Alliance s2r GDS, we assume that any
TEXT following a boundary is the Net name the boundary (component)
belongs to.
Create abutment box for Cells, computed from the bounding box, so
the Hurricane QuadTree could work properly.
Make use of the fused net for unnamed components.
* New: In Cumulus/plugins/chip, complete rewrite of the I/O pad management.
Now we can mix real (foundry) pads and a symbolic core.
To cleanly support the de-coupling between the real part and the
symbolic one we introduce a new intermediary hierarchical level, the
corona. We have now:
Chip --> Pads + Corona --> Core.
At chip level (and if we are using real pads) the layout is fully
real (excepting the corona).
The Corona contains everything that is symbolic. It has symbolic
wires extending outward the abutment box to make contact with the
real wires coming from the pads.
In the pad ring we can use corners instances (or not), pad spacers
or directly draw wires between connectors ring pads.
Provide two flavors: placement only or full place & route.
WARNING: If routing in a second step, *do not route* the *Chip* but
the *Corona*.
* Change: In Cumulus/plugins/clocktree, give the modified Cell an
additional extension of "_cts" (Clock Tree Synthesis) instead of
"_clocked", to follow the common convention.
* New: In cumulus/plugins/S2R.py, encapsulate call to Alliance S2R and
reload the translated Cell in the editor.
* New: In cumulus/plugins/core2chip, provide an utility to automatically
create a chip from a core. To work this plugins must have a basic
understanding of the pad functionalities which may differs from
foundry to foundry. So a base class CoreToChip is created, then for
each supported pad foundry a derived class is added. Currently we
support AMS c35b4 and Alliance symbolic cmos.
* Bug: In Anabatic::Configuration, read the right configuration parameter
"anabatic.topRoutinglayer" (Katana), and not the one for Katabatic...
* Change: In Unicorn/cgt.py, process the plugins in alphabetical order
to ensure a reproductible ordering of the menus...
2019-05-22 07:34:32 -05:00
|
|
|
)
|
2019-05-10 04:58:05 -05:00
|
|
|
set ( pyPluginChip ${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/__init__.py
|
2020-04-08 04:24:42 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/configuration.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/blockpower.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/blockcorona.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/padscorona.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/chip/chip.py
|
Support for Python plugins in CellViewer/Unicorn. ClockTree plugin.
* New: In Hurricane, in CellViewer, create a simpler API to graft menu
and actions into the menubar. Mainly addToMenu() which take care of
the QAction creation but also locate the relevant QMenu, base on
the Qt object name. Regroup all the widget & action creation inside
the body of the constructor, this way almost all actions can be
removed from the attributes of the CellViewer.
addToMenu() is supplied in three flavors:
1. For C++ callbacks in GraphicToolEngines (with a binded
member function method).
2. For running Python scripts to be used by the plugin system.
3. To insert separator in menus (to give a more homogeneous
look).
Remove the last remnants of Stratus scripts (unificated with basic
Python scripts).
* New: In Hurricane, in PyCellViewer, export the interface to graft
Python scripts into the CellViewer menu tree.
* Change: In Etesian, in GraphicEtesianEngine, use the new API to
graft menus & callbacks into the CellViewer.
* Change: In Mauka, in GraphicMaukaEngine, use the new API to
graft menus & callbacks into the CellViewer.
* Change: In Kite, in GraphicKiteEngine, use the new API to
graft menus & callbacks into the CellViewer.
* New: In Cumulus, install Python scripts as plugins for Unicorn under
<PYTHON_SITE_PACKAGES>/cumulus/plugins/.
* New: In Unicorn, in UnicornGui, make uses of the new API for creating
menus in the CellViewer. Creates the stem menu for the P&R tools.
Add a Python initialization mechanism to read the plugins
installeds into <PYTHON_SITE_PACKAGES>/cumulus/plugins/.
2014-06-25 12:50:34 -05:00
|
|
|
)
|
Bug fix, restore the FreePDK 45 (real) support.
* Change: In CRL::LefParser::_macroCbk(), create a Catalog entry for the
newly read MACRO (that is Cell) and sets the Logical, Physical,
InMemory and TerminalNetlist flags.
* Bug: In CRL::LefParser::_siteCbk(), check for NULL cell gauge.
* New: In CRL::AllianceFramework, add setCellGauge(), to set the default
cell gauge. Exported to Python.
* Change: In CRL/etc/common/technology.py, create variables for VIA
layers, so we can modify their properties afterwards.
* New: In CRL/etc/node45/freepdk45, port the configuration files to the
new Python "importable" format.
Note: in kite.py, all the gauges (Routing & Cells) must be named
"LEF.CoreSite" to please my LEF parser, so it can match the gauge
name with the SITE name for standard cells.
* Bug: In Anabatic::NetBuilderVH::_do_2G(), forgotten to be reimplemented
from the base class. Simply redirect to _do_xG().
* Change: In Katana::PowerRailsPlanes::PowerRailsplanes(), create plane
from the layers in the RoutingGauge and their associated blockages
instead of sweeping through all the basic layers.
Allow to distinguish bewteen "METAL" (symbolic) and "metal" (real).
2020-04-27 03:34:19 -05:00
|
|
|
set ( pyTools ${CMAKE_CURRENT_SOURCE_DIR}/tools/blif2vst.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/tools/yosys.py
|
|
|
|
|
)
|
2022-10-14 03:12:03 -05:00
|
|
|
set ( pyPluginSRAM ${CMAKE_CURRENT_SOURCE_DIR}/plugins/sram/__init__.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/sram/sram.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/sram/sram_256x32.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/sram/sramplacer1.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/sram/sramplacer2.py
|
|
|
|
|
)
|
2020-10-07 08:07:16 -05:00
|
|
|
set ( pyPluginAlpha ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/__init__.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/utils.py
|
2020-08-02 11:18:40 -05:00
|
|
|
)
|
2020-10-07 08:07:16 -05:00
|
|
|
set ( pyPluginAlphaBlock ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/__init__.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/__init__.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/configuration.py
|
2020-11-27 11:47:19 -06:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/iospecs.py
|
2020-11-14 11:53:51 -06:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/bigvia.py
|
2020-10-07 08:07:16 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/spares.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/block.py
|
More generic H-Tree support to accomodate the LS180 PLL internal clock.
The H-Tree support is now allowed for any net, not only the clocks and
not only top-level nets. This allow to better management of the LS180
internal clock signal.
* New: In Cell::flattenNets(Instance*,set<string>,uint64_t) new overload
of the function to allow the user to select nets that will *not*
be flattened. This makes the NoClockFlatten flag effectively obsolete,
we keep it for backward compatibility.
The net names can be of non top level ones. In that case, they must
use the name an HyperNet will get (the Occurrence name). For example:
"instance1.instance2.deep_net_name".
* New: In PyCell, update the wrapper for the new parameter of flattenNets(),
new utility function pyListToStringSet() to translate a Python list into
a C++ set of names.
* New: In EtesianEngine, add support for a list of nets to be excluded
from the flattening procedure. Those excluded nets will also be
excludeds from the Coloquinte nets *and* HFNS synthesis, as they
are likely to be manageds by a H-Tree.
* Change: In AnabaticEngine::_loadGrByNet(), now also skip nets that are
flagged as manually detailed route.
* New: In AnabaticEngine::antennaProtect(), do not try to insert diodes
on nets that are already fixed or detaled route. This replace the
clock exclusion.
* New: In cumulus/plugins.{block,htree,chip}, replace the concept
of clock-tree by the more generic H-Tree. That is, we can ask the P&R
to create H-Tree on any net of the design, not only the ones matcheds
as clock. The net does not even need to be top-level.
This is to manage the PLL internal clock generated by the PLL in
the LS180 chip.
Start to change all reference to "clock" into "H-Tree".
* Bug: In cumulus/plugins.chip.powerplanes.Builder._connectHTree(),
there was an inversion of the H & V routing gauges to compute the
track into which put the H-Tree center to corona edge wiring.
This was causing tracks to be used twice, seen in the ao68000 test
bench.
2021-05-30 17:02:23 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/htree.py
|
2020-10-07 08:07:16 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/timing.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/rsmt.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/hfns1.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/hfns2.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/hfns3.py
|
2020-12-27 05:31:43 -06:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/hfns4.py
|
2021-03-29 09:36:16 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/block/matrix.py
|
2020-10-07 08:07:16 -05:00
|
|
|
)
|
|
|
|
|
set ( pyPluginAlphaC2C ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/__init__.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/core2chip.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/cmos.py
|
2020-11-02 10:42:32 -06:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/niolib.py
|
Added support for real LibreSOCIO pads.
* New: In cumulus/plugins.block.configuration, added class ConstantsConf
to store information and create instances of "zero" and "one" cells.
Added attribute in BlockConf class.
* Change: In cumulus/plugins.block.configuration, moved the cell cloning
and saving from block.spares.Spares to configuration.BlockConf as
it is a service that can be used by other modules than just spares.
Other modules may modificate the netlists also, like in XXXX.
* Change: In cumulus/plugins.chip.configuration, in various methods,
manage both cases when the layer is symbolic or real (difference
in accessing the underlying BasicLayers).
* Change: In cumulus/plugins.chip.configuration, less clutered display
of lambda length in trace mode (and use of 'L' as 'l' was too close
to '1').
* Bug: In cumulus/plugins.chip.corona.VerticalSide.addBlockages(),
as the clock are now on the *inner* rail(s), blockage must be on
the *outer* rails (power lines).
* New: In cumulus/plugins.chip.pads.Corner, add support for 45 degree
corners (cfg setting "chip.use45corners").
* New: In cumulus/plugins.chip.pads.Side.check(), correct computation
of the side's length. Was using the ioPadStep instead of the pad
cell width!
* Change: In cumulus/plugins.chip.pads.Corona._padAnalysis(), LibreSOCIO
pads uses Verticals for their ring wires (common sense would want
them *Horizontal*). So they must be included in the physical pin
detection, but in turn this cause havoc in pxlib... So create a
filtering according to the library name. This is *not* robust
but will do for now.
* New: In cumulus/plugins.chip.pad.core2chip.CoreToChip, rename
self.state into self.conf for clarity.
New method newEnableForNet(), to create "enable" nets on the
fly for emulated In/Out pads.
As it can edit the netlist (new "enable" nets) call the
BlockConf.rsave() method instead of direct saving through
AllianceFramework.
Raise NotImplementederror instead of ErrorMessage.
* New: In cumulus/plugins.chip.pad.core2chip.IoPad.createPad(),
on emulated In/Out I/O pad like for LibreSOC, generate on the fly
the right enable signal.
If an enable signal is given, it will be used (backward
compatible with the previous behavior).
* New: In cumulus/plugins.chip.pad.core2chip, support for real
LibreSOCIO pads in libresocio.py module.
2020-11-11 07:29:56 -06:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/libresocio.py
|
2021-12-11 12:52:31 -06:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/core2chip/sky130.py
|
2020-08-02 11:18:40 -05:00
|
|
|
)
|
2020-10-14 08:26:46 -05:00
|
|
|
set ( pyPluginAlphaChip ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/__init__.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/configuration.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/power.py
|
2021-03-02 05:19:18 -06:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/powerplane.py
|
2020-10-14 08:26:46 -05:00
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/corona.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/pads.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/chip/chip.py
|
|
|
|
|
)
|
2021-02-17 17:07:03 -06:00
|
|
|
set ( pyPluginAlphaMacro ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/macro/__init__.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/macro/macro.py
|
|
|
|
|
)
|
2021-12-11 12:52:31 -06:00
|
|
|
set ( pyPluginAlphaHarness ${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/harness/__init__.py
|
|
|
|
|
${CMAKE_CURRENT_SOURCE_DIR}/plugins/alpha/harness/pads.py
|
|
|
|
|
)
|
2010-07-12 10:31:29 -05:00
|
|
|
|
2022-12-31 08:01:37 -06:00
|
|
|
install ( FILES ${pyDesignFlow} DESTINATION ${Python_CORIOLISLIB}/designflow )
|
2021-12-11 12:52:31 -06:00
|
|
|
install ( FILES ${pySources} DESTINATION ${Python_CORIOLISLIB}/cumulus )
|
|
|
|
|
install ( FILES ${pyPlugins} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins )
|
|
|
|
|
install ( FILES ${pyPluginCTS} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/cts )
|
|
|
|
|
install ( FILES ${pyPluginC2C} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/core2chip )
|
|
|
|
|
install ( FILES ${pyPluginC2C} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/core2chip )
|
|
|
|
|
install ( FILES ${pyPluginChip} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/chip )
|
2022-10-14 03:12:03 -05:00
|
|
|
install ( FILES ${pyPluginSRAM} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/sram )
|
2021-12-11 12:52:31 -06:00
|
|
|
install ( FILES ${pyPluginAlpha} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha )
|
|
|
|
|
install ( FILES ${pyPluginAlphaBlock} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha/block )
|
|
|
|
|
install ( FILES ${pyPluginAlphaC2C} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha/core2chip )
|
|
|
|
|
install ( FILES ${pyPluginAlphaChip} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha/chip )
|
|
|
|
|
install ( FILES ${pyPluginAlphaMacro} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha/macro )
|
|
|
|
|
install ( FILES ${pyPluginAlphaHarness} DESTINATION ${Python_CORIOLISLIB}/cumulus/plugins/alpha/harness )
|
|
|
|
|
install ( PROGRAMS ${pyTools} DESTINATION bin )
|