289 lines
95 KiB
HTML
289 lines
95 KiB
HTML
|
<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 3.2 Final//EN" "http://www.w3.org/MarkUp/Wilbur/HTML32.dtd">
|
|||
|
|
<html xmlns="http://www.w3.org/MarkUp/Wilbur/HTML32.dtd">
|
|||
|
|
<head>
|
|||
|
|
<meta http-equiv="Content-Type" content="text/html;charset=utf-8">
|
|||
|
|
<title>LEF/DEF 5.8 Language Reference -- A</title>
|
|||
|
|
<META NAME="Approver" CONTENT="Technical Publications">
|
|||
|
|
<META NAME="Author" CONTENT="Technical Publications">
|
|||
|
|
<META NAME="CreateDate" CONTENT="2017-04-26">
|
|||
|
|
<META NAME="CreateTime" CONTENT="1493186672">
|
|||
|
|
<META NAME="DataType" CONTENT="Manuals">
|
|||
|
|
<META NAME="Description" CONTENT="Describes the syntax for Library Exchange Format (LEF) and Design Exchange Format (DEF) files.">
|
|||
|
|
<META NAME="DocTitle" CONTENT="LEF/DEF 5.8 Language Reference">
|
|||
|
|
<META NAME="DocType" CONTENT="Reference">
|
|||
|
|
<META NAME="EdmsRelease" CONTENT="FM-Wiki-1.0_P005">
|
|||
|
|
<META NAME="FileTitle" CONTENT="A">
|
|||
|
|
<META NAME="Keywords" CONTENT="">
|
|||
|
|
<META NAME="FileType" CONTENT="Chapter">
|
|||
|
|
<META NAME="Keyword" CONTENT="lefdefref">
|
|||
|
|
<META NAME="Language" CONTENT="English">
|
|||
|
|
<META NAME="ModifiedDate" CONTENT="2017-04-26">
|
|||
|
|
<META NAME="ModifiedTime" CONTENT="1493186672">
|
|||
|
|
<META NAME="NextFile" CONTENT="OptimizingLEFTechnology.html">
|
|||
|
|
<META NAME="PageCount" CONTENT="18">
|
|||
|
|
<META NAME="Platform" CONTENT="ALL">
|
|||
|
|
<META NAME="PrevFile" CONTENT="DEFSyntax.html">
|
|||
|
|
<META NAME="Product" CONTENT="Innovus, Languages">
|
|||
|
|
<META NAME="ProductFamily" CONTENT="Digital Implementation, Cadence Shared Tools">
|
|||
|
|
<META NAME="ProductVersion" CONTENT="5.8">
|
|||
|
|
<META NAME="Syntax" CONTENT="&alias &&area = (73600,74400) (238240,236400) &endalias&alias &&core = (85080,85500) (226760,224700) &endalias&alias &&m2stripes = sroute stripe net vss net vdd layer m2width320 count 2 pattern 87900 4200 218100area &&area core &&core &endalias&alias &&m3stripes = sroute stripe net vss net vdd layer m3width600 count 2 pattern 89840 6720 217520area &&area core &&core &endalias&alias &&powerfollowpins = sroute follow net vss net vdd layerm1 width 560 area &&area core &&core &endalias&alias &&powerrepair = sroute repair net vss net vdd area &&area core &&core &endalias# PLACEMENT SITE SECTIONSITE CORE1 SIZE 67.2 BY 6 ; # GCD of all Y sizes of Macros ENDCORE1 SITE IOX SIZE 37.8 BY 444 ; # 151.2 / 4 = 37.8 , 4 sites per pad END IOXSITE IOY SIZE 436.8 BY 30 ; # 150 / 5 = 30 , 5 sites per pad END IOYSITE SQUAREBLOCK SIZE 268.8 BY 252 ; END SQUAREBLOCKSITE I2BLOCK SIZE 672 BY 504 ; END I2BLOCKSITE LBLOCK SIZE 201.6 BY 168 ; END LBLOCKSITE CORNER SIZE 436.8 BY 444 ; END CORNERLAYER POLYS TYPE MASTERSLICE ; END POLYSLAYER PW TYPE MASTERSLICE ; END PWLAYER NW TYPE MASTERSLICE ; END NWLAYER PD TYPE MASTERSLICE ; END PDLAYER ND TYPE MASTERSLICE ; END NDLAYER CUT01 TYPE CUT ; END CUT01LAYER M1 TYPE ROUTING ; DIRECTION VERTICAL ; PITCH 5.6 ; WIDTH2.6 ;SPACING 1.5 ; END M1LAYER CUT12 TYPE CUT ; END CUT12LAYER M2 TYPE ROUTING ; DIRECTION HORIZONTAL ; PITCH 6.0 ; WIDTH 3.2 ;SPACING 1.6 ; END M2LAYER CUT23 TYPE CUT ; END CUT23LAYER M3 TYPE ROUTING ; DIRECTION VERTICAL ; PITCH 5.6 ; WIDTH 3.6;SPACING 1.6 ; END M3LAYER OVERLAP TYPE OVERLAP ; END OVERLAPVIA C2PW DEFAULT LAYER PW ; RECT -2.0 -2.0 2.0 2.0 ;LAYER CUT01 ; RECT -0.6 -0.6 0.6 0.6 ;LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ; END C2PWVIA C2NW DEFAULT LAYER NW ; RECT -2.0 -2.0 2.0 2.0 ;LAYER CUT01 ; RECT -0.6 -0.6 0.6 0.6 ;LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ; END C2NWVIA C2PD DEFAULT LAYER PD ; RECT -2.0 -2.0 2.0 2.0 ;LAYER CUT01 ; RECT -0.6 -0.6 0.6 0.6 ;LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ; END C2PDVIA C2ND DEFAULT LAYER ND ; RECT -2.0 -2.0 2.0 2.0 ;LAYER CUT01 ; RECT -0.6 -0.6 0.6 0.6 ;LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ; END C2NDVIA C2POLY DEFAULT LAYER POLYS ; RECT -2.0 -2.0 2.0 2.0 ;LAYER CUT01 ; RECT -0.6 -0.6 0.6 0.6 ;LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ; END C2POLYVIA VIA12 DEFAULT LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ;LAYER CUT12 ; RECT -0.7 -0.7 0.7 0.7 ;LAYER M2 ; RECT -2.0 -2.0 2.0 2.0 ; END VIA12VIA VIA23 DEFAULT LAYER M3 ; RECT -2.0 -2.0 2.0 2.0 ;LAYER CUT23 ; RECT -0.8 -0.8 0.8 0.8 ;LAYER M2 ; RECT -2.0 -2.0 2.0 2.0 ; END VIA23SPACING SAMENET CUT01 CUT12 4.0 ;SAMENET CUT12 CUT23 4.0 ; END SPACING VIA VIACENTER12 LAYER M1 ; RECT -4.6 -2.2 4.6 2.2 ;LAYER CUT12 ; RECT -3.1 -0.8 -1.9 0.8 ; RECT 1.9 -0.8 3.1 0.8 ;LAYER M2 ; RECT -4.4 -2.0 4.4 2.0 ; END VIACENTER12VIA VIATOP12 LAYER M1 ; RECT -2.2 -2.2 2.2 8.2 ; LAYER CUT12 ; RECT -0.8 5.2 0.8 6.8 ;LAYER M2 ; RECT -2.2 -2.2 2.2 8.2 ; END VIATOP12VIA VIABOTTOM12 LAYER M1 ; RECT -2.2 -8.2 2.2 2.2 ; LAYER CUT12 ; RECT -0.8 -6.8 0.8 -5.2 ;LAYER M2 ; RECT -2.2 -8.2 2.2 2.2 ; END VIABOTTOM12VIA VIALEFT12 LAYER M1 ; RECT -7.8 -2.2 2.2 2.2 ; LAYER CUT12 ; RECT -6.4 -0.8 -4.8 0.8 ;LAYER M2 ; RECT -7.8 -2.2 2.2 2.2 ; END VIALEFT12VIA VIARIGHT12 LAYER M1 ; RECT -2.2 -2.2 7.8 2.2 ; LAYER CUT12 ; RECT 4.8 -0.8 6.4 0.8 ;LAYER M2 ; RECT -2.2 -2.2 7.8 2.2 ; END VIARIGHT12VIA VIABIGPOWER12 LAYER M1 ; RECT -21.0 -21.0 21.0 21.0 ;LAYER CUT12 ; RECT -2.4 -0.8 2.4 0.8 ; RECT -19.0 -19.0 -14.2 -17.4 ; RECT -19.0 17.4 -14.219.0; RECT 14.2 -19.0 19.0 -17.4 ; RECT 14.2 17.4 19.0 19.0 ; RECT -19.0 -0.8 -14.2 0.8 ; RECT -2.4 -19.0 2.4 -17.4 ; RECT 14.2 -0.8 19 0.8 ; RECT -2.4 17.4 2.4 19.0 ;LAYER M2 ; RECT -21.0 -21.0 21.0 21.0 ; END VIABIGPOWER12VIARULE VIALIST12 LAYER M1 ; DIRECTION VERTICAL ; WIDTH 9.0 TO9.6;LAYER M2 ; DIRECTION HORIZONTAL ; WIDTH 3.0 TO 3.0 ;VIA VIACENTER12 ; VIA VIATOP12 ; VIA VIABOTTOM12 ;VIA VIALEFT12 ; VIA VIARIGHT12 ; END VIALIST12VIARULE VIAGEN12 GENERATE LAYER M1 ; ENCLOSURE 0.01 0.05 ;LAYER M2 ; ENCLOSURE 0.01 0.05 ;LAYER CUT12 ;
|
|||
|
|
<META NAME="RightsManagement" CONTENT="Copyright 2017 Cadence Design Systems Inc.">
|
|||
|
|
<META NAME="Title" CONTENT="LEF/DEF 5.8 Language Reference -- A">
|
|||
|
|
<META NAME="TopicTags" CONTENT="FALSE">
|
|||
|
|
<META NAME="Version" CONTENT="5.8">
|
|||
|
|
</head>
|
|||
|
|
<body style="margin-left: 5%;">
|
|||
|
|
<a name="pagetop"></a>
|
|||
|
|
<a name="firstpage"></a>
|
|||
|
|
<!-- Begin Buttons -->
|
|||
|
|
<table width="650" cellpadding="0" cellspacing="0" border="0">
|
|||
|
|
<tr>
|
|||
|
|
<td height="36" width="650" colspan="10">
|
|||
|
|
<img src="images/header_doc.gif" width="650" height="34">
|
|||
|
|
</td>
|
|||
|
|
</tr>
|
|||
|
|
<tr>
|
|||
|
|
<td height="20" width="59">
|
|||
|
|
<a href="javascript:openLibrary()"><img src="../support/nav2_library.gif" border="0" alt="View Library" height="20" width="59"></a>
|
|||
|
|
</td>
|
|||
|
|
<td height="20" width="73">
|
|||
|
|
<a href="lefdefrefTOC.html"><img src="../support/nav2_toc.gif" alt="Table of Contents" border="0"></a>
|
|||
|
|
</td>
|
|||
|
|
|
|||
|
|
<td height="20" width="46">
|
|||
|
|
<a href="lefdefrefIX.html"><img src="../support/nav2_index.gif" border="0"></a>
|
|||
|
|
</td>
|
|||
|
|
<td>
|
|||
|
|
<a href="DEFSyntax.html"><img src="images/nav2_previous.gif" alt="Previous" border="0"></a>
|
|||
|
|
</td>
|
|||
|
|
<td>
|
|||
|
|
<a href="OptimizingLEFTechnology.html"><img src="images/nav_next.gif" alt="Next" border="0"></a>
|
|||
|
|
</td>
|
|||
|
|
<td height="20">
|
|||
|
|
<a>
|
|||
|
|
<a href="lefdefref.pdf"><img src="../support/nav2_print.gif" border="0" alt="Open PDF to print book" height="20" width="114"></a>
|
|||
|
|
</a>
|
|||
|
|
</td>
|
|||
|
|
<td height="20" width="61">
|
|||
|
|
<img src="../support/nav2_black.gif" border="0" height="20" width="76">
|
|||
|
|
</td>
|
|||
|
|
<td height="20" width="76">
|
|||
|
|
<a href="/feedback.htm"><img src="../support/nav2_feedback.gif" border="0" alt="Email Comments" height="20" width="76"></a>
|
|||
|
|
</td>
|
|||
|
|
<td height="20" width="43">
|
|||
|
|
<a href="../cdsuser/help.html"><img src="../support/nav2_help.gif" border="0" alt="Help Using Documentation" height="20" width="43"></a>
|
|||
|
|
</td>
|
|||
|
|
<td height="20" width="37">
|
|||
|
|
<a href="/exitsearch.htm"><img src="../support/nav2_exit.gif" border="0" alt="Shut Down Cadence Documentation Server" height="20" width="37"></a>
|
|||
|
|
</td>
|
|||
|
|
</tr>
|
|||
|
|
</table>
|
|||
|
|
<!-- End Buttons -->
|
|||
|
|
<p>
|
|||
|
|
<hr>
|
|||
|
|
<p>
|
|||
|
|
<h3>
|
|||
|
|
<center>
|
|||
|
|
<font >
|
|||
|
|
<div>LEF/DEF 5.8 Language Reference</div>
|
|||
|
|
<font >
|
|||
|
|
<div></div>
|
|||
|
|
</font>
|
|||
|
|
</font>
|
|||
|
|
</center>
|
|||
|
|
</h3>
|
|||
|
|
<br>
|
|||
|
|
</p>
|
|||
|
|
<div>
|
|||
|
|
<h1>A<a name="918624"> </a></h1>
|
|||
|
|
<h1><a name="920628">Examples</a></h1>
|
|||
|
|
<p><a name="920629">This appendix contains information about the following topics. </a></p>
|
|||
|
|
<div>
|
|||
|
|
<table border="0" cellspacing="0" cellpadding="3" summary="">
|
|||
|
|
<tr valign="baseline">
|
|||
|
|
<td width="31.999679999999998">
|
|||
|
|
<div>
|
|||
|
|
<nobr>
|
|||
|
|
<font color="#000000"><img src="images/b_bullet.gif" alt="ParagraphBullet" border="0"></font>
|
|||
|
|
</nobr>
|
|||
|
|
</div>
|
|||
|
|
</td>
|
|||
|
|
<td><a href="#918644" title="A" name="920631"><font color="Blue"><u>LEF</u></font></a><a href="#918644" title="A"> </a></td>
|
|||
|
|
</tr>
|
|||
|
|
</table>
|
|||
|
|
</div>
|
|||
|
|
<div>
|
|||
|
|
<table border="0" cellspacing="0" cellpadding="3" summary="">
|
|||
|
|
<tr valign="baseline">
|
|||
|
|
<td width="31.999679999999998">
|
|||
|
|
<div>
|
|||
|
|
<nobr>
|
|||
|
|
<font color="#000000"><img src="images/b_bullet.gif" alt="ParagraphBullet" border="0"></font>
|
|||
|
|
</nobr>
|
|||
|
|
</div>
|
|||
|
|
</td>
|
|||
|
|
<td><a href="#918664" title="A" name="920346"><font color="Blue"><u>DEF</u></font></a><a href="#918664" title="A"> </a></td>
|
|||
|
|
</tr>
|
|||
|
|
</table>
|
|||
|
|
</div>
|
|||
|
|
<div>
|
|||
|
|
<table border="0" cellspacing="0" cellpadding="3" summary="">
|
|||
|
|
<tr valign="baseline">
|
|||
|
|
<td width="31.999679999999998">
|
|||
|
|
<div>
|
|||
|
|
<nobr>
|
|||
|
|
<font color="#000000"><img src="images/b_bullet.gif" alt="ParagraphBullet" border="0"></font>
|
|||
|
|
</nobr>
|
|||
|
|
</div>
|
|||
|
|
</td>
|
|||
|
|
<td><a href="#918708" title="A" name="920880"><font color="Blue"><u>Scan Chain Synthesis Example</u></font></a><a href="#918708" title="A"> </a></td>
|
|||
|
|
</tr>
|
|||
|
|
</table>
|
|||
|
|
</div>
|
|||
|
|
<h2><a name="918644">LEF</a></h2>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918645">VERSION 5.7 ;</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="922654"># DEMO4 CHIP - 1280 ARRAY</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="921499"> &alias &&area = (73600,74400) (238240,236400) &endalias<dd> &alias &&core = (85080,85500) (226760,224700) &endalias<dd> &alias &&m2stripes = sroute stripe net vss net vdd layer m2<dd> width<dd> 320 count 2 pattern 87900 4200 218100<dd> area &&area core &&core &endalias<dd> &alias &&m3stripes = sroute stripe net vss net vdd layer m3<dd> width<dd> 600 count 2 pattern 89840 6720 217520<dd> area &&area core &&core &endalias<dd> &alias &&powerfollowpins = sroute follow net vss net vdd layer<dd> m1 width 560 <dd> area &&area core &&core &endalias<dd> &alias &&powerrepair = sroute repair net vss net vdd area <dd> &&area core &&core &endalias<dd># PLACEMENT SITE SECTION<dd>SITE CORE1 SIZE 67.2 BY 6 ; # GCD of all Y sizes of Macros END<dd> CORE1 <dd>SITE IOX SIZE 37.8 BY 444 ; # 151.2 / 4 = 37.8 , 4 sites per pad END IOX<dd>SITE IOY SIZE 436.8 BY 30 ; # 150 / 5 = 30 , 5 sites per pad END IOY<dd>SITE SQUAREBLOCK SIZE 268.8 BY 252 ; END SQUAREBLOCK<dd>SITE I2BLOCK SIZE 672 BY 504 ; END I2BLOCK<dd>SITE LBLOCK SIZE 201.6 BY 168 ; END LBLOCK<dd>SITE CORNER SIZE 436.8 BY 444 ; END CORNER<dd>LAYER POLYS TYPE MASTERSLICE ; END POLYS<dd>LAYER PW TYPE MASTERSLICE ; END PW<dd>LAYER NW TYPE MASTERSLICE ; END NW<dd>LAYER PD TYPE MASTERSLICE ; END PD<dd>LAYER ND TYPE MASTERSLICE ; END ND<dd>LAYER CUT01 TYPE CUT ; END CUT01<dd>LAYER M1 TYPE ROUTING ; DIRECTION VERTICAL ; PITCH 5.6 ; WIDTH2.6 ;<dd> SPACING 1.5 ; <dd>END M1<dd>LAYER CUT12 TYPE CUT ; END CUT12<dd>LAYER M2 TYPE ROUTING ; DIRECTION HORIZONTAL ; PITCH 6.0 ; <dd> WIDTH 3.2 ;SPACING 1.6 ; <dd>END M2<dd>LAYER CUT23 TYPE CUT ; END CUT23<dd>LAYER M3 TYPE ROUTING ; DIRECTION VERTICAL ; PITCH 5.6 ; WIDTH 3.6;<dd> SPACING 1.6 ; <dd>END M3<dd>LAYER OVERLAP TYPE OVERLAP ; END OVERLAP<br>VIA C2PW DEFAULT LAYER PW ; RECT -2.0 -2.0 2.0 2.0 ;<br> LAYER CUT01 ; RECT -0.6 -0.6 0.6 0.6 ;<br> LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ; <br>END C2PW<br>VIA C2NW DEFAULT LAYER NW ; RECT -2.0 -2.0 2.0 2.0 ;<br> LAYER CUT01 ; RECT -0.6 -0.6 0.6 0.6 ;<br> LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ; <br>END C2NW<br>VIA C2PD DEFAULT LAYER PD ; RECT -2.0 -2.0 2.0 2.0 ;<br> LAYER CUT01 ; RECT -0.6 -0.6 0.6 0.6 ;<br> LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ; <br>END C2PD<br>VIA C2ND DEFAULT LAYER ND ; RECT -2.0 -2.0 2.0 2.0 ;<br> LAYER CUT01 ; RECT -0.6 -0.6 0.6 0.6 ;<br> LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ; <br>END C2ND<br>VIA C2POLY DEFAULT LAYER POLYS ; RECT -2.0 -2.0 2.0 2.0 ;<br> LAYER CUT01 ; RECT -0.6 -0.6 0.6 0.6 ;<br> LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ; <br>END C2POLY<br>VIA VIA12 DEFAULT LAYER M1 ; RECT -2.0 -2.0 2.0 2.0 ;<br> LAYER CUT12 ; RECT -0.7 -0.7 0.7 0.7 ;<br> LAYER M2 ; RECT -2.0 -2.0 2.0 2.0 ; <br>END VIA12<br>VIA VIA23 DEFAULT LAYER M3 ; RECT -2.0 -2.0 2.0 2.0 ;<br> LAYER CUT23 ; RECT -0.8 -0.8 0.8 0.8 ;<br> LAYER M2 ; REC
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918648">MACRO IN1X class pad ; FOREIGN IN1X ; SIZE 151.2 BY 444 ; <dd> SYMMETRY X ; SITE IOX ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M1 ; PATH 61.6 444 72.8 444 ; END <dd> END Z<dd> PIN PO DIRECTION OUTPUT ;<dd> PORT LAYER M1 ; PATH 78.4 444 84.0 444 ; END <dd> END PO<dd> PIN A DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 95.2 444 100.8 444 ; END <dd> END A<dd> PIN PI DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 106.4 444 112 444 ; END <dd> END PI<dd> PIN VDD DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M2 ; WIDTH 20 ; PATH 10 200 141.2 200 ; END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M1 ; WIDTH 20 ; PATH 10 100 141.2 100 ; END <dd> END VSS <dd>END IN1X</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918649">MACRO IN1Y EEQ IN1X ; FOREIGN IN1Y ; class pad ;SIZE 436.8 BY 150 ; <dd> SYMMETRY Y ; SITE IOY ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 0 69 0 75 ; END <dd> END Z<dd> PIN PO DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 0 81 0 87 ; END <dd> END PO<dd> PIN A DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 0 51 0 57 ; END <dd> END A<dd> PIN PI DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 0 39 0 45 ; END <dd> END PI<dd> PIN VDD DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M2 ; WIDTH 20 ; PATH 236.8 10 236.8 140 ; END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M2 ; WIDTH 20 ; PATH 336.8 10 336.8 140 ; END <dd> END VSS <dd>END IN1Y</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918650">MACRO FILLER FOREIGN FILLER ; SIZE 67.2 BY 6 ; SYMMETRY X Y;<dd> SITE CORE1 ;<dd> PIN VDD DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M1 ; RECT 45.8 0 55 6 ; END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M1 ; RECT 12.2 0 21.4 6 ; END <dd> END VSS<dd> OBS LAYER M1 ; RECT 24.1 1.5 43.5 4.5 ; END <dd>END FILLER</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918651">MACRO INV FOREIGN INVS ; SIZE 67.2 BY 24 ; SYMMETRY X Y ; SITE CORE1 ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 30.8 9 42 9 ; END <dd> END Z<dd> PIN A DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 25.2 15 ; END <dd> END A<dd> PIN VDD DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 50.4 4.6 50.4 13.4 ; END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 16.8 4.6 16.8 13.4 ; END<dd> END VSS<dd> OBS LAYER M1 ; RECT 24.1 1.5 43.5 16.5 ; END <dd>END INV</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="921521">MACRO BUF FOREIGN BUFS ; SIZE 67.2 BY 126 ; SYMMETRY X Y ; SITE<dd> CORE1 ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 25.2 39 42 39 ; END <dd> END Z<dd> PIN A DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 30.8 33 ; END <dd> END A<dd> PIN VDD DIRECTION INOUT ; SHAPE FEEDTHRU ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; <dd> PATH 50.4 4.6 50.4 10.0 56.0 10.0 56.0 115.8 50.4 115.8<dd> 50.4 121.4 ; END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE FEEDTHRU ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; <dd> PATH 16.8 4.6 16.8 10.0 11.2 10.0 11.2 115.8 16.8 115.8<dd> 16.8 121.4 ; END <dd> END VSS<dd> OBS LAYER M1 ; RECT 24.1 1.5 43.5 124.5 ; END <dd>END BUF</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="921522">MACRO BIDIR1X FOREIGN BIDIR1X ; class pad ; SIZE 151.2 BY 444 ;<dd> SYMMETRY X ; SITE IOX ;<dd> PIN IO DIRECTION INOUT ;<dd> PORT LAYER M1 ; PATH 61.6 444 67.2 444 ; END <dd> END IO<dd> PIN ZI DIRECTION OUTPUT ;<dd> PORT LAYER M1 ; PATH 78.4 444 84.0 444 ; END <dd> END ZI<dd> PIN PO DIRECTION OUTPUT ;<dd> PORT LAYER M1 ; PATH 95.2 444 100.8 444 ; END <dd> END PO<dd> PIN A DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 106.4 444 112.0 444 ; END <dd> END A<dd> PIN EN DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 134.4 444 140.0 444 ; END <dd> END EN<dd> PIN TN DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 28.0 444 33.6 444 ; END <dd> END TN<dd> PIN PI DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 44.8 444 50.4 444 ; END <dd> END PI<dd> PIN VDD DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M2 ; WIDTH 20 ; PATH 10 200 141.2 200 ; END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M1 ; WIDTH 20 ; PATH 10 100 141.2 100 ; END <dd> END VSS <dd>END BIDIR1X</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="922181">MACRO BIDIR1Y EEQ BIDIR1X ; class pad ; FOREIGN BIDIR1Y ; SIZE 436.8<dd> BY 150 ; SYMMETRY Y ; SITE IOY ;<dd> PIN IO DIRECTION INOUT ;<dd> PORT LAYER M2 ; PATH 0 69 0 75 ; END END IO<dd> PIN ZI DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 0 93 0 99 ; END END ZI<dd> PIN PO DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 0 81 0 87 ; END END PO<dd> PIN A DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 0 15 0 21 ; END END A<dd> PIN EN DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 0 27 0 33 ; END END EN<dd> PIN TN DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 0 39 0 45 ; END END TN<dd> PIN PI DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 0 51 0 57 ; END END PI<dd> PIN VDD DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M2 ; WIDTH 20 ; PATH 236.8 10 236.8 140 ; END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M2 ; WIDTH 20 ; PATH 336.8 10 336.8 140 ; END <dd> END VSS <dd>END BIDIR1Y</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="922182">MACRO OR2 FOREIGN OR2S ; SIZE 67.2 BY 42 ; SYMMETRY X Y ; SITE<dd> CORE1 ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 25.2 39 42 39 ; END <dd> END Z<dd> PIN A DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 25.2 15 ; END <dd> END A<dd> PIN B DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 25.2 3 ; END <dd> END B<dd> PIN VDD DIRECTION INOUT ; SHAPE FEEDTHRU ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; <dd> PATH 50.4 4.6 50.4 10.0 ; PATH 50.4 27.4 50.4 37.4 ;<dd> VIA 50.4 3 C2PW ; VIA 50.4 21 C2PW ; VIA 50.4 33 C2PW ;<dd> VIA 50.4 39 C2PW ; END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE FEEDTHRU ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 16.8 4.6 16.8 10.0 ; <dd> PATH 16.8 27.4 16.8 37.4 ;<dd> VIA 16.8 3 C2NW ; VIA 16.8 15 C2NW ; VIA 16.8 21 C2NW ;<dd> VIA 16.8 33 C2NW ; VIA 16.8 39 C2NW ; END <dd> END VSS<dd> OBS LAYER M1 ; RECT 24.1 1.5 43.5 40.5 ; END <dd>END OR2</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918656">MACRO AND2 FOREIGN AND2S ; SIZE 67.2 BY 84 ; SYMMETRY X Y ; SITE<dd> CORE1 ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 25.2 39 42 39 ; END <dd> END Z<dd> PIN A DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 42 15 ; END <dd> END A<dd> PIN B DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 42 3 ; END <dd> END B<dd> PIN VDD DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 50.4 4.6 50.4 79.4 ; END<dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE ABUTMENT ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 16.8 4.6 16.8 79.4 ; END <dd> END VSS<dd> OBS LAYER M1 ; RECT 24.1 1.5 43.5 82.5 ; END <dd>END AND2</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918657">MACRO DFF3 FOREIGN DFF3S ; SIZE 67.2 BY 210 ; SYMMETRY X Y ; SITE<dd> CORE1 ;<dd> PIN Q DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 19.6 99 47.6 99 ; END <dd> END Q<dd> PIN QN DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 25.2 123 42 123 ; END <dd> END QN<dd> PIN D DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 30.8 51 ; END <dd> END D<dd> PIN G DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 25.2 3 ; END <dd> END G<dd> PIN CD DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 36.4 75 ; END <dd> END CD<dd> PIN VDD DIRECTION INOUT ; SHAPE FEEDTHRU ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 50.4 4.6 50.4 205.4 ;<dd> END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE FEEDTHRU ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 16.8 4.6 16.8 205.4 ;<dd> END <dd> END VSS<dd> OBS LAYER M1 ; RECT 24.1 1.5 43.5 208.5 ; PATH 8.4 3 8.4 123 ;<dd> PATH 58.8 3 58.8 123 ; PATH 64.4 3 64.4 123; END <dd>END DFF3</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918658">MACRO NOR2 FOREIGN NOR2S ; SIZE 67.2 BY 42 ; SYMMETRY X Y ; SITE<dd> CORE1 ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M1 ; PATH 42 33 ; END <dd> END Z<dd> PIN A DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 25.2 15 ; END <dd> END A<dd> PIN B DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 36.4 9 ; END <dd> END B<dd> PIN VDD DIRECTION INOUT ; SHAPE FEEDTHRU ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 50.4 4.6 50.4 37.4 ; END<dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE FEEDTHRU ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 16.8 4.6 16.8 37.4 ; END<dd> END VSS<dd> OBS LAYER M1 ; RECT 24.1 1.5 43.5 40.5 ; END <dd>END NOR2</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918659">MACRO AND2J EEQ AND2 ; FOREIGN AND2SJ ; SIZE 67.2 BY 48 ;<dd> SYMMETRY X Y ; ORIGIN 0 6 ; SITE CORE1 ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 25.2 33 42 33 ; END <dd> END Z<dd> PIN A DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 42 15 ; END <dd> END A<dd> PIN B DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 42 3 ; END <dd> END B<dd> PIN VDD DIRECTION INOUT ; SHAPE FEEDTHRU ;<dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 50.4 -1.4 50.4 37.4 ;<dd> END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE FEEDTHRU ; <dd> PORT LAYER M1 ; WIDTH 5.6 ; PATH 16.8 -1.4 16.8 37.4 ;<dd> END <dd> END VSS<dd> OBS LAYER M1 ; RECT 24.1 1.5 43.5 34.5 ; END <dd>END AND2J</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918660">MACRO SQUAREBLOCK FOREIGN SQUAREBLOCKS ; CLASS RING ;SIZE 268.8<dd> BY 252 ; SITE SQUAREBLOCK ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 22.8 21 246.0 21 ; END <dd> END Z<dd> PIN A DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 64.4 33 137.2 33 ; <dd> PATH 137.2 33 137.2 69 ; PATH 137.2 69 204.4 69 ; END<dd> END A<dd> PIN B DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 22.8 129 246.0 129 ; END <dd> END B<dd> PIN C DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 70 165 70 153 ; PATH 70 153 126 153 ;<dd> END <dd> END C<dd> PIN D DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 22.8 75 64.4 75 ; END <dd> END D<dd> PIN E DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 22.8 87 64.4 87 ; END <dd> END E<dd> PIN F DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 22.8 99 64.4 99 ; END <dd> END F<dd> PIN G DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 22.8 111 64.4 111 ; END <dd> END G<dd> PIN VDD DIRECTION INOUT ; SHAPE RING ; <dd> PORT LAYER M1 ; WIDTH 3.6 ; PATH 4.0 3.5 4.0 248 ;<dd> PATH 264.8 100 264.8 248 ; PATH 150 3.5 150 100 ;<dd> LAYER M2 ; WIDTH 3.6 ; PATH 4.0 3.5 150 3.5 ;<dd> PATH 150 100 264.8 100 ; PATH 4.0 248 264.8 248 ; END<dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE RING ;<dd> PORT LAYER M1 ; WIDTH 3.6 ; PATH 10 10 10 150 ;<dd> PATH 100 150 100 200 ; PATH 50 200 50 242 ; <dd> PATH 258.8 10 258.8 242 ; LAYER M2 ; WIDTH 3.6 ;<dd> PATH 10 150 100 150 ; PATH 100 200 50 200 ; <dd> PATH 10 10 258.8 10 ; PATH 50 242 258.8 242 ; END <dd> END VSS<dd> OBS LAYER M1 ; RECT 13.8 14.0 255.0 237.2 ; END <dd>END SQUAREBLOCK</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918661">MACRO I2BLOCK FOREIGN I2BLOCKS ; CLASS RING ; SIZE 672 BY 504 ; <dd> SITE I2BLOCK ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 22.8 21 649.2 21 ; END <dd> END Z<dd> PIN A DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 22.8 63 154.0 63 ; PATH 154.0 63 154.0<dd> 129; <dd> PATH 154.0 129 447.6 129 ; END <dd> END A<dd> PIN B DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 137.2 423 447.6 423 ; END <dd> END B<dd> PIN C DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 204.4 165 271.6 165 ; END <dd> END C<dd> PIN D DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 204.4 171 271.6 171 ; END <dd> END D<dd> PIN E DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 204.4 213 204.4 213 ; END <dd> END E<dd> PIN F DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 406 249 406 273 ; END <dd> END F<dd> PIN G DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 338.8 249 338.8 273 ; END <dd> END G<dd> PIN H DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 372.4 357 372.4 381 ; END <dd> END H<dd> PIN VDD DIRECTION INOUT ; SHAPE RING ;<dd> PORT LAYER M1 ; WIDTH 3.6 ; PATH 668 3.5 668 80.5 ; <dd> PATH 467 80.5 467 465.5 ; PATH 668 465.5 668 500.5 ;<dd> PATH 4 500.5 4 465.5 ; PATH 138 465.5 138 80.5 ; <dd> PATH 4 80.5 4 3.5 ; LAYER M2 ; WIDTH 3.6 ; PATH 4 3.5 668 3.5;<dd> PATH 668 80.5 467 80.5 ; PATH 467 465.5 668 465.5 ; <dd> PATH 668 500.5 4 500.5 ; PATH 4 465.5 138 465.5 ; <dd> PATH 138 80.5 4 80.5 ; END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ; SHAPE RING ;<dd> PORT LAYER M1 ; WIDTH 3.6 ; PATH 662 10 662 74 ; <dd> PATH 461 74 461 472 ; PATH 662 472 662 494 ; PATH 10 494 10<dd> 472;<dd> PATH 144 472 144 74 ; PATH 10 74 10 10 ;LAYER M2 ; WIDTH<dd> 3.6 ;<dd> PATH 10 10 662 10 ; PATH 662 74 461 74 ; PATH 461 472 662<br> 472 ;<br> PATH 662 494 10 494 ; PATH 10 472 144 472 ; PATH 144 74 10<br> 74 ;<br> END <br> END VSS<br> OBS LAYER M1 ; RECT 14 14 658 70 ; RECT 14 476 658 490 ; <br> RECT 148 14 457 490 ; # rectilinear shape description<br> LAYER OVERLAP ; RECT 0 0 672 84 ; RECT 134.4 84 470.4 462 ; <br> RECT 0 462 672 504&nb
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918662">MACRO LBLOCK FOREIGN LBLOCKS ; CLASS RING ; SIZE 201.6 BY 168 ; SITE<dd> LBLOCK ;<dd> PIN Z DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 2.8 15 198.8 15 ; END <dd> END Z<dd> PIN A DIRECTION OUTPUT ;<dd> PORT LAYER M2 ; PATH 2.8 81 137.2 81 ; PATH 137.2 81 137.2<dd> 69 ;<dd> PATH 137.2 69 198.8 69 ; END <dd> END A<dd> PIN B DIRECTION INPUT ;<dd> PORT LAYER M2 ; PATH 2.8 165 64.4 165 ; END <dd> END B<dd> PIN C DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 2.8 93 2.8 105 ; END <dd> END C<dd> PIN D DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 64.4 93 64.4 105 ; END <dd> END D<dd> PIN E DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 198.8 39 198.8 39 ; END <dd> END E<dd> PIN F DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 198.8 45 198.8 45 ; END <dd> END F<dd> PIN G DIRECTION INPUT ;<dd> PORT LAYER M1 ; PATH 2.8 111 2.8 111 ; END END G<dd> PORT LAYER M2 ; WIDTH 3.6 ; PATH 1.8 27 199.8 27 ; END <dd> END VDD<dd> PIN VSS DIRECTION INOUT ;<dd> PORT LAYER M2 ; WIDTH 3.6 ; PATH 1.8 57 199.8 57 ; END <dd> END VSS<dd> OBS LAYER M2 ; RECT 1.0 80 66.2 166.5 ; RECT 1.0 1.5 200.6 23 ;<dd> RECT 1.0 31 200.6 53 ; RECT 1.0 61 200.6 82.5 ;<dd> # rectilinear shape description<dd> LAYER OVERLAP ; RECT 0 0 201.6 84 ; RECT 0 84 67.2 168 ; <dd> END <dd>END LBLOCK</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="921026">END LIBRARY</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<h2><a name="918664">DEF</a></h2>
|
|||
|
|
<p><a name="918665">The following example shows a design netlist.</a></p>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918666">DESIGN DEMO4CHIP ;<dd>TECHNOLOGY DEMO4CHIP ;<dd>UNITS DISTANCE MICRONS 100 ;<dd>COMPONENTS 243 ;</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="921046">- CORNER1 CORNER ; - CORNER2 CORNER ; - CORNER3 CORNER ; <dd>- CORNER4 CORNER ; - C01 IN1X ; - C02 IN1Y ; - C04 IN1X ; <dd>- C05 IN1X ; - C06 IN1Y ;<dd>- C07 IN1Y ; - C08 IN1Y ; - C09 IN1Y ; - C10 IN1X ; - C11 IN1X ; <dd>- C13 BIDIR1Y ; - C14 INV ; - C15 BUF ; - C16 BUF ; - C17 BUF ;<dd>- C19 BIDIR1Y ; - C20 INV ; - C21 BUF ; - C22 BUF ; - C23 BUF ;<dd>- C25 BIDIR1Y ; - C26 INV ; - C27 BUF ; - C28 BUF ; - C29 BUF ;<dd>- C31 BIDIR1Y ; - C32 INV ; - C33 BUF ; - C34 BUF ; - C35 BUF ;<dd>- C37 BIDIR1X ; - C39 INV ; - C40 BUF ; - C41 BUF ; - C42 BUF ;<dd>- C44 BIDIR1X ; - C45 INV ; - C46 BUF ; - C47 BUF ; - C48 BUF ;<dd>- C50 BIDIR1Y ; - C51 INV ; - C52 BUF ; - C53 BUF ; - C54 BUF ;<dd>- C56 BIDIR1X ; - C57 INV ; - C58 BUF ; - C59 BUF ; - C60 BUF ;<dd>- D02 BIDIR1X ; - D03 INV ; - D04 BUF ; - D05 BUF ; - D06 BUF ;<dd>- D08 BIDIR1X ; - D09 INV ; - D10 BUF ; - D11 BUF ; - D12 BUF ;<dd>- D14 BIDIR1X ; - D15 INV ; - D16 BUF ; - D17 BUF ; - D19 BUF ;<dd>- D33 BIDIR1Y ; - D34 INV ; - D35 BUF ; - D36 BUF ; - D37 BUF ;<dd>- D39 BIDIR1Y ; - D40 INV ; - D41 BUF ; - D42 BUF ; - D43 BUF ;<dd>- D45 BIDIR1Y ; - D46 INV ; - D47 BUF ; - D48 BUF ; - D49 BUF ; <dd>- D82 OR2 ; - D83 OR2 ; - D84 OR2 ; - D85 OR2 ; - D86 OR2 ; <br>- D87 OR2 ; - D88 OR2 ; - D89 OR2 ; - D90 OR2 ; - D91 OR2 ; <br>- D92 OR2 ; - D93 OR2 ; <br>- E01 AND3 ; - E02 AND3 ; - E03 AND3 ; - E04 AND3 ; - E05 AND3 ; <br>- E06 AND3 ; - E07 AND3 ; - E08 AND3 ; - E09 AND3 ; - E10 AND3 ; <br>- E11 AND3 ; - E12 AND3 ; - E13 AND3 ; - E14 AND3 ; - E15 AND3 ; <br>- E16 AND3 ; <br>- EE16 IN1X ; - E17 IN1X ; - E18 IN1X ; - E19 IN1X ; - E20 IN1X ;<br>- E21 IN1X ; - E22 IN1X ; - E23 IN1Y ; - E24 IN1Y ; - E25 IN1Y ;<br>- E26 INV ; - E27 AND2 ; - E28 AND2 ; - E29 AND2 ; - E30 AND2 ;<br>- E31 AND2 ; - E32 AND2 ; - E33 OR2 ; - E34 OR2 ; - E35 OR2 ;<br>- E36 OR2 ; - E37 IN1Y ; - E38A01 DFF3 ; - E38A02 DFF3 ; <br>- E38A03 DFF3 ;- E38A04 DFF3 ; - E38A05 DFF3 ; - F01 I2BLOCK ; <br>- F04 OR2 ; - F06 OR2 ; - F07 OR2 ; - F08 OR2 ; - F09 SQUAREBLOCK ;<br>- F12 LBLOCK ; <br>- Z14 INV ; - Z15 BUF ; - Z16 BUF ; - Z17 BUF ; - Z20 INV ; <br>- Z21 BUF ; - Z22 BUF ; - Z23 BUF ; - Z26 INV ; - Z27 BUF ; <br>- Z28 BUF ; - Z29 BUF ; - Z32 INV ; - Z33 BUF ; - Z34 BUF ; <br>- Z35 BUF ; - Z39 INV ; - Z40 BUF ; - Z41 BUF ; - Z42 BUF ; <br>- Z45 INV ; - Z46 BUF ; - Z47 BUF ; - Z48 BUF ; - Z51 INV ;<br>- Z52 BUF ; - Z53 BUF ; - Z54 BUF ; - Z57 INV ; - Z58 BUF ; - Z59 BUF ;<br>- Z60 BUF ; - Z1
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="921477">NETS 222 ; <dd>- VDD ( Z216 B ) ( Z215 B ) ( Z214 C ) ( Z214 B ) <dd>( Z213 C ) ( Z213 B ) ( Z212 C ) ( Z212 B ) ( Z211 C ) ( Z211 B )<dd>( Z210 C ) ( E23 Z ) ( Z143 Z ) ( Z142 Z ) ( Z141 Z ) ( Z119 Z )<dd>( Z117 Z ) ( Z116 Z ) ( Z106 Z ) ( Z105 Z ) ( Z104 Z ) ( Z34 Z )<dd>( Z33 Z ) ( Z28 Z ) ( Z27 Z ) ( Z22 Z ) ( Z21 Z ) ( Z16 Z ) <dd>( Z15 Z ) ( D45 PO ) ( D14 PO ) ( C01 PI ) ( D45 TN ) ( D39 TN )<dd>( D33 TN ) ( D14 TN ) ( D08 TN ) ( D02 TN ) ( C56 TN ) ( C50 TN )<dd>( C44 TN ) ( C37 TN ) ( C31 TN ) ( C25 TN ) ( C19 TN ) ( C13 TN ) ;<dd>- VSS ( Z209 C ) ( Z208 C ) ( Z207 C ) ( Z206 C ) ( Z205 C )<dd>( Z204 C ) ( Z203 C ) ( Z202 C ) ( Z201 C ) ( Z149 Z ) ( Z148 Z )<dd>( Z147 Z ) ( Z137 Z ) ( Z136 Z ) ( Z135 Z ) ( Z112 Z ) ( Z111 Z )<dd>( Z110 Z ) ( Z60 Z ) ( Z59 Z ) ( Z58 Z ) ( Z54 Z ) ( Z53 Z )<dd>( Z52 Z ) ( Z47 Z ) ( Z46 Z ) ( Z41 Z ) ( Z40 Z ) ( E18 Z ) <dd>( D49 Z ) ( D43 Z ) ( D45 A ) ( D39 A ) ( D33 A ) ( D14 A )<dd>( D08 A ) ( D02 A ) ( C56 A ) ( C50 A ) ( C44 A ) ( C37 A ) <dd>( C31 A ) ( C25 A ) ( C19 A ) ( C13 A ) ; - XX1001 ( Z38A04 G )<dd>( Z38A02 G ) ; - XX100 ( Z38A05 G ) ( Z38A03 G ) ( Z38A01 G ) ;<dd>- XX907 ( Z236 B ) ( Z235 B ) ; - XX906 ( Z234 B ) ( Z233 B ) ; <dd>- XX904 ( Z232 B ) ( Z231 B ) ; - XX903 ( Z230 B ) ( Z229 B ) ; <dd>- XX902 ( Z228 B ) ( Z227 B ) ; <dd>- XX900 ( Z235 A ) ( Z233 A ) ( Z232 A ) ( Z230 A ) ( Z228 A ) ( Z226 A ) ; <dd>- Z38QN4 ( Z38A04 QN ) ( Z210 B ) ; - COZ131 ( Z38A04 Q ) ( Z210 A ) ; <dd>- Z38QN3 ( Z38A03 QN ) ( Z209 B ) ; - COZ121 ( Z38A03 Q ) ( Z209 A ) ;<dd>- Z38QN2 ( Z38A02 QN ) ( Z208 B ) ; - COZ111 ( Z38A02 Q ) ( Z208 A ) ;<dd>- Z38QN1 ( Z38A01 QN ) ( Z207 B ) ; - COZ101 ( Z38A01 Q ) ( Z207 A ) ;<dd>- XX901 ( Z236 A ) ( Z234 A ) ( Z231 A ) ( Z229 A ) ( Z227 A ) ( Z226 Z )<dd> ( Z193 A ) ; <dd>- X415 ( Z149 A ) ( Z148 A ) ( Z147 A ) ( Z146 Z ) ; - X413 ( Z143 A )<br> ( Z142 A ) ( Z141 A ) ( Z140 Z ) ; <br>- X411 ( Z137 A ) ( Z136 A ) ( Z135 A ) ( Z134 Z ) ; <br>- X405 ( Z119 A ) ( Z117 A ) ( Z116 A ) ( Z115 Z ) ; <br>- X403 ( Z112 A ) ( Z111 A ) ( Z110 A ) ( Z109 Z ) ; <br>- X401 ( Z106 A ) ( Z105 A ) ( Z104 A ) ( Z103 Z ) ; <br>- X315 ( Z60 A ) ( Z59 A ) ( Z58 A ) ( Z57 Z ) ; <br>- X313 ( Z54 A ) ( Z53 A ) ( Z52 A ) ( Z51 Z ) ; <br>- DIS051 ( Z216 A ) ( Z48 Z ) ; <br>- X311 ( Z48 A ) ( Z47 A ) ( Z46 A ) ( Z45 Z ) ; <br>- DIS041 ( Z215 A ) ( Z42 Z ) ; - X309 ( Z42 A ) ( Z41 A ) ( Z40 A ) <br> ( Z39 Z ) ;<br>- X307 ( Z35 A ) ( Z34 A ) ( Z33 A ) ( Z32 Z ) ;<br>- DIS031 ( Z214 A ) ( Z35 Z ) ; - DIS021 ( Z213 A ) ( Z29 Z ) ;<br>- X305 ( Z29 A ) ( Z28 A ) ( Z27 A ) ( Z26 Z ) ;<br>- DIS011 ( Z212 A ) ( Z23 Z ) ;<br>- X303 ( Z23 A ) ( Z22 A ) ( Z21 A ) ( Z20 Z ) ;<br>- DIS001 ( Z211 A ) ( Z17 Z ) ;<br>- X301 ( Z17 A ) ( Z16 A ) ( Z15 A ) ( Z14 Z ) ;<br>- X1000 ( E38A05 G ) ( E38A03 G ) ( E38A01 G ) ( E37 Z ) ;<br>- CNTEN ( Z38A05 Q ) ( E38A05 Q ) ( E25 A ) ;<br>- VIH20 ( E37 PI ) ( E25 PO ) ; - X0907 ( E36 B ) ( E35 B ) ( E25 Z ) ;<br>- CCLK0 ( F09 A ) ( E24 A ) ; - VIH19 ( E25 PI ) ( E24 PO ) ;<br>- X0906 ( E34 B ) ( E33 B ) ( E24 Z ) ; - CATH1 ( F09 Z ) ( E23 A ) ;<br>- VIH18 ( E24 PI ) ( E23 PO ) ; - CRLIN ( F08 Z ) ( E22 A ) ;<br>- VIH17 ( E23 PI ) ( E22 PO ) ; - X0904 ( E32 B ) ( E31 B ) ( E22 Z ) ;<br>- NXLIN ( F07 Z ) ( E21 A ) ; - VIH16 ( E22 PI ) ( E21 PO ) ;<br>- X0903 ( E30 B ) ( E29 B ) ( E21 Z ) ; - RPT1 ( F06 Z ) ( E20 A ) ;<br>- VIH15 ( E21 PI ) ( E20 PO ) ; - X0902 ( E28 B ) ( E27 B ) ( E20 Z ) ;<br>- AGISL ( F04 Z ) ( E19 A ) ; - VIH1
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="918674">#</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<h2><a name="918708">Scan Chain Synthesis Example</a></h2>
|
|||
|
|
<p><a name="919700">You define the scan chain in the </a><font size="2" face="'Courier New'" color="#000000">COMPONENTS</font> and <font size="2" face="'Courier New'" color="#000000">SCANCHAINS</font> sections in your DEF file. </p>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="919709"> COMPONENTS 100 ;<dd> - SIN MUX ;<dd> - SOUT PAD ;<dd> - C1 SDFF ;<dd> - C2 SDFF ;<dd> - C3 SDFF ;<dd> - C4 SDFF ;<dd> - B1 BUF ;<dd> - A1 AND ; ...<dd> END COMPONENTS</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="919710"> NETS 150 ;<dd> - N1 (C1 SO) (C3 SI) ;<dd> - N2 (C3 SO) (A1 A) ; ...<dd> END NETS</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<p><a name="919711">You do not need to define any scan nets in the </a><font size="2" face="'Courier New'" color="#000000">NETS</font> section. This portion of the <font size="2" face="'Courier New'" color="#000000">NETS</font> section shows the effect of the scan chain process on existing nets that use components you specify in the <font size="2" face="'Courier New'" color="#000000">SCANCHAINS</font> section.</p>
|
|||
|
|
<dl>
|
|||
|
|
<font size="2" face="'Courier New'" color="#000000"><a name="919712"> SCANCHAINS 1 ;<dd> - SC <dd> + COMMONSCANPINS (IN SI) (OUT SO)<dd> + START SIN Z2<dd> + FLOATING C1 C2 C3<dd> + ORDERED C4 B1 (IN A) (OUT Q) ;<dd> + STOP SOUT A ;<dd> END SCANCHAINS</a></font>
|
|||
|
|
</dl>
|
|||
|
|
<p><a name="919713">Because components C1, C2, and C3 are floating, </a><font size="2" face="'Courier New'" color="#000000">TROUTE SCANCHAIN</font> can synthesize them in any order in the chain. <font size="2" face="'Courier New'" color="#000000">TROUTE</font> synthesizes ordered components (C4 and B1) in the order you specify.</p>
|
|||
|
|
</div>
|
|||
|
|
<br>
|
|||
|
|
<a href="#pagetop">Return to top of page</a>
|
|||
|
|
<hr>
|
|||
|
|
<hr align="left">
|
|||
|
|
<div style="text-align: left;">
|
|||
|
|
<!-- Begin Buttons -->
|
|||
|
|
<table width="650" cellpadding="0" cellspacing="0" border="0">
|
|||
|
|
<tr>
|
|||
|
|
<td height="20" width="59">
|
|||
|
|
<a href="javascript:openLibrary()"><img src="../support/nav2_library.gif" border="0" alt="View Library" height="20" width="59"></a>
|
|||
|
|
</td>
|
|||
|
|
<td height="20" width="73">
|
|||
|
|
<a href="lefdefrefTOC.html"><img src="../support/nav2_toc.gif" alt="Table of Contents" border="0"></a>
|
|||
|
|
</td>
|
|||
|
|
|
|||
|
|
<td height="20" width="46">
|
|||
|
|
<a href="lefdefrefIX.html"><img src="../support/nav2_index.gif" border="0"></a>
|
|||
|
|
</td>
|
|||
|
|
<td>
|
|||
|
|
<a href="DEFSyntax.html"><img src="images/nav2_previous.gif" alt="Previous" border="0"></a>
|
|||
|
|
</td>
|
|||
|
|
<td>
|
|||
|
|
<a href="OptimizingLEFTechnology.html"><img src="images/nav_next.gif" alt="Next" border="0"></a>
|
|||
|
|
</td>
|
|||
|
|
<td>
|
|||
|
|
<a>
|
|||
|
|
<a href="lefdefref.pdf"><img src="../support/nav2_print.gif" border="0" alt="Open PDF to print book" height="20" width="114"></a>
|
|||
|
|
</a>
|
|||
|
|
</td>
|
|||
|
|
<td height="20" width="61">
|
|||
|
|
<img src="../support/nav2_black.gif" border="0" height="20" width="76">
|
|||
|
|
</td>
|
|||
|
|
<td height="20" width="76">
|
|||
|
|
<a href="/feedback.htm"><img src="../support/nav2_feedback.gif" border="0" alt="Email Comments" height="20" width="76"></a>
|
|||
|
|
</td>
|
|||
|
|
<td height="20" width="43">
|
|||
|
|
<a href="../cdsuser/help.html"><img src="../support/nav2_help.gif" border="0" alt="Help Using Documentation" height="20" width="43"></a>
|
|||
|
|
</td>
|
|||
|
|
<td height="20" width="37">
|
|||
|
|
<a href="/exitsearch.htm"><img src="../support/nav2_exit.gif" border="0" alt="Shut Down Cadence Documentation Server" height="20" width="37"></a>
|
|||
|
|
</td>
|
|||
|
|
</tr>
|
|||
|
|
</table>
|
|||
|
|
<!-- End Buttons -->
|
|||
|
|
</div>
|
|||
|
|
<br>
|
|||
|
|
<font size="-1" >
|
|||
|
|
For support, see <a href="http://support.cadence.com" target="_blank">Cadence Online Support</a> service.</font>
|
|||
|
|
<br>
|
|||
|
|
<br>
|
|||
|
|
<font size="-1" >
|
|||
|
|
<font size="-1"><i>Copyright © 2016, <a href ="http://www.cadence.com">Cadence Design Systems, Inc.</a></i></font>
|
|||
|
|
</font>
|
|||
|
|
<br>
|
|||
|
|
<font size="-1" >
|
|||
|
|
All rights reserved.</font>
|
|||
|
|
<br>
|
|||
|
|
<br>
|
|||
|
|
</body>
|
|||
|
|
</html>
|