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3862 lines
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<!DOCTYPE html>
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<title>DpGen generators manual — Coriolis 2 documentation</title>
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<li class="toctree-l1"><a class="reference internal" href="../UsersGuide/index.html">Coriolis User’s Guide</a><ul>
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<li class="toctree-l2"><a class="reference internal" href="../UsersGuide/LicenseCredits.html">Credits & License</a></li>
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<li class="toctree-l2"><a class="reference internal" href="../UsersGuide/Releases.html">Release Notes</a><ul>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Releases.html#release-1-0-1475">Release 1.0.1475</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Releases.html#release-1-0-1963">Release 1.0.1963</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Releases.html#release-1-0-2049">Release 1.0.2049</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Releases.html#release-v2-0-1">Release v2.0.1</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Releases.html#release-v2-1">Release v2.1</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Releases.html#release-v2-2"><strong>Release v2.2</strong></a></li>
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<li class="toctree-l2"><a class="reference internal" href="../UsersGuide/Installation.html">Installation</a><ul>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Installation.html#fixed-directory-tree">Fixed Directory Tree</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Installation.html#building-coriolis">Building Coriolis</a><ul>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/Installation.html#building-the-devel-branch">Building the Devel Branch</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/Installation.html#additionnal-requirement-under-macos">Additionnal Requirement under <span class="sc">MacOS</span></a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Installation.html#packaging-coriolis">Packaging Coriolis</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Installation.html#hooking-up-into-alliance">Hooking up into <span class="sc">Alliance</span></a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Installation.html#setting-up-the-environment-coriolisenv-py">Setting up the Environment (coriolisEnv.py)</a></li>
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</ul>
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</li>
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<li class="toctree-l2"><a class="reference internal" href="../UsersGuide/Configuration.html">Coriolis Configuration & Initialisation</a><ul>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Configuration.html#general-software-architecture">General Software Architecture</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Configuration.html#first-stage-technology-selection">First Stage: Technology Selection</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Configuration.html#second-stage-technology-configuration-loading">Second Stage: Technology Configuration Loading</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Configuration.html#configuration-helpers">Configuration Helpers</a><ul>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/Configuration.html#alliance-helper"><span class="sc">Alliance</span> Helper</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/Configuration.html#tools-configuration-helpers">Tools Configuration Helpers</a></li>
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</ul>
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</li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/Configuration.html#hacking-the-configuration-files">Hacking the Configuration Files</a></li>
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</ul>
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</li>
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<li class="toctree-l2"><a class="reference internal" href="../UsersGuide/ViewerTools.html">CGT - The Graphical Interface</a><ul>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/ViewerTools.html#viewer-tools">Viewer & Tools</a><ul>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#stratus-netlist-capture"><span class="sc">Stratus</span> Netlist Capture</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#the-hurricane-data-base">The <span class="sc">Hurricane</span> Data-Base</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#synthetizing-and-loading-a-design">Synthetizing and loading a design</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#etesian-placer">Etesian – Placer</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#knik-global-router">Knik – Global Router</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#kite-detailed-router">Kite – Detailed Router</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#executing-python-scripts-in-cgt">Executing Python Scripts in Cgt</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#printing-snapshots">Printing & Snapshots</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#memento-of-shortcuts-in-graphic-mode">Memento of Shortcuts in Graphic Mode</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#cgt-command-line-options">Cgt Command Line Options</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#miscellaneous-settings">Miscellaneous Settings</a></li>
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</ul>
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</li>
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/ViewerTools.html#the-controller">The Controller</a><ul>
|
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#the-look-tab">The Look Tab</a></li>
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#the-filter-tab">The Filter Tab</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#the-layers-go-tab">The Layers&Go Tab</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#the-netlist-tab">The Netlist Tab</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#the-selection-tab">The Selection Tab</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#the-inspector-tab">The Inspector Tab</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ViewerTools.html#the-settings-tab">The Settings Tab</a></li>
|
|||
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</ul>
|
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</li>
|
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</ul>
|
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</li>
|
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<li class="toctree-l2"><a class="reference internal" href="../UsersGuide/ScriptsPlugins.html">Python Interface for <span class="sc">Hurricane</span> / <span class="sc">Coriolis</span></a><ul>
|
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/ScriptsPlugins.html#plugins">Plugins</a><ul>
|
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ScriptsPlugins.html#chip-placement">Chip Placement</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ScriptsPlugins.html#clock-tree">Clock Tree</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../UsersGuide/ScriptsPlugins.html#recursive-save-rsave">Recursive-Save (RSave)</a></li>
|
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</ul>
|
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</li>
|
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<li class="toctree-l3"><a class="reference internal" href="../UsersGuide/ScriptsPlugins.html#a-simple-example-am2901">A Simple Example: AM2901</a></li>
|
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</ul>
|
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</li>
|
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</ul>
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</li>
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<li class="toctree-l1"><a class="reference internal" href="../PythonTutorial/index.html">Hurricane+Python Tutorial</a><ul>
|
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<li class="toctree-l2"><a class="reference internal" href="../PythonTutorial/Introduction.html">1. Introduction</a><ul>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Introduction.html#terminology">1.1 Terminology</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Introduction.html#generalities">1.2 Generalities</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Introduction.html#various-kinds-of-constructors">1.3 Various Kinds of Constructors</a></li>
|
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</ul>
|
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</li>
|
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<li class="toctree-l2"><a class="reference internal" href="../PythonTutorial/Environment.html">2. Setting up the Environment</a><ul>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Environment.html#setting-up-the-pathes">2.1 Setting up the Pathes</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Environment.html#user-s-configurations-file">2.2 User’s Configurations File</a><ul>
|
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<li class="toctree-l4"><a class="reference internal" href="../PythonTutorial/Environment.html#the-techno-py-file">2.2.1 The <span class="cb">techno.py</span> File</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../PythonTutorial/Environment.html#the-settings-py-file">2.2.2 The <span class="cb">settings.py</span> File</a></li>
|
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</ul>
|
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</li>
|
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</ul>
|
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</li>
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<li class="toctree-l2"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html">3. Making a Standard Cell – Layout</a><ul>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#the-allianceframework-crl-core">3.1 The AllianceFramework (CRL Core)</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#session-mechanism-hurricane">3.2 Session Mechanism (Hurricane)</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#creating-a-new-cell-crl-core">3.3 Creating a new Cell (CRL Core)</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#the-dbu-measurement-unit">3.4 The DbU Measurement Unit</a></li>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#setting-up-the-abutment-box">3.5 Setting up the Abutment Box</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#adding-nets-and-components">3.6 Adding Nets and Components</a><ul>
|
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<li class="toctree-l4"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#getting-a-layer">3.6.1 Getting a Layer</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#creating-a-net">3.6.2 Creating a Net</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#id1">3.6.3 Creating a Component</a></li>
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</ul>
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</li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#saving-to-disk-crl-core">3.7 Saving to Disk (CRL Core)</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/CellNetComponent.html#the-complete-example-file">3.8 The Complete Example File</a></li>
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</ul>
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</li>
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<li class="toctree-l2"><a class="reference internal" href="../PythonTutorial/Collections.html">4. Manipulating Cells, Nets and Components</a><ul>
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Collections.html#hurricane-collections">4.1 Hurricane Collections</a><ul>
|
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<li class="toctree-l4"><a class="reference internal" href="../PythonTutorial/Collections.html#restrictions-about-using-collections">4.1.1 Restrictions about using Collections</a></li>
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</ul>
|
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</li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Collections.html#loading-a-cell-with-allianceframework">4.2 Loading a Cell with AllianceFramework</a></li>
|
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</ul>
|
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</li>
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<li class="toctree-l2"><a class="reference internal" href="../PythonTutorial/CgtScript.html">5. Make a script runnable through <span class="cb">cgt</span></a><ul>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/CgtScript.html#using-breakpoints">5.1 Using Breakpoints</a></li>
|
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</ul>
|
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</li>
|
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<li class="toctree-l2"><a class="reference internal" href="../PythonTutorial/Netlist.html">6. Making a hierarchical Cell – Netlist</a><ul>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Netlist.html#creating-an-instance">6.1 Creating an Instance</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Netlist.html#id1">6.2 Creating Nets and connecting to Instances</a></li>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Netlist.html#power-supplies-special-case">6.3 Power supplies special case</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Netlist.html#creating-the-physical-view-of-a-cell-netlist">6.4 Creating the physical view of a Cell netlist</a><ul>
|
|||
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<li class="toctree-l4"><a class="reference internal" href="../PythonTutorial/Netlist.html#id2">6.4.1 Transformation</a></li>
|
|||
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<li class="toctree-l4"><a class="reference internal" href="../PythonTutorial/Netlist.html#placing-an-instance">6.4.2 Placing an Instance</a></li>
|
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<li class="toctree-l4"><a class="reference internal" href="../PythonTutorial/Netlist.html#nets-from-plugs-to-routingpads">6.4.3 Nets – From Plugs to RoutingPads</a></li>
|
|||
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<li class="toctree-l4"><a class="reference internal" href="../PythonTutorial/Netlist.html#nets-regular-wiring">6.4.4 Nets – Regular wiring</a></li>
|
|||
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</ul>
|
|||
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</li>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/Netlist.html#the-complete-example-file">6.5 The Complete Example File</a></li>
|
|||
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</ul>
|
|||
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</li>
|
|||
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<li class="toctree-l2"><a class="reference internal" href="../PythonTutorial/RealDesigns.html">7. Working in real mode</a><ul>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/RealDesigns.html#loading-a-lef-file">7.1 Loading a <span class="sc">lef</span> file</a></li>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/RealDesigns.html#loading-a-blif-file-yosys">7.2 Loading a <span class="sc">blif</span> file – <span class="sc">Yosys</span></a></li>
|
|||
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</ul>
|
|||
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</li>
|
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<li class="toctree-l2"><a class="reference internal" href="../PythonTutorial/ToolEngines.html">8. Tool Engines (CRL Core)</a><ul>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/ToolEngines.html#placer-etesian">8.1 Placer – Etesian</a></li>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/ToolEngines.html#router-katana">8.1 Router – Katana</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/ToolEngines.html#a-complete-example">8.2 A Complete Example</a></li>
|
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</ul>
|
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</li>
|
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<li class="toctree-l2"><a class="reference internal" href="../PythonTutorial/AdvancedTopics.html">9. Advanced Topics</a><ul>
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/AdvancedTopics.html#id1">9.1 Occurrence</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/AdvancedTopics.html#id2">9.2 RoutingPads</a></li>
|
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/AdvancedTopics.html#hypernets">9.3 HyperNets</a></li>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="../PythonTutorial/AdvancedTopics.html#miscellaeous-trans-hierarchical-functions">9.4 Miscellaeous trans-hierarchical functions</a></li>
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</ul>
|
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</li>
|
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</ul>
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</li>
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<li class="toctree-l1 current"><a class="reference internal" href="index.html">Stratus : Netlist Capture Language</a><ul class="current">
|
|||
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<li class="toctree-l2"><a class="reference internal" href="Language.html">Stratus User’s Guide</a><ul>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Language.html#introduction">Introduction</a><ul>
|
|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#stratus">Stratus</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#example">Example</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Language.html#description-of-a-netlist">Description of a netlist</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#nets">Nets</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#instances">Instances</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#generators">Generators</a></li>
|
|||
|
</ul>
|
|||
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</li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Language.html#description-of-a-layout">Description of a layout</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#place">Place</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#placetop">PlaceTop</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#placebottom">PlaceBottom</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#placeright">PlaceRight</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#placeleft">PlaceLeft</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#setrefins">SetRefIns</a></li>
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<li class="toctree-l4"><a class="reference internal" href="Language.html#defab">DefAb</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#resizeab">ResizeAb</a></li>
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|||
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</ul>
|
|||
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</li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Language.html#patterns-generation-extension">Patterns generation extension</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#description-of-the-stimuli">Description of the stimuli</a></li>
|
|||
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</ul>
|
|||
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</li>
|
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<li class="toctree-l3"><a class="reference internal" href="Language.html#place-and-route">Place and Route</a><ul>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#placesegment">PlaceSegment</a></li>
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|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#placecontact">PlaceContact</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#placepin">PlacePin</a></li>
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<li class="toctree-l4"><a class="reference internal" href="Language.html#placeref">PlaceRef</a></li>
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<li class="toctree-l4"><a class="reference internal" href="Language.html#getrefxy">GetRefXY</a></li>
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<li class="toctree-l4"><a class="reference internal" href="Language.html#copyupsegment">CopyUpSegment</a></li>
|
|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#placecentric">PlaceCentric</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#placeglu">PlaceGlu</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#fillcell">FillCell</a></li>
|
|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#pads">Pads</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#alimentation-rails">Alimentation rails</a></li>
|
|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#alimentation-connectors">Alimentation connectors</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#powerring">PowerRing</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#routeck">RouteCk</a></li>
|
|||
|
</ul>
|
|||
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</li>
|
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<li class="toctree-l3"><a class="reference internal" href="Language.html#instanciation-facilities">Instanciation facilities</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#buffer">Buffer</a></li>
|
|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#multiplexor">Multiplexor</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#shifter">Shifter</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#register">Register</a></li>
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<li class="toctree-l4"><a class="reference internal" href="Language.html#constants">Constants</a></li>
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<li class="toctree-l4"><a class="reference internal" href="Language.html#boolean-operations">Boolean operations</a></li>
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|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#arithmetical-operations">Arithmetical operations</a></li>
|
|||
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<li class="toctree-l4"><a class="reference internal" href="Language.html#comparison-operations">Comparison operations</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#virtual-library">Virtual library</a></li>
|
|||
|
</ul>
|
|||
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</li>
|
|||
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<li class="toctree-l3"><a class="reference internal" href="Language.html#useful-links">Useful links</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#dpgen-generators">DpGen generators</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#arithmetic-package-of-stratus">Arithmetic package of stratus</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#arithmetic-generators-and-some-stratus-packages">Arithmetic generators and some stratus packages</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Language.html#patterns-module">Patterns module</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l2"><a class="reference internal" href="Developper.html">Stratus Developper’s Guide</a><ul>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Developper.html#class-model">Class Model</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#synopsys">Synopsys</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#description">Description</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#parameters">Parameters</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#attributes">Attributes</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#methods">Methods</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Developper.html#nets">Nets</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#id1">Synopsys</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#id2">Description</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#id3">Parameters</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#id4">Attributes</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#id5">Methods</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Developper.html#instances">Instances</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#id6">Synopsys</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#id7">Description</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#id8">Parameters</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#id9">Attributes</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Developper.html#id10">Methods</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l2"><a class="reference internal" href="Patterns.html">Patterns module User’s Guide</a><ul>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Patterns.html#description">Description</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Patterns.html#syntax">Syntax</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#declaration-part">Declaration part</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#description-part">Description part</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Patterns.html#methods">Methods</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#patwrite">PatWrite</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#declar">declar</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#declar-interface">declar_interface</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#id2">declar</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#affect-int">affect_int</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#affect-fix">affect_fix</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#affect-any">affect_any</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#addpat">addpat</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#pattern-begin">pattern_begin</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="Patterns.html#pattern-end">pattern_end</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="Patterns.html#example">Example</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l2 current"><a class="current reference internal" href="#">DpGen generators manual</a><ul>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgeninv">DpgenInv</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenbuff">DpgenBuff</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennand2">DpgenNand2</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennand3">DpgenNand3</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennand4">Dpgennand4</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenand2">DpgenAnd2</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenand3">DpgenAnd3</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenand4">DpgenAnd4</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennor2">DpgenNor2</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennor3">DpgenNor3</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennor4">DpgenNor4</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenor2">DpgenOr2</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenor3">DpgenOr3</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenor4">DpgenOr4</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenxor2">DpgenXor2</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenxnor2">DpgenXnor2</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennmux2">DpgenNmux2</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenmux2">DpgenMux2</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennbuse">DpgenNbuse</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenbuse">DpgenBuse</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennand2mask">DpgenNand2mask</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennor2mask">DpgenNor2mask</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenxnor2mask">DpgenXnor2mask</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenadsb2f">DpgenAdsb2f</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenshift">DpgenShift</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenshrot">DpgenShrot</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgennul">DpgenNul</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenconst">DpgenConst</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenrom2">DpgenRom2</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenrom4">DpgenRom4</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenram">DpgenRam</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenrf1">DpgenRf1</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenrf1d">DpgenRf1d</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgenfifo">DpgenFifo</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgendff">DpgenDff</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgendfft">DpgenDfft</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgensff">DpgenSff</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="#dpgensfft">DpgenSfft</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l1"><a class="reference internal" href="../Hurricane/Hurricane.html">Hurricane Reference</a></li>
|
|||
|
<li class="toctree-l1"><a class="reference internal" href="../Viewer/Viewer.html">Viewer Reference</a></li>
|
|||
|
<li class="toctree-l1"><a class="reference internal" href="../CrlCore/CrlCore.html">CRL Core Reference</a></li>
|
|||
|
<li class="toctree-l1"><a class="reference internal" href="../Katabatic/Katabatic.html">Katabatic Reference</a></li>
|
|||
|
<li class="toctree-l1"><a class="reference internal" href="../Kite/Kite.html">Kite Reference</a></li>
|
|||
|
<li class="toctree-l1"><a class="reference internal" href="../Unicorn/Unicorn.html">Unicorn Reference</a></li>
|
|||
|
<li class="toctree-l1"><a class="reference internal" href="../PythonCpp/index.html">Hurricane Python/C++ API Tutorial</a><ul>
|
|||
|
<li class="toctree-l2"><a class="reference internal" href="../PythonCpp/Introduction.html">1. Introduction</a><ul>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/Introduction.html#first-a-disclaimer">1.1 First, A Disclaimer</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/Introduction.html#about-technical-choices">1.2 About Technical Choices</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/Introduction.html#botched-design">1.3 Botched Design</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l2"><a class="reference internal" href="../PythonCpp/Configuration.html">2. Basic File Structure and CMake configuration</a></li>
|
|||
|
<li class="toctree-l2"><a class="reference internal" href="../PythonCpp/DBoStandalone.html">3. Case 1 - DBo Derived, Standalone</a><ul>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/DBoStandalone.html#class-associated-header-file">3.1 Class Associated Header File</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/DBoStandalone.html#class-associated-file">3.2 Class Associated File</a><ul>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="../PythonCpp/DBoStandalone.html#head-of-the-file">3.2.1 Head of the file</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="../PythonCpp/DBoStandalone.html#the-python-module-part">3.2.2 The Python Module Part</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="../PythonCpp/DBoStandalone.html#python-type-linking">3.2.3 Python Type Linking</a></li>
|
|||
|
<li class="toctree-l4"><a class="reference internal" href="../PythonCpp/DBoStandalone.html#the-shared-library-part">3.2.4 The Shared Library Part</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/DBoStandalone.html#python-module-c-namespace">3.3 Python Module (C++ namespace)</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l2"><a class="reference internal" href="../PythonCpp/DBoHierarchy.html">4. Case 2 - Hierarchy of DBo Derived Classes</a><ul>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/DBoHierarchy.html#base-class-header">4.1 Base Class Header</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/DBoHierarchy.html#base-class-file">4.2 Base Class File</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/DBoHierarchy.html#intermediate-class-header">4.3 Intermediate Class Header</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/DBoHierarchy.html#intermediate-class-file">4.4 Intermediate Class File</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/DBoHierarchy.html#terminal-class-header">4.5 Terminal Class Header</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/DBoHierarchy.html#terminal-class-file">4.6 Terminal Class File</a></li>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/DBoHierarchy.html#python-module">4.8 Python Module</a></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li class="toctree-l2"><a class="reference internal" href="../PythonCpp/NonDBo.html">5. Case 3 - Non-DBo Standalone Classe</a><ul>
|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/NonDBo.html#class-header">5.1 Class Header</a></li>
|
|||
|
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|
|||
|
<li class="toctree-l3"><a class="reference internal" href="../PythonCpp/NonDBo.html#id1">5.2 Class File</a></li>
|
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|
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|
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|
|||
|
<li class="toctree-l2"><a class="reference internal" href="../PythonCpp/DbU.html">6. Encapsulating DbU</a></li>
|
|||
|
<li class="toctree-l2"><a class="reference internal" href="../PythonCpp/Name.html">7. No C++ Hurricane::Name encapsulation</a></li>
|
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|
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|
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|
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<li class="toctree-l3"><a class="reference internal" href="../RDS/RDSpage.html#the-mbk-to-rds-bigvia-hole-table">The <code class="docutils literal"><span class="pre">MBK_TO_RDS_BIGVIA_HOLE</span></code> table</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../RDS/RDSpage.html#the-mbk-to-rds-bigvia-metal-table">The <code class="docutils literal"><span class="pre">MBK_TO_RDS_BIGVIA_METAL</span></code> table</a></li>
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<li class="toctree-l3"><a class="reference internal" href="../RDS/RDSpage.html#the-mbk-wiresetting-table">The <code class="docutils literal"><span class="pre">MBK_WIRESETTING</span></code> table</a></li>
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<li class="toctree-l1"><a class="reference internal" href="../lefapi/lefapi.html">LEF API Reference</a><ul>
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<li class="toctree-l2"><a class="reference internal" href="../lefapi/lefapi.html#implementation-notes">Implementation Notes</a><ul>
|
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<li class="toctree-l3"><a class="reference internal" href="../lefapi/lefapi.html#understanding-units">Understanding Units</a></li>
|
|||
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|
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<li class="toctree-l1"><a class="reference internal" href="../lefdef/lefdef.html">LEF/DEF Language Reference</a></li>
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<li><a href="index.html">Stratus : Netlist Capture Language</a> »</li>
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<div role="main" class="document">
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|
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<div class="section" id="dpgen-generators-manual">
|
|||
|
<h1>DpGen generators manual<a class="headerlink" href="#dpgen-generators-manual" title="Permalink to this headline">¶</a></h1>
|
|||
|
<p>Sophie Belloeil</p>
|
|||
|
<div class="toctree-wrapper compound">
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgeninv">
|
|||
|
<h2>DpgenInv<a class="headerlink" href="#dpgeninv" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenInv – Inverter Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenInv'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits inverter with an output
|
|||
|
power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>nq</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 1, 2, 4 or 8</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="ow">not</span> <span class="p">(</span> <span class="n">i0</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_inv</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">54</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">54</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenInv'</span><span class="p">,</span> <span class="s1">'inv_54'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">54</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'inv_54'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenbuff">
|
|||
|
<h2>DpgenBuff<a class="headerlink" href="#dpgenbuff" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenBuff – Buffer Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenBuff'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits inverter with an output
|
|||
|
power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 2, 4 or 8</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">i0</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_buff</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">32</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">32</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenBuff'</span><span class="p">,</span> <span class="s1">'buff_32'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">32</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'buff_32'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennand2">
|
|||
|
<h2>DpgenNand2<a class="headerlink" href="#dpgennand2" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNand2 – Nand2 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNand2'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits two inputs NAND with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>nq</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 1 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="ow">not</span> <span class="p">(</span> <span class="n">i0</span> <span class="ow">and</span> <span class="n">i1</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nand2</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNand2'</span><span class="p">,</span> <span class="s1">'nand2_8'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nand2_8'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennand3">
|
|||
|
<h2>DpgenNand3<a class="headerlink" href="#dpgennand3" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNand3 – Nand3 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNand3'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits three inputs NAND with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i2</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>nq</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 1 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="ow">not</span> <span class="p">(</span> <span class="n">i0</span> <span class="ow">and</span> <span class="n">i1</span> <span class="ow">and</span> <span class="n">i2</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nand3</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">20</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">20</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in3</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in3"</span><span class="p">,</span> <span class="mi">20</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">20</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNand3'</span><span class="p">,</span> <span class="s1">'nand3_20'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">20</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nand3_20'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i2'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in3</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennand4">
|
|||
|
<h2>Dpgennand4<a class="headerlink" href="#dpgennand4" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNand4 – Nand4 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNand4'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits four inputs NAND with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i2</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i3</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>nq</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 1 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="ow">not</span> <span class="p">(</span> <span class="n">i0</span> <span class="ow">and</span> <span class="n">i1</span> <span class="ow">and</span> <span class="n">i2</span> <span class="ow">and</span> <span class="n">i3</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nand4</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">9</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">9</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in3</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in3"</span><span class="p">,</span> <span class="mi">9</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in4</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in4"</span><span class="p">,</span> <span class="mi">9</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">9</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNand4'</span><span class="p">,</span> <span class="s1">'nand4_9'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">9</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nand4_9'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i2'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in3</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i3'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenand2">
|
|||
|
<h2>DpgenAnd2<a class="headerlink" href="#dpgenand2" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenAnd2 – And2 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenAnd2'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits two inputs AND with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 2 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">i0</span> <span class="ow">and</span> <span class="n">i1</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_and2</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">out</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenAnd2'</span><span class="p">,</span> <span class="s1">'and2_8'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'and2_8'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">out</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenand3">
|
|||
|
<h2>DpgenAnd3<a class="headerlink" href="#dpgenand3" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenAnd3 – And3 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenAnd3'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits three inputs AND with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i2</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional): Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 2 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False): In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False): In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">i0</span> <span class="ow">and</span> <span class="n">i1</span> <span class="ow">and</span> <span class="n">i2</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_and3</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in3</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in3"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">out</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenAnd3'</span><span class="p">,</span> <span class="s2">"and3_16"</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">16</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'and3_16'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i2'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in3</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">out</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span> <span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenand4">
|
|||
|
<h2>DpgenAnd4<a class="headerlink" href="#dpgenand4" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenAnd4 – And4 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenAnd4'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits four inputs AND with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first">Terminal Names :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i2</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i3</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 2 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">i0</span> <span class="ow">and</span> <span class="n">i1</span> <span class="ow">and</span> <span class="n">i2</span> <span class="ow">and</span> <span class="n">i3</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_and4</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">2</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">2</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in3</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in3"</span><span class="p">,</span> <span class="mi">2</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in4</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in4"</span><span class="p">,</span> <span class="mi">2</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">out</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">2</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenAnd4'</span><span class="p">,</span> <span class="s1">'and4_2'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'and4_2'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i2'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in3</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i3'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">out</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennor2">
|
|||
|
<h2>DpgenNor2<a class="headerlink" href="#dpgennor2" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNor2 – Nor2 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNor2'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits two inputs NOR with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>nq</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 1 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="ow">not</span> <span class="p">(</span> <span class="n">i0</span> <span class="ow">or</span> <span class="n">i1</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nor2</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNor2'</span><span class="p">,</span> <span class="s1">'nor2_8'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nor2_8'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennor3">
|
|||
|
<h2>DpgenNor3<a class="headerlink" href="#dpgennor3" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNor3 – Nor3 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNor3'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits three inputs NOR with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i2</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>nq</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 1 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="ow">not</span> <span class="p">(</span> <span class="n">i0</span> <span class="ow">or</span> <span class="n">i1</span> <span class="ow">or</span> <span class="n">i2</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nor3</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">3</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">3</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in3</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in3"</span><span class="p">,</span> <span class="mi">3</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"out"</span><span class="p">,</span> <span class="mi">3</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNor3'</span><span class="p">,</span> <span class="s1">'nor3_3'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">3</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nor3_3'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i2'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in3</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennor4">
|
|||
|
<h2>DpgenNor4<a class="headerlink" href="#dpgennor4" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNor4 – Nor4 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNor4'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits four inputs NOR with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i2</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i3</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>nq</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 1 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="ow">not</span> <span class="p">(</span> <span class="n">i0</span> <span class="ow">or</span> <span class="n">i1</span> <span class="ow">or</span> <span class="n">i2</span> <span class="ow">or</span> <span class="n">i3</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nor4</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">15</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">15</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in3</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in3"</span><span class="p">,</span> <span class="mi">15</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in4</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in4"</span><span class="p">,</span> <span class="mi">15</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">out</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">15</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNor4'</span><span class="p">,</span> <span class="s1">'nor4_15'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">15</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nor4_15'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i2'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in3</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i3'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">out</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenor2">
|
|||
|
<h2>DpgenOr2<a class="headerlink" href="#dpgenor2" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenOr2 – Or2 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenOr2'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits two inputs OR with an output
|
|||
|
power of <code class="docutils literal"><span class="pre">drive</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the a map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 2 or 4</li>
|
|||
|
<li>If this parameter is not defined, the <code class="docutils literal"><span class="pre">drive</span></code> is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">i0</span> <span class="ow">or</span> <span class="n">i1</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_or2</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenOr2'</span><span class="p">,</span> <span class="s1">'or2_8'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'or2_8'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenor3">
|
|||
|
<h2>DpgenOr3<a class="headerlink" href="#dpgenor3" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenOr3 – Or3 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenOr3'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits three inputs OR with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i2</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 2 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">i0</span> <span class="ow">or</span> <span class="n">i1</span> <span class="ow">or</span> <span class="n">i2</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_or3</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">5</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">5</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in3</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in3"</span><span class="p">,</span> <span class="mi">5</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">5</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenOr3'</span><span class="p">,</span> <span class="s1">'or3_5'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">5</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'or3_5'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i2'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in3</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenor4">
|
|||
|
<h2>DpgenOr4<a class="headerlink" href="#dpgenor4" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenOr4 – Or4 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenOr4'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits four inputs OR with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i2</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i3</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 2 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">i0</span> <span class="ow">or</span> <span class="n">i1</span> <span class="ow">or</span> <span class="n">i2</span> <span class="ow">or</span> <span class="n">i3</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_or4</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in3</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in3"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in4</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in4"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">out</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenOr4'</span><span class="p">,</span> <span class="s1">'or4_16'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">16</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'or4_16'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i2'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in3</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i3'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">out</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenxor2">
|
|||
|
<h2>DpgenXor2<a class="headerlink" href="#dpgenxor2" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenXor2 – Xor2 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenXor2'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits two inputs XOR with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 2 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optionnal, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optionnal, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">i0</span> <span class="n">xor</span> <span class="n">i1</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_xor2</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenXor2'</span><span class="p">,</span> <span class="s1">'xor2_8'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'xor2_8'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenxnor2">
|
|||
|
<h2>DpgenXnor2<a class="headerlink" href="#dpgenxnor2" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenXnor2 – Xnor2 Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenXnor2'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits two inputs XNOR with an
|
|||
|
output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>nq</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 1 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="ow">not</span> <span class="p">(</span> <span class="n">i0</span> <span class="n">xor</span> <span class="n">i1</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_xnor2</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenXnor2'</span><span class="p">,</span> <span class="s1">'xnor2_8'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'xnor2_8'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennmux2">
|
|||
|
<h2>DpgenNmux2<a class="headerlink" href="#dpgennmux2" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNmux2 – Multiplexer Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNmux2'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits two inputs multiplexer named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>cmd</strong> : select ( 1 bit )</li>
|
|||
|
<li><strong>i0</strong> : input ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>i1</strong> : input ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>nq</strong> : output ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">WITH</span> <span class="n">cmd</span> <span class="n">SELECT</span> <span class="ow">not</span> <span class="n">i0</span> <span class="n">WHEN</span> <span class="s1">'0'</span><span class="p">,</span>
|
|||
|
<span class="ow">not</span> <span class="n">i1</span> <span class="n">WHEN</span> <span class="s1">'1'</span><span class="p">;</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nmux2</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">5</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">5</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">cmd</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"cmd"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">5</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNmux2'</span><span class="p">,</span> <span class="s1">'nmux2_5'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">5</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nmux2_5'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'cmd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">cmd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenmux2">
|
|||
|
<h2>DpgenMux2<a class="headerlink" href="#dpgenmux2" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenMux2 – Multiplexer Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenMux2'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'drive'</span> <span class="p">:</span> <span class="n">d</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits two inputs multiplexer with
|
|||
|
an output power of <code class="docutils literal"><span class="pre">d</span></code> named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>cmd</strong> : select ( 1 bit )</li>
|
|||
|
<li><strong>i0</strong> : input ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>i1</strong> : input ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>q</strong> : output ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>nbit_cmd</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>drive</strong> (optional) : Defines the output power of the gates<ul>
|
|||
|
<li>Valid drive are : 2 or 4</li>
|
|||
|
<li>If this parameter is not defined, it’s value is the smallest
|
|||
|
one permitted</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">WITH</span> <span class="n">cmd</span> <span class="n">SELECT</span> <span class="n">i0</span> <span class="n">WHEN</span> <span class="s1">'0'</span><span class="p">,</span>
|
|||
|
<span class="n">i1</span> <span class="n">WHEN</span> <span class="s1">'1'</span><span class="p">;</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_mux2</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">cmd</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"cmd"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenMux2'</span><span class="p">,</span> <span class="s1">'mux2_8'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'mux2_8'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'cmd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">cmd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennbuse">
|
|||
|
<h2>DpgenNbuse<a class="headerlink" href="#dpgennbuse" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNbuse – Tristate Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNbuse'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="n">true</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="n">true</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits tristate with an
|
|||
|
complemented output named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>cmd</strong> : select ( 1 bit )</li>
|
|||
|
<li><strong>i0</strong> : input ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>nq</strong> : output ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nts</span><span class="p">:</span><span class="n">BLOCK</span><span class="p">(</span><span class="n">cmd</span> <span class="o">=</span> <span class="s1">'1'</span><span class="p">)</span> <span class="n">BEGIN</span>
|
|||
|
<span class="n">nq</span> <span class="o"><=</span> <span class="n">GUARDED</span> <span class="ow">not</span><span class="p">(</span><span class="n">i0</span><span class="p">);</span>
|
|||
|
<span class="n">END</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nbuse</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">29</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">cmd</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"cmd"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">29</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNbuse'</span><span class="p">,</span> <span class="s1">'nbuse29'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">29</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nbuse29'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s1">'cmd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">cmd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenbuse">
|
|||
|
<h2>DpgenBuse<a class="headerlink" href="#dpgenbuse" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenBuse – Tristate Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenBuse'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits tristate named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>cmd</strong> : select ( 1 bit )</li>
|
|||
|
<li><strong>i0</strong> : input ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>q</strong> : output ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nts</span><span class="p">:</span><span class="n">BLOCK</span><span class="p">(</span><span class="n">cmd</span> <span class="o">=</span> <span class="s1">'1'</span><span class="p">)</span> <span class="n">BEGIN</span>
|
|||
|
<span class="n">q</span> <span class="o"><=</span> <span class="n">GUARDED</span> <span class="n">i0</span><span class="p">;</span>
|
|||
|
<span class="n">END</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_buse</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">cmd</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"cmd"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenBuse'</span><span class="p">,</span> <span class="s1">'buse_8'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'buse_8'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s1">'cmd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">cmd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennand2mask">
|
|||
|
<h2>DpgenNand2mask<a class="headerlink" href="#dpgennand2mask" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNand2mask – Programmable Mask Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNand2mask'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'const'</span> <span class="p">:</span> <span class="n">constVal</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits conditionnal NAND mask named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>cmd</strong> : mask control ( 1 bit )</li>
|
|||
|
<li><strong>i0</strong> : input ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>nq</strong> : output ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>const</strong> (mandatory) : Defines the constant (string beginning
|
|||
|
with 0b, 0x or 0o functions of the basis)</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">cmd</span></code> signal is set to <code class="docutils literal"><span class="pre">zero</span></code>, the mask is NOT applied,
|
|||
|
so the whole operator behaves like an inverter.</li>
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">cmd</span></code> signal is set to <code class="docutils literal"><span class="pre">one</span></code>, the mask is applied, the
|
|||
|
output is the <em>complemented</em> result of the input value <em>ANDed</em>
|
|||
|
with the mask (suplied by <code class="docutils literal"><span class="pre">constVal</span></code>).</li>
|
|||
|
<li>The constant <code class="docutils literal"><span class="pre">constVal</span></code> is given to the macro-generator call,
|
|||
|
therefore the value cannot be changed afterward : it’s hard wired
|
|||
|
in the operator.</li>
|
|||
|
<li>A common error is to give a real constant for the <code class="docutils literal"><span class="pre">constVal</span></code>
|
|||
|
argument. Be aware that it is a character string.</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">WITH</span> <span class="n">cmd</span> <span class="n">SELECT</span> <span class="ow">not</span><span class="p">(</span><span class="n">i0</span><span class="p">)</span> <span class="n">WHEN</span> <span class="s1">'0'</span><span class="p">,</span>
|
|||
|
<span class="ow">not</span><span class="p">(</span><span class="n">i0</span> <span class="ow">and</span> <span class="n">constVal</span><span class="p">)</span> <span class="n">WHEN</span> <span class="s1">'1'</span><span class="p">;</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nand2mask</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">32</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">cmd</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"cmd"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">32</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNand2mask'</span><span class="p">,</span> <span class="s1">'nand2mask_0x0000ffff'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">32</span>
|
|||
|
<span class="p">,</span> <span class="s1">'const'</span> <span class="p">:</span> <span class="s2">"0x0000FFFF"</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nand2mask_0x0000ffff'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s1">'cmd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">cmd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennor2mask">
|
|||
|
<h2>DpgenNor2mask<a class="headerlink" href="#dpgennor2mask" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNor2mask – Programmable Mask Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNor2mask'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'const'</span> <span class="p">:</span> <span class="n">constVal</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits conditionnal NOR mask named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>cmd</strong> : mask control ( 1 bit )</li>
|
|||
|
<li><strong>i0</strong> : input ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>nq</strong> : output ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>const</strong> (mandatory) : Defines the constant (string beginning
|
|||
|
with 0b, 0x or 0o functions of the basis)</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">cmd</span></code> signal is set to <code class="docutils literal"><span class="pre">zero</span></code>, the mask is NOT applied,
|
|||
|
so the whole operator behaves like an inverter.</li>
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">cmd</span></code> signal is set to <code class="docutils literal"><span class="pre">one</span></code>, the mask is applied, the
|
|||
|
output is the <em>complemented</em> result of the input value <em>ORed</em> with
|
|||
|
the mask (suplied by <code class="docutils literal"><span class="pre">constVal</span></code>).</li>
|
|||
|
<li>The constant <code class="docutils literal"><span class="pre">constVal</span></code> is given to the macro-generator call,
|
|||
|
therefore the value cannot be changed afterward : it’s hard wired
|
|||
|
in the operator.</li>
|
|||
|
<li>A common error is to give a real constant for the <code class="docutils literal"><span class="pre">constVal</span></code>
|
|||
|
argument. Be aware that it is a character string.</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">WITH</span> <span class="n">cmd</span> <span class="n">SELECT</span> <span class="ow">not</span><span class="p">(</span><span class="n">i0</span><span class="p">)</span> <span class="n">WHEN</span> <span class="s1">'0'</span><span class="p">,</span>
|
|||
|
<span class="ow">not</span><span class="p">(</span><span class="n">i0</span> <span class="ow">or</span> <span class="n">constVal</span><span class="p">)</span> <span class="n">WHEN</span> <span class="s1">'1'</span><span class="p">;</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nor2mask</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">cmd</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"cmd"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNor2mask'</span><span class="p">,</span> <span class="s1">'nor2mask_000111'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'const'</span> <span class="p">:</span> <span class="s2">"0b000111"</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nor2mask_000111'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s1">'cmd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">cmd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenxnor2mask">
|
|||
|
<h2>DpgenXnor2mask<a class="headerlink" href="#dpgenxnor2mask" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenXnor2mask – Programmable Mask Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenXnor2mask'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'const'</span> <span class="p">:</span> <span class="n">constVal</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits conditionnal XNOR mask named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>cmd</strong> : mask control ( 1 bit )</li>
|
|||
|
<li><strong>i0</strong> : input ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>nq</strong> : output ( <code class="docutils literal"><span class="pre">n</span></code> bits )</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>const</strong> (mandatory) : Defines the constant (string beginning
|
|||
|
with 0b, 0x or 0o functions of the basis)</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">cmd</span></code> signal is set to <code class="docutils literal"><span class="pre">zero</span></code>, the mask is NOT applied,
|
|||
|
so the whole operator behaves like an inverter.</li>
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">cmd</span></code> signal is set to <code class="docutils literal"><span class="pre">one</span></code>, the mask is applied, the
|
|||
|
output is the <em>complemented</em> result of the input value <em>XORed</em>
|
|||
|
with the mask (suplied by <code class="docutils literal"><span class="pre">constVal</span></code>).</li>
|
|||
|
<li>The constant <code class="docutils literal"><span class="pre">constVal</span></code> is given to the macro-generator call,
|
|||
|
therefore the value cannot be changed afterward : it’s hard wired
|
|||
|
in the operator.</li>
|
|||
|
<li>A common error is to give a real constant for the <code class="docutils literal"><span class="pre">constVal</span></code>
|
|||
|
argument. Be aware that it is a character string.</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">nq</span> <span class="o"><=</span> <span class="n">WITH</span> <span class="n">cmd</span> <span class="n">SELECT</span> <span class="ow">not</span><span class="p">(</span><span class="n">i0</span><span class="p">)</span> <span class="n">WHEN</span> <span class="s1">'0'</span><span class="p">,</span>
|
|||
|
<span class="ow">not</span><span class="p">(</span><span class="n">i0</span> <span class="n">xor</span> <span class="n">constVal</span><span class="p">)</span> <span class="n">WHEN</span> <span class="s1">'1'</span><span class="p">;</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_xnor2mask</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">cmd</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"cmd"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenXnor2mask'</span><span class="p">,</span> <span class="s1">'xnor2mask_0b000111'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'const'</span> <span class="p">:</span> <span class="s2">"0b000111"</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'xnor2mask_0b000111'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s1">'cmd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">cmd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nq'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenadsb2f">
|
|||
|
<h2>DpgenAdsb2f<a class="headerlink" href="#dpgenadsb2f" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenAdsb2f – Adder/Substractor Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenAdsb2f'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits adder/substractor named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : First operand (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>i1</strong> : Second operand (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : Output operand (ouput, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>add_sub</strong> : Select addition or substraction (input, 1 bit)</li>
|
|||
|
<li><strong>c31</strong> : Sarry out. In unsigned mode, this is the overflow
|
|||
|
(output, 1 bit)</li>
|
|||
|
<li><strong>c30</strong> : Used to compute overflow in signed mode :
|
|||
|
<code class="docutils literal"><span class="pre">overflow</span> <span class="pre">=</span> <span class="pre">c31</span> <span class="pre">xor</span> <span class="pre">c30</span></code> (output, 1 bit)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">add_sub</span></code> signal is set to <code class="docutils literal"><span class="pre">zero</span></code>, an addition is
|
|||
|
performed, otherwise it’s a substraction.</li>
|
|||
|
<li>Operation can be either signed or unsigned. In unsigned mode
|
|||
|
<code class="docutils literal"><span class="pre">c31</span></code> is the overflow ; in signed mode you have to compute
|
|||
|
overflow by <em>XORing</em> <code class="docutils literal"><span class="pre">c31</span></code> and <code class="docutils literal"><span class="pre">c30</span></code></li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_ADSB2F</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in1"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">in2</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in2"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">out</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">8</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="k">as</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"as"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">c0</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"c0"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">c1</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"c1"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenAdsb2f'</span><span class="p">,</span> <span class="s1">'adder_8'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">8</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'adder_8'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">in2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'add_sub'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="k">as</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">out</span>
|
|||
|
<span class="p">,</span> <span class="s1">'c30'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">c0</span>
|
|||
|
<span class="p">,</span> <span class="s1">'c31'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">c1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenshift">
|
|||
|
<h2>DpgenShift<a class="headerlink" href="#dpgenshift" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenShift – Shifter Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenShift'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits shifter named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>op</strong> : select the kind of shift (input, 2 bits)</li>
|
|||
|
<li><strong>shamt</strong> : the shift amount (input, <code class="docutils literal"><span class="pre">Y</span></code> bits)</li>
|
|||
|
<li><strong>i</strong> : value to shift (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>o</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">op[0]</span></code> signal is set to <code class="docutils literal"><span class="pre">one</span></code>, performs a right shift,
|
|||
|
performs a left shift otherwise.</li>
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">op[1]</span></code> signal is set to <code class="docutils literal"><span class="pre">one</span></code>, performs an arithmetic
|
|||
|
shift (only meaningful in case of a right shift).</li>
|
|||
|
<li>shamt : specifies the shift amount. The width of this signal
|
|||
|
(<code class="docutils literal"><span class="pre">Y</span></code>) is computed from the operator’s width : <code class="docutils literal"><span class="pre">Y</span> <span class="pre">=</span> <span class="pre">ceil(log2(n))</span></code> - 1</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_shifter</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">instop</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"instop"</span><span class="p">,</span> <span class="mi">2</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">instshamt</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"instshamt"</span><span class="p">,</span> <span class="mi">2</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">insti</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"insti"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">insto</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"insto"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenShifter'</span><span class="p">,</span> <span class="s1">'shifter_4'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'shifter_4'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'op'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">instop</span>
|
|||
|
<span class="p">,</span> <span class="s1">'shamt'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">instshamt</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">insti</span>
|
|||
|
<span class="p">,</span> <span class="s1">'o'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">insto</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenshrot">
|
|||
|
<h2>DpgenShrot<a class="headerlink" href="#dpgenshrot" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenShrot – Shift/Rotation Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenShrot'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits shift/rotation operator
|
|||
|
named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>op</strong> : select the kind of shift/rotation (input, 3 bits)</li>
|
|||
|
<li><strong>shamt</strong> : the shift amount (input, <code class="docutils literal"><span class="pre">Y</span></code> bits)</li>
|
|||
|
<li><strong>i</strong> : value to shift (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>o</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">op[0]</span></code> signal is set to <code class="docutils literal"><span class="pre">one</span></code>, performs a right
|
|||
|
shift/rotation , otherwise left shift/rotation occurs.</li>
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">op[1]</span></code> signal is set to <code class="docutils literal"><span class="pre">one</span></code>, performs an arithmetic
|
|||
|
shift (only meaningful in case of a right shift).</li>
|
|||
|
<li>If the <code class="docutils literal"><span class="pre">op[2]</span></code> signal is set to <code class="docutils literal"><span class="pre">one</span></code>, performs a rotation,
|
|||
|
otherwise performs a shift..</li>
|
|||
|
<li><code class="docutils literal"><span class="pre">shamt</span></code> specifies the shift amount. The width of this signal
|
|||
|
(<code class="docutils literal"><span class="pre">Y</span></code>) is computed from the operator’s width :
|
|||
|
<code class="docutils literal"><span class="pre">Y</span> <span class="pre">=</span> <span class="pre">ceil(log2(n))</span></code> - 1</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_shrot</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">rotop</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"rotop"</span><span class="p">,</span> <span class="mi">3</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">instshamt</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"instshamt"</span><span class="p">,</span> <span class="mi">2</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">insti</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"insti"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">insto</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"insto"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenShrot'</span><span class="p">,</span> <span class="s1">'shrot_4'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'shrot_4'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'op'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">rotop</span>
|
|||
|
<span class="p">,</span> <span class="s1">'shamt'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">instshamt</span>
|
|||
|
<span class="p">,</span> <span class="s1">'i'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">insti</span>
|
|||
|
<span class="p">,</span> <span class="s1">'o'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">insto</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgennul">
|
|||
|
<h2>DpgenNul<a class="headerlink" href="#dpgennul" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenNul – Zero Detector Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNul'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits zero detector named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>i0</strong> : value to check (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : null flag (1 bit)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">q</span> <span class="o"><=</span> <span class="s1">'1'</span> <span class="n">WHEN</span> <span class="p">(</span> <span class="n">i0</span> <span class="o">=</span> <span class="n">X</span><span class="s2">"00000000"</span> <span class="p">)</span> <span class="n">ELSE</span> <span class="s1">'0'</span><span class="p">;</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_nul</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenNul'</span><span class="p">,</span> <span class="s1">'nul_4'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'nul_4'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'i0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nul'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenconst">
|
|||
|
<h2>DpgenConst<a class="headerlink" href="#dpgenconst" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenConst – Constant Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenConst'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'const'</span> <span class="p">:</span> <span class="n">constVal</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits constant named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>q</strong> : the constant (output, <code class="docutils literal"><span class="pre">n</span></code> bit)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>const</strong> (mandatory) : Defines the constant (string beginning
|
|||
|
with 0b, 0x or 0o functions of the basis)</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">q</span> <span class="o"><=</span> <span class="n">constVal</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_const</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">32</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenConst'</span><span class="p">,</span> <span class="s1">'const_0x0000ffff'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">32</span>
|
|||
|
<span class="p">,</span> <span class="s1">'const'</span> <span class="p">:</span> <span class="s2">"0x0000FFFF"</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'const_0x0000ffff'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenrom2">
|
|||
|
<h2>DpgenRom2<a class="headerlink" href="#dpgenrom2" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenRom2 – 2 words ROM Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenRom2'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val0'</span> <span class="p">:</span> <span class="n">constVal0</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val1'</span> <span class="p">:</span> <span class="n">constVal1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits 2 words optimized ROM named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>sel0</strong> : address of the value (input, 1 bit)</li>
|
|||
|
<li><strong>q</strong> : the selected word (output, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>val0</strong> (mandatory) : Defines the first word</li>
|
|||
|
<li><strong>val1</strong> (mandatory) : Defines the second word</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">q</span> <span class="o"><=</span> <span class="n">WITH</span> <span class="n">sel0</span> <span class="n">SELECT</span>
|
|||
|
<span class="n">constVal0</span> <span class="n">WHEN</span> <span class="n">B</span><span class="s2">"0"</span><span class="p">,</span>
|
|||
|
<span class="n">constVal1</span> <span class="n">WHEN</span> <span class="n">B</span><span class="s2">"1"</span><span class="p">;</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_rom2</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">sel0</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"sel0"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">q</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"dataout"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenRom2'</span><span class="p">,</span> <span class="s1">'rom2_0b1010_0b1100'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val0'</span> <span class="p">:</span> <span class="s2">"0b1010"</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val1'</span> <span class="p">:</span> <span class="s2">"0b1100"</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'rom2_0b1010_0b1100'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'sel0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">sel0</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">q</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenrom4">
|
|||
|
<h2>DpgenRom4<a class="headerlink" href="#dpgenrom4" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenRom4 – 4 words ROM Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenRom4'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val0'</span> <span class="p">:</span> <span class="n">constVal0</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val1'</span> <span class="p">:</span> <span class="n">constVal1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val2'</span> <span class="p">:</span> <span class="n">constVal2</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val3'</span> <span class="p">:</span> <span class="n">constVal3</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a <code class="docutils literal"><span class="pre">n</span></code> bits 4 words optimized ROM named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>sel1</strong> : upper bit of the address of the value (input, 1 bit)</li>
|
|||
|
<li><strong>sel0</strong> : lower bit of the address of the value (input, 1 bit)</li>
|
|||
|
<li><strong>q</strong> : the selected word (output, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>val0</strong> (mandatory) : Defines the first word</li>
|
|||
|
<li><strong>val1</strong> (mandatory) : Defines the second word</li>
|
|||
|
<li><strong>val2</strong> (mandatory) : Defines the third word</li>
|
|||
|
<li><strong>val3</strong> (mandatory) : Defines the fourth word</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Behavior</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">q</span> <span class="o"><=</span> <span class="n">WITH</span> <span class="n">sel1</span> <span class="o">&</span> <span class="n">sel0</span> <span class="n">SELECT</span> <span class="n">constVal0</span> <span class="n">WHEN</span> <span class="n">B</span><span class="s2">"00"</span><span class="p">,</span>
|
|||
|
<span class="n">constVal1</span> <span class="n">WHEN</span> <span class="n">B</span><span class="s2">"01"</span><span class="p">,</span>
|
|||
|
<span class="n">constVal2</span> <span class="n">WHEN</span> <span class="n">B</span><span class="s2">"10"</span><span class="p">,</span>
|
|||
|
<span class="n">constVal3</span> <span class="n">WHEN</span> <span class="n">B</span><span class="s2">"11"</span><span class="p">;</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_rom4</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">sel0</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"sel0"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">sel1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"sel1"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">q</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"dataout"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenRom4'</span><span class="p">,</span> <span class="s1">'rom4_0b1010_0b1100_0b1111_0b0001'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val0'</span> <span class="p">:</span> <span class="s2">"0b1010"</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val1'</span> <span class="p">:</span> <span class="s2">"0b1100"</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val2'</span> <span class="p">:</span> <span class="s2">"0b1111"</span>
|
|||
|
<span class="p">,</span> <span class="s1">'val3'</span> <span class="p">:</span> <span class="s2">"0b0001"</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'rom4_0b1010_0b1100_0b1111_0b0001'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'sel0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">sel0</span>
|
|||
|
<span class="p">,</span> <span class="s1">'sel1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">sel1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'q'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">q</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenram">
|
|||
|
<h2>DpgenRam<a class="headerlink" href="#dpgenram" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenRam – RAM Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenRam'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nword'</span> <span class="p">:</span> <span class="n">regNumber</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a RAM of <code class="docutils literal"><span class="pre">regNumber</span></code> words of <code class="docutils literal"><span class="pre">n</span></code>
|
|||
|
bits named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>ck</strong> : clock signal (input, 1 bit)</li>
|
|||
|
<li><strong>w</strong> : write requested (input, 1 bit)</li>
|
|||
|
<li><strong>selram</strong> : select the write bus (input, 1 bit)</li>
|
|||
|
<li><strong>ad</strong> : the address (input, <code class="docutils literal"><span class="pre">Y</span></code> bits)</li>
|
|||
|
<li><strong>datain</strong> : write bus (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>dataout</strong> : read bus (output, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>nword</strong> (mandatory) : Defines the size of the words</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_ram</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">ck</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"ck"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">w</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"w"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">selram</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"selram"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">ad</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"ad"</span><span class="p">,</span> <span class="mi">5</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">datain</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"datain"</span><span class="p">,</span> <span class="mi">32</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">dataout</span> <span class="o">=</span> <span class="n">TriState</span> <span class="p">(</span> <span class="s2">"dataout"</span><span class="p">,</span> <span class="mi">32</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenRam'</span><span class="p">,</span> <span class="s1">'ram_32_32'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">32</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nword'</span> <span class="p">:</span> <span class="mi">32</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'ram_32_32'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'ck'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">ck</span>
|
|||
|
<span class="p">,</span> <span class="s1">'w'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">w</span>
|
|||
|
<span class="p">,</span> <span class="s1">'selram'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">selram</span>
|
|||
|
<span class="p">,</span> <span class="s1">'ad'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">ad</span>
|
|||
|
<span class="p">,</span> <span class="s1">'datain'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">datain</span>
|
|||
|
<span class="p">,</span> <span class="s1">'dataout'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">dataout</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenrf1">
|
|||
|
<h2>DpgenRf1<a class="headerlink" href="#dpgenrf1" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenRf1, DpgenRf1r0 – Register File Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenRf1'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nword'</span> <span class="p">:</span> <span class="n">regNumber</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a register file of <code class="docutils literal"><span class="pre">regNumber</span></code> words of
|
|||
|
<code class="docutils literal"><span class="pre">n</span></code> bits without decoder named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>ckok</strong> : clock signal (input, 1 bit)</li>
|
|||
|
<li><strong>sel</strong> : select the write bus (input, 1 bit)</li>
|
|||
|
<li><strong>selr</strong> : the decoded read address (input, <code class="docutils literal"><span class="pre">regNumber</span></code> bits)</li>
|
|||
|
<li><strong>selw</strong> : the decoded write address (input, <code class="docutils literal"><span class="pre">regNumber</span></code> bits)</li>
|
|||
|
<li><strong>datain0</strong> : first write bus (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>datain1</strong> : second write bus (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>dataout</strong> : read bus (output, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the words (even,
|
|||
|
between 2 and 64)</li>
|
|||
|
<li><strong>nword</strong> (mandatory) : Defines the number of the words (even,
|
|||
|
between 4 and 32)</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>datain0 and datain1 are the two write busses. Only one is used to
|
|||
|
actually write the register word, it is selected by the sel
|
|||
|
signal.</li>
|
|||
|
<li>When sel is set to zero datain0 is used to write the register
|
|||
|
word, otherwise it will be datain1</li>
|
|||
|
<li>selr, selw : this register file have no decoder, so selr have a
|
|||
|
bus width equal to <code class="docutils literal"><span class="pre">regNumber</span></code>. One bit for each word</li>
|
|||
|
<li>The DpgenRf1r0 variant differs from the DpgenRf1 in that the
|
|||
|
register of address zero is stuck to zero. You can write into it,
|
|||
|
it will not change the value. When read, it will always return
|
|||
|
zero</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_rf1</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">ck</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"ck"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">sel</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"sel"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">selr</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"selr"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">selw</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"selw"</span><span class="p">,</span> <span class="mi">16</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">datain0</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"datain0"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">datain1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"datain1"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">dataout</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"dataout"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenRf1'</span><span class="p">,</span> <span class="s1">'rf1_4_16'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nword'</span> <span class="p">:</span> <span class="mi">16</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'rf1_4_16'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'ck'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">ck</span>
|
|||
|
<span class="p">,</span> <span class="s1">'sel'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">sel</span>
|
|||
|
<span class="p">,</span> <span class="s1">'selr'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">selr</span>
|
|||
|
<span class="p">,</span> <span class="s1">'selw'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">selw</span>
|
|||
|
<span class="p">,</span> <span class="s1">'datain0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">datain0</span>
|
|||
|
<span class="p">,</span> <span class="s1">'datain1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">datain1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'dataout'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">dataout</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenrf1d">
|
|||
|
<h2>DpgenRf1d<a class="headerlink" href="#dpgenrf1d" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenRf1d, DpgenRf1dr0 – Register File with Decoder
|
|||
|
Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenRf1d'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nword'</span> <span class="p">:</span> <span class="n">regNumber</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a register file of <code class="docutils literal"><span class="pre">regNumber</span></code> words of
|
|||
|
<code class="docutils literal"><span class="pre">n</span></code> bits with decoder named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>ck</strong> : clock signal (input, 1 bit)</li>
|
|||
|
<li><strong>sel</strong> : select the write bus (input, 1 bit)</li>
|
|||
|
<li><strong>wen</strong> : write enable (input, 1 bit)</li>
|
|||
|
<li><strong>ren</strong> : read enable (input, 1 bit)</li>
|
|||
|
<li><strong>adr</strong> : the read address (input, <code class="docutils literal"><span class="pre">Y</span></code> bits)</li>
|
|||
|
<li><strong>adw</strong> : the write address (input, <code class="docutils literal"><span class="pre">Y</span></code> bits)</li>
|
|||
|
<li><strong>datain0</strong> : first write bus (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>datain1</strong> : second write bus (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>dataout</strong> : read bus (output, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the words (even,
|
|||
|
between 2 and 64)</li>
|
|||
|
<li><strong>nword</strong> (mandatory) : Defines the number of the words (even,
|
|||
|
between 6 and 32)</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>datain0 and datain1 are the two write busses. Only one is used to
|
|||
|
actually write the register word, it is selected by the sel
|
|||
|
signal.</li>
|
|||
|
<li>When sel is set to zero datain0 is used to write the register
|
|||
|
word, otherwise it will be datain1</li>
|
|||
|
<li>adr, adw : the width (Y) of those signals is computed from
|
|||
|
regNumber : <code class="docutils literal"><span class="pre">Y</span> <span class="pre">=</span> <span class="pre">log2(regNumber)</span></code></li>
|
|||
|
<li>wen and ren : write enable and read enable, allows reading and
|
|||
|
writing when sets to <code class="docutils literal"><span class="pre">one</span></code></li>
|
|||
|
<li>The DpgenRf1dr0 variant differs from the DpgenRf1d in that the
|
|||
|
register of address zero is stuck to zero. You can write into it,
|
|||
|
it will not change the value. When read, it will always return
|
|||
|
zero</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_rf1d</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">ck</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"ck"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">sel</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"sel"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">wen</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"wen"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">ren</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"ren"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">adr</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"adr"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">adw</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"adw"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">datain0</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"datain0"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">datain1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"datain1"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">dataout</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"dataout"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenRf1d'</span><span class="p">,</span> <span class="s1">'rf1d_4_16'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nword'</span> <span class="p">:</span> <span class="mi">16</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'rf1d_4_16'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'ck'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">ck</span>
|
|||
|
<span class="p">,</span> <span class="s1">'sel'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">sel</span>
|
|||
|
<span class="p">,</span> <span class="s1">'wen'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">wen</span>
|
|||
|
<span class="p">,</span> <span class="s1">'ren'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">ren</span>
|
|||
|
<span class="p">,</span> <span class="s1">'adr'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">adr</span>
|
|||
|
<span class="p">,</span> <span class="s1">'adw'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">adw</span>
|
|||
|
<span class="p">,</span> <span class="s1">'datain0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">datain0</span>
|
|||
|
<span class="p">,</span> <span class="s1">'datain1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">datain1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'dataout'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">dataout</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgenfifo">
|
|||
|
<h2>DpgenFifo<a class="headerlink" href="#dpgenfifo" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenFifo – Fifo Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenFifo'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nword'</span> <span class="p">:</span> <span class="n">regNumber</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a FIFO of <code class="docutils literal"><span class="pre">regNumber</span></code> words of <code class="docutils literal"><span class="pre">n</span></code>
|
|||
|
bits named <code class="docutils literal"><span class="pre">modelname</span></code>.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>ck</strong> : clock signal (input, 1 bit)</li>
|
|||
|
<li><strong>reset</strong> : reset signal (input, 1 bit)</li>
|
|||
|
<li><strong>r</strong> : read requested (input, 1 bit)</li>
|
|||
|
<li><strong>w</strong> : write requested (input, 1 bit)</li>
|
|||
|
<li><strong>rok</strong> : read acknowledge (output, 1 bit)</li>
|
|||
|
<li><strong>wok</strong> : write acknowledge (output, 1 bit)</li>
|
|||
|
<li><strong>sel</strong> : select the write bus (input, 1 bit)</li>
|
|||
|
<li><strong>datain0</strong> : first write bus (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>datain1</strong> : second write bus (input, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>dataout</strong> : read bus (output, <code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the words (even,
|
|||
|
between 2 and 64)</li>
|
|||
|
<li><strong>nword</strong> (mandatory) : Defines the number of words (even, between
|
|||
|
4 and 32)</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>datain0 and datain1 : the two write busses. Only one is used to
|
|||
|
actually write the FIFO, it is selected by the sel signal.</li>
|
|||
|
<li>sel : when set to <code class="docutils literal"><span class="pre">zero</span></code> the datain0 is used to write the
|
|||
|
register word, otherwise it will be datain1.</li>
|
|||
|
<li>r, rok : set r when a word is requested, rok tells that a word has
|
|||
|
effectively been popped (rok == not empty).</li>
|
|||
|
<li>w, wok : set w when a word is pushed, wok tells that the word has
|
|||
|
effectively been pushed (wok == not full).</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_fifo</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">ck</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"ck"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">reset</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"reset"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">r</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"r"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">w</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"w"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">rok</span> <span class="o">=</span> <span class="n">SignalInOut</span> <span class="p">(</span> <span class="s2">"rok"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">wok</span> <span class="o">=</span> <span class="n">SignalInOut</span> <span class="p">(</span> <span class="s2">"wok"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">sel</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"sel"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">datain0</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"datain0"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">datain1</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"datain1"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">dataout</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"dataout"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenFifo'</span><span class="p">,</span> <span class="s1">'fifo_4_16'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'nword'</span> <span class="p">:</span> <span class="mi">16</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'fifo_4_16'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'ck'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">ck</span>
|
|||
|
<span class="p">,</span> <span class="s1">'reset'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">reset</span>
|
|||
|
<span class="p">,</span> <span class="s1">'r'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">r</span>
|
|||
|
<span class="p">,</span> <span class="s1">'w'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">w</span>
|
|||
|
<span class="p">,</span> <span class="s1">'rok'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">rok</span>
|
|||
|
<span class="p">,</span> <span class="s1">'wok'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">wok</span>
|
|||
|
<span class="p">,</span> <span class="s1">'sel'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">sel</span>
|
|||
|
<span class="p">,</span> <span class="s1">'datain0'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">datain0</span>
|
|||
|
<span class="p">,</span> <span class="s1">'datain1'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">datain1</span>
|
|||
|
<span class="p">,</span> <span class="s1">'dataout'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">dataout</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgendff">
|
|||
|
<h2>DpgenDff<a class="headerlink" href="#dpgendff" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenDff – Dynamic Flip-Flop Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenDff'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a n bits dynamic flip-flop named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>. The two latches of this flip-flop are dynamic, i.e.
|
|||
|
the data is stored in a capacitor.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>wen</strong> : write enable (1 bit)</li>
|
|||
|
<li><strong>ck</strong> : clock signal (1 bit)</li>
|
|||
|
<li><strong>i0</strong> : data input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>When wen is set to <code class="docutils literal"><span class="pre">one</span></code>, enables the writing of the flip-flop</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_dff</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">ck</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"ck"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">wen</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"wen"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenDff'</span><span class="p">,</span> <span class="s1">'dff_4'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'dff_4'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s2">"wen"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">wen</span>
|
|||
|
<span class="p">,</span> <span class="s2">"ck"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">ck</span>
|
|||
|
<span class="p">,</span> <span class="s2">"i0"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s2">"q"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgendfft">
|
|||
|
<h2>DpgenDfft<a class="headerlink" href="#dpgendfft" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenDfft – Dynamic Flip-Flop with Scan-Path
|
|||
|
Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenDfft'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a n bits dynamic flip-flop with scan-path
|
|||
|
named <code class="docutils literal"><span class="pre">modelname</span></code>. The two latches of this flip-flop are dynamic,
|
|||
|
i.e. the data is stored in a capacitor.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>scan</strong> : scan-path mode (input, 1 bit)</li>
|
|||
|
<li><strong>scin</strong> : scan path in (input, 1 bit)</li>
|
|||
|
<li><strong>wen</strong> : write enable (1 bit)</li>
|
|||
|
<li><strong>ck</strong> : clock signal (1 bit)</li>
|
|||
|
<li><strong>i0</strong> : data input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>When scan is set to <code class="docutils literal"><span class="pre">one</span></code>, it enables the scan-path mode. Note
|
|||
|
that in scan-path mode, the wen signal is not effective</li>
|
|||
|
<li>scin is the input of the scan-path. This terminal is different
|
|||
|
from <code class="docutils literal"><span class="pre">i0[0]</span></code>. The scout is q[N-1] (in the following example this
|
|||
|
is <code class="docutils literal"><span class="pre">q[31]</span></code>)</li>
|
|||
|
<li>When wen is set to <code class="docutils literal"><span class="pre">one</span></code> enables the writing of the flip-flop</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_dfft</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">scan</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"scin"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">scin</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"scan"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">ck</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"ck"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">wen</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"wen"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenDfft'</span><span class="p">,</span> <span class="s1">'dfft_4'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'dfft_4'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s2">"wen"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">wen</span>
|
|||
|
<span class="p">,</span> <span class="s2">"ck"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">ck</span>
|
|||
|
<span class="p">,</span> <span class="s2">"scan"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">scan</span>
|
|||
|
<span class="p">,</span> <span class="s2">"scin"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">scin</span>
|
|||
|
<span class="p">,</span> <span class="s2">"i0"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s2">"q"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgensff">
|
|||
|
<h2>DpgenSff<a class="headerlink" href="#dpgensff" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenSff – Static Flip-Flop Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenSff'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a n bits static flip-flop named
|
|||
|
<code class="docutils literal"><span class="pre">modelname</span></code>. The two latches of this flip-flop are static, i.e.
|
|||
|
each one is made of two interters looped together.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>wen</strong> : write enable (1 bit)</li>
|
|||
|
<li><strong>ck</strong> : clock signal (1 bit)</li>
|
|||
|
<li><strong>i0</strong> : data input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>When wen is set to <code class="docutils literal"><span class="pre">one</span></code>, enables the writing of the flip-flop</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_sff</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">ck</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"ck"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">wen</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"wen"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"i"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"o"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenSff'</span><span class="p">,</span> <span class="s1">'sff_4'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'sff_4'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s2">"wen"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">wen</span>
|
|||
|
<span class="p">,</span> <span class="s2">"ck"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">ck</span>
|
|||
|
<span class="p">,</span> <span class="s2">"i0"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s2">"q"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
</ul>
|
|||
|
</div>
|
|||
|
<div class="section" id="dpgensfft">
|
|||
|
<h2>DpgenSfft<a class="headerlink" href="#dpgensfft" title="Permalink to this headline">¶</a></h2>
|
|||
|
<ul>
|
|||
|
<li><p class="first"><strong>Name</strong> : DpgenSfft – Static Flip-Flop with Scan-Path
|
|||
|
Macro-Generator</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Synopsys</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenSfft'</span><span class="p">,</span> <span class="n">modelname</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="n">n</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">,</span> <span class="s1">'behavioral'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
</pre></div>
|
|||
|
</div>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Description</strong> : Generates a n bits static flip-flop with scan-path
|
|||
|
named <code class="docutils literal"><span class="pre">modelname</span></code>. The two latches of this flip-flop are static
|
|||
|
i.e. each one is made of two interters looped togethers.</p>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Terminal Names</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>scan</strong> : scan-path mode (input, 1 bit)</li>
|
|||
|
<li><strong>scin</strong> : scan path in (input, 1 bit)</li>
|
|||
|
<li><strong>wen</strong> : write enable (1 bit)</li>
|
|||
|
<li><strong>ck</strong> : clock signal (1 bit)</li>
|
|||
|
<li><strong>i0</strong> : data input (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>q</strong> : output (<code class="docutils literal"><span class="pre">n</span></code> bits)</li>
|
|||
|
<li><strong>vdd</strong> : power</li>
|
|||
|
<li><strong>vss</strong> : ground</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Parameters</strong> : Parameters are given in the a map <code class="docutils literal"><span class="pre">param</span></code>.</p>
|
|||
|
<ul class="simple">
|
|||
|
<li><strong>nbit</strong> (mandatory) : Defines the size of the generator</li>
|
|||
|
<li><strong>physical</strong> (optional, default value : False) : In order to
|
|||
|
generate a layout</li>
|
|||
|
<li><strong>behavioral</strong> (optional, default value : False) : In order to
|
|||
|
generate a behavior</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>How it works</strong> :</p>
|
|||
|
<ul class="simple">
|
|||
|
<li>When scan is set to <code class="docutils literal"><span class="pre">one</span></code>, it enables the scan-path mode. Note
|
|||
|
that in scan-path mode, the wen signal is not effective</li>
|
|||
|
<li>scin : the input of the scan-path. This terminal is different from
|
|||
|
<code class="docutils literal"><span class="pre">i0[0]</span></code>. The scout is <code class="docutils literal"><span class="pre">q[N</span></code>-<code class="docutils literal"><span class="pre">1]</span></code> (in the following example
|
|||
|
this is <code class="docutils literal"><span class="pre">q[3]</span></code>)</li>
|
|||
|
<li>When wen is set to <code class="docutils literal"><span class="pre">one</span></code>, it enables the writing of the
|
|||
|
flip-flop</li>
|
|||
|
</ul>
|
|||
|
</li>
|
|||
|
<li><p class="first"><strong>Example</strong> :</p>
|
|||
|
<div class="highlight-default"><div class="highlight"><pre><span></span><span class="kn">from</span> <span class="nn">stratus</span> <span class="k">import</span> <span class="o">*</span>
|
|||
|
|
|||
|
<span class="k">class</span> <span class="nc">inst_sfft</span> <span class="p">(</span> <span class="n">Model</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Interface</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">scan</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"scin"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">scin</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"scan"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">ck</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"ck"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">wen</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"wen"</span><span class="p">,</span> <span class="mi">1</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">i</span> <span class="o">=</span> <span class="n">SignalIn</span> <span class="p">(</span> <span class="s2">"in"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">o</span> <span class="o">=</span> <span class="n">SignalOut</span> <span class="p">(</span> <span class="s2">"out"</span><span class="p">,</span> <span class="mi">4</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vdd</span> <span class="o">=</span> <span class="n">VddIn</span> <span class="p">(</span> <span class="s2">"vdd"</span> <span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">vss</span> <span class="o">=</span> <span class="n">VssIn</span> <span class="p">(</span> <span class="s2">"vss"</span> <span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Netlist</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Generate</span> <span class="p">(</span> <span class="s1">'DpgenSfft'</span><span class="p">,</span> <span class="s1">'sfft_4'</span>
|
|||
|
<span class="p">,</span> <span class="n">param</span> <span class="o">=</span> <span class="p">{</span> <span class="s1">'nbit'</span> <span class="p">:</span> <span class="mi">4</span>
|
|||
|
<span class="p">,</span> <span class="s1">'physical'</span> <span class="p">:</span> <span class="kc">True</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
<span class="bp">self</span><span class="o">.</span><span class="n">I</span> <span class="o">=</span> <span class="n">Inst</span> <span class="p">(</span> <span class="s1">'sfft_4'</span><span class="p">,</span> <span class="s1">'inst'</span>
|
|||
|
<span class="p">,</span> <span class="nb">map</span> <span class="o">=</span> <span class="p">{</span> <span class="s2">"wen"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">wen</span>
|
|||
|
<span class="p">,</span> <span class="s2">"ck"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">ck</span>
|
|||
|
<span class="p">,</span> <span class="s2">"scan"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">scan</span>
|
|||
|
<span class="p">,</span> <span class="s2">"scin"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">scin</span>
|
|||
|
<span class="p">,</span> <span class="s2">"i0"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">i</span>
|
|||
|
<span class="p">,</span> <span class="s2">"q"</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">o</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vdd'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vdd</span>
|
|||
|
<span class="p">,</span> <span class="s1">'vss'</span> <span class="p">:</span> <span class="bp">self</span><span class="o">.</span><span class="n">vss</span>
|
|||
|
<span class="p">}</span>
|
|||
|
<span class="p">)</span>
|
|||
|
|
|||
|
<span class="k">def</span> <span class="nf">Layout</span> <span class="p">(</span> <span class="bp">self</span> <span class="p">)</span> <span class="p">:</span>
|
|||
|
<span class="n">Place</span> <span class="p">(</span> <span class="bp">self</span><span class="o">.</span><span class="n">I</span><span class="p">,</span> <span class="n">NOSYM</span><span class="p">,</span> <span class="n">Ref</span><span class="p">(</span><span class="mi">0</span><span class="p">,</span> <span class="mi">0</span><span class="p">)</span> <span class="p">)</span>
|
|||
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</pre></div>
|
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|
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