57 lines
2.4 KiB
Plaintext
57 lines
2.4 KiB
Plaintext
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# -*- Mode:Python -*-
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cellsTop = '/soc/alliance/cells/'
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allianceConfig = \
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( ( 'SYMBOLIC_TECHNOLOGY', helpers.sysConfDir+'/technology.symbolic.xml' )
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, ( 'REAL_TECHNOLOGY' , helpers.sysConfDir+'/technology.cmos130.s2r.xml')
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, ( 'DISPLAY' , helpers.sysConfDir+'/display.xml' )
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, ( 'CATALOG' , 'CATAL')
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, ( 'WORKING_LIBRARY' , '.')
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, ( 'SYSTEM_LIBRARY' , ( (cellsTop+'sxlib' , Environment.Append)
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, (cellsTop+'dp_sxlib', Environment.Append)
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, (cellsTop+'ramlib' , Environment.Append)
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, (cellsTop+'romlib' , Environment.Append)
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, (cellsTop+'rflib' , Environment.Append)
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, (cellsTop+'rf2lib' , Environment.Append)
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, (cellsTop+'pxlib' , Environment.Append) ) )
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, ( 'SCALE_X' , 100)
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, ( 'IN_LO' , 'vst')
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, ( 'IN_PH' , 'ap')
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, ( 'OUT_LO' , 'vst')
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, ( 'OUT_PH' , 'ap')
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, ( 'POWER' , 'vdd')
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, ( 'GROUND' , 'vss')
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, ( 'CLOCK' , '^ck.*')
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, ( 'BLOCKAGE' , '^blockageNet*')
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)
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# Format of routingGaugesTable (dictionary):
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# A list of entry of the form:
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# ( METAL_NAME, (Direction, Type, depth, density, offset, pitch, wire_width, via_width) )
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routingGaugesTable = {}
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routingGaugesTable['sxlib'] = \
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( ( 'METAL1', ( RoutingLayerGauge.Vertical , RoutingLayerGauge.PinOnly, 0, 0.0, 0, 5, 2, 3 ) )
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, ( 'METAL2', ( RoutingLayerGauge.Horizontal, RoutingLayerGauge.Default, 1, 7.0, 0, 5, 2, 3 ) )
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, ( 'METAL3', ( RoutingLayerGauge.Vertical , RoutingLayerGauge.Default, 2, 0.0, 0, 5, 2, 3 ) )
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, ( 'METAL4', ( RoutingLayerGauge.Horizontal, RoutingLayerGauge.Default, 3, 0.0, 0, 5, 2, 3 ) )
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, ( 'METAL5', ( RoutingLayerGauge.Vertical , RoutingLayerGauge.Default, 4, 0.0, 0, 5, 2, 3 ) )
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#, ( 'METAL6', ( RoutingLayerGauge.Horizontal, RoutingLayerGauge.Default, 5, 0.0, 0, 5, 2, 3 ) )
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#, ( 'METAL7', ( RoutingLayerGauge.Vertical , RoutingLayerGauge.Default, 6, 0.0, 0, 5, 2, 3 ) )
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)
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# Format of cellGaugesTable (dictionary):
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# A list of entry of the form:
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# ( METAL_PIN, xy_common_pitch, slice_height, slice_step )
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cellGaugesTable = {}
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cellGaugesTable['sxlib'] = ('metal2', 5.0, 50.0, 5.0)
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