mirror of https://github.com/efabless/caravel.git
102 lines
7.9 KiB
Plaintext
102 lines
7.9 KiB
Plaintext
****************************************
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Report : analysis_coverage
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-status_details {untested}
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-sort_by slack
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Design : digital_pll
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Version: T-2022.03-SP3
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Date : Tue Oct 18 15:36:37 2022
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****************************************
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Type of Check Total Met Violated Untested
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--------------------------------------------------------------------------------
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setup 23 22 ( 96%) 0 ( 0%) 1 ( 4%)
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hold 23 22 ( 96%) 0 ( 0%) 1 ( 4%)
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recovery 23 0 ( 0%) 0 ( 0%) 23 (100%)
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removal 23 0 ( 0%) 0 ( 0%) 23 (100%)
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min_pulse_width 69 46 ( 67%) 0 ( 0%) 23 ( 33%)
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out_setup 2 0 ( 0%) 0 ( 0%) 2 (100%)
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out_hold 2 0 ( 0%) 0 ( 0%) 2 (100%)
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--------------------------------------------------------------------------------
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All Checks 165 90 ( 55%) 0 ( 0%) 75 ( 45%)
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Constrained Related Check
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Pin Pin Clock Type Slack Reason
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--------------------------------------------------------------------------------
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_470_/D CLK(rise) pll_control_clock hold untested no_startpoint_clock
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_470_/D CLK(rise) pll_control_clock setup untested no_startpoint_clock
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_470_/RESET_B(low) - - min_pulse_width untested no_clock
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_470_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_470_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_472_/RESET_B(low) - - min_pulse_width untested no_clock
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_472_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_472_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_471_/RESET_B(low) - - min_pulse_width untested no_clock
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_471_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_471_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_455_/RESET_B(low) - - min_pulse_width untested no_clock
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_455_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_455_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_456_/RESET_B(low) - - min_pulse_width untested no_clock
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_456_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_456_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_475_/RESET_B(low) - - min_pulse_width untested no_clock
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_475_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_475_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_476_/RESET_B(low) - - min_pulse_width untested no_clock
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_476_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_476_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_462_/RESET_B(low) - - min_pulse_width untested no_clock
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_462_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_462_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_474_/RESET_B(low) - - min_pulse_width untested no_clock
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_474_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_474_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_457_/RESET_B(low) - - min_pulse_width untested no_clock
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_457_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_457_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_473_/RESET_B(low) - - min_pulse_width untested no_clock
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_473_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_473_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_459_/RESET_B(low) - - min_pulse_width untested no_clock
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_459_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_459_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_477_/RESET_B(low) - - min_pulse_width untested no_clock
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_477_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_477_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_458_/RESET_B(low) - - min_pulse_width untested no_clock
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_458_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_458_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_461_/RESET_B(low) - - min_pulse_width untested no_clock
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_461_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_461_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_460_/RESET_B(low) - - min_pulse_width untested no_clock
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_460_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_460_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_465_/RESET_B(low) - - min_pulse_width untested no_clock
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_465_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_465_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_466_/RESET_B(low) - - min_pulse_width untested no_clock
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_466_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_466_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_467_/RESET_B(low) - - min_pulse_width untested no_clock
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_467_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_467_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_468_/RESET_B(low) - - min_pulse_width untested no_clock
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_468_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_468_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_463_/RESET_B(low) - - min_pulse_width untested no_clock
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_463_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_463_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_464_/RESET_B(low) - - min_pulse_width untested no_clock
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_464_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_464_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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_469_/RESET_B(low) - - min_pulse_width untested no_clock
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_469_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
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_469_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
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clockp[0] - - out_hold untested no_endpoint_clock
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clockp[0] - - out_setup untested no_endpoint_clock
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clockp[1] - - out_hold untested no_endpoint_clock
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clockp[1] - - out_setup untested no_endpoint_clock
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1
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