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caravel/verilog/dv/caravel/mgmt_soc/user_pass_thru
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Marwan Abbas e9f023f9fa
Introduction of PDK variable (#39) 
* added PDK_VARIENT variable

* changed variable name to PDK

* resolve issue

Co-authored-by: Marwan Abbas <marwan@ciic.c.catx-ext-efabless.internal>
 		2022-04-08 09:05:58 -07:00
..
Makefile Introduction of PDK variable (#39) 2022-04-08 09:05:58 -07:00
README Added and verified testbenches timer, timer2, uart, and user_pass_thru. 2021-10-18 21:53:09 -04:00
user_pass_thru.c Added and verified testbenches timer, timer2, uart, and user_pass_thru. 2021-10-18 21:53:09 -04:00
user_pass_thru_tb.v Added and verified testbenches timer, timer2, uart, and user_pass_thru. 2021-10-18 21:53:09 -04:00

README 

------------------------------------
user_pass_thru test bench
------------------------------------

This test bench exercises the pass-thru mode to the GPIO pins
that are reserved for use by a user project for connecting to
an SPI flash.  The pass-thru mode allows the SPI flash to be
programmed using the housekeeping SPI.

The testbench is essentially the same as the pass_thru test
bench, but using the pins specified for the secondary SPI
flash.  Note that the testbench does not define a controller
on the user side to access the SPI flash (which would be a
useful thing to add to the testbench).