mirror of https://github.com/efabless/caravel.git
946 lines
65 KiB
Tcl
946 lines
65 KiB
Tcl
###############################################################################
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# Created by write_sdc
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# Wed Nov 17 17:45:16 2021
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###############################################################################
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current_design mprj_logic_high
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###############################################################################
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# Timing Constraints
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###############################################################################
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create_clock -name __VIRTUAL_CLK__ -period 10.0000
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set_clock_uncertainty 0.2500 __VIRTUAL_CLK__
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[0]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[100]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[101]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[102]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[103]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[104]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[105]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[106]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[107]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[108]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[109]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[10]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[110]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[111]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[112]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[113]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[114]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[115]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[116]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[117]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[118]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[119]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[11]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[120]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[121]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[122]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[123]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[124]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[125]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[126]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[127]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[128]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[129]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[12]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[130]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[131]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[132]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[133]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[134]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[135]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[136]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[137]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[138]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[139]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[13]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[140]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[141]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[142]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[143]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[144]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[145]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[146]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[147]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[148]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[149]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[14]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[150]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[151]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[152]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[153]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[154]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[155]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[156]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[157]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[158]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[159]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[15]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[160]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[161]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[162]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[163]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[164]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[165]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[166]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[167]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[168]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[169]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[16]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[170]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[171]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[172]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[173]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[174]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[175]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[176]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[177]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[178]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[179]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[17]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[180]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[181]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[182]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[183]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[184]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[185]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[186]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[187]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[188]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[189]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[18]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[190]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[191]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[192]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[193]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[194]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[195]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[196]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[197]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[198]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[199]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[19]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[1]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[200]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[201]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[202]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[203]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[204]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[205]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[206]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[207]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[208]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[209]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[20]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[210]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[211]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[212]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[213]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[214]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[215]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[216]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[217]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[218]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[219]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[21]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[220]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[221]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[222]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[223]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[224]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[225]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[226]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[227]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[228]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[229]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[22]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[230]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[231]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[232]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[233]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[234]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[235]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[236]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[237]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[238]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[239]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[23]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[240]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[241]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[242]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[243]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[244]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[245]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[246]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[247]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[248]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[249]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[24]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[250]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[251]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[252]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[253]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[254]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[255]}]
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set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[256]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[257]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[258]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[259]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[25]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[260]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[261]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[262]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[263]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[264]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[265]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[266]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[267]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[268]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[269]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[26]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[270]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[271]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[272]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[273]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[274]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[275]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[276]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[277]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[278]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[279]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[27]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[280]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[281]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[282]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[283]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[284]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[285]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[286]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[287]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[288]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[289]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[28]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[290]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[291]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[292]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[293]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[294]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[295]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[296]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[297]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[298]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[299]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[29]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[2]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[300]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[301]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[302]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[303]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[304]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[305]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[306]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[307]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[308]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[309]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[30]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[310]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[311]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[312]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[313]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[314]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[315]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[316]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[317]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[318]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[319]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[31]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[320]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[321]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[322]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[323]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[324]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[325]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[326]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[327]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[328]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[329]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[32]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[330]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[331]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[332]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[333]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[334]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[335]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[336]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[337]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[338]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[339]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[33]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[340]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[341]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[342]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[343]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[344]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[345]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[346]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[347]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[348]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[349]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[34]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[350]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[351]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[352]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[353]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[354]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[355]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[356]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[357]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[358]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[359]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[35]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[360]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[361]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[362]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[363]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[364]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[365]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[366]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[367]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[368]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[369]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[36]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[370]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[371]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[372]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[373]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[374]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[375]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[376]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[377]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[378]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[379]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[37]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[380]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[381]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[382]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[383]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[384]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[385]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[386]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[387]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[388]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[389]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[38]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[390]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[391]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[392]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[393]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[394]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[395]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[396]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[397]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[398]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[399]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[39]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[3]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[400]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[401]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[402]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[403]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[404]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[405]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[406]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[407]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[408]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[409]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[40]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[410]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[411]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[412]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[413]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[414]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[415]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[416]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[417]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[418]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[419]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[41]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[420]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[421]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[422]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[423]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[424]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[425]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[426]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[427]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[428]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[429]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[42]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[430]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[431]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[432]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[433]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[434]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[435]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[436]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[437]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[438]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[439]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[43]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[440]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[441]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[442]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[443]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[444]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[445]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[446]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[447]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[448]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[449]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[44]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[450]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[451]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[452]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[453]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[454]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[455]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[456]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[457]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[458]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[459]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[45]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[460]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[461]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[462]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[46]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[47]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[48]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[49]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[4]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[50]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[51]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[52]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[53]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[54]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[55]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[56]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[57]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[58]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[59]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[5]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[60]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[61]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[62]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[63]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[64]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[65]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[66]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[67]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[68]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[69]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[6]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[70]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[71]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[72]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[73]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[74]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[75]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[76]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[77]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[78]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[79]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[7]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[80]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[81]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[82]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[83]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[84]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[85]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[86]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[87]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[88]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[89]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[8]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[90]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[91]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[92]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[93]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[94]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[95]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[96]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[97]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[98]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[99]}]
|
|
set_output_delay 2.0000 -clock [get_clocks {__VIRTUAL_CLK__}] -add_delay [get_ports {HI[9]}]
|
|
###############################################################################
|
|
# Environment
|
|
###############################################################################
|
|
set_load -pin_load 0.0334 [get_ports {HI[462]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[461]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[460]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[459]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[458]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[457]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[456]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[455]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[454]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[453]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[452]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[451]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[450]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[449]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[448]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[447]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[446]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[445]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[444]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[443]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[442]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[441]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[440]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[439]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[438]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[437]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[436]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[435]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[434]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[433]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[432]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[431]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[430]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[429]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[428]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[427]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[426]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[425]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[424]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[423]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[422]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[421]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[420]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[419]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[418]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[417]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[416]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[415]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[414]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[413]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[412]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[411]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[410]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[409]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[408]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[407]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[406]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[405]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[404]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[403]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[402]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[401]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[400]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[399]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[398]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[397]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[396]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[395]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[394]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[393]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[392]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[391]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[390]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[389]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[388]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[387]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[386]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[385]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[384]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[383]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[382]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[381]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[380]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[379]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[378]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[377]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[376]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[375]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[374]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[373]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[372]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[371]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[370]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[369]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[368]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[367]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[366]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[365]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[364]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[363]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[362]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[361]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[360]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[359]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[358]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[357]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[356]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[355]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[354]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[353]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[352]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[351]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[350]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[349]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[348]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[347]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[346]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[345]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[344]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[343]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[342]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[341]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[340]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[339]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[338]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[337]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[336]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[335]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[334]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[333]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[332]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[331]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[330]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[329]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[328]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[327]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[326]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[325]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[324]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[323]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[322]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[321]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[320]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[319]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[318]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[317]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[316]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[315]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[314]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[313]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[312]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[311]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[310]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[309]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[308]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[307]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[306]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[305]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[304]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[303]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[302]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[301]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[300]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[299]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[298]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[297]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[296]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[295]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[294]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[293]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[292]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[291]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[290]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[289]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[288]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[287]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[286]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[285]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[284]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[283]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[282]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[281]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[280]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[279]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[278]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[277]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[276]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[275]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[274]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[273]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[272]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[271]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[270]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[269]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[268]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[267]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[266]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[265]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[264]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[263]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[262]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[261]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[260]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[259]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[258]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[257]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[256]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[255]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[254]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[253]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[252]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[251]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[250]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[249]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[248]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[247]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[246]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[245]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[244]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[243]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[242]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[241]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[240]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[239]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[238]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[237]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[236]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[235]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[234]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[233]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[232]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[231]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[230]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[229]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[228]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[227]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[226]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[225]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[224]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[223]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[222]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[221]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[220]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[219]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[218]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[217]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[216]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[215]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[214]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[213]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[212]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[211]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[210]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[209]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[208]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[207]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[206]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[205]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[204]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[203]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[202]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[201]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[200]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[199]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[198]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[197]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[196]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[195]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[194]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[193]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[192]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[191]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[190]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[189]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[188]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[187]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[186]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[185]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[184]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[183]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[182]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[181]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[180]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[179]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[178]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[177]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[176]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[175]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[174]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[173]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[172]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[171]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[170]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[169]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[168]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[167]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[166]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[165]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[164]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[163]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[162]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[161]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[160]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[159]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[158]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[157]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[156]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[155]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[154]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[153]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[152]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[151]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[150]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[149]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[148]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[147]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[146]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[145]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[144]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[143]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[142]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[141]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[140]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[139]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[138]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[137]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[136]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[135]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[134]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[133]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[132]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[131]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[130]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[129]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[128]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[127]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[126]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[125]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[124]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[123]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[122]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[121]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[120]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[119]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[118]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[117]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[116]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[115]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[114]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[113]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[112]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[111]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[110]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[109]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[108]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[107]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[106]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[105]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[104]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[103]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[102]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[101]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[100]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[99]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[98]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[97]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[96]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[95]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[94]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[93]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[92]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[91]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[90]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[89]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[88]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[87]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[86]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[85]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[84]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[83]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[82]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[81]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[80]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[79]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[78]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[77]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[76]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[75]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[74]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[73]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[72]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[71]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[70]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[69]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[68]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[67]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[66]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[65]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[64]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[63]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[62]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[61]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[60]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[59]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[58]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[57]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[56]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[55]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[54]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[53]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[52]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[51]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[50]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[49]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[48]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[47]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[46]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[45]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[44]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[43]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[42]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[41]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[40]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[39]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[38]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[37]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[36]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[35]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[34]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[33]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[32]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[31]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[30]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[29]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[28]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[27]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[26]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[25]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[24]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[23]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[22]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[21]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[20]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[19]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[18]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[17]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[16]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[15]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[14]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[13]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[12]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[11]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[10]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[9]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[8]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[7]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[6]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[5]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[4]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[3]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[2]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[1]}]
|
|
set_load -pin_load 0.0334 [get_ports {HI[0]}]
|
|
set_timing_derate -early 0.9500
|
|
set_timing_derate -late 1.0500
|
|
###############################################################################
|
|
# Design Rules
|
|
###############################################################################
|
|
set_max_fanout 5.0000 [current_design]
|