caravel/verilog
R. Timothy Edwards d9260dc533
Fixes to caravan for LVS and ERC (#330)
* Corrected missing part of porb_h route in the caravan chip_io_alt
layout.  Correcting the indexing of the "mprj_io_one" connections
to "mgmt_io_oeb" on the left-hand side of caravan, as they were
connecting back to the right side and making a mess of wiring,
instead of being wired locally directly to the nearest I/O.

* Apply automatic changes to Manifest and README.rst

* Corrected the unconnected mgmt_io_in inputs to housekeeping on
the caravan chip (which correspond to the GPIOs that do not exist
in caravan) by connecting them to the "zero" outputs of the
closest GPIO control blocks.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
2022-10-21 14:28:53 -07:00
..
dv cocotb - updates related to enable simulating caraval using iverilog (#320) 2022-10-21 07:43:34 -07:00
gl Added gl netlists for chip_io_alt and gpio_signal_buffering_alt (#327) 2022-10-21 12:06:20 -07:00
rtl Fixes to caravan for LVS and ERC (#330) 2022-10-21 14:28:53 -07:00
stubs [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00