Kareem Farid c84e1393e7 updates to top level caravel (#59) ... * REVERT ME: temporarily match simple_por pin in verilog with lef * - update configs - add patch file for power routing def * - update the following caravel toplevel views - gl - mag - def - add caravel power routing def * Apply automatic changes to Manifest and README.rst * update gl mag and def for caravel * Revert "REVERT ME: temporarily match simple_por pin in verilog with lef" This reverts commit b70c27c69f. * update caravel gds * Apply automatic changes to Manifest and README.rst * Added text and logo cells back into the caravel top level. Put an isolated ground marker layer on the xres_buf layout. Corrected the power supply pin names on the gate level verilog netlist of simple_por in caravel.v. Updated the copyright block text. Corrected DRC errors in the top level routing. Co-authored-by: Tim Edwards <tim@opencircuitdesign.com>		2022-04-08 09:31:33 -07:00
..
dv	Introduction of PDK variable (#39)	2022-04-08 09:05:58 -07:00
gl	updates to top level caravel (#59)	2022-04-08 09:31:33 -07:00
rtl	Corrected the issue reported on the github issue tracker (#34) (#50)	2022-04-07 07:44:57 -07:00
stubs	[DATA] Add spare_logic_block	2021-11-24 20:36:23 +02:00