mirror of https://github.com/efabless/caravel.git
364 lines
12 KiB
Python
Executable File
364 lines
12 KiB
Python
Executable File
#!/usr/bin/env python3
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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# SPDX-License-Identifier: Apache-2.0
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#----------------------------------------------------------------------
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#
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# set_user_id.py ---
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#
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# Manipulate the magic database, GDS, and verilog source files for the
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# user_id_programming block to set the user ID number.
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#
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# The user ID number is a 32-bit value that is passed to this routine
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# as an 8-digit hex number. If not given as an option, then the script
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# will look for the value of the key "project_id" in the info.yaml file
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# in the project top level directory
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#
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# user_id_programming layout map:
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# Positions marked (in microns) for value = 0. For value = 1, move
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# the via 0.92um to the left.
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#
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# Layout grid is 0.46um x 0.34um with half-pitch offset (0.23um, 0.17um)
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#
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# Signal Via position (um)
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# name X Y
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#--------------------------------
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# mask_rev[0] 14.49 9.35
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# mask_rev[1] 16.33 9.35
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# mask_rev[2] 10.35 20.23
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# mask_rev[3] 8.05 9.35
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# mask_rev[4] 28.29 9.35
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# mask_rev[5] 21.85 25.67
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# mask_rev[6] 8.05 20.23
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# mask_rev[7] 20.47 9.35
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# mask_rev[8] 17.25 17.85
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# mask_rev[9] 25.53 12.07
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# mask_rev[10] 22.31 20.23
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# mask_rev[11] 13.11 9.35
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# mask_rev[12] 23.69 23.29
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# mask_rev[13] 24.15 12.07
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# mask_rev[14] 13.57 17.85
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# mask_rev[15] 23.23 6.97
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# mask_rev[16] 24.15 17.85
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# mask_rev[17] 8.51 17.85
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# mask_rev[18] 23.69 20.23
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# mask_rev[19] 10.81 23.29
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# mask_rev[20] 14.95 6.97
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# mask_rev[21] 18.17 23.29
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# mask_rev[22] 21.39 17.85
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# mask_rev[23] 26.45 25.67
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# mask_rev[24] 9.89 17.85
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# mask_rev[25] 15.87 17.85
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# mask_rev[26] 26.45 17.85
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# mask_rev[27] 8.51 6.97
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# mask_rev[28] 10.81 9.35
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# mask_rev[29] 27.83 20.23
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# mask_rev[30] 16.33 23.29
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# mask_rev[31] 8.05 14.79
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#----------------------------------------------------------------------
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import os
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import sys
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import re
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import subprocess
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def usage():
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print("Usage:")
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print("set_user_id.py [<user_id_value>] [<path_to_project>]")
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print("")
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print("where:")
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print(" <user_id_value> is a character string of eight hex digits, and")
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print(" <path_to_project> is the path to the project top level directory.")
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print("")
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print(" If <user_id_value> is not given, then it must exist in the info.yaml file.")
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print(" If <path_to_project> is not given, then it is assumed to be the cwd.")
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return 0
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if __name__ == '__main__':
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# Coordinate pairs in microns for the zero position on each bit
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mask_rev = (
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(14.49, 9.35), (16.33, 9.35), (10.35, 20.23), ( 8.05, 9.35),
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(28.29, 9.35), (21.85, 25.67), ( 8.05, 20.23), (20.47, 9.35),
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(17.25, 17.85), (25.53, 12.07), (22.31, 20.23), (13.11, 9.35),
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(23.69, 23.29), (24.15, 12.07), (13.57, 17.85), (23.23, 6.97),
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(24.15, 17.85), ( 8.51, 17.85), (23.69, 20.23), (10.81, 23.29),
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(14.95, 6.97), (18.17, 23.29), (21.39, 17.85), (26.45, 25.67),
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( 9.89, 17.85), (15.87, 17.85), (26.45, 17.85), ( 8.51, 6.97),
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(10.81, 9.35), (27.83, 20.23), (16.33, 23.29), ( 8.05, 14.79));
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optionlist = []
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arguments = []
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debugmode = False
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reportmode = False
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for option in sys.argv[1:]:
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if option.find('-', 0) == 0:
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optionlist.append(option)
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else:
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arguments.append(option)
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if len(arguments) > 2:
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print("Wrong number of arguments given to set_user_id.py.")
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usage()
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sys.exit(0)
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if '-debug' in optionlist:
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debugmode = True
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if '-report' in optionlist:
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reportmode = True
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user_id_value = None
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user_project_path = None
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if len(arguments) > 0:
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user_id_value = arguments[0]
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# Convert to binary
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try:
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user_id_int = int('0x' + user_id_value, 0)
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user_id_bits = '{0:032b}'.format(user_id_int)
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except:
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user_project_path = arguments[0]
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if len(arguments) == 0:
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user_project_path = os.getcwd()
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elif len(arguments) == 2:
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user_project_path = arguments[1]
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elif user_project_path == None:
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user_project_path = arguments[0]
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else:
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user_project_path = os.getcwd()
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if not os.path.isdir(user_project_path):
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print('Error: Project path "' + user_project_path + '" does not exist or is not readable.')
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sys.exit(1)
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# Check for valid directories
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if not user_id_value:
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if os.path.isfile(user_project_path + '/info.yaml'):
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with open(user_project_path + '/info.yaml', 'r') as ifile:
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infolines = ifile.read().splitlines()
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for line in infolines:
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kvpair = line.split(':')
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if len(kvpair) == 2:
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key = kvpair[0].strip()
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value = kvpair[1].strip()
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if key == 'project_id':
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user_id_value = value.strip('"\'')
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break
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if not user_id_value:
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print('Error: No project_id key:value pair found in project info.yaml.')
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sys.exit(1)
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try:
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user_id_int = int('0x' + user_id_value, 0)
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user_id_bits = '{0:032b}'.format(user_id_int)
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except:
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print('Error: Cannot parse user ID "' + user_id_value + '" as an 8-digit hex number.')
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sys.exit(1)
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else:
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print('Error: No info.yaml file and no user ID argument given.')
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sys.exit(1)
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if reportmode:
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print(str(user_id_int))
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sys.exit(0)
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print('Setting project user ID to: ' + user_id_value)
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magpath = user_project_path + '/mag'
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vpath = user_project_path + '/verilog'
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errors = 0
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if not os.path.isdir(vpath):
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print('No directory ' + vpath + ' found (path to verilog).')
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sys.exit(1)
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if not os.path.isdir(magpath):
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print('No directory ' + magpath + ' found (path to magic databases).')
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sys.exit(1)
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print('Step 1: Modify layout of the user_id_programming subcell')
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# Bytes leading up to via position are:
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viarec = "00 06 0d 02 00 43 00 06 0e 02 00 2c 00 2c 10 03 "
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viabytes = bytes.fromhex(viarec)
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# Read the ID programming layout. If a backup was made of the
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# zero-value program, then use it.
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magbak = magpath + '/user_id_prog_zero.mag'
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magfile = magpath + '/user_id_programming.mag'
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if os.path.isfile(magbak):
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with open(magbak, 'r') as ifile:
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magdata = ifile.read()
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else:
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with open(magfile, 'r') as ifile:
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magdata = ifile.read()
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for i in range(0,32):
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# Ignore any zero bits.
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if user_id_bits[i] == '0':
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continue
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coords = mask_rev[i]
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xum = coords[0]
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yum = coords[1]
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# Contact is 0.17 x 0.17, so add and subtract 0.085 to get
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# the corner positions.
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xllum = xum - 0.085
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yllum = yum - 0.085
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xurum = xum + 0.085
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yurum = yum + 0.085
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# Get the values for the corner coordinates in magic internal units
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xlli = int(round(xllum * 200))
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ylli = int(round(yllum * 200))
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xuri = int(round(xurum * 200))
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yuri = int(round(yurum * 200))
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viaoldposdata = 'rect ' + xlli + ' ' + ylli + ' ' + xuri + ' ' + yuri
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# For "one" bits, the X position is moved 0.92 microns to the left
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newxllum = xllum - 0.92
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newxurum = xurum - 0.92
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# Get the values for the new corner coordinates in magic internal units
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newxlli = int(round(newxllum * 200))
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newxuri = int(round(newxurum * 200))
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vianewposdata = 'rect ' + newxlli + ' ' + ylli + ' ' + newxuri + ' ' + yuri
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# Diagnostic
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if debugmode:
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print('Bit ' + str(i) + ':')
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print('Via position ({0:3.2f}, {1:3.2f}) to ({2:3.2f}, {3:3.2f})'.format(xllum, yllum, xurum, yurum))
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print('Old string = "' + viaoldposdata + '"')
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print('New string = "' + vianewposdata + '"')
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# Replace the old data with the new
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if viaoldposdata not in gdsdata:
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print('Error: via not found for bit position ' + str(i))
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errors += 1
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else:
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magdata == magdata.replace(viaoldposdata, vianewposdata)
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if errors == 0:
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# Keep a copy of the original
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if not os.path.isfile(magbak):
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os.rename(magfile, magbak)
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with open(magfile, 'w') as ofile:
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ofile.write(magdata)
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print('Done!')
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else:
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print('There were errors in processing. No file written.')
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print('Ending process.')
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sys.exit(1)
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print('Step 2: Add user project ID parameter to source verilog.')
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changed = False
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with open(vpath + '/rtl/caravel.v', 'r') as ifile:
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vlines = ifile.read().splitlines()
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outlines = []
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for line in vlines:
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oline = re.sub("parameter USER_PROJECT_ID = 32'h[0-9A-F]+;",
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"parameter USER_PROJECT_ID = 32'h" + user_id_value + ";",
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line)
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if oline != line:
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changed = True
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outlines.append(oline)
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if changed:
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with open(vpath + '/rtl/caravel.v', 'w') as ofile:
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for line in outlines:
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print(line, file=ofile)
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print('Done!')
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else:
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print('Error: No substitutions done on verilog/rtl/caravel.v.')
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print('Ending process.')
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sys.exit(1)
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print('Step 3: Add user project ID parameter to gate-level verilog.')
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changed = False
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with open(vpath + '/gl/user_id_programming.v', 'r') as ifile:
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vdata = ifile.read()
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for i in range(0,32):
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# Ignore any zero bits.
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if user_id_bits[i] == '0':
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continue
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outdata = vdata.replace('high[' + str(i) + ']', 'XXXX')
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outdata = outdata.replace('low[' + str(i) + ']', 'high[' + str(i) + ']')
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outdata = outdata.replace('XXXX', 'low[' + str(i) + ']')
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outdata = outdata.replace('LO(mask_rev[' + str(i) + ']',
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'HI(mask_rev[' + str(i) + ']')
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outdata = outdata.replace('HI(\\user_proj_id_low', 'LO(\\user_proj_id_low')
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if changed:
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with open(vpath + '/gl/user_id_programming.v', 'w') as ofile:
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ofile.write(outdata)
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print('Done!')
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else:
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print('Error: No substitutions done on verilog/gl/user_id_programming.v.')
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print('Ending process.')
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sys.exit(1)
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print('Step 4: Add user project ID text to top level layout.')
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with open(magpath + '/user_id_textblock.mag', 'r') as ifile:
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maglines = ifile.read().splitlines()
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outlines = []
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digit = 0
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wasseen = {}
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for line in maglines:
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if 'alphaX_' in line:
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dchar = user_id_value[7 - digit].upper()
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oline = re.sub('alpha_[0-9A-F]', 'alpha_' + dchar, line)
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# Add path reference if cell was not previously found in the file
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if dchar not in wasseen:
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if 'hexdigits' not in oline:
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oline += ' hexdigits'
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outlines.append(oline)
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wasseen[dchar] = True
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digit += 1
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else:
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outlines.append(line)
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if digit == 8:
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with open(magpath + '/user_id_textblock.mag', 'w') as ofile:
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for line in outlines:
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print(line, file=ofile)
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print('Done!')
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elif digit == 0:
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print('Error: No digits were replaced in the layout.')
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else:
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print('Error: Only ' + str(digit) + ' digits were replaced in the layout.')
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sys.exit(0)
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