caravel/verilog
kareem 8c95a58e0d ~ regenerate chip_io netlist to fix missing power pins from constant blocks 2022-10-12 11:40:05 -07:00
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dv added netlist for vcs gl_caravel_vcs.list rtl_caravel_vcs.list 2022-10-10 06:23:47 -07:00
gl ~ regenerate chip_io netlist to fix missing power pins from constant blocks 2022-10-12 11:40:05 -07:00
rtl Merge pull request #165 from efabless/misc-rtl-changes 2022-10-11 10:48:18 +02:00
stubs [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00