caravel/verilog
mo-hosni ba7c4dfdd0 revert making jtag ports unconfigurable 2024-03-17 12:25:46 +02:00
..
dv remove cocotb directory since it is moved under other repos 2023-09-19 23:08:03 +03:00
gl Added pins "vddio" and "vssio" to the openframe and openframe project 2023-10-18 12:47:56 -04:00
rtl revert making jtag ports unconfigurable 2024-03-17 12:25:46 +02:00
stubs [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00