Tim Edwards ba932643e6 Changed the chip_io and chip_io_alt layouts to implement the ... continuous ring of vccd and vssd. The clamp connections for the vccd1/vssd1 and vccd2/vssd2 pads still need to be done, although the pads themselves have been changed to the base cell, matching the new verilog RTL.		2021-11-03 15:57:46 -04:00
..
hexdigits	Updated the OSHW (open source hardware) icon graphic layout, which was	2021-11-01 17:25:34 -04:00
chip_io.mag	Changed the chip_io and chip_io_alt layouts to implement the	2021-11-03 15:57:46 -04:00
chip_io_alt.mag	Changed the chip_io and chip_io_alt layouts to implement the	2021-11-03 15:57:46 -04:00
copyright_block.mag	Added as many of the magic database layout files as are expected to remain	2021-10-26 10:27:03 -04:00
digital_pll.mag	Added as many of the magic database layout files as are expected to remain	2021-10-26 10:27:03 -04:00
gpio_logic_high.mag	Added as many of the magic database layout files as are expected to remain	2021-10-26 10:27:03 -04:00
mgmt_protect_hv.mag	Added as many of the magic database layout files as are expected to remain	2021-10-26 10:27:03 -04:00
mprj2_logic_high.mag	Added as many of the magic database layout files as are expected to remain	2021-10-26 10:27:03 -04:00
user_id_programming.mag	Added as many of the magic database layout files as are expected to remain	2021-10-26 10:27:03 -04:00
user_id_textblock.mag	Added as many of the magic database layout files as are expected to remain	2021-10-26 10:27:03 -04:00
xres_buf.mag	Renamed the poorly and awkwardly named "sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped"	2021-10-31 21:43:09 -04:00