mirror of https://github.com/efabless/caravel.git
152 lines
5.2 KiB
ReStructuredText
152 lines
5.2 KiB
ReStructuredText
USER_IRQ_2
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==========
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Register Listing for USER_IRQ_2
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-------------------------------
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+------------------------------------------------------+-------------------------------------------+
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| Register | Address |
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+======================================================+===========================================+
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| :ref:`USER_IRQ_2_IN <USER_IRQ_2_IN>` | :ref:`0xf0007800 <USER_IRQ_2_IN>` |
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+------------------------------------------------------+-------------------------------------------+
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| :ref:`USER_IRQ_2_MODE <USER_IRQ_2_MODE>` | :ref:`0xf0007804 <USER_IRQ_2_MODE>` |
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+------------------------------------------------------+-------------------------------------------+
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| :ref:`USER_IRQ_2_EDGE <USER_IRQ_2_EDGE>` | :ref:`0xf0007808 <USER_IRQ_2_EDGE>` |
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+------------------------------------------------------+-------------------------------------------+
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| :ref:`USER_IRQ_2_EV_STATUS <USER_IRQ_2_EV_STATUS>` | :ref:`0xf000780c <USER_IRQ_2_EV_STATUS>` |
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+------------------------------------------------------+-------------------------------------------+
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| :ref:`USER_IRQ_2_EV_PENDING <USER_IRQ_2_EV_PENDING>` | :ref:`0xf0007810 <USER_IRQ_2_EV_PENDING>` |
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+------------------------------------------------------+-------------------------------------------+
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| :ref:`USER_IRQ_2_EV_ENABLE <USER_IRQ_2_EV_ENABLE>` | :ref:`0xf0007814 <USER_IRQ_2_EV_ENABLE>` |
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+------------------------------------------------------+-------------------------------------------+
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USER_IRQ_2_IN
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^^^^^^^^^^^^^
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`Address: 0xf0007800 + 0x0 = 0xf0007800`
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GPIO Input(s) Status.
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.. wavedrom::
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:caption: USER_IRQ_2_IN
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{
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"reg": [
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{"name": "in", "bits": 1},
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{"bits": 31},
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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USER_IRQ_2_MODE
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^^^^^^^^^^^^^^^
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`Address: 0xf0007800 + 0x4 = 0xf0007804`
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GPIO IRQ Mode: 0: Edge, 1: Change.
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.. wavedrom::
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:caption: USER_IRQ_2_MODE
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{
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"reg": [
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{"name": "mode", "bits": 1},
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{"bits": 31},
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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USER_IRQ_2_EDGE
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^^^^^^^^^^^^^^^
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`Address: 0xf0007800 + 0x8 = 0xf0007808`
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GPIO IRQ Edge (when in Edge mode): 0: Rising Edge, 1: Falling Edge.
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.. wavedrom::
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:caption: USER_IRQ_2_EDGE
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{
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"reg": [
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{"name": "edge", "bits": 1},
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{"bits": 31},
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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USER_IRQ_2_EV_STATUS
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^^^^^^^^^^^^^^^^^^^^
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`Address: 0xf0007800 + 0xc = 0xf000780c`
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This register contains the current raw level of the i0 event trigger. Writes to
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this register have no effect.
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.. wavedrom::
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:caption: USER_IRQ_2_EV_STATUS
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{
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"reg": [
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{"name": "i0", "bits": 1},
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{"bits": 31}
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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+-------+------+---------------------------+
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| Field | Name | Description |
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+=======+======+===========================+
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| [0] | I0 | Level of the ``i0`` event |
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+-------+------+---------------------------+
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USER_IRQ_2_EV_PENDING
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^^^^^^^^^^^^^^^^^^^^^
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`Address: 0xf0007800 + 0x10 = 0xf0007810`
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When a i0 event occurs, the corresponding bit will be set in this register. To
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clear the Event, set the corresponding bit in this register.
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.. wavedrom::
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:caption: USER_IRQ_2_EV_PENDING
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{
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"reg": [
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{"name": "i0", "bits": 1},
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{"bits": 31}
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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+-------+------+------------------------------------------------------------------------------+
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| Field | Name | Description |
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+=======+======+==============================================================================+
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| [0] | I0 | `1` if a `i0` event occurred. This Event is triggered on a **falling** edge. |
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+-------+------+------------------------------------------------------------------------------+
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USER_IRQ_2_EV_ENABLE
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^^^^^^^^^^^^^^^^^^^^
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`Address: 0xf0007800 + 0x14 = 0xf0007814`
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This register enables the corresponding i0 events. Write a ``0`` to this
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register to disable individual events.
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.. wavedrom::
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:caption: USER_IRQ_2_EV_ENABLE
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{
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"reg": [
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{"name": "i0", "bits": 1},
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{"bits": 31}
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], "config": {"hspace": 400, "bits": 32, "lanes": 4 }, "options": {"hspace": 400, "bits": 32, "lanes": 4}
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}
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+-------+------+------------------------------------------+
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| Field | Name | Description |
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+=======+======+==========================================+
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| [0] | I0 | Write a ``1`` to enable the ``i0`` Event |
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+-------+------+------------------------------------------+
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