mirror of https://github.com/efabless/caravel.git
133 lines
8.3 KiB
JSON
133 lines
8.3 KiB
JSON
{
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"inputs" : { "wishbone": {"adr": {"signal":"wb_adr_i","val":0},
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"data": {"signal":"wb_dat_i","val":0},
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"sel": {"signal":"wb_sel_i","val":0},
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"write_en": {"signal":"wb_we_i","val":0},
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"cycle_valid": {"signal":"wb_cyc_i","val":0},
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"stb": {"signal":"wb_stb_i","val":0},
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"_clk": {"signal":"wb_clk_i","val":0},
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"_rst": {"signal":"wb_rstn_i","val":0},
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"_hold": {"signal":"wb_ack_o","val":0},
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"_valid_cycle":{"signal":"wb_cyc_i","val":0}},
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"user_clk": {"user_clk": {"signal":"user_clock","val":0}},
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"trap": {"user_clk": {"signal":"trap","val":0}},
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"UART": {"TX": {"signal":"ser_tx","val":0},
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"gpio_in": {"signal":"mgmt_gpio_in","val":0},
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"enable": {"signal":"uart_enabled","val":0}},
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"SPI": {"CSB": {"signal":"bin3","val":0},
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"SCK": {"signal":"bin4","val":0},
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"SDI": {"signal":"bin2","val":0},
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"_clk": {"signal":"bin4","val":0},
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"_valid_cycle_n":{"signal":"bin3","val":0}
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},
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"SPI_master": {"CSB": {"signal":"spi_csb","val":0},
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"SCK": {"signal":"spi_sck","val":0},
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"SDO": {"signal":"spi_sdo","val":0},
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"SDO_en": {"signal":"spi_sdoenb","val":0},
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"spi_enabled": {"signal":"spi_enabled","val":0},
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"_clk": {"signal":"spi_sck","val":0},
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"_valid_cycle_n":{"signal":"spi_csb","val":0}
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},
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"gpio_data": {"data": {"signal":"mgmt_gpio_in","val":0}},
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"QSPI_mgmt": {"clk": {"signal":"spimemio_flash_clk","val":0},
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"CSB": {"signal":"spimemio_flash_csb","val":0},
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"io0_oen": {"signal":"spimemio_flash_io0_oeb","val":0},
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"io1_oen": {"signal":"spimemio_flash_io1_oeb","val":0},
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"io2_oen": {"signal":"spimemio_flash_io2_oeb","val":0},
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"io3_oen": {"signal":"spimemio_flash_io3_oeb","val":0},
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"data0": {"signal":"spimemio_flash_io0_do","val":0},
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"data1": {"signal":"spimemio_flash_io1_do","val":0},
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"data2": {"signal":"spimemio_flash_io2_do","val":0},
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"data3": {"signal":"spimemio_flash_io3_do","val":0},
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"qspi_en": {"signal":"qspi_enabled","val":0},
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"_clk": {"signal":"spimemio_flash_clk","val":0}},
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"debug": {"data": {"signal":"debug_out","val":0},
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"out_en": {"signal":"debug_oeb","val":0},
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"gpio_in": {"signal":"mgmt_gpio_in","val":0},
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"enable": {"signal":"debug_mode","val":0}},
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"QSPI_pad": {"data0": {"signal":"pad_flash_io0_di","val":0},
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"data1": {"signal":"pad_flash_io1_di","val":0}},
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"sram": {"data": {"signal":"pad_flash_io0_di","val":0}},
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"system": {"vcc1_good": {"signal":"usr1_vcc_pwrgood","val":0},
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"vcc2_good": {"signal":"usr2_vcc_pwrgood","val":0},
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"vdd1_good": {"signal":"usr1_vdd_pwrgood","val":0},
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"vdd2_good": {"signal":"usr2_vdd_pwrgood","val":0},
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"_no_valid": {"signal":"usr2_vdd_pwrgood","val":0}},
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"project_id": {"mask": {"signal":"mask_rev_in","val":0}}
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},
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"outputs" : { "wishbone": {"ack": {"signal":"wb_ack_o","val":0},
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"data": {"signal":"wb_dat_o","val":0},
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"_valid_cycle":{"signal":"wb_ack_o","val":0}},
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"UART": {"RX": {"signal":"ser_rx","val":0}},
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"SPI": {"CSB": {"signal":"bin3","val":0},
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"SCK": {"signal":"bin4","val":0},
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"SDO": {"signal":"bin1","val":0},
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"_clk": {"signal":"bin4","val":0},
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"_valid_cycle_n":{"signal":"bin3","val":0}
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},
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"SPI_master": {"SDI": {"signal":"spi_sdi","val":0},
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"_clk": {"signal":"spi_sck","val":0}},
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"clk_ctrl": {"pll_en": {"signal":"pll_ena","val":0},
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"pll_dco_en": {"signal":"pll_dco_ena","val":0},
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"pll_div": {"signal":"pll_div","val":0},
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"pll_sel": {"signal":"pll_sel","val":0},
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"pll90_sel": {"signal":"pll90_sel","val":0},
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"pll_trim": {"signal":"pll_trim","val":0},
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"pll_bypass": {"signal":"pll_bypass","val":0}},
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"external": {"irq": {"signal":"irq","val":0},
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"rst": {"signal":"reset","val":0}},
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"gpio_loader":{"clk": {"signal":"serial_clock","val":0},
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"load": {"signal":"serial_load","val":0},
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"rst": {"signal":"serial_resetn","val":0},
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"data_1": {"signal":"serial_data_1","val":0},
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"data_2": {"signal":"serial_data_2","val":0}},
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"gpio_data": {"data": {"signal":"mgmt_gpio_out","val":0},
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"enable": {"signal":"mgmt_gpio_oeb","val":0}},
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"pwr_ctrl": {"data": {"signal":"pwr_ctrl_out","val":0}},
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"QSPI_mgmt": {"data0": {"signal":"spimemio_flash_io0_di","val":0},
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"data1": {"signal":"spimemio_flash_io1_di","val":0},
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"data2": {"signal":"spimemio_flash_io2_di","val":0},
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"data3": {"signal":"spimemio_flash_io3_di","val":0}},
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"debug": {"data": {"signal":"debug_in","val":0}},
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"QSPI_pad": {"clk": {"signal":"pad_flash_clk","val":0},
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"clk_en": {"signal":"pad_flash_clk_oeb","val":0},
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"CSB": {"signal":"pad_flash_csb","val":0},
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"CSB_en": {"signal":"pad_flash_csb_oeb","val":0},
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"data0": {"signal":"pad_flash_io0_do","val":0},
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"data0_oen": {"signal":"pad_flash_io0_oeb","val":0},
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"data0_ien": {"signal":"pad_flash_io0_ieb","val":0},
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"data1": {"signal":"pad_flash_io1_do","val":0},
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"data1_oen": {"signal":"pad_flash_io1_oeb","val":0},
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"data1_ien": {"signal":"pad_flash_io1_ieb","val":0},
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"_clk": {"signal":"spimemio_flash_clk","val":0}},
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"sram": {"clk": {"signal":"sram_ro_clk","val":0},
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"CSB": {"signal":"sram_ro_csb","val":0},
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"adr": {"signal":"sram_ro_addr","val":0}}
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}
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} |