mirror of https://github.com/efabless/caravel.git
104 lines
2.7 KiB
C
104 lines
2.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2020 Efabless Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <csr.h>
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#include <soc.h>
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#include <irq_vex.h>
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#include <uart.h>
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#include <defs.h>
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/*
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Testing timer interrupts
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Enable interrupt for IRQ external pin mprj_io[7] -> should be drived to 1 by the environment
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**NOTE** housekeeping SPI should used to update register irq_1_inputsrc to 1 see verilog code
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@wait for environment to make mprj[7] high
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send packet size = 1
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@received interrupt correctly test pass
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send packet size = 5
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@ timeout test fail
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send packet size = 9
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@ end test
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send packet size = 3
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send packet size = 3
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send packet size = 3
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*/
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extern uint16_t flag;
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void main(){
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reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2
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reg_debug_1 = 0x0;
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reg_debug_2 = 0x0;
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// setting bit 7 as input
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reg_mprj_io_7 = GPIO_MODE_MGMT_STD_INPUT_NOPULL;
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// automatic bitbang approach
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if(1){
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reg_mprj_xfer = 1;
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while (reg_mprj_xfer == 1);
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}
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irq_setmask(0);
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irq_setie(1);
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irq_setmask(irq_getmask() | (1 << USER_IRQ_4_INTERRUPT));
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reg_user4_irq_en =1;
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// test interrrupt happen when mprj[7] is asserted
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reg_debug_2 = 0xAA; //wait for environment to make mprj[7] high
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flag = 0;
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// Loop, waiting for the interrupt to change reg_mprj_datah
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bool is_pass = false;
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int timeout = 40;
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for (int i = 0; i < timeout; i++){
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if (flag == 1){
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reg_debug_1 = 0x1B; //test pass irq sent at mprj 7
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is_pass = true;
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break;
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}
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}
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if (!is_pass){
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reg_debug_1 = 0x1E; // timeout
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}
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// test interrupt doesn't happened when mprj[7] is deasserted
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reg_debug_2 = 0xBB;
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flag = 0;
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// Loop, waiting for the interrupt to change reg_mprj_datah
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is_pass = false;
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for (int i = 0; i < timeout; i++){
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if (flag == 1){
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reg_debug_1 = 0x2E; //test fail interrupt isn't suppose to happened
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is_pass = true;
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break;
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}
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}
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if (!is_pass){
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reg_debug_1 = 0x2B; // test pass
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}
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// test finish
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reg_debug_2 = 0xFF;
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}
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