mirror of https://github.com/efabless/caravel.git
433 lines
20 KiB
Python
433 lines
20 KiB
Python
import random
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import cocotb
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from cocotb.clock import Clock
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from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles
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import cocotb.log
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import cocotb.simulator
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from cocotb.handle import SimHandleBase
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from cocotb.handle import Force
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from cocotb_coverage.coverage import *
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from cocotb.binary import BinaryValue
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import enum
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from cocotb.handle import (
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ConstantObject,
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HierarchyArrayObject,
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HierarchyObject,
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ModifiableObject,
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NonHierarchyIndexableObject,
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SimHandle,
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)
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from itertools import groupby, product
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import interfaces.common as common
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from interfaces.common import GPIO_MODE
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from interfaces.common import MASK_GPIO_CTRL
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from interfaces.common import Macros
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def gpio_mode(gpios_values:list):
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gpios=[]
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for array in gpios_values:
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gpio_value = GPIO_MODE(array[1]).name
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for gpio in array[0]:
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gpios.append((gpio,gpio_value))
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cocotb.log.info(f'[caravel][gpio_mode] gpios {gpios}')
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return gpios
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Carvel_Coverage = coverage_section (
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CoverPoint("top.caravel.gpio", vname="gpios mode", xf = lambda gpio ,gpio_mode: (gpio,gpio_mode) ,
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bins = list(product(range(38),[e.name for e in GPIO_MODE])))
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)
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class Caravel_env:
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def __init__(self,dut:SimHandleBase):
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self.dut = dut
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self.clk = dut.clock_tb
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self.caravel_hdl = dut.uut
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self.hk_hdl = dut.uut.housekeeping
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"""start carvel by insert power then reset"""
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async def start_up(self):
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await self.power_up()
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# await self.disable_csb() # no need for this anymore as default for gpio3 is now pullup
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await self.reset()
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await self.disable_bins()
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common.fill_macros(self.dut.macros) # get macros value
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async def disable_bins(self):
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for i in range(38):
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common.drive_hdl(self.dut._id(f"bin{i}_en",False),(0,0),0)
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"""setup the vdd and vcc power bins"""
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async def power_up(self):
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cocotb.log.info(f' [caravel] start powering up')
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self.set_vdd(0)
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self.set_vcc(0)
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await ClockCycles(self.clk, 10)
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cocotb.log.info(f' [caravel] power up -> connect vdd' )
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self.set_vdd(1)
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# await ClockCycles(self.clk, 10)
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cocotb.log.info(f' [caravel] power up -> connect vcc' )
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self.set_vcc(1)
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await ClockCycles(self.clk, 10)
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""""reset caravel"""
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async def reset(self):
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cocotb.log.info(f' [caravel] start resetting')
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self.dut.resetb_tb.value = 0
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await ClockCycles(self.clk, 20)
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self.dut.resetb_tb.value = 1
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await ClockCycles(self.clk, 1)
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cocotb.log.info(f' [caravel] finish resetting')
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def set_vdd(self,value:bool):
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self.dut.vddio_tb.value = value
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self.dut.vssio_tb.value = 0
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self.dut.vddio_2_tb.value = value
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self.dut.vssio_2_tb.value = 0
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self.dut.vdda_tb.value = value
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self.dut.vssa_tb.value = 0
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self.dut.vdda1_tb.value = value
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self.dut.vssa1_tb.value = 0
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self.dut.vdda1_2_tb.value = value
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self.dut.vssa1_2_tb.value = 0
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self.dut.vdda2_tb.value = value
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self.dut.vssa2_tb.value = 0
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def set_vcc(self , value:bool):
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self.dut.vccd_tb.value = value
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self.dut.vssd_tb.value = 0
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self.dut.vccd1_tb.value = value
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self.dut.vssd1_tb.value = 0
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self.dut.vccd2_tb.value = value
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self.dut.vssd2_tb.value = 0
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"""drive csb signal bin E8 mprj[3]"""
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async def drive_csb(self,bit):
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self.drive_gpio_in((3,3),bit)
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self.drive_gpio_in((2,2),0)
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await ClockCycles(self.clk, 1)
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"""set the spi vsb signal high to disable housekeeping spi transmission bin E8 mprj[3]"""
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async def disable_csb(self ):
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cocotb.log.info(f' [caravel] disable housekeeping spi transmission')
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await self.drive_csb(1)
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"""set the spi vsb signal high impedance """
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async def release_csb(self ):
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cocotb.log.info(f' [caravel] release housekeeping spi transmission')
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self.release_gpio(3)
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self.release_gpio(2)
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await ClockCycles(self.clk, 1)
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"""set the spi vsb signal low to enable housekeeping spi transmission bin E8 mprj[3]"""
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async def enable_csb(self ):
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cocotb.log.info(f' [caravel] enable housekeeping spi transmission')
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await self.drive_csb(0)
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"""return the value of mprj in bits used tp monitor the output gpios value"""
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def monitor_gpio(self,bits:tuple):
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mprj = self.dut.mprj_io_tb.value
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size =mprj.n_bits -1 #size of bins array
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mprj_out= self.dut.mprj_io_tb.value[size - bits[0]:size - bits[1]]
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if(mprj_out.is_resolvable):
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cocotb.log.debug(f' [caravel] Monitor : mprj[{bits[0]}:{bits[1]}] = {hex(mprj_out)}')
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else:
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cocotb.log.debug(f' [caravel] Monitor : mprj[{bits[0]}:{bits[1]}] = {mprj_out}')
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return mprj_out
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"""return the value of management gpio"""
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def monitor_mgmt_gpio(self):
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data = self.dut.gpio_tb.value
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cocotb.log.debug(f' [caravel] Monitor mgmt gpio = {data}')
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return data
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"""change the configration of the gpios by overwrite their defaults value then reset
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need to take at least 1 cycle for reset """
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### dont use back door accessing
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async def configure_gpio_defaults(self,gpios_values: list):
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gpio_defaults = self.caravel_hdl.gpio_defaults.value
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cocotb.log.info(f' [caravel] start cofigure gpio gpios ')
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size = gpio_defaults.n_bits -1 #number of bins in gpio_defaults
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# list example [[(gpios),value],[(gpios),value],[(gpios),value]]
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for array in gpios_values:
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gpio_value = array[1]
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for gpio in array[0]:
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self.cov_configure_gpios(gpio,gpio_value.name)
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gpio_defaults[size - (gpio*13 + 12): size -gpio*13] = gpio_value.value
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#cocotb.log.info(f' [caravel] gpio_defaults[{size - (gpio*13 + 12)}:{size -gpio*13}] = {gpio_value.value} ')
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self.caravel_hdl.gpio_defaults.value = gpio_defaults
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#reset
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self.caravel_hdl.gpio_resetn_1_shifted.value = 0
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self.caravel_hdl.gpio_resetn_2_shifted.value = 0
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await ClockCycles(self.clk, 1)
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self.caravel_hdl.gpio_resetn_1_shifted.value = 1
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self.caravel_hdl.gpio_resetn_2_shifted.value = 1
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cocotb.log.info(f' [caravel] finish configuring gpios, the curret gpios value: ')
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self.print_gpios_ctrl_val()
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"""change the configration of the gpios by overwrite the register value
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in control registers and housekeeping regs, don't consume simulation cycles"""
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### dont use back door accessing
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def configure_gpios_regs(self,gpios_values: list):
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cocotb.log.info(f' [caravel] start cofigure gpio gpios ')
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control_modules = self.control_blocks_paths()
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# list example [[(gpios),value],[(gpios),value],[(gpios),value]]
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for array in gpios_values:
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gpio_value = array[1]
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for gpio in array[0]:
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self.cov_configure_gpios(gpio,gpio_value.name)
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self.gpio_control_reg_write(control_modules[gpio],gpio_value.value) # for control blocks regs
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self.caravel_hdl.housekeeping.gpio_configure[gpio].value = gpio_value.value # for house keeping regs
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cocotb.log.info(f' [caravel] finish configuring gpios, the curret gpios value: ')
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self.print_gpios_ctrl_val()
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self.print_gpios_HW_val()
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"""dummy function for coverage sampling"""
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@Carvel_Coverage
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def cov_configure_gpios(self,gpio,gpio_mode):
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cocotb.log.debug(f' [caravel] gpio [{gpio}] = {gpio_mode} ')
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pass
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def print_gpios_default_val(self,print=1):
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gpio_defaults = self.caravel_hdl.gpio_defaults.value
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size = gpio_defaults.n_bits -1 #number of bins in gpio_defaults
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gpios = []
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for gpio in range(Macros['MPRJ_IO_PADS']):
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gpio_value = gpio_defaults[size - (gpio*13 + 12): size -gpio*13]
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gpio_enum = GPIO_MODE(gpio_value.integer)
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gpios.append((gpio,gpio_enum))
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group_bins = groupby(gpios,key=lambda x: x[1])
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for key,value in group_bins:
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gpios=[]
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for gpio in list(value):
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gpios.append(gpio[0])
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if (print):
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cocotb.log.info(f' [caravel] gpios[{gpios}] are {key} ')
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return gpios
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"""print the values return in the gpio of control block mode in GPIO Mode format"""
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def print_gpios_ctrl_val(self, print=1):
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control_modules = self.control_blocks_paths()
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gpios = []
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for i , gpio in enumerate(control_modules):
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gpios.append((i,self.gpio_control_reg_read(gpio)))
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group_bins = groupby(gpios,key=lambda x: x[1])
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for key,value in group_bins:
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gpios=[]
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for gpio in list(value):
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gpios.append(gpio[0])
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if (print):
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cocotb.log.info(f' [caravel] gpios[{gpios}] are {key} ')
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return gpios
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def _check_gpio_ctrl_eq_HW(self):
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assert self.print_gpios_ctrl_val(1) == self.print_gpios_HW_val(1), f'there is an issue while configuration the control block register value isn\'t the same as the house keeping gpio register'
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"""print the values return in the gpio of housekeeping block mode in GPIO Mode format"""
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def print_gpios_HW_val(self,print=1):
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gpios = []
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for pin in range(Macros['MPRJ_IO_PADS']):
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gpios.append((pin,GPIO_MODE(self.caravel_hdl.housekeeping.gpio_configure[pin].value)))
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group_bins = groupby(gpios,key=lambda x: x[1])
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for key,value in group_bins:
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gpios=[]
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for gpio in list(value):
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gpios.append(gpio[0])
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if (print):
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cocotb.log.info(f' [caravel] gpios[{gpios}] are {key} ')
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return gpios
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"""return the paths of the control blocks"""
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def control_blocks_paths(self)-> list:
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car = self.caravel_hdl
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control_modules =[car._id("gpio_control_bidir_1[0]",False),car._id("gpio_control_bidir_1[1]",False)]
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#add gpio_control_in_1a (GPIO 2 to 7)
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for i in range(6):
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control_modules.append(car._id(f'gpio_control_in_1a[{i}]',False))
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#add gpio_control_in_1 (GPIO 8 to 18)
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for i in range(Macros['MPRJ_IO_PADS_1']-9+1):
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control_modules.append(car._id(f'gpio_control_in_1[{i}]',False))
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#add gpio_control_in_2 (GPIO 19 to 34)
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for i in range(Macros['MPRJ_IO_PADS_2']-4+1):
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control_modules.append(car._id(f'gpio_control_in_2[{i}]',False))
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# Last three GPIOs (spi_sdo, flash_io2, and flash_io3) gpio_control_bidir_2
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for i in range(3):
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control_modules.append(car._id(f'gpio_control_bidir_2[{i}]',False))
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return control_modules
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"""read the control register and return a GPIO Mode it takes the path to the control reg"""
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def gpio_control_reg_read(self,path:SimHandleBase) -> GPIO_MODE:
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gpio_mgmt_en = path.mgmt_ena.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_MGMT_EN.value
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gpio_out_dis = path.gpio_outenb.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_OUT_DIS.value
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gpio_holdover = path.gpio_holdover.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_OVERRIDE.value
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gpio_in_dis = path.gpio_inenb.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_INP_DIS.value
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gpio_mode_sel = path.gpio_ib_mode_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_MOD_SEL.value
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gpio_anlg_en = path.gpio_ana_en.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_EN.value
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gpio_anlg_sel = path.gpio_ana_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_SEL.value
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gpio_anlg_pol = path.gpio_ana_pol.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_POL.value
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gpio_slow_sel = path.gpio_slow_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_SLOW.value
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gpio_vtrip_sel = path.gpio_vtrip_sel.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_TRIP.value
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gpio_dgtl_mode = path.gpio_dm.value << MASK_GPIO_CTRL.MASK_GPIO_CTRL_DGTL_MODE.value
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control_reg = (gpio_mgmt_en | gpio_out_dis | gpio_holdover| gpio_in_dis | gpio_mode_sel | gpio_anlg_en
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|gpio_anlg_sel|gpio_anlg_pol|gpio_slow_sel|gpio_vtrip_sel|gpio_dgtl_mode)
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return(GPIO_MODE(control_reg))
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"""read the control register and return a GPIO Mode it takes the path to the control reg"""
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def gpio_control_reg_write(self,path:SimHandleBase,data) :
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bits =common.int_to_bin_list(data,14)
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path.mgmt_ena.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_MGMT_EN.value]
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path.gpio_outenb.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_OUT_DIS.value]
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path.gpio_holdover.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_OVERRIDE.value]
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path.gpio_inenb.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_INP_DIS.value]
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path.gpio_ib_mode_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_MOD_SEL.value]
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path.gpio_ana_en.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_EN.value]
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path.gpio_ana_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_SEL.value]
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path.gpio_ana_pol.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_ANLG_POL.value]
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path.gpio_slow_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_SLOW.value]
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path.gpio_vtrip_sel.value = bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_TRIP.value]
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gpio_dm =bits[MASK_GPIO_CTRL.MASK_GPIO_CTRL_DGTL_MODE.value:MASK_GPIO_CTRL.MASK_GPIO_CTRL_DGTL_MODE.value+3]
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gpio_dm =sum(d * 2**i for i, d in enumerate(gpio_dm)) # convert list to binary int
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path.gpio_dm.value = gpio_dm
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# """drive the value of mprj bits with spicific data from input pad at the top"""
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# def release_gpio(self):
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# io = self.caravel_hdl.padframe.mprj_pads.io
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# mprj , n_bits = common.signal_valueZ_size(io)
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# io.value = mprj
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# cocotb.log.info(f' [caravel] drive_gpio_in pad mprj with {mprj}')
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"""drive the value of mprj bits with spicific data from input pad at the top"""
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def drive_gpio_in(self,bits,data):
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# io = self.caravel_hdl.padframe.mprj_pads.io
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# mprj , n_bits = common.signal_value_size(io)
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# cocotb.log.debug(f' [caravel] before mprj with {mprj} and data = {data} bit [{n_bits-1-bits[0]}]:[{n_bits-1-bits[1]}]')
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# mprj[n_bits-1-bits[0]:n_bits-1-bits[1]] = data
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# io.value = mprj
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# cocotb.log.info(f' [caravel] drive_gpio_in pad mprj with {mprj}')
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data_bits = []
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is_list = isinstance(bits, (list,tuple))
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if is_list :
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cocotb.log.debug(f'[caravel] [drive_gpio_in] start bits[1] = {bits[1]} bits[0]= {bits[0]}')
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data_bits = BinaryValue(value = data, n_bits =bits[0]-bits[1]+1 ,bigEndian=(bits[0]<bits[1]))
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for i,bits2 in enumerate(range(bits[1],bits[0]+1)):
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self.dut._id(f"bin{bits2}",False).value = data_bits[i]
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self.dut._id(f"bin{bits2}_en",False).value = 1
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cocotb.log.debug(f'[caravel] [drive_gpio_in] drive bin{bits2} with {data_bits[i]} and bin{bits2}_en with 1')
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else:
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self.dut._id(f'bin{bits}',False).value = data
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self.dut._id(f'bin{bits}_en',False).value = 1
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cocotb.log.debug(f'[caravel] [drive_gpio_in] drive bin{bits} with {data} and bin{bits}_en with 1')
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""" release driving the value of mprj bits """
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def release_gpio(self,bits):
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data_bits = []
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is_list = isinstance(bits, (list,tuple))
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if is_list :
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cocotb.log.debug(f'[caravel] [drive_gpio_disable] start bits[1] = {bits[1]} bits[0]= {bits[0]}')
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for i,bits2 in enumerate(range(bits[1],bits[0]+1)):
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self.dut._id(f"bin{bits2}_en",False).value = 0
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cocotb.log.debug(f'[caravel] [drive_gpio_disable] release driving bin{bits2}')
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else:
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self.dut._id(f'bin{bits}_en',False).value = 0
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cocotb.log.debug(f'[caravel] [drive_gpio_disable] release driving bin{bits}')
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"""drive the value of gpio management"""
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def drive_mgmt_gpio(self,data):
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mgmt_io = self.dut.gpio_tb
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mgmt_io.value = data
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cocotb.log.info(f' [caravel] drive_mgmt_gpio through management area mprj with {data}')
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"""update the value of mprj bits with spicific data then after certain number of cycle drive z to free the signal"""
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async def drive_gpio_in_with_cycles(self,bits,data,num_cycles):
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self.drive_gpio_in(bits,data)
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cocotb.log.info(f' [caravel] wait {num_cycles} cycles')
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await cocotb.start(self.wait_then_undrive(bits,num_cycles))
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cocotb.log.info(f' [caravel] finish drive_gpio_with_in_cycles ')
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"""drive the value of mprj bits with spicific data from management area then after certain number of cycle drive z to free the signal"""
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async def drive_mgmt_gpio_with_cycles(self,bits,data,num_cycles):
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self.drive_mgmt_gpio(bits,data)
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cocotb.log.info(f' [caravel] wait {num_cycles} cycles')
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await cocotb.start(self.wait_then_undrive(bits,num_cycles))
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cocotb.log.info(f' [caravel] finish drive_gpio_with_in_cycles ')
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async def wait_then_undrive(self,bits,num_cycles):
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await ClockCycles(self.clk, num_cycles)
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n_bits = bits[0]-bits[1]+1
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self.drive_gpio_in(bits, (n_bits)* 'z')
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cocotb.log.info(f' [caravel] finish wait_then_drive ')
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async def hk_write_byte(self, data):
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self.path = self.dut.mprj_io_tb
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data_bit = BinaryValue(value = data , n_bits = 8,bigEndian=False)
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for i in range(7,-1,-1):
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await FallingEdge(self.clk)
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#common.drive_hdl(self.path,[(4,4),(2,2)],[0,int(data_bit[i])]) # 2 = SDI 4 = SCK
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self.drive_gpio_in((2,2),int(data_bit[i]))
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self.drive_gpio_in((4,4),0)
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await RisingEdge(self.clk)
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self.drive_gpio_in((4,4),1)
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await FallingEdge(self.clk)
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""" read byte using housekeeping spi
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when writing to SCK we can't use mprj[4] as there is a limitation in cocotb for accessing pack array #2587
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so use back door access to write the clock then read the output from the SDO mprj[1] value"""
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async def hk_read_byte(self,last_read= False):
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read_data =''
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for i in range(8,0,-1):
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self.drive_gpio_in((4,4),1)# SCK
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await FallingEdge(self.clk)
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self.drive_gpio_in((4,4),0)# SCK
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await RisingEdge(self.clk)
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read_data= f'{read_data}{self.dut.mprj_io_tb.value[37-1]}'
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await FallingEdge(self.clk)
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self.drive_gpio_in((4,4),0) # SCK
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# if (last_read):
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# common.drive_hdl(self.dut.bin4_en,(0,0),'z') #4 = SCK
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# common.drive_hdl(self.path,[(1,1)],'z')
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|
|
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return int(read_data,2)
|
|
|
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"""write to the house keeping registers by back door no need for commands and waiting for the data to show on mprj"""
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|
async def hk_write_backdoor(self,addr, data):
|
|
await RisingEdge(self.dut.wb_clk_i)
|
|
self.hk_hdl.wb_stb_i.value = 1
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|
self.hk_hdl.wb_cyc_i.value = 1
|
|
self.hk_hdl.wb_sel_i.value = 0xF
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|
self.hk_hdl.wb_we_i.value = 1
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|
self.hk_hdl.wb_adr_i.value = addr
|
|
self.hk_hdl.wb_dat_i.value = data
|
|
cocotb.log.info(f'Monitor: Start Writing to {hex(addr)} -> {data}')
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|
await FallingEdge(self.dut.wb_ack_o) # wait for acknowledge
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|
self.hk_hdl.wb_stb_i.value = 0
|
|
self.hk_hdl.wb_cyc_i.value = 0
|
|
cocotb.log.info(f'Monitor: End writing {hex(addr)} -> {data}')
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|
|
|
|
|
"""read from the house keeping registers by back door no need for commands and waiting for the data to show on mprj"""
|
|
async def hk_read_backdoor(self,addr):
|
|
await RisingEdge(self.clk)
|
|
self.hk_hdl.wb_stb_i.value = 1
|
|
self.hk_hdl.wb_cyc_i.value = 1
|
|
self.hk_hdl.wb_sel_i.value = 0
|
|
self.hk_hdl.wb_we_i.value = 0
|
|
self.hk_hdl.wb_adr_i.value = addr
|
|
cocotb.log.info(f' [housekeeping] Monitor: Start reading from {hex(addr)}')
|
|
await FallingEdge(self.hk_hdl.wb_ack_o)
|
|
self.hk_hdl.wb_stb_i.value = 0
|
|
self.hk_hdl.wb_cyc_i.value = 0
|
|
cocotb.log.info(f' [housekeeping] Monitor: read from {hex(addr)} value {(self.hk_hdl.wb_dat_o.value)}')
|
|
return self.hk_hdl.wb_dat_o.value
|
|
|
|
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