caravel/verilog
manarabdelaty dc5d47c812 Merge remote-tracking branch 'origin/main' into fix_tri_state_nets 2021-12-24 22:20:11 +02:00
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dv Modifications to some of the Makefiles to make the specific RISC-V 2021-12-24 13:42:36 -05:00
gl [DATA] Update mgmt_protect/gpio_control_block to remove buffers after tri-state cells 2021-12-24 21:06:58 +02:00
rtl Added a reference to the new file "gl/mgmt_defines.v" in the 2021-12-24 11:46:34 -05:00
stubs [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00