mirror of https://github.com/efabless/caravel.git
407 lines
8.8 KiB
Plaintext
407 lines
8.8 KiB
Plaintext
VERSION 5.7 ;
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NOWIREEXTENSIONATPIN ON ;
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DIVIDERCHAR "/" ;
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BUSBITCHARS "[]" ;
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MACRO digital_pll
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CLASS BLOCK ;
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FOREIGN digital_pll ;
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ORIGIN 0.000 0.000 ;
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SIZE 75.000 BY 75.000 ;
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PIN VGND
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DIRECTION INPUT ;
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USE GROUND ;
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PORT
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LAYER met5 ;
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RECT 5.520 41.050 69.460 42.650 ;
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END
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PORT
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LAYER met4 ;
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RECT 41.040 5.200 42.640 68.240 ;
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END
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END VGND
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PIN VPWR
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DIRECTION INPUT ;
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USE POWER ;
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PORT
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LAYER met5 ;
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RECT 5.520 21.050 69.460 22.650 ;
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END
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PORT
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LAYER met5 ;
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RECT 5.520 61.050 69.460 62.650 ;
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END
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PORT
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LAYER met4 ;
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RECT 21.040 5.200 22.640 68.240 ;
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END
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PORT
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LAYER met4 ;
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RECT 61.040 5.200 62.640 68.240 ;
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END
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END VPWR
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PIN clockp[0]
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DIRECTION OUTPUT TRISTATE ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 0.000 18.400 4.000 19.000 ;
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END
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END clockp[0]
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PIN clockp[1]
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DIRECTION OUTPUT TRISTATE ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 0.000 55.800 4.000 56.400 ;
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END
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END clockp[1]
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PIN dco
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 72.120 75.000 72.720 ;
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END
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END dco
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PIN div[0]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 50.360 75.000 50.960 ;
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END
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END div[0]
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PIN div[1]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 54.440 75.000 55.040 ;
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END
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END div[1]
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PIN div[2]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 59.200 75.000 59.800 ;
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END
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END div[2]
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PIN div[3]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 63.280 75.000 63.880 ;
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END
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END div[3]
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PIN div[4]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 68.040 75.000 68.640 ;
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END
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END div[4]
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PIN enable
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 45.600 75.000 46.200 ;
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END
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END enable
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PIN ext_trim[0]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 3.770 71.000 4.050 75.000 ;
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END
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END ext_trim[0]
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PIN ext_trim[10]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 2.080 75.000 2.680 ;
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END
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END ext_trim[10]
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PIN ext_trim[11]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 6.160 75.000 6.760 ;
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END
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END ext_trim[11]
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PIN ext_trim[12]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 10.240 75.000 10.840 ;
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END
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END ext_trim[12]
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PIN ext_trim[13]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 15.000 75.000 15.600 ;
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END
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END ext_trim[13]
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PIN ext_trim[14]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 19.080 75.000 19.680 ;
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END
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END ext_trim[14]
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PIN ext_trim[15]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 23.840 75.000 24.440 ;
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END
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END ext_trim[15]
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PIN ext_trim[16]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 27.920 75.000 28.520 ;
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END
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END ext_trim[16]
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PIN ext_trim[17]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 32.680 75.000 33.280 ;
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END
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END ext_trim[17]
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PIN ext_trim[18]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 36.760 75.000 37.360 ;
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END
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END ext_trim[18]
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PIN ext_trim[19]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met3 ;
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RECT 71.000 41.520 75.000 42.120 ;
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END
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END ext_trim[19]
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PIN ext_trim[1]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 11.130 71.000 11.410 75.000 ;
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END
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END ext_trim[1]
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PIN ext_trim[20]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 23.090 0.000 23.370 4.000 ;
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END
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END ext_trim[20]
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PIN ext_trim[21]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 32.750 0.000 33.030 4.000 ;
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END
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END ext_trim[21]
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PIN ext_trim[22]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 41.950 0.000 42.230 4.000 ;
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END
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END ext_trim[22]
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PIN ext_trim[23]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 51.150 0.000 51.430 4.000 ;
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END
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END ext_trim[23]
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PIN ext_trim[24]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 60.810 0.000 61.090 4.000 ;
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END
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END ext_trim[24]
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PIN ext_trim[25]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 70.010 0.000 70.290 4.000 ;
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END
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END ext_trim[25]
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PIN ext_trim[2]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 18.490 71.000 18.770 75.000 ;
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END
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END ext_trim[2]
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PIN ext_trim[3]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 25.850 71.000 26.130 75.000 ;
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END
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END ext_trim[3]
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PIN ext_trim[4]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 33.670 71.000 33.950 75.000 ;
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END
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END ext_trim[4]
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PIN ext_trim[5]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 41.030 71.000 41.310 75.000 ;
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END
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END ext_trim[5]
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PIN ext_trim[6]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 48.390 71.000 48.670 75.000 ;
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END
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END ext_trim[6]
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PIN ext_trim[7]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 56.210 71.000 56.490 75.000 ;
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END
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END ext_trim[7]
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PIN ext_trim[8]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 63.570 71.000 63.850 75.000 ;
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END
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END ext_trim[8]
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PIN ext_trim[9]
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 70.930 71.000 71.210 75.000 ;
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END
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END ext_trim[9]
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PIN osc
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 13.890 0.000 14.170 4.000 ;
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END
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END osc
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PIN resetb
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DIRECTION INPUT ;
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USE SIGNAL ;
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PORT
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LAYER met2 ;
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RECT 4.690 0.000 4.970 4.000 ;
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END
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END resetb
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OBS
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LAYER li1 ;
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RECT 5.520 2.465 70.695 68.085 ;
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LAYER met1 ;
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RECT 3.750 2.420 71.230 68.240 ;
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LAYER met2 ;
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RECT 4.330 70.720 10.850 72.605 ;
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RECT 11.690 70.720 18.210 72.605 ;
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RECT 19.050 70.720 25.570 72.605 ;
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RECT 26.410 70.720 33.390 72.605 ;
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RECT 34.230 70.720 40.750 72.605 ;
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RECT 41.590 70.720 48.110 72.605 ;
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RECT 48.950 70.720 55.930 72.605 ;
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RECT 56.770 70.720 63.290 72.605 ;
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RECT 64.130 70.720 70.650 72.605 ;
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RECT 3.780 4.280 71.200 70.720 ;
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RECT 3.780 2.195 4.410 4.280 ;
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RECT 5.250 2.195 13.610 4.280 ;
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RECT 14.450 2.195 22.810 4.280 ;
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RECT 23.650 2.195 32.470 4.280 ;
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RECT 33.310 2.195 41.670 4.280 ;
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RECT 42.510 2.195 50.870 4.280 ;
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RECT 51.710 2.195 60.530 4.280 ;
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RECT 61.370 2.195 69.730 4.280 ;
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RECT 70.570 2.195 71.200 4.280 ;
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LAYER met3 ;
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RECT 4.000 71.720 70.600 72.585 ;
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RECT 4.000 69.040 71.000 71.720 ;
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RECT 4.000 67.640 70.600 69.040 ;
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RECT 4.000 64.280 71.000 67.640 ;
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RECT 4.000 62.880 70.600 64.280 ;
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RECT 4.000 60.200 71.000 62.880 ;
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RECT 4.000 58.800 70.600 60.200 ;
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RECT 4.000 56.800 71.000 58.800 ;
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RECT 4.400 55.440 71.000 56.800 ;
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RECT 4.400 55.400 70.600 55.440 ;
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RECT 4.000 54.040 70.600 55.400 ;
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RECT 4.000 51.360 71.000 54.040 ;
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RECT 4.000 49.960 70.600 51.360 ;
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RECT 4.000 46.600 71.000 49.960 ;
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RECT 4.000 45.200 70.600 46.600 ;
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RECT 4.000 42.520 71.000 45.200 ;
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RECT 4.000 41.120 70.600 42.520 ;
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RECT 4.000 37.760 71.000 41.120 ;
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RECT 4.000 36.360 70.600 37.760 ;
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RECT 4.000 33.680 71.000 36.360 ;
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RECT 4.000 32.280 70.600 33.680 ;
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RECT 4.000 28.920 71.000 32.280 ;
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RECT 4.000 27.520 70.600 28.920 ;
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RECT 4.000 24.840 71.000 27.520 ;
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RECT 4.000 23.440 70.600 24.840 ;
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RECT 4.000 20.080 71.000 23.440 ;
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RECT 4.000 19.400 70.600 20.080 ;
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RECT 4.400 18.680 70.600 19.400 ;
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RECT 4.400 18.000 71.000 18.680 ;
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RECT 4.000 16.000 71.000 18.000 ;
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RECT 4.000 14.600 70.600 16.000 ;
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RECT 4.000 11.240 71.000 14.600 ;
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RECT 4.000 9.840 70.600 11.240 ;
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RECT 4.000 7.160 71.000 9.840 ;
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RECT 4.000 5.760 70.600 7.160 ;
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RECT 4.000 3.080 71.000 5.760 ;
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RECT 4.000 2.215 70.600 3.080 ;
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LAYER met4 ;
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RECT 46.295 15.815 46.625 29.745 ;
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END
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END digital_pll
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END LIBRARY
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