mirror of https://github.com/efabless/caravel.git
e6030f9fb3
from the data and replace them with a single flop clocked on the negative edge of the serial clock. This will completely avoid hold violations by ensuring that the block's output data bit does not change anywhere near the clock rising edge, so clocks do not have to be tightly aligned among all of the GPIO blocks. |
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| dv | ||
| gl | ||
| rtl | ||
| stubs | ||