Tim Edwards f7ec0cd012 Added buffers to the top level, inside a macro called ... gpio_signal_buffering (gpio_signal_buffering_alt in caravan). Note that this macro requires manual placement and routing, like the padframe, and the top level will need to route around its own internal routes.		2022-10-13 13:29:27 -04:00
..
dv	added netlist for vcs gl_caravel_vcs.list rtl_caravel_vcs.list	2022-10-10 06:23:47 -07:00
gl	~ regenerate chip_io netlist to fix missing power pins from constant blocks	2022-10-12 11:40:05 -07:00
rtl	Added buffers to the top level, inside a macro called	2022-10-13 13:29:27 -04:00
stubs	[DATA] Add spare_logic_block	2021-11-24 20:36:23 +02:00