mirror of https://github.com/efabless/caravel.git
42807 lines
978 KiB
JSON
42807 lines
978 KiB
JSON
[
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_octl_mux",
|
|
"sky130_fd_io__gpiov2_octl_mux"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 2],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 2 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"w_1191_2415#",
|
|
"SEL_H_N",
|
|
"SEL_H",
|
|
"B_H",
|
|
"A_H",
|
|
"a_1266_1185#",
|
|
"Y_H"
|
|
], [
|
|
"VCCIO",
|
|
"SEL_H_N",
|
|
"SEL_H",
|
|
"B_H",
|
|
"A_H",
|
|
"VSSIO",
|
|
"Y_H"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_pupredrvr_strong_nd2",
|
|
"sky130_fd_io__gpiov2_pupredrvr_strong_nd2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m1", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 2],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 10],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m1", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 2 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 10 ],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"EN_FAST[1]",
|
|
"EN_FAST[0]",
|
|
"EN_FAST[2]",
|
|
"EN_FAST[3]",
|
|
"VGND_IO",
|
|
"PUEN_H",
|
|
"a_158_632#",
|
|
"DRVHI_H",
|
|
"VCC_IO",
|
|
"PU_H_N"
|
|
], [
|
|
"EN_FAST[1]",
|
|
"EN_FAST[0]",
|
|
"EN_FAST[2]",
|
|
"EN_FAST[3]",
|
|
"VGND_IO",
|
|
"PUEN_H",
|
|
"(no matching pin)",
|
|
"DRVHI_H",
|
|
"VCC_IO",
|
|
"PU_H_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__tk_tie_r_out_esd",
|
|
"sky130_fd_io__tk_tie_r_out_esd"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
2,
|
|
2
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A",
|
|
"B"
|
|
], [
|
|
"A",
|
|
"B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__com_cclat",
|
|
"sky130_fd_io__com_cclat"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 11],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 11 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 11 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 11 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
16,
|
|
16
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"PD_DIS_H_uq1",
|
|
"OE_H_N",
|
|
"PU_DIS_H",
|
|
"VCC_IO",
|
|
"VGND",
|
|
"DRVHI_H_uq5",
|
|
"DRVLO_H_N_uq5"
|
|
], [
|
|
"PD_DIS_H",
|
|
"OE_H_N",
|
|
"PU_DIS_H",
|
|
"VCC_IO",
|
|
"VGND",
|
|
"DRVHI_H",
|
|
"DRVLO_H_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_pdpredrvr_strong",
|
|
"sky130_fd_io__gpiov2_pdpredrvr_strong"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_io__gpiov2_octl_mux", 1],
|
|
["(no matching element)", 0],
|
|
["(no matching element)", 0],
|
|
["(no matching element)", 0 ]
|
|
], [
|
|
["sky130_fd_io__gpiov2_octl_mux", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 49 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 30 ],
|
|
["sky130_fd_pr__res_generic_m1", 14 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
60
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"I2C_MODE_H_N",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "SEL_H_N", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"i2c_mode_h",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "SEL_H", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mod_slow_h",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"en_fast_h_n",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_pdpredrvr_pbias:bias_q0/n<0>",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_pdpredrvr_pbias:bias_q0/n<1>",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_pdpredrvr_pbias:bias_q0/pbias1",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"SLOW_H",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"net142",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_pdpredrvr_pbias:bias_q0/drvlo_i_h",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_pdpredrvr_pbias:bias_q0/N0",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 8 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 6 ]
|
|
]
|
|
],
|
|
[
|
|
"VCC_IO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 26 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 49 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "VCCIO", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mod_drvlo_h_n_i2c",
|
|
[
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "A_H", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
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|
|
[
|
|
"sky130_fd_io__tk_em2o:I95/sky130_fd_pr__res_generic_m2:I2",
|
|
[
|
|
[ "end_a", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__tk_em2o:I88/sky130_fd_pr__res_generic_m2:I2",
|
|
[
|
|
[ "end_a", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__tk_tie_r_out_esd:I49/sky130_fd_pr__res_generic_po:esd_r",
|
|
[
|
|
[ "end_a", 21 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__res250only_small",
|
|
"sky130_fd_io__res250only_small"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
2,
|
|
2
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"PAD",
|
|
"ROUT"
|
|
], [
|
|
"PAD",
|
|
"ROUT"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__inv_1",
|
|
"sky130_fd_io__inv_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"Y",
|
|
"A"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"Y",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__nor2_1",
|
|
"sky130_fd_io__nor2_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPWR",
|
|
"A",
|
|
"VPB",
|
|
"B",
|
|
"VGND",
|
|
"VNB"
|
|
], [
|
|
"Y",
|
|
"VPWR",
|
|
"A",
|
|
"VPB",
|
|
"B",
|
|
"VGND",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__nand2_1",
|
|
"sky130_fd_io__nand2_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 2],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 2 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VGND",
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"B",
|
|
"VNB"
|
|
], [
|
|
"Y",
|
|
"VGND",
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"B",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3",
|
|
"4"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__com_ctl_ls",
|
|
"sky130_fd_io__com_ctl_ls"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_05v0_nvt", 2],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 4],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 2],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 8],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_05v0_nvt", 2 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 4 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 2 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 8 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
18,
|
|
17
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"VPB",
|
|
[
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "4", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"VPWR",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 2 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"VPWR",
|
|
[
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 2 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "4", 2 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_octl",
|
|
"sky130_fd_io__gpiov2_octl"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_05v0_nvt", 2],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 47],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 2],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 51],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_05v0_nvt", 2 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 47 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 2 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 51 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
77,
|
|
68
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"a_4315_4619#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"a_4634_3816#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"a_n8755_2046#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"a_n9107_2384#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"a_n9227_2020#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"a_4634_3414#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"a_4282_3816#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"a_n9051_2020#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"a_n8875_2020#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"a_4514_3388#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "4", 2 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "4", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 51 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 34 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"a_4458_3414#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H[1]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"VCC_IO_uq0",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 4 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H[2]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 4 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H[0]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 4 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"VCC_IO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 19 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 14 ]
|
|
]
|
|
],
|
|
[
|
|
"VCC_IO_uq1",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 19 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 20 ]
|
|
]
|
|
],
|
|
[
|
|
"a_n8755_2384#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"a_n8931_2384#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"a_n9283_2046#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"a_4338_3622#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"sky130_fd_io__hvsbt_xor:I210/net62",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__hvsbt_nor:I381/net16",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__hvsbt_xor:I200/net29",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__hvsbt_xor:I210/net58",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__hvsbt_xor:I200/net58",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__hvsbt_nand2:I382/net25",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"n<8>",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H[1]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 4 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"PDEN_H_N[2]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 37 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 51 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 2 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "4", 2 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "4", 2 ]
|
|
]
|
|
],
|
|
[
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[
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[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_pdpredrvr_strong:pd_strong_q0/sky130_fd_io__com_pdpredrvr_pbias:bias_q0/drvlo_i_h",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_pdpredrvr_strong:pd_strong_q0/sky130_fd_io__com_pdpredrvr_pbias:bias_q0/N0",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_pupredrvr_strong:pu_strong_q0/sky130_fd_io__com_pupredrvr_nbias:nbias_q0/drvhi_i_h_n",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"PUEN_H[1]",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 4 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 5 ]
|
|
]
|
|
],
|
|
[
|
|
"PD_H[4]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_pdpredrvr_strong:pd_strong_q0/sky130_fd_io__com_pdpredrvr_pbias:bias_q0/bias_g",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_pupredrvr_strong:pu_strong_q0/sky130_fd_io__com_pupredrvr_nbias:nbias_q0/bias_g",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"DRVHI_H",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 14 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 7 ]
|
|
]
|
|
],
|
|
[
|
|
"VCC_IO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 49 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 75 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "VCCIO", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND_IO",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 67 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 47 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 3 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "VSSIO", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"PDEN_H_N[1]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 7 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 6 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 8 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 6 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_pdpredrvr_strong:pd_strong_q0/pbias_out",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 4 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 4 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 3 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"sky130_fd_io__gpiov2_pdpredrvr_strong:pd_strong_q0/sky130_fd_io__gpiov2_pdpredrvr_strong_nr3:nr2_q0/int1",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_pdpredrvr_strong:pd_strong_q0/sky130_fd_io__gpiov2_pdpredrvr_strong_nr2:nr3_q0/net42",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 4 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"sky130_fd_io__gpiov2_pupredrvr_strong:pu_strong_q0/sky130_fd_io__gpiov2_pupredrvr_strong_nd2:nd2a_q0/net24",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_pupredrvr_strong:pu_strong_q0/sky130_fd_io__gpiov2_pupredrvr_strong_nd2:nd2b_q0/net24",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 4 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"/sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/a_158_632#",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 4 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/a_158_632#",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 4 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"PD_H[1]",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"PD_H[0]",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"PU_H_N[1]",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"PU_H_N[0]",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"PDEN_H_N[0]",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"PUEN_H[0]",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0/DRVHI_H",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 5 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 12 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"DRVLO_H_N",
|
|
[
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "B_H", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 9 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 7 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
[
|
|
[
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__feascom_pupredrvr_nbiasv2_0/sky130_fd_pr__pfet_g5v0d10v5:7",
|
|
[
|
|
[ "1", 36 ],
|
|
[ "2", 5 ],
|
|
[ "4", 36 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__feascom_pupredrvr_nbiasv2_0/sky130_fd_pr__pfet_g5v0d10v5:35",
|
|
[
|
|
[ "1", 36 ],
|
|
[ "2", 7 ],
|
|
[ "4", 36 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__feascom_pupredrvr_nbiasv2_0/sky130_fd_pr__pfet_g5v0d10v5:36",
|
|
[
|
|
[ "1", 36 ],
|
|
[ "2", 7 ],
|
|
[ "4", 36 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/sky130_fd_pr__pfet_g5v0d10v5:4",
|
|
[
|
|
[ "1", 36 ],
|
|
[ "2", 7 ],
|
|
[ "4", 36 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/sky130_fd_pr__pfet_g5v0d10v5:5",
|
|
[
|
|
[ "1", 36 ],
|
|
[ "2", 7 ],
|
|
[ "4", 36 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__feascom_pupredrvr_nbiasv2_0/sky130_fd_pr__nfet_g5v0d10v5:15",
|
|
[
|
|
[ "1", 66 ],
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|
[ "2", 17 ],
|
|
[ "4", 66 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__feascom_pupredrvr_nbiasv2_0/sky130_fd_pr__nfet_g5v0d10v5:42",
|
|
[
|
|
[ "1", 9 ],
|
|
[ "2", 17 ],
|
|
[ "4", 66 ]
|
|
]
|
|
],
|
|
[
|
|
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|
|
[
|
|
[ "1", 6 ],
|
|
[ "2", 17 ],
|
|
[ "4", 66 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__gpiov2_pupredrvr_strong_nd2_0/sky130_fd_pr__nfet_g5v0d10v5:8",
|
|
[
|
|
[ "1", 6 ],
|
|
[ "2", 17 ],
|
|
[ "4", 66 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/sky130_fd_pr__nfet_g5v0d10v5:1",
|
|
[
|
|
[ "1", 6 ],
|
|
[ "2", 17 ],
|
|
[ "4", 66 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/sky130_fd_pr__nfet_g5v0d10v5:7",
|
|
[
|
|
[ "1", 6 ],
|
|
[ "2", 17 ],
|
|
[ "4", 66 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/sky130_fd_pr__nfet_g5v0d10v5:9",
|
|
[
|
|
[ "1", 6 ],
|
|
[ "2", 17 ],
|
|
[ "4", 66 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__gpiov2_pupredrvr_strong_nd2_a_0/sky130_fd_pr__nfet_g5v0d10v5:10",
|
|
[
|
|
[ "1", 6 ],
|
|
[ "2", 17 ],
|
|
[ "4", 66 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__feascom_pupredrvr_nbiasv2_0/sky130_fd_pr__res_generic_m1:0",
|
|
[
|
|
[ "end_a", 5 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0//sky130_fd_io__feascom_pupredrvr_nbiasv2_0/sky130_fd_pr__res_generic_m1:8",
|
|
[
|
|
[ "end_a", 9 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpio_pupredrvr_strongv2_0/sky130_fd_pr__res_generic_m1:3",
|
|
[
|
|
[ "end_a", 66 ]
|
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[
|
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|
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[
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[
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[
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|
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[
|
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"sky130_fd_io__nand2_1_1/A",
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[
|
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[
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|
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[
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|
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|
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|
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[
|
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|
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[
|
|
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|
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[ "sky130_fd_io__nand2_1", "VGND", 1 ]
|
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|
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|
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[
|
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"sky130_fd_io__tap_1_1/VGND",
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[
|
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|
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|
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[
|
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[
|
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|
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[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ]
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[
|
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|
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[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ],
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[ "sky130_fd_pr__pfet_01v8_hvt", "2", 1 ]
|
|
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|
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|
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[
|
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"int_pd_on_n",
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|
|
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[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
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|
|
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|
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[
|
|
"net144",
|
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[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ],
|
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[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
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|
|
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|
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[
|
|
"int_pu_on_n",
|
|
[
|
|
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|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
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|
|
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|
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[
|
|
"net137",
|
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[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ],
|
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[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
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|
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|
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[
|
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|
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[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ],
|
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[ "sky130_fd_io__inv_1", "Y", 1 ]
|
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|
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|
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[
|
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"NGA_PAD_VSWITCH_H_N",
|
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[
|
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|
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|
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[
|
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"NGB_PAD_VSWITCH_H_N",
|
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|
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|
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]
|
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|
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[
|
|
"PU_VDDIOQ_H_N",
|
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[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
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|
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|
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[
|
|
"PD_VSWITCH_H_N",
|
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[
|
|
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|
|
]
|
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|
|
[
|
|
"sky130_fd_io__xor2_1:I45/sndNA",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ]
|
|
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|
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|
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[
|
|
"sky130_fd_io__xor2_1:I45/sndPA",
|
|
[
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 2 ]
|
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|
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|
|
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|
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|
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|
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|
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[
|
|
"sky130_fd_io__xor2_1:I45/pmid",
|
|
[
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 3 ]
|
|
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|
|
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[
|
|
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|
|
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|
|
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|
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|
|
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[
|
|
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|
|
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[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 24 ],
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[ "sky130_fd_pr__pfet_01v8_hvt", "4", 5 ],
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|
[ "sky130_fd_io__inv_1", "VPWR", 15 ],
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|
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|
|
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|
|
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|
|
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[ "sky130_fd_io__inv_1", "Y", 1 ]
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|
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|
|
"out_i",
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|
|
[ "sky130_fd_io__nand2_1", "B", 1 ],
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[ "sky130_fd_pr__pfet_01v8_hvt", "2", 2 ],
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[ "sky130_fd_io__inv_1", "Y", 1 ]
|
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|
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|
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|
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|
|
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|
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|
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|
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|
|
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|
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|
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|
|
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|
|
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|
|
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|
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|
|
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|
|
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|
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|
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|
|
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|
|
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|
|
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|
|
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[
|
|
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|
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|
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|
|
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|
|
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|
|
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|
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[
|
|
[
|
|
[
|
|
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|
|
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|
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[
|
|
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|
[
|
|
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|
|
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|
|
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|
|
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|
|
[
|
|
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|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
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|
|
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|
|
[
|
|
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|
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[
|
|
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|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
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|
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|
|
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|
|
[
|
|
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|
|
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|
|
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|
|
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|
|
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|
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[
|
|
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|
|
[
|
|
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|
|
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|
|
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|
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|
|
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[
|
|
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|
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|
|
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|
|
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|
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|
|
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[
|
|
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|
|
[
|
|
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|
|
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|
|
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|
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[
|
|
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|
|
[
|
|
[ "1", 117 ],
|
|
[ "2", 5 ],
|
|
[ "4", 117 ]
|
|
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|
|
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|
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[
|
|
"sky130_fd_io__xor2_1:I45/sky130_fd_pr__pfet_01v8_hvt:MPnor0",
|
|
[
|
|
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|
|
[ "2", 6 ],
|
|
[ "4", 100 ]
|
|
]
|
|
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|
|
[
|
|
"sky130_fd_io__xor2_1:I45/sky130_fd_pr__pfet_01v8_hvt:MPnor1",
|
|
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|
|
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|
|
[ "2", 6 ],
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|
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|
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|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
6
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"VPWR",
|
|
[
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "4", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VNB",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VPWR",
|
|
[
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VPB",
|
|
[
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "4", 1 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_ipath_lvls",
|
|
"sky130_fd_io__gpiov2_ipath_lvls"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 7],
|
|
["sky130_fd_pr__pfet_01v8", 9],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 7 ],
|
|
["sky130_fd_pr__pfet_01v8", 9 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
18,
|
|
18
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"a_323_2354#",
|
|
"MODE_NORMAL_LV",
|
|
"MODE_VCCHIB_LV_N",
|
|
"MODE_NORMAL_LV_N",
|
|
"VCCHIB",
|
|
"IN_VDDIO",
|
|
"MODE_VCCHIB_LV",
|
|
"OUT",
|
|
"IN_VCCHIB",
|
|
"OUT_B",
|
|
"VSSD"
|
|
], [
|
|
"(no matching pin)",
|
|
"MODE_NORMAL_LV",
|
|
"MODE_VCCHIB_LV_N",
|
|
"MODE_NORMAL_LV_N",
|
|
"VCCHIB",
|
|
"IN_VDDIO",
|
|
"MODE_VCCHIB_LV",
|
|
"OUT",
|
|
"IN_VCCHIB",
|
|
"OUT_B",
|
|
"VSSD"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__signal_5_sym_hv_local_5term",
|
|
"sky130_fd_io__signal_5_sym_hv_local_5term"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__esd_nfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__res_generic_m1", 2 ]
|
|
], [
|
|
["sky130_fd_pr__esd_nfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__res_generic_m1", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"NBODY",
|
|
"GATE",
|
|
"VGND",
|
|
"IN",
|
|
"m1_204_67#",
|
|
"NWELLRING"
|
|
], [
|
|
"NBODY",
|
|
"GATE",
|
|
"VGND",
|
|
"IN",
|
|
"net16",
|
|
"NWELLRING"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__res75only_small",
|
|
"sky130_fd_io__res75only_small"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
2,
|
|
2
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"PAD",
|
|
"ROUT"
|
|
], [
|
|
"PAD",
|
|
"ROUT"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_octl_dat",
|
|
"sky130_fd_io__gpiov2_octl_dat"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_05v0_nvt", 6],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 130],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 6],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 142],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_io__com_cclat", 1],
|
|
["sky130_fd_io__gpiov2_octl_mux", 1],
|
|
["sky130_fd_pr__res_generic_m1", 37],
|
|
["sky130_fd_pr__res_generic_po", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_05v0_nvt", 6 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 130 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 6 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 142 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_io__com_cclat", 1 ],
|
|
["sky130_fd_io__gpiov2_octl_mux", 1 ],
|
|
["sky130_fd_pr__res_generic_m1", 37 ],
|
|
["sky130_fd_pr__res_generic_po", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
204,
|
|
203
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"DM_H[1]_uq0",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H[1]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"DM_H[1]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 4 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic",
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_io__inv_1", 15],
|
|
["sky130_fd_io__nor2_1", 4],
|
|
["sky130_fd_io__nand2_1", 4],
|
|
["(no matching element)", 0],
|
|
["(no matching element)", 0],
|
|
["(no matching element)", 0],
|
|
["(no matching element)", 0],
|
|
["(no matching element)", 0],
|
|
["(no matching element)", 0 ]
|
|
], [
|
|
["sky130_fd_io__inv_1", 15 ],
|
|
["sky130_fd_io__nor2_1", 4 ],
|
|
["sky130_fd_io__nand2_1", 4 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 71 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 105 ],
|
|
["sky130_fd_pr__nfet_05v0_nvt", 14 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 14 ],
|
|
["sky130_fd_pr__nfet_01v8", 7 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
60,
|
|
156
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/Y",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/Y",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/Y",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/Y",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/Y",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/Y",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/Y",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/B",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/B",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/B",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/B",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/B",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/B",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/B",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/A",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/A",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/A",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/A",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/A",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/A",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/A",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/A",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/VGND",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VGND", 3 ],
|
|
[ "sky130_fd_io__nand2_1", "VGND", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_1/VGND",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VGND", 7 ],
|
|
[ "sky130_fd_io__nor2_1", "VGND", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPWR",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VPWR", 15 ],
|
|
[ "sky130_fd_io__nor2_1", "VPWR", 4 ],
|
|
[ "sky130_fd_io__nand2_1", "VPWR", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPB",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VPB", 15 ],
|
|
[ "sky130_fd_io__nor2_1", "VPB", 4 ],
|
|
[ "sky130_fd_io__nand2_1", "VPB", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"VSUBS",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VNB", 15 ],
|
|
[ "sky130_fd_io__nor2_1", "VNB", 4 ],
|
|
[ "sky130_fd_io__nand2_1", "VNB", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VGND",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VGND", 5 ],
|
|
[ "sky130_fd_io__nand2_1", "VGND", 3 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"OUT",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"amux_en_vdda_h",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"pd_csd_vswitch_h_n",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"PU_CSD_VDDIOQ_H_N",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_drvr:amux_sw_drvr_q0/net248",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"amux_en_vswitch_h",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 6 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"amux_en_vdda_h_n",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 4 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"PD_CSD_VSWITCH_H",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/ana_pol_i",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 2 ],
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/out_i",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 2 ],
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_drvr:amux_sw_drvr_q0/net274",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_ls:pd_vddio_ls_q0/fbk",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"amux_en_vswitch_h_n",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/ana_en_i_n",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "A", 4 ],
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/pol_xor_out",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ],
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/sky130_fd_io__xor2_1:I45/inor",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_drvr:amux_sw_drvr_q0/net254",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/ana_en_i_n",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_ls:pd_vddio_ls_q0/fbk_n",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"ANALOG_EN",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/out_i_n",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ],
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ],
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/sky130_fd_io__xor2_1:I45/pmid",
|
|
[
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_drvr:amux_sw_drvr_q0/net275",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/ana_en_i",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_ls:pd_vddio_ls_q0/net61",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/int_pd_on_n",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ],
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/net144",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ],
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/int_pu_on_n",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ],
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/net137",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ],
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/ana_sel_i",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ],
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/sky130_fd_io__xor2_1:I45/sndNA",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
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|
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|
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|
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{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_ibuf_se",
|
|
"sky130_fd_io__gpiov2_ibuf_se"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 1],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 21],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 21],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 9],
|
|
["sky130_fd_pr__pfet_01v8", 9 ]
|
|
], [
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 1 ],
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|
["sky130_fd_io__gpiov2_vcchib_in_buf", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 21 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 21 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
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["sky130_fd_pr__nfet_01v8", 9 ],
|
|
["sky130_fd_pr__pfet_01v8", 9 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
45,
|
|
45
|
|
],
|
|
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|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VCCHIB",
|
|
"VDDIO_Q",
|
|
"VSSD",
|
|
"MODE_VCCHIB_N",
|
|
"IN_H",
|
|
"IBUFMUX_OUT",
|
|
"IN_VT",
|
|
"VTRIP_SEL_H",
|
|
"ENABLE_VDDIO_LV",
|
|
"sky130_fd_io__gpiov2_ipath_lvls_0/a_323_2354#",
|
|
"MODE_NORMAL_N",
|
|
"IBUFMUX_OUT_H",
|
|
"VTRIP_SEL_H_N"
|
|
], [
|
|
"VCCHIB",
|
|
"VDDIO_Q",
|
|
"VSSD",
|
|
"MODE_VCCHIB_N",
|
|
"IN_H",
|
|
"IBUFMUX_OUT",
|
|
"IN_VT",
|
|
"VTRIP_SEL_H",
|
|
"ENABLE_VDDIO_LV",
|
|
"(no matching pin)",
|
|
"MODE_NORMAL_N",
|
|
"IBUFMUX_OUT_H",
|
|
"VTRIP_SEL_H_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_ctl_lsbank",
|
|
"sky130_fd_io__gpiov2_ctl_lsbank"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_05v0_nvt", 12],
|
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["sky130_fd_pr__pfet_g5v0d10v5", 24],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 12],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 48],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 12],
|
|
["sky130_fd_pr__nfet_01v8", 12],
|
|
["sky130_fd_pr__res_generic_m1", 26],
|
|
["sky130_fd_pr__res_generic_m2", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_05v0_nvt", 12 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 24 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 12 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 48 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 12 ],
|
|
["sky130_fd_pr__nfet_01v8", 12 ],
|
|
["sky130_fd_pr__res_generic_m1", 25 ],
|
|
["sky130_fd_pr__res_generic_m2", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
107,
|
|
102
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"DM_H_N[1]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H[1]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H_N[2]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H[2]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VTRIP_SEL_H_N",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VTRIP_SEL_H",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls_en_1_v2_0/a_1762_n1276#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"w_15552_2653#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"m1_2266_545#",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"VCC_IO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 20 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 20 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "4", 12 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "1|3", 12 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "4", 12 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 48 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 36 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 12 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 10 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 4 ],
|
|
[ "sky130_fd_pr__res_generic_m2", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"m1_10303_543#",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"m1_10109_333#",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"m1_2267_543#",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"m2_14990_104#",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m2", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"OD_I_H",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 3 ],
|
|
[ "sky130_fd_pr__res_generic_m2", "end_a|end_b", 2 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"VTRIP_SEL_H",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VTRIP_SEL_H_N",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H[2]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H_N[2]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H[1]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"DM_H_N[1]",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"IB_MODE_SEL_H",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"IB_MODE_SEL_H_N",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__tk_opti:trip_sel_rst_q0/sky130_fd_io__tk_em1o:e2_q0/net11",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__tk_opti:trip_sel_st_q0/sky130_fd_io__tk_em1o:e2_q0/net11",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__tk_optiB:I598/sky130_fd_io__tk_em2o:e2_q0/net11",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m2", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 4 ],
|
|
[ "sky130_fd_pr__res_generic_m2", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 36 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 48 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 12 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 12 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "4", 12 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "1|3", 12 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "4", 12 ]
|
|
]
|
|
],
|
|
[
|
|
"VCC_IO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 24 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 24 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_1v2_0/a_361_1391#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_v2_0/a_361_1391#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_en_1_v2_0/a_361_1391#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_1v2_0/a_957_1391#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_v2_0/a_957_1391#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_en_1_v2_0/a_957_1391#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_lsv2_0/a_4933_638#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_lsv2_0/a_4700_968#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:I595/net122",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:dm_ls<1>_q0/net122",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:dm_ls<2>_q0/net122",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:trip_sel_ls_q0/net122",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:I595/net130",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:dm_ls<1>_q0/net130",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:dm_ls<2>_q0/net130",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:trip_sel_ls_q0/net130",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_1v2_0/a_65_861#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_1v2_0/a_130_181#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_v2_0/a_65_861#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_v2_0/a_130_181#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_en_1_v2_0/a_65_861#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_ls_en_1_v2_0/a_130_181#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:I595/fbk_n",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:I595/fbk",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:dm_ls<1>_q0/fbk_n",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:dm_ls<1>_q0/fbk",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:dm_ls<2>_q0/fbk_n",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:dm_ls<2>_q0/fbk",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:trip_sel_ls_q0/fbk_n",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls:trip_sel_ls_q0/fbk",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"/sky130_fd_io__com_ctl_lsv2_0/a_4739_1530#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"/sky130_fd_io__com_ctl_lsv2_0/a_4793_n866#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"sky130_fd_io__com_ctl_lsv2_0/VCC_IO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 4 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 2 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"OD_I_H",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 4 ],
|
|
[ "sky130_fd_pr__res_generic_m2", "end_a|end_b", 2 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"HLD_I_H_N",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 12 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"HLD_I_H_N",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 12 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"sky130_fd_io__com_ctl_ls_1v2_0/SET_H",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls_1v2_0/RST_H",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__com_ctl_ls_v2_0/SET_H",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 2 ]
|
|
]
|
|
],
|
|
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},
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|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_amux",
|
|
"sky130_fd_io__gpiov2_amux"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 12],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 6],
|
|
["sky130_fd_io__res75only_small", 14],
|
|
["sky130_fd_io__inv_1", 15],
|
|
["sky130_fd_io__nor2_1", 4],
|
|
["sky130_fd_io__nand2_1", 4],
|
|
["(no matching element)", 0],
|
|
["(no matching element)", 0],
|
|
["(no matching element)", 0],
|
|
["(no matching element)", 0 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 127 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 79 ],
|
|
["sky130_fd_io__res75only_small", 14 ],
|
|
["sky130_fd_io__inv_1", 15 ],
|
|
["sky130_fd_io__nor2_1", 4 ],
|
|
["sky130_fd_io__nand2_1", 4 ],
|
|
["sky130_fd_pr__nfet_05v0_nvt", 14 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 14 ],
|
|
["sky130_fd_pr__nfet_01v8", 7 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
109,
|
|
176
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_0/PAD_HV_P0",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_0/PAD_HV_P1",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_1/PAD_HV_P0",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_1/PAD_HV_P1",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N0",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N1",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N0",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N1",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N2",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_0/PAD_HV_N3",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N2",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_1/PAD_HV_N3",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_10/ROUT",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_13/ROUT",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_0/ROUT",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_3/ROUT",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_4/ROUT",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_5/ROUT",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_6/ROUT",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_8/ROUT",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/A",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_9/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_0/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_11/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_2/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_13/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_4/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_6/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_10/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_1/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_12/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_3/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_14/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_5/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_7/Y",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/Y",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/Y",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/Y",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/Y",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/Y",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/Y",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/Y",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/Y",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/B",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/B",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/B",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/B",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_1/A",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_3/A",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_0/A",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nor2_1_2/A",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/B",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/B",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/B",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/B",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_0/A",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_2/A",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_1/A",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__nand2_1_3/A",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__amux_switch_1v2b_1/VDDA",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_10/PAD",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "PAD", 1 ],
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_13/PAD",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "PAD", 1 ],
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_0/PAD",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "PAD", 1 ],
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_3/PAD",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 1 ],
|
|
[ "sky130_fd_io__res75only_small", "PAD", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_2/PAD",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "PAD", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_1/PAD",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "PAD", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_5/PAD",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "PAD", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_8/PAD",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "PAD", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__inv_1_8/VGND",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VGND", 3 ],
|
|
[ "sky130_fd_io__nand2_1", "VGND", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSUBS",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VNB", 15 ],
|
|
[ "sky130_fd_io__nor2_1", "VNB", 4 ],
|
|
[ "sky130_fd_io__nand2_1", "VNB", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPB",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VPB", 15 ],
|
|
[ "sky130_fd_io__nor2_1", "VPB", 4 ],
|
|
[ "sky130_fd_io__nand2_1", "VPB", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VPWR",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VPWR", 15 ],
|
|
[ "sky130_fd_io__nor2_1", "VPWR", 4 ],
|
|
[ "sky130_fd_io__nand2_1", "VPWR", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_1/VGND",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VGND", 7 ],
|
|
[ "sky130_fd_io__nor2_1", "VGND", 4 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic_0/sky130_fd_io__gpiov2_amux_decoder_0/sky130_fd_io__tap_1_2/VGND",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "VGND", 5 ],
|
|
[ "sky130_fd_io__nand2_1", "VGND", 3 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"ANALOG_EN",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/net74",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/out_i_n",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ],
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ],
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/sky130_fd_io__xor2_1:I45/pmid",
|
|
[
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_drvr:amux_sw_drvr_q0/net275",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/ana_en_i",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_ls:pd_vddio_ls_q0/net61",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"OUT",
|
|
[
|
|
[ "sky130_fd_io__inv_1", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"HLD_I_H_N",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/int_pd_on_n",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ],
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/net144",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ],
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/int_pu_on_n",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ],
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/net137",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "B", 1 ],
|
|
[ "sky130_fd_io__nand2_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/ana_sel_i",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ],
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/sky130_fd_io__xor2_1:I45/sndNA",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/sky130_fd_io__xor2_1:I45/sndPA",
|
|
[
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_drvr:amux_sw_drvr_q0/sky130_fd_io__gpiov2_amux_drvr_ls:pu_csd_ls_q0/net42",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_drvr:amux_sw_drvr_q0/sky130_fd_io__gpiov2_amux_drvr_ls:pd_csd_ls_q0/net42",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSIO_Q",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_drvr:amux_sw_drvr_q0/net248",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"pu_csd_vddioq_h_n",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/amux_en_vdda_h_n",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 4 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/ana_pol_i",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 2 ],
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/out_i",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 2 ],
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_drvr:amux_sw_drvr_q0/net274",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_lshv2hv:pd_vswitch_ls_q0/fbk",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_lshv2hv:pd_vdda_ls_q0/fbk",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_ls:pd_vddio_ls_q0/fbk",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"pd_csd_vswitch_h",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/amux_en_vswitch_h",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 6 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDA",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 13 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 11 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSA",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "PAD", 4 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 59 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 41 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "4", 6 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "1|3", 6 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "4", 6 ]
|
|
]
|
|
],
|
|
[
|
|
"VSWITCH",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 19 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 19 ]
|
|
]
|
|
],
|
|
[
|
|
"HLD_I_H",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 5 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_lshv2hv:pd_vdda_ls_q0/fbk_n",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/amux_en_vswitch_h_n",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/ana_en_i_n",
|
|
[
|
|
[ "sky130_fd_io__nor2_1", "A", 4 ],
|
|
[ "sky130_fd_io__inv_1", "Y", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/pol_xor_out",
|
|
[
|
|
[ "sky130_fd_io__nand2_1", "B", 1 ],
|
|
[ "sky130_fd_io__nand2_1", "A", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_decoder:amux_lv_decoder_q0/sky130_fd_io__xor2_1:I45/inor",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/ana_en_i_n",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_ls:pd_vddio_ls_q0/fbk_n",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"net0127",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 5 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO_Q",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 19 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 15 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSD",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 38 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 58 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "4", 8 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "1|3", 6 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "4", 8 ],
|
|
[ "sky130_fd_io__nor2_1", "VGND", 4 ],
|
|
[ "sky130_fd_io__nor2_1", "VNB", 4 ],
|
|
[ "sky130_fd_io__nand2_1", "VGND", 4 ],
|
|
[ "sky130_fd_io__nand2_1", "VNB", 4 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 6 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 7 ],
|
|
[ "sky130_fd_io__inv_1", "VGND", 15 ],
|
|
[ "sky130_fd_io__inv_1", "VNB", 15 ]
|
|
]
|
|
],
|
|
[
|
|
"VCCD",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 26 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 28 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "2", 14 ],
|
|
[ "sky130_fd_io__nor2_1", "VPWR", 4 ],
|
|
[ "sky130_fd_io__nor2_1", "VPB", 4 ],
|
|
[ "sky130_fd_io__nand2_1", "VPWR", 4 ],
|
|
[ "sky130_fd_io__nand2_1", "VPB", 4 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 5 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "4", 7 ],
|
|
[ "sky130_fd_io__inv_1", "VPWR", 15 ],
|
|
[ "sky130_fd_io__inv_1", "VPB", 15 ]
|
|
]
|
|
],
|
|
[
|
|
"PAD",
|
|
[
|
|
[ "sky130_fd_io__res75only_small", "PAD", 8 ],
|
|
[ "sky130_fd_io__res75only_small", "ROUT", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/amux_en_vddio_h",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 8 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/amux_en_vddio_h_n",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 8 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
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|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
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|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
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|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
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|
|
],
|
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[
|
|
"(no matching net)",
|
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[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_lshv2hv:pd_vswitch_ls_q0/fbk_n",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_drvr:amux_sw_drvr_q0/net254",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"sky130_fd_io__gpiov2_amux_ctl_logic:BBM_logic/sky130_fd_io__gpiov2_amux_ls:amux_ls_q0/sky130_fd_io__gpiov2_amux_ctl_lshv2hv:pd_vdda_ls_q0/net64",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 3 ]
|
|
]
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"sky130_fd_io__res75only_small_2",
|
|
[
|
|
[ "PAD", 2 ],
|
|
[ "ROUT", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_3",
|
|
[
|
|
[ "PAD", 2 ],
|
|
[ "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_4",
|
|
[
|
|
[ "PAD", 2 ],
|
|
[ "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_5",
|
|
[
|
|
[ "PAD", 2 ],
|
|
[ "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_6",
|
|
[
|
|
[ "PAD", 2 ],
|
|
[ "ROUT", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small_8",
|
|
[
|
|
[ "PAD", 2 ],
|
|
[ "ROUT", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"sky130_fd_io__res75only_small:I55",
|
|
[
|
|
[ "PAD", 10 ],
|
|
[ "ROUT", 10 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_io__res75only_small:I53",
|
|
[
|
|
[ "PAD", 10 ],
|
|
[ "ROUT", 10 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching instance)",
|
|
[
|
|
[ "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching instance)",
|
|
[
|
|
[ "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching instance)",
|
|
[
|
|
[ "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching instance)",
|
|
[
|
|
[ "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching instance)",
|
|
[
|
|
[ "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching instance)",
|
|
[
|
|
[ "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching instance)",
|
|
[
|
|
[ "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching instance)",
|
|
[
|
|
[ "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching instance)",
|
|
[
|
|
[ "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching instance)",
|
|
[
|
|
[ "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_ipath",
|
|
"sky130_fd_io__gpiov2_ipath"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 1],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 36],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 37],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 9],
|
|
["sky130_fd_pr__pfet_01v8", 9],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 2],
|
|
["sky130_fd_io__res250only_small", 1 ]
|
|
], [
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 1 ],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 36 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 37 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 9 ],
|
|
["sky130_fd_pr__pfet_01v8", 9 ],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 2 ],
|
|
["sky130_fd_io__res250only_small", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
66,
|
|
64
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"MODE_VCCHIB_N",
|
|
[
|
|
[ "sky130_fd_io__gpiov2_ipath_hvls", "MODE_VCCHIB_N", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"MODE_VCCHIB_N_uq1",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO_Q_uq0",
|
|
[
|
|
[ "sky130_fd_io__gpiov2_ipath_hvls", "VDDIO_Q", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 13 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 16 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "NWELLRING", 2 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "m1_204_67#", 2 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "IN", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO_Q",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 14 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 15 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"mode_vcchib_n",
|
|
[
|
|
[ "sky130_fd_io__gpiov2_ipath_hvls", "MODE_VCCHIB_N", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO_Q",
|
|
[
|
|
[ "sky130_fd_io__gpiov2_ipath_hvls", "VDDIO_Q", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 27 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 31 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "NWELLRING", 2 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "IN", 1 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "net16", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__gpiov2_ctl",
|
|
"sky130_fd_io__gpiov2_ctl"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_05v0_nvt", 14],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 46],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 14],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 74],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 14],
|
|
["sky130_fd_pr__nfet_01v8", 14],
|
|
["sky130_fd_pr__res_generic_m1", 28],
|
|
["sky130_fd_pr__res_generic_m2", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_05v0_nvt", 14 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 46 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 14 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 74 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 14 ],
|
|
["sky130_fd_pr__nfet_01v8", 14 ],
|
|
["sky130_fd_pr__res_generic_m1", 28 ],
|
|
["sky130_fd_pr__res_generic_m2", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
135,
|
|
132
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"sky130_fd_io__gpiov2_ctl_lsbank_0/sky130_fd_io__com_ctl_ls_en_1_v2_0/a_1762_n1276#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"a_11799_3638#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VCC_IO_uq0",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 24 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 24 ]
|
|
]
|
|
],
|
|
[
|
|
"VCC_IO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 19 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 22 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "4", 14 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "1|3", 14 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "4", 14 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 74 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 58 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 14 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 12 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 4 ],
|
|
[ "sky130_fd_pr__res_generic_m2", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"ENABLE_H",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 2 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"ENABLE_H",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 3 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 3 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 58 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 74 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 14 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 14 ],
|
|
[ "sky130_fd_pr__nfet_05v0_nvt", "4", 14 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "1|3", 14 ],
|
|
[ "sky130_fd_pr__nfet_01v8_lvt", "4", 14 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 4 ],
|
|
[ "sky130_fd_pr__res_generic_m2", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VCC_IO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 43 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 46 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__com_busses_esd",
|
|
"sky130_fd_io__com_busses_esd"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m5", 1 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m5", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
2,
|
|
2
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"sky130_fd_io__pad_esd_0/m5_1354_20520#",
|
|
"sky130_fd_io__pad_esd_0/m4_960_20253#",
|
|
"sky130_fd_io__com_bus_hookup_0/VCCHIB",
|
|
"sky130_fd_io__com_bus_hookup_0/VSSD",
|
|
"sky130_fd_io__com_bus_hookup_0/VSSA",
|
|
"sky130_fd_io__com_bus_hookup_0/VDDIO",
|
|
"sky130_fd_io__com_bus_hookup_0/VSSIO",
|
|
"sky130_fd_io__com_bus_hookup_0/AMUXBUS_A",
|
|
"sky130_fd_io__com_bus_hookup_0/VCCD",
|
|
"sky130_fd_io__com_bus_hookup_0/AMUXBUS_B",
|
|
"sky130_fd_io__com_bus_hookup_0/VSWITCH",
|
|
"sky130_fd_io__com_bus_hookup_0/VDDA",
|
|
"sky130_fd_io__com_bus_hookup_0/VDDIO_Q",
|
|
"sky130_fd_io__com_bus_hookup_0/VSSIO_Q",
|
|
"(no pin)"
|
|
], [
|
|
"sky130_fd_io__pad_esd_0/m4_960_20297#",
|
|
"sky130_fd_io__pad_esd_0/m5_1354_20528#",
|
|
"sky130_fd_io__com_bus_hookup_0/VCCHIB",
|
|
"sky130_fd_io__com_bus_hookup_0/VSSD",
|
|
"sky130_fd_io__com_bus_hookup_0/VSSA",
|
|
"sky130_fd_io__com_bus_hookup_0/VDDIO",
|
|
"sky130_fd_io__com_bus_hookup_0/VSSIO",
|
|
"sky130_fd_io__com_bus_hookup_0/AMUXBUS_A",
|
|
"sky130_fd_io__com_bus_hookup_0/VCCD",
|
|
"sky130_fd_io__com_bus_hookup_0/AMUXBUS_B",
|
|
"sky130_fd_io__com_bus_hookup_0/VSWITCH",
|
|
"sky130_fd_io__com_bus_hookup_0/VDDA",
|
|
"sky130_fd_io__com_bus_hookup_0/VDDIO_Q",
|
|
"sky130_fd_io__com_bus_hookup_0/VSSIO_Q",
|
|
"VSUBS"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__top_gpiov2",
|
|
"sky130_fd_io__top_gpiov2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_05v0_nvt", 34],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 300],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 34],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 392],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 29],
|
|
["sky130_fd_pr__nfet_01v8", 36],
|
|
["sky130_fd_io__com_cclat", 1],
|
|
["sky130_fd_io__gpiov2_octl_mux", 1],
|
|
["sky130_fd_pr__res_generic_m1", 73],
|
|
["sky130_fd_pr__res_generic_po", 14],
|
|
["sky130_fd_pr__res_generic_m2", 34],
|
|
["sky130_fd_io__res250only_small", 2],
|
|
["sky130_fd_io__res75only_small", 18],
|
|
["sky130_fd_io__inv_1", 15],
|
|
["sky130_fd_io__nor2_1", 4],
|
|
["sky130_fd_io__nand2_1", 4],
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 1],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 1],
|
|
["sky130_fd_pr__pfet_01v8", 9],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 2],
|
|
["sky130_fd_pr__res_generic_m3", 1],
|
|
["sky130_fd_pr__res_generic_m4", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_05v0_nvt", 34 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 300 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 34 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 392 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 29 ],
|
|
["sky130_fd_pr__nfet_01v8", 36 ],
|
|
["sky130_fd_io__com_cclat", 1 ],
|
|
["sky130_fd_io__gpiov2_octl_mux", 1 ],
|
|
["sky130_fd_pr__res_generic_m1", 73 ],
|
|
["sky130_fd_pr__res_generic_po", 14 ],
|
|
["sky130_fd_pr__res_generic_m2", 34 ],
|
|
["sky130_fd_io__res250only_small", 2 ],
|
|
["sky130_fd_io__res75only_small", 18 ],
|
|
["sky130_fd_io__inv_1", 15 ],
|
|
["sky130_fd_io__nor2_1", 4 ],
|
|
["sky130_fd_io__nand2_1", 4 ],
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 1 ],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 1 ],
|
|
["sky130_fd_pr__pfet_01v8", 9 ],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 2 ],
|
|
["sky130_fd_pr__res_generic_m3", 1 ],
|
|
["sky130_fd_pr__res_generic_m4", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
599,
|
|
597
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"VSSIO_uq2",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 12 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 12 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 97 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 130 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_io__com_cclat", "VCC_IO", 1 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "w_1191_2415#", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO_uq2",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 9 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 9 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSIO",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 47 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 67 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "a_1266_1185#", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"VDDIO",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 106 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 139 ],
|
|
[ "sky130_fd_io__com_cclat", "VCC_IO", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "VCCIO", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSIO",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 59 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 79 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 3 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "VSSIO", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand2_2",
|
|
"sky130_fd_sc_hd__nand2_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"A",
|
|
"VNB",
|
|
"B",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"A",
|
|
"VNB",
|
|
"B",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__inv_2",
|
|
"sky130_fd_sc_hd__inv_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"Y",
|
|
"A"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"Y",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor2_2",
|
|
"sky130_fd_sc_hd__nor2_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"B",
|
|
"VGND",
|
|
"VNB",
|
|
"A",
|
|
"VPB",
|
|
"Y"
|
|
], [
|
|
"VPWR",
|
|
"B",
|
|
"VGND",
|
|
"VNB",
|
|
"A",
|
|
"VPB",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__conb_1",
|
|
"sky130_fd_sc_hd__conb_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_po", 2 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_po", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"LO",
|
|
"HI",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"LO",
|
|
"HI",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__decap_6",
|
|
"sky130_fd_sc_hd__decap_6"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__decap_8",
|
|
"sky130_fd_sc_hd__decap_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__decap_3",
|
|
"sky130_fd_sc_hd__decap_3"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__decap_4",
|
|
"sky130_fd_sc_hd__decap_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__gpiov2_pad",
|
|
"sky130_ef_io__gpiov2_pad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_05v0_nvt", 34],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 300],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 34],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 392],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 29],
|
|
["sky130_fd_pr__nfet_01v8", 36],
|
|
["sky130_fd_io__com_cclat", 1],
|
|
["sky130_fd_io__gpiov2_octl_mux", 1],
|
|
["sky130_fd_pr__res_generic_m1", 73],
|
|
["sky130_fd_pr__res_generic_po", 14],
|
|
["sky130_fd_pr__res_generic_m2", 34],
|
|
["sky130_fd_io__res250only_small", 2],
|
|
["sky130_fd_io__res75only_small", 18],
|
|
["sky130_fd_io__inv_1", 15],
|
|
["sky130_fd_io__nor2_1", 4],
|
|
["sky130_fd_io__nand2_1", 4],
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 1],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 1],
|
|
["sky130_fd_pr__pfet_01v8", 9],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 2],
|
|
["sky130_fd_pr__res_generic_m3", 1],
|
|
["sky130_fd_pr__res_generic_m4", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_05v0_nvt", 34 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 300 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 34 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 392 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 29 ],
|
|
["sky130_fd_pr__nfet_01v8", 36 ],
|
|
["sky130_fd_io__com_cclat", 1 ],
|
|
["sky130_fd_io__gpiov2_octl_mux", 1 ],
|
|
["sky130_fd_pr__res_generic_m1", 73 ],
|
|
["sky130_fd_pr__res_generic_po", 14 ],
|
|
["sky130_fd_pr__res_generic_m2", 34 ],
|
|
["sky130_fd_io__res250only_small", 2 ],
|
|
["sky130_fd_io__res75only_small", 18 ],
|
|
["sky130_fd_io__inv_1", 15 ],
|
|
["sky130_fd_io__nor2_1", 4 ],
|
|
["sky130_fd_io__nand2_1", 4 ],
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 1 ],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 1 ],
|
|
["sky130_fd_pr__pfet_01v8", 9 ],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 2 ],
|
|
["sky130_fd_pr__res_generic_m3", 1 ],
|
|
["sky130_fd_pr__res_generic_m4", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
599,
|
|
597
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"VSSIO_uq4",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 12 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 12 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 97 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 130 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_io__com_cclat", "VCC_IO", 1 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "w_1191_2415#", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSIO",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 47 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 67 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "a_1266_1185#", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO_uq6",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 9 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 9 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"VDDIO",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 106 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 139 ],
|
|
[ "sky130_fd_io__com_cclat", "VCC_IO", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "VCCIO", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSIO",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 59 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 79 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 3 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "VSSIO", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__top_power_lvc_wpad",
|
|
"sky130_fd_io__top_power_lvc_wpad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8", 2],
|
|
["sky130_fd_pr__res_generic_po", 2],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8", 2 ],
|
|
["sky130_fd_pr__res_generic_po", 2 ],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"BDY2_B2B",
|
|
"SRC_BDY_LVC1",
|
|
"DRN_LVC1",
|
|
"DRN_LVC2",
|
|
"SRC_BDY_LVC2",
|
|
"P_PAD",
|
|
"P_CORE",
|
|
"VSSA",
|
|
"VSSIO_Q",
|
|
"VCCHIB",
|
|
"VDDA",
|
|
"OGC_LVC",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"VSSIO",
|
|
"VDDIO",
|
|
"VSSD",
|
|
"AMUXBUS_A",
|
|
"VCCD"
|
|
], [
|
|
"BDY2_B2B",
|
|
"SRC_BDY_LVC1",
|
|
"DRN_LVC1",
|
|
"DRN_LVC2",
|
|
"SRC_BDY_LVC2",
|
|
"P_PAD",
|
|
"P_CORE",
|
|
"VSSA",
|
|
"VSSIO_Q",
|
|
"VCCHIB",
|
|
"VDDA",
|
|
"OGC_LVC",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"VSSIO",
|
|
"VDDIO",
|
|
"VSSD",
|
|
"AMUXBUS_A",
|
|
"VCCD"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__buf_16",
|
|
"sky130_fd_sc_hd__buf_16"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 2],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 2 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"A"
|
|
], [
|
|
"X",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__simple_pad_and_busses",
|
|
"sky130_fd_io__simple_pad_and_busses"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m5", 1 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m5", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
2,
|
|
2
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"m3_99_14722#",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__pad_esd_0/m5_1354_20520#",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VCCD",
|
|
"w_818_9944#",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSD",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO_Q",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/AMUXBUS_B",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/AMUXBUS_A",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO_Q",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VCCHIB",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDA",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSWITCH",
|
|
"(no pin)"
|
|
], [
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__pad_esd_0/m5_1354_20528#",
|
|
"m3_99_16575#",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VCCD",
|
|
"w_818_9944#",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSD",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO_Q",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/AMUXBUS_B",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/AMUXBUS_A",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO_Q",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VCCHIB",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDA",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO",
|
|
"sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSWITCH",
|
|
"VSUBS"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__top_power_hvc_wpadv2",
|
|
"sky130_fd_io__top_power_hvc_wpadv2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3],
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__res_generic_m3", 2],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3 ],
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__res_generic_m3", 2 ],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"P_CORE",
|
|
"SRC_BDY_HVC",
|
|
"P_PAD",
|
|
"sky130_fd_io__hvc_clampv2_0/m3_103_12712#",
|
|
"sky130_fd_io__hvc_clampv2_0/m3_10082_12712#",
|
|
"DRN_HVC",
|
|
"OGC_HVC",
|
|
"VSSA",
|
|
"VSSIO_Q",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"VSSIO",
|
|
"VCCHIB",
|
|
"VDDA",
|
|
"VCCD",
|
|
"VSWITCH",
|
|
"VDDIO",
|
|
"VSSD",
|
|
"AMUXBUS_A"
|
|
], [
|
|
"P_CORE",
|
|
"SRC_BDY_HVC",
|
|
"P_PAD",
|
|
"PADISOL",
|
|
"PADISOR",
|
|
"DRN_HVC",
|
|
"OGC_HVC",
|
|
"VSSA",
|
|
"VSSIO_Q",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"VSSIO",
|
|
"VCCHIB",
|
|
"VDDA",
|
|
"VCCD",
|
|
"VSWITCH",
|
|
"VDDIO",
|
|
"VSSD",
|
|
"AMUXBUS_A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__top_ground_hvc_wpad",
|
|
"sky130_fd_io__top_ground_hvc_wpad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3],
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__res_generic_m3", 2],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3 ],
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__res_generic_m3", 2 ],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"G_PAD",
|
|
"PADISOR",
|
|
"PADISOL",
|
|
"G_CORE",
|
|
"DRN_HVC",
|
|
"SRC_BDY_HVC",
|
|
"VSSA",
|
|
"VCCHIB",
|
|
"VDDA",
|
|
"VSSIO_Q",
|
|
"OGC_HVC",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"VSSIO",
|
|
"VDDIO",
|
|
"VSSD",
|
|
"AMUXBUS_A",
|
|
"VCCD"
|
|
], [
|
|
"G_PAD",
|
|
"PADISOR",
|
|
"PADISOL",
|
|
"G_CORE",
|
|
"DRN_HVC",
|
|
"SRC_BDY_HVC",
|
|
"VSSA",
|
|
"VCCHIB",
|
|
"VDDA",
|
|
"VSSIO_Q",
|
|
"OGC_HVC",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"VSSIO",
|
|
"VDDIO",
|
|
"VSSD",
|
|
"AMUXBUS_A",
|
|
"VCCD"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__top_ground_lvc_wpad",
|
|
"sky130_fd_io__top_ground_lvc_wpad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8", 2],
|
|
["sky130_fd_pr__res_generic_po", 2],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8", 2 ],
|
|
["sky130_fd_pr__res_generic_po", 2 ],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"BDY2_B2B",
|
|
"SRC_BDY_LVC1",
|
|
"DRN_LVC1",
|
|
"DRN_LVC2",
|
|
"SRC_BDY_LVC2",
|
|
"G_PAD",
|
|
"G_CORE",
|
|
"VSSA",
|
|
"VSSIO_Q",
|
|
"VCCHIB",
|
|
"VDDA",
|
|
"OGC_LVC",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"VSSIO",
|
|
"VDDIO",
|
|
"VSSD",
|
|
"AMUXBUS_A",
|
|
"VCCD"
|
|
], [
|
|
"BDY2_B2B",
|
|
"SRC_BDY_LVC1",
|
|
"DRN_LVC1",
|
|
"DRN_LVC2",
|
|
"SRC_BDY_LVC2",
|
|
"G_PAD",
|
|
"G_CORE",
|
|
"VSSA",
|
|
"VSSIO_Q",
|
|
"VCCHIB",
|
|
"VDDA",
|
|
"OGC_LVC",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"VSSIO",
|
|
"VDDIO",
|
|
"VSSD",
|
|
"AMUXBUS_A",
|
|
"VCCD"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__xres4v2_in_buf",
|
|
"sky130_fd_io__xres4v2_in_buf"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_io__inv_1", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 21],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 13],
|
|
["sky130_fd_pr__nfet_05v0_nvt", 4],
|
|
["sky130_fd_pr__res_generic_nd__hv", 1],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_io__inv_1", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 21 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 13 ],
|
|
["sky130_fd_pr__nfet_05v0_nvt", 4 ],
|
|
["sky130_fd_pr__res_generic_nd__hv", 1 ],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
31,
|
|
31
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNORMAL_B",
|
|
"PAD",
|
|
"ENABLE_HV",
|
|
"IN_H_N",
|
|
"VDDIO",
|
|
"IN_H",
|
|
"a_n445_2580#",
|
|
"ENABLE_VDDIO_LV",
|
|
"VNORMAL",
|
|
"w_4058_2188#",
|
|
"VGND",
|
|
"VCCHIB"
|
|
], [
|
|
"VNORMAL_B",
|
|
"PAD",
|
|
"ENABLE_HV",
|
|
"IN_H_N",
|
|
"VDDIO",
|
|
"IN_H",
|
|
"(no matching pin)",
|
|
"ENABLE_VDDIO_LV",
|
|
"VNORMAL",
|
|
"(no matching pin)",
|
|
"VGND",
|
|
"VCCHIB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__ebufn_4",
|
|
"sky130_fd_sc_hd__ebufn_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Z",
|
|
"A",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"TE_B",
|
|
"VPWR"
|
|
], [
|
|
"Z",
|
|
"A",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"TE_B",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__dlclkp_1",
|
|
"sky130_fd_sc_hd__dlclkp_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 10],
|
|
["sky130_fd_pr__nfet_01v8", 10 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 10 ],
|
|
["sky130_fd_pr__nfet_01v8", 10 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
17,
|
|
17
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"CLK",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"GCLK",
|
|
"GATE"
|
|
], [
|
|
"VGND",
|
|
"CLK",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"GCLK",
|
|
"GATE"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__dlxtp_1",
|
|
"sky130_fd_sc_hd__dlxtp_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 9],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 9 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 9 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 9 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
16,
|
|
16
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"D",
|
|
"Q",
|
|
"GATE"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"D",
|
|
"Q",
|
|
"GATE"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__inv_1",
|
|
"sky130_fd_sc_hd__inv_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 1],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 1 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A",
|
|
"Y"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__mux4_1",
|
|
"sky130_fd_sc_hd__mux4_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 13],
|
|
["sky130_fd_pr__nfet_01v8", 13 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 13 ],
|
|
["sky130_fd_pr__nfet_01v8", 13 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
24,
|
|
24
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"S1",
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"A1",
|
|
"A3",
|
|
"A0",
|
|
"A2",
|
|
"S0"
|
|
], [
|
|
"S1",
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"A1",
|
|
"A3",
|
|
"A0",
|
|
"A2",
|
|
"S0"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__nor4b_2",
|
|
"sky130_fd_sc_hd__nor4b_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"D_N",
|
|
"VPWR",
|
|
"A",
|
|
"C",
|
|
"B"
|
|
], [
|
|
"VPB",
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"D_N",
|
|
"VPWR",
|
|
"A",
|
|
"C",
|
|
"B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2"
|
|
], [
|
|
"1",
|
|
"2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2"
|
|
], [
|
|
"1",
|
|
"2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"pins": [
|
|
[
|
|
"1",
|
|
"2",
|
|
"3"
|
|
], [
|
|
"1",
|
|
"2",
|
|
"3"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__decap_12",
|
|
"sky130_fd_sc_hd__decap_12"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hvl__conb_1",
|
|
"sky130_fd_sc_hvl__conb_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_po", 2 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_po", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"HI",
|
|
"VPWR",
|
|
"VGND",
|
|
"LO",
|
|
"VNB",
|
|
"VPB"
|
|
], [
|
|
"HI",
|
|
"VPWR",
|
|
"VGND",
|
|
"LO",
|
|
"VNB",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hvl__lsbufhv2lv_1",
|
|
"sky130_fd_sc_hvl__lsbufhv2lv_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 2],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 2 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
11
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"a_30_1337#",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VNB",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 4 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND_uq0",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"a_30_207#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"a_389_1337#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"a_30_1337#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 4 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VNB",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 4 ],
|
|
[ "sky130_fd_pr__nfet_01v8", "4", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"a_30_207#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"a_389_1337#",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "2", 1 ],
|
|
[ "sky130_fd_pr__pfet_01v8_hvt", "1|3", 1 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"VPWR_uq0",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VPWR",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"VGND",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"VPB",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"A",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"A",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VPB",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"VPWR",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 2 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
[
|
|
[
|
|
[
|
|
"sky130_fd_pr__nfet_g5v0d10v5:1",
|
|
[
|
|
[ "1", 3 ],
|
|
[ "2", 5 ],
|
|
[ "4", 5 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_pr__nfet_g5v0d10v5:6",
|
|
[
|
|
[ "1", 5 ],
|
|
[ "2", 2 ],
|
|
[ "4", 5 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_pr__nfet_g5v0d10v5:4",
|
|
[
|
|
[ "1", 3 ],
|
|
[ "2", 5 ],
|
|
[ "4", 5 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"sky130_fd_pr__nfet_g5v0d10v5:11",
|
|
[
|
|
[ "1", 5 ],
|
|
[ "2", 2 ],
|
|
[ "4", 5 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_pr__nfet_g5v0d10v5:3",
|
|
[
|
|
[ "1", 5 ],
|
|
[ "2", 5 ],
|
|
[ "4", 5 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_pr__nfet_g5v0d10v5:0",
|
|
[
|
|
[ "1", 5 ],
|
|
[ "2", 5 ],
|
|
[ "4", 5 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"sky130_fd_pr__pfet_g5v0d10v5:14",
|
|
[
|
|
[ "1", 3 ],
|
|
[ "2", 5 ],
|
|
[ "4", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_pr__pfet_g5v0d10v5:0",
|
|
[
|
|
[ "1", 5 ],
|
|
[ "2", 2 ],
|
|
[ "4", 2 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"sky130_fd_pr__pfet_g5v0d10v5:10",
|
|
[
|
|
[ "1", 5 ],
|
|
[ "2", 2 ],
|
|
[ "4", 2 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_pr__pfet_g5v0d10v5:1",
|
|
[
|
|
[ "1", 3 ],
|
|
[ "2", 5 ],
|
|
[ "4", 2 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__clkbuf_2",
|
|
"sky130_fd_sc_hd__clkbuf_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"X"
|
|
], [
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"X"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__clkbuf_4",
|
|
"sky130_fd_sc_hd__clkbuf_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"X",
|
|
"VPB",
|
|
"A",
|
|
"VGND",
|
|
"VNB"
|
|
], [
|
|
"VPWR",
|
|
"X",
|
|
"VPB",
|
|
"A",
|
|
"VGND",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor3b_2",
|
|
"sky130_fd_sc_hd__nor3b_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"A",
|
|
"B",
|
|
"C_N"
|
|
], [
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"A",
|
|
"B",
|
|
"C_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and3b_2",
|
|
"sky130_fd_sc_hd__and3b_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"C",
|
|
"X",
|
|
"B",
|
|
"A_N"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"C",
|
|
"X",
|
|
"B",
|
|
"A_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and3_2",
|
|
"sky130_fd_sc_hd__and3_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"VGND",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"X",
|
|
"VGND",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__clkbuf_16",
|
|
"sky130_fd_sc_hd__clkbuf_16"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"X",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"A"
|
|
], [
|
|
"VPWR",
|
|
"X",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dfxtp_1",
|
|
"sky130_fd_sc_hd__dfxtp_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 12],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 12 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 12 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 12 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
18,
|
|
18
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"VPWR",
|
|
"D",
|
|
"Q",
|
|
"CLK"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"VPWR",
|
|
"D",
|
|
"Q",
|
|
"CLK"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and4bb_2",
|
|
"sky130_fd_sc_hd__and4bb_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"X",
|
|
"D",
|
|
"C",
|
|
"B_N",
|
|
"A_N",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"VGND",
|
|
"X",
|
|
"D",
|
|
"C",
|
|
"B_N",
|
|
"A_N",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and4b_2",
|
|
"sky130_fd_sc_hd__and4b_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"X",
|
|
"D",
|
|
"A_N",
|
|
"C",
|
|
"B",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"X",
|
|
"D",
|
|
"A_N",
|
|
"C",
|
|
"B",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and4_2",
|
|
"sky130_fd_sc_hd__and4_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"X",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"D"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"X",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"D"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and2_1",
|
|
"sky130_fd_sc_hd__and2_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"X",
|
|
"A",
|
|
"B",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"VGND",
|
|
"X",
|
|
"A",
|
|
"B",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__diode_2",
|
|
"sky130_fd_sc_hd__diode_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__diode_pw2nd_05v5", 1 ]
|
|
], [
|
|
["sky130_fd_pr__diode_pw2nd_05v5", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
2,
|
|
2
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"DIODE",
|
|
"VGND",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"VNB",
|
|
"DIODE",
|
|
"VGND",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_sc_hd__decap_12",
|
|
"sky130_ef_sc_hd__decap_12"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and2b_2",
|
|
"sky130_fd_sc_hd__and2b_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"X",
|
|
"B",
|
|
"A_N",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"X",
|
|
"B",
|
|
"A_N",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and2_2",
|
|
"sky130_fd_sc_hd__and2_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"A",
|
|
"B",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"A",
|
|
"B",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__mux2_1",
|
|
"sky130_fd_sc_hd__mux2_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"A0",
|
|
"A1",
|
|
"X",
|
|
"VPWR",
|
|
"S",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"A0",
|
|
"A1",
|
|
"X",
|
|
"VPWR",
|
|
"S",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand2b_2",
|
|
"sky130_fd_sc_hd__nand2b_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"B",
|
|
"VGND",
|
|
"A_N",
|
|
"VNB",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB"
|
|
], [
|
|
"B",
|
|
"VGND",
|
|
"A_N",
|
|
"VNB",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dfrtp_4",
|
|
"sky130_fd_sc_hd__dfrtp_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 14],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 14 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
21,
|
|
21
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"RESET_B",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"D",
|
|
"Q",
|
|
"CLK"
|
|
], [
|
|
"VPWR",
|
|
"RESET_B",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"D",
|
|
"Q",
|
|
"CLK"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dfbbn_2",
|
|
"sky130_fd_sc_hd__dfbbn_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 20],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 20 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 20 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 20 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
29,
|
|
29
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"RESET_B",
|
|
"Q_N",
|
|
"Q",
|
|
"D",
|
|
"CLK_N",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"SET_B"
|
|
], [
|
|
"VPWR",
|
|
"RESET_B",
|
|
"Q_N",
|
|
"Q",
|
|
"D",
|
|
"CLK_N",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"SET_B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__mux2_4",
|
|
"sky130_fd_sc_hd__mux2_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"S",
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"A0",
|
|
"A1"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"S",
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"A0",
|
|
"A1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and2_0",
|
|
"sky130_fd_sc_hd__and2_0"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"B",
|
|
"VGND",
|
|
"A",
|
|
"X",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"B",
|
|
"VGND",
|
|
"A",
|
|
"X",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dlygate4sd3_1",
|
|
"sky130_fd_sc_hd__dlygate4sd3_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A",
|
|
"X",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"A",
|
|
"X",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__buf_2",
|
|
"sky130_fd_sc_hd__buf_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"VGND",
|
|
"VNB",
|
|
"A",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"X",
|
|
"VGND",
|
|
"VNB",
|
|
"A",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__or2_0",
|
|
"sky130_fd_sc_hd__or2_0"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 3],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 3 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"A",
|
|
"VPWR",
|
|
"B",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB"
|
|
], [
|
|
"X",
|
|
"A",
|
|
"VPWR",
|
|
"B",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__macro_sparecell",
|
|
"sky130_fd_sc_hd__macro_sparecell"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__nand2_2", 2],
|
|
["sky130_fd_sc_hd__inv_2", 2],
|
|
["sky130_fd_sc_hd__nor2_2", 2],
|
|
["sky130_fd_sc_hd__conb_1", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__nand2_2", 2 ],
|
|
["sky130_fd_sc_hd__inv_2", 2 ],
|
|
["sky130_fd_sc_hd__nor2_2", 2 ],
|
|
["sky130_fd_sc_hd__conb_1", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"LO"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"LO"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"gpio_logic_high",
|
|
"gpio_logic_high"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__decap_6", 1],
|
|
["sky130_fd_sc_hd__decap_8", 1],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__conb_1", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__decap_6", 1 ],
|
|
["sky130_fd_sc_hd__decap_8", 1 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__conb_1", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"gpio_logic1",
|
|
"vssd1",
|
|
"vccd1"
|
|
], [
|
|
"gpio_logic1",
|
|
"vssd1",
|
|
"vccd1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o21ai_4",
|
|
"sky130_fd_sc_hd__o21ai_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"VGND",
|
|
"A1",
|
|
"B1",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"VGND",
|
|
"A1",
|
|
"B1",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o21ai_2",
|
|
"sky130_fd_sc_hd__o21ai_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 3],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 3 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"VGND",
|
|
"VPWR",
|
|
"B1",
|
|
"A1"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"VGND",
|
|
"VPWR",
|
|
"B1",
|
|
"A1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dfrtp_2",
|
|
"sky130_fd_sc_hd__dfrtp_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 14],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 14 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
21,
|
|
21
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"RESET_B",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"Q",
|
|
"D",
|
|
"CLK"
|
|
], [
|
|
"RESET_B",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"Q",
|
|
"D",
|
|
"CLK"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a211o_2",
|
|
"sky130_fd_sc_hd__a211o_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"B1",
|
|
"C1",
|
|
"X",
|
|
"A2"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"B1",
|
|
"C1",
|
|
"X",
|
|
"A2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__xnor2_2",
|
|
"sky130_fd_sc_hd__xnor2_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"B",
|
|
"A",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"B",
|
|
"A",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__clkinv_1",
|
|
"sky130_fd_sc_hd__clkinv_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"Y",
|
|
"A"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"Y",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o21a_2",
|
|
"sky130_fd_sc_hd__o21a_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"A2",
|
|
"X",
|
|
"A1",
|
|
"B1",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"A2",
|
|
"X",
|
|
"A1",
|
|
"B1",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__einvp_2",
|
|
"sky130_fd_sc_hd__einvp_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"TE",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND",
|
|
"A",
|
|
"Z"
|
|
], [
|
|
"VPB",
|
|
"TE",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND",
|
|
"A",
|
|
"Z"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__einvn_8",
|
|
"sky130_fd_sc_hd__einvn_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"TE_B",
|
|
"VGND",
|
|
"Z",
|
|
"A",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"TE_B",
|
|
"VGND",
|
|
"Z",
|
|
"A",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__mux2_2",
|
|
"sky130_fd_sc_hd__mux2_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"A1",
|
|
"A0",
|
|
"X",
|
|
"VGND",
|
|
"VPWR",
|
|
"S"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"A1",
|
|
"A0",
|
|
"X",
|
|
"VGND",
|
|
"VPWR",
|
|
"S"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o2111a_2",
|
|
"sky130_fd_sc_hd__o2111a_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"C1",
|
|
"X",
|
|
"B1",
|
|
"A2",
|
|
"A1",
|
|
"D1",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"C1",
|
|
"X",
|
|
"B1",
|
|
"A2",
|
|
"A1",
|
|
"D1",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a21o_2",
|
|
"sky130_fd_sc_hd__a21o_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"A1",
|
|
"X",
|
|
"B1",
|
|
"A2",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"A1",
|
|
"X",
|
|
"B1",
|
|
"A2",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__einvn_4",
|
|
"sky130_fd_sc_hd__einvn_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 3],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 3 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"TE_B",
|
|
"Z",
|
|
"A",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"TE_B",
|
|
"Z",
|
|
"A",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o31a_2",
|
|
"sky130_fd_sc_hd__o31a_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"A3",
|
|
"X",
|
|
"B1",
|
|
"A1",
|
|
"A2",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"A3",
|
|
"X",
|
|
"B1",
|
|
"A1",
|
|
"A2",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o211a_2",
|
|
"sky130_fd_sc_hd__o211a_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"B1",
|
|
"C1",
|
|
"X",
|
|
"A2",
|
|
"A1"
|
|
], [
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"B1",
|
|
"C1",
|
|
"X",
|
|
"A2",
|
|
"A1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o22a_2",
|
|
"sky130_fd_sc_hd__o22a_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"B2",
|
|
"B1",
|
|
"A2",
|
|
"A1"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"B2",
|
|
"B1",
|
|
"A2",
|
|
"A1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand3b_2",
|
|
"sky130_fd_sc_hd__nand3b_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"C",
|
|
"B",
|
|
"VGND",
|
|
"A_N"
|
|
], [
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"C",
|
|
"B",
|
|
"VGND",
|
|
"A_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__clkbuf_1",
|
|
"sky130_fd_sc_hd__clkbuf_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"A",
|
|
"VNB",
|
|
"X",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"VGND",
|
|
"A",
|
|
"VNB",
|
|
"X",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand4b_2",
|
|
"sky130_fd_sc_hd__nand4b_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"C",
|
|
"D",
|
|
"B",
|
|
"A_N",
|
|
"VGND",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"C",
|
|
"D",
|
|
"B",
|
|
"A_N",
|
|
"VGND",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand3_2",
|
|
"sky130_fd_sc_hd__nand3_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 3],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 3 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"C",
|
|
"B",
|
|
"A",
|
|
"VGND"
|
|
], [
|
|
"Y",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"C",
|
|
"B",
|
|
"A",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a22o_2",
|
|
"sky130_fd_sc_hd__a22o_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"A2",
|
|
"B1",
|
|
"A1",
|
|
"B2",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"A2",
|
|
"B1",
|
|
"A1",
|
|
"B2",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__xor2_2",
|
|
"sky130_fd_sc_hd__xor2_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"X",
|
|
"A",
|
|
"B",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"X",
|
|
"A",
|
|
"B",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a21boi_2",
|
|
"sky130_fd_sc_hd__a21boi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"B1_N",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"VNB",
|
|
"Y",
|
|
"VGND",
|
|
"VPB"
|
|
], [
|
|
"B1_N",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"VNB",
|
|
"Y",
|
|
"VGND",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a32o_2",
|
|
"sky130_fd_sc_hd__a32o_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A2",
|
|
"B2",
|
|
"A1",
|
|
"B1",
|
|
"A3",
|
|
"X",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A2",
|
|
"B2",
|
|
"A1",
|
|
"B1",
|
|
"A3",
|
|
"X",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o2bb2a_2",
|
|
"sky130_fd_sc_hd__o2bb2a_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"A1_N",
|
|
"A2_N",
|
|
"X",
|
|
"B2",
|
|
"B1"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"A1_N",
|
|
"A2_N",
|
|
"X",
|
|
"B2",
|
|
"B1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__einvp_1",
|
|
"sky130_fd_sc_hd__einvp_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"TE",
|
|
"VNB",
|
|
"A",
|
|
"Z",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"VPB",
|
|
"TE",
|
|
"VNB",
|
|
"A",
|
|
"Z",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a21oi_2",
|
|
"sky130_fd_sc_hd__a21oi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VNB",
|
|
"VPWR",
|
|
"B1",
|
|
"VGND",
|
|
"A2",
|
|
"A1",
|
|
"VPB"
|
|
], [
|
|
"Y",
|
|
"VNB",
|
|
"VPWR",
|
|
"B1",
|
|
"VGND",
|
|
"A2",
|
|
"A1",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o221a_2",
|
|
"sky130_fd_sc_hd__o221a_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"X",
|
|
"C1",
|
|
"A2",
|
|
"B2",
|
|
"B1",
|
|
"A1",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"X",
|
|
"C1",
|
|
"A2",
|
|
"B2",
|
|
"B1",
|
|
"A1",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o21ba_2",
|
|
"sky130_fd_sc_hd__o21ba_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"A2",
|
|
"A1",
|
|
"B1_N",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"A2",
|
|
"A1",
|
|
"B1_N",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o32a_2",
|
|
"sky130_fd_sc_hd__o32a_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A3",
|
|
"B2",
|
|
"B1",
|
|
"A1",
|
|
"X",
|
|
"A2"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A3",
|
|
"B2",
|
|
"B1",
|
|
"A1",
|
|
"X",
|
|
"A2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a31o_2",
|
|
"sky130_fd_sc_hd__a31o_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"A3",
|
|
"X",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"A3",
|
|
"X",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__clkinv_2",
|
|
"sky130_fd_sc_hd__clkinv_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 1],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 1 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"Y",
|
|
"A"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"Y",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__clkinv_8",
|
|
"sky130_fd_sc_hd__clkinv_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 1],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 1 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"Y",
|
|
"A"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"Y",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__or2_2",
|
|
"sky130_fd_sc_hd__or2_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"X",
|
|
"VPWR",
|
|
"A"
|
|
], [
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"X",
|
|
"VPWR",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand4_2",
|
|
"sky130_fd_sc_hd__nand4_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"B",
|
|
"C",
|
|
"A",
|
|
"D",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"B",
|
|
"C",
|
|
"A",
|
|
"D",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__gpiov2_pad_wrapped",
|
|
"sky130_ef_io__gpiov2_pad_wrapped"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_05v0_nvt", 34],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 300],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 34],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 392],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 29],
|
|
["sky130_fd_pr__nfet_01v8", 36],
|
|
["sky130_fd_io__com_cclat", 1],
|
|
["sky130_fd_io__gpiov2_octl_mux", 1],
|
|
["sky130_fd_pr__res_generic_m1", 73],
|
|
["sky130_fd_pr__res_generic_po", 14],
|
|
["sky130_fd_pr__res_generic_m2", 34],
|
|
["sky130_fd_io__res250only_small", 2],
|
|
["sky130_fd_io__res75only_small", 18],
|
|
["sky130_fd_io__inv_1", 15],
|
|
["sky130_fd_io__nor2_1", 4],
|
|
["sky130_fd_io__nand2_1", 4],
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 1],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 1],
|
|
["sky130_fd_pr__pfet_01v8", 9],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 2],
|
|
["sky130_fd_pr__res_generic_m3", 1],
|
|
["sky130_fd_pr__res_generic_m4", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_05v0_nvt", 34 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 300 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 34 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 392 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 29 ],
|
|
["sky130_fd_pr__nfet_01v8", 36 ],
|
|
["sky130_fd_io__com_cclat", 1 ],
|
|
["sky130_fd_io__gpiov2_octl_mux", 1 ],
|
|
["sky130_fd_pr__res_generic_m1", 73 ],
|
|
["sky130_fd_pr__res_generic_po", 14 ],
|
|
["sky130_fd_pr__res_generic_m2", 34 ],
|
|
["sky130_fd_io__res250only_small", 2 ],
|
|
["sky130_fd_io__res75only_small", 18 ],
|
|
["sky130_fd_io__inv_1", 15 ],
|
|
["sky130_fd_io__nor2_1", 4 ],
|
|
["sky130_fd_io__nand2_1", 4 ],
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 1 ],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 1 ],
|
|
["sky130_fd_pr__pfet_01v8", 9 ],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 2 ],
|
|
["sky130_fd_pr__res_generic_m3", 1 ],
|
|
["sky130_fd_pr__res_generic_m4", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
599,
|
|
597
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"gpio/VDDIO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 97 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 130 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_io__com_cclat", "VCC_IO", 1 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "w_1191_2415#", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO",
|
|
[
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 9 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 9 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSIO",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 47 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 67 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "a_1266_1185#", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 3 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"gpio/VSSIO_uq4",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 12 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 12 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"VDDIO",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 106 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 139 ],
|
|
[ "sky130_fd_io__com_cclat", "VCC_IO", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "2", 2 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "VCCIO", 1 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSIO",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 59 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 79 ],
|
|
[ "sky130_fd_pr__res_generic_m1", "end_a|end_b", 3 ],
|
|
[ "sky130_fd_io__gpiov2_octl_mux", "VSSIO", 1 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "2", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__vccd_lvc_clamped_pad",
|
|
"sky130_ef_io__vccd_lvc_clamped_pad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8", 2],
|
|
["sky130_fd_pr__res_generic_po", 2],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8", 2 ],
|
|
["sky130_fd_pr__res_generic_po", 2 ],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VSSD",
|
|
"VCCD",
|
|
"VSSIO_uq4",
|
|
"VCCD_PAD",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSIO_Q",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
], [
|
|
"VSSD",
|
|
"VCCD",
|
|
"VSSIO",
|
|
"VCCD_PAD",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSIO_Q",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"constant_block",
|
|
"constant_block"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__buf_16", 2],
|
|
["sky130_fd_sc_hd__conb_1", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__buf_16", 2 ],
|
|
["sky130_fd_sc_hd__conb_1", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"vssd",
|
|
"vccd",
|
|
"one",
|
|
"zero"
|
|
], [
|
|
"vssd",
|
|
"vccd",
|
|
"one",
|
|
"zero"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__analog_pad",
|
|
"sky130_ef_io__analog_pad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m5", 1 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m5", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
2,
|
|
2
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"P_CORE",
|
|
"P_PAD",
|
|
"VSSA",
|
|
"VSSD",
|
|
"VSSIO",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
], [
|
|
"P_CORE",
|
|
"P_PAD",
|
|
"VSSA",
|
|
"VSSD",
|
|
"VSSIO",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__vddio_hvc_clamped_pad",
|
|
"sky130_ef_io__vddio_hvc_clamped_pad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3],
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__res_generic_m3", 1],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3 ],
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__res_generic_m3", 1 ],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VDDIO",
|
|
"VSSIO",
|
|
"VDDIO_Q",
|
|
"VDDIO_PAD",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VSWITCH",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
], [
|
|
"VDDIO",
|
|
"VSSIO",
|
|
"VDDIO_Q",
|
|
"VDDIO_PAD",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VSWITCH",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__vssio_hvc_clamped_pad",
|
|
"sky130_ef_io__vssio_hvc_clamped_pad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3],
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__res_generic_m3", 1],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3 ],
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__res_generic_m3", 1 ],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VSSIO",
|
|
"VDDIO",
|
|
"VSSIO_PAD",
|
|
"VSSIO_Q",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSD",
|
|
"VCCD",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
], [
|
|
"VSSIO",
|
|
"VDDIO",
|
|
"VSSIO_PAD",
|
|
"VSSIO_Q",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSD",
|
|
"VCCD",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__vdda_hvc_clamped_pad",
|
|
"sky130_ef_io__vdda_hvc_clamped_pad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3],
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__res_generic_m3", 1],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3 ],
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__res_generic_m3", 1 ],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VDDA",
|
|
"VDDA_PAD",
|
|
"VSSA",
|
|
"VCCHIB",
|
|
"VSSIO",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
], [
|
|
"VDDA",
|
|
"VDDA_PAD",
|
|
"VSSA",
|
|
"VCCHIB",
|
|
"VSSIO",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__top_power_hvc",
|
|
"sky130_ef_io__top_power_hvc"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3],
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__res_generic_m3", 1],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3 ],
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__res_generic_m3", 1 ],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"DRN_HVC",
|
|
"P_CORE",
|
|
"P_PAD",
|
|
"SRC_BDY_HVC",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSIO",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A",
|
|
"(no pin)"
|
|
], [
|
|
"DRN_HVC",
|
|
"P_CORE",
|
|
"P_PAD",
|
|
"SRC_BDY_HVC",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSIO",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A",
|
|
"VCCD_PAD"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__vssd_lvc_clamped3_pad",
|
|
"sky130_ef_io__vssd_lvc_clamped3_pad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8", 2],
|
|
["sky130_fd_pr__res_generic_po", 2],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8", 2 ],
|
|
["sky130_fd_pr__res_generic_po", 2 ],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VCCD1",
|
|
"VSSIO",
|
|
"VSSD1",
|
|
"VSSD_PAD",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
], [
|
|
"VCCD1",
|
|
"VSSIO",
|
|
"VSSD1",
|
|
"VSSD_PAD",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__vssd_lvc_clamped_pad",
|
|
"sky130_ef_io__vssd_lvc_clamped_pad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8", 2],
|
|
["sky130_fd_pr__res_generic_po", 2],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8", 2 ],
|
|
["sky130_fd_pr__res_generic_po", 2 ],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VSSIO_uq4",
|
|
"VCCD",
|
|
"VSSD",
|
|
"VSSD_PAD",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSIO_Q",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
], [
|
|
"VSSIO",
|
|
"VCCD",
|
|
"VSSD",
|
|
"VSSD_PAD",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSIO_Q",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__vccd_lvc_clamped3_pad",
|
|
"sky130_ef_io__vccd_lvc_clamped3_pad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8", 2],
|
|
["sky130_fd_pr__res_generic_po", 2],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8", 2 ],
|
|
["sky130_fd_pr__res_generic_po", 2 ],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VSSD1",
|
|
"VCCD1",
|
|
"VSSIO",
|
|
"VCCD_PAD",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
], [
|
|
"VSSD1",
|
|
"VCCD1",
|
|
"VSSIO",
|
|
"VCCD_PAD",
|
|
"VSSA",
|
|
"VDDA",
|
|
"VCCHIB",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_ef_io__vssa_hvc_clamped_pad",
|
|
"sky130_ef_io__vssa_hvc_clamped_pad"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3],
|
|
["sky130_fd_pr__res_generic_m5", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__res_generic_m3", 1],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3 ],
|
|
["sky130_fd_pr__res_generic_m5", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__res_generic_m3", 1 ],
|
|
["sky130_fd_pr__res_generic_po", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VDDA",
|
|
"VSSA",
|
|
"VSSA_PAD",
|
|
"VCCHIB",
|
|
"VSSIO",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
], [
|
|
"VDDA",
|
|
"VSSA",
|
|
"VSSA_PAD",
|
|
"VCCHIB",
|
|
"VSSIO",
|
|
"VSSD",
|
|
"VSSIO_Q",
|
|
"VCCD",
|
|
"VDDIO",
|
|
"VSWITCH",
|
|
"VDDIO_Q",
|
|
"AMUXBUS_B",
|
|
"AMUXBUS_A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_io__top_xres4v2",
|
|
"sky130_fd_io__top_xres4v2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__res_generic_m1", 63],
|
|
["sky130_fd_pr__res_generic_po", 19],
|
|
["sky130_fd_io__inv_1", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 51],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 46],
|
|
["sky130_fd_pr__nfet_05v0_nvt", 4],
|
|
["sky130_fd_pr__res_generic_nd__hv", 1],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 4],
|
|
["sky130_fd_io__res250only_small", 3],
|
|
["sky130_fd_pr__res_generic_m2", 28],
|
|
["sky130_fd_pr__res_generic_nd", 68 ]
|
|
], [
|
|
["sky130_fd_pr__res_generic_m1", 63 ],
|
|
["sky130_fd_pr__res_generic_po", 19 ],
|
|
["sky130_fd_io__inv_1", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 51 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 46 ],
|
|
["sky130_fd_pr__nfet_05v0_nvt", 4 ],
|
|
["sky130_fd_pr__res_generic_nd__hv", 1 ],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 4 ],
|
|
["sky130_fd_io__res250only_small", 3 ],
|
|
["sky130_fd_pr__res_generic_m2", 28 ],
|
|
["sky130_fd_pr__res_generic_nd", 68 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
199,
|
|
197
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"VDDIO_uq6",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 2 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "NWELLRING", 4 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "IN", 2 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "m1_204_67#", 4 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 9 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 9 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"TIE_HI_ESD",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSIO",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"TIE_LO_ESD",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSIO_uq6",
|
|
[
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 9 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 9 ],
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"TIE_LO_ESD",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"TIE_HI_ESD",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"VSSIO",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 2 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "1|3", 9 ],
|
|
[ "sky130_fd_pr__nfet_g5v0d10v5", "4", 9 ]
|
|
]
|
|
],
|
|
[
|
|
"VDDIO",
|
|
[
|
|
[ "sky130_fd_pr__res_generic_po", "end_a|end_b", 3 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "NWELLRING", 4 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "net16", 4 ],
|
|
[ "sky130_fd_io__signal_5_sym_hv_local_5term", "IN", 2 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "1|3", 9 ],
|
|
[ "sky130_fd_pr__pfet_g5v0d10v5", "4", 9 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
"badelements": [
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a211oi_2",
|
|
"sky130_fd_sc_hd__a211oi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"Y",
|
|
"VNB",
|
|
"B1",
|
|
"C1",
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"Y",
|
|
"VNB",
|
|
"B1",
|
|
"C1",
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__dfxtp_2",
|
|
"sky130_fd_sc_hd__dfxtp_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 12],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 12 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 12 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 12 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
18,
|
|
18
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"VPWR",
|
|
"D",
|
|
"Q",
|
|
"CLK"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"VPWR",
|
|
"D",
|
|
"Q",
|
|
"CLK"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or4b_4",
|
|
"sky130_fd_sc_hd__or4b_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"X",
|
|
"B",
|
|
"C",
|
|
"A",
|
|
"D_N"
|
|
], [
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"X",
|
|
"B",
|
|
"C",
|
|
"A",
|
|
"D_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a211oi_4",
|
|
"sky130_fd_sc_hd__a211oi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 8 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 8 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VGND",
|
|
"C1",
|
|
"VNB",
|
|
"B1",
|
|
"A1",
|
|
"VPWR",
|
|
"A2",
|
|
"Y"
|
|
], [
|
|
"VPB",
|
|
"VGND",
|
|
"C1",
|
|
"VNB",
|
|
"B1",
|
|
"A1",
|
|
"VPWR",
|
|
"A2",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__dfxtp_4",
|
|
"sky130_fd_sc_hd__dfxtp_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 12],
|
|
["sky130_fd_pr__nfet_01v8", 12 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 12 ],
|
|
["sky130_fd_pr__nfet_01v8", 12 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
18,
|
|
18
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"VPWR",
|
|
"Q",
|
|
"D",
|
|
"CLK"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"VPWR",
|
|
"Q",
|
|
"D",
|
|
"CLK"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or3b_1",
|
|
"sky130_fd_sc_hd__or3b_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"B",
|
|
"A",
|
|
"C_N"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"B",
|
|
"A",
|
|
"C_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a311oi_4",
|
|
"sky130_fd_sc_hd__a311oi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"A2",
|
|
"B1",
|
|
"C1",
|
|
"A3"
|
|
], [
|
|
"Y",
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"A2",
|
|
"B1",
|
|
"C1",
|
|
"A3"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or4b_1",
|
|
"sky130_fd_sc_hd__or4b_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"A",
|
|
"B",
|
|
"C",
|
|
"X",
|
|
"D_N"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"A",
|
|
"B",
|
|
"C",
|
|
"X",
|
|
"D_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a211oi_1",
|
|
"sky130_fd_sc_hd__a211oi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"Y",
|
|
"VPB",
|
|
"A2",
|
|
"C1",
|
|
"VPWR",
|
|
"A1",
|
|
"B1",
|
|
"VGND"
|
|
], [
|
|
"VNB",
|
|
"Y",
|
|
"VPB",
|
|
"A2",
|
|
"C1",
|
|
"VPWR",
|
|
"A1",
|
|
"B1",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__clkinv_16",
|
|
"sky130_fd_sc_hd__clkinv_16"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 1],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 1 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB"
|
|
], [
|
|
"Y",
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or4b_2",
|
|
"sky130_fd_sc_hd__or4b_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"D_N",
|
|
"B",
|
|
"C",
|
|
"A"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"D_N",
|
|
"B",
|
|
"C",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or4bb_1",
|
|
"sky130_fd_sc_hd__or4bb_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 7],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 7 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"B",
|
|
"A",
|
|
"X",
|
|
"D_N",
|
|
"C_N",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB"
|
|
], [
|
|
"VPWR",
|
|
"B",
|
|
"A",
|
|
"X",
|
|
"D_N",
|
|
"C_N",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a221oi_4",
|
|
"sky130_fd_sc_hd__a221oi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"C1",
|
|
"A1",
|
|
"A2",
|
|
"VPWR",
|
|
"B2",
|
|
"Y"
|
|
], [
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"C1",
|
|
"A1",
|
|
"A2",
|
|
"VPWR",
|
|
"B2",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or2_1",
|
|
"sky130_fd_sc_hd__or2_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 3],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 3 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A",
|
|
"VPWR",
|
|
"X",
|
|
"B",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB"
|
|
], [
|
|
"A",
|
|
"VPWR",
|
|
"X",
|
|
"B",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o211ai_1",
|
|
"sky130_fd_sc_hd__o211ai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
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"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"VGND",
|
|
"C1",
|
|
"B1"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"VGND",
|
|
"C1",
|
|
"B1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a311oi_1",
|
|
"sky130_fd_sc_hd__a311oi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"A2",
|
|
"A3",
|
|
"B1",
|
|
"C1",
|
|
"Y"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"A2",
|
|
"A3",
|
|
"B1",
|
|
"C1",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or4bb_4",
|
|
"sky130_fd_sc_hd__or4bb_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"B",
|
|
"A",
|
|
"D_N",
|
|
"C_N",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR"
|
|
], [
|
|
"X",
|
|
"B",
|
|
"A",
|
|
"D_N",
|
|
"C_N",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a2bb2o_4",
|
|
"sky130_fd_sc_hd__a2bb2o_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"A2_N",
|
|
"X",
|
|
"A1_N",
|
|
"B2",
|
|
"B1",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"A2_N",
|
|
"X",
|
|
"A1_N",
|
|
"B2",
|
|
"B1",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__mux4_2",
|
|
"sky130_fd_sc_hd__mux4_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 13],
|
|
["sky130_fd_pr__nfet_01v8", 13 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 13 ],
|
|
["sky130_fd_pr__nfet_01v8", 13 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
24,
|
|
24
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"A1",
|
|
"A3",
|
|
"A0",
|
|
"A2",
|
|
"S0",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND",
|
|
"S1"
|
|
], [
|
|
"X",
|
|
"A1",
|
|
"A3",
|
|
"A0",
|
|
"A2",
|
|
"S0",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND",
|
|
"S1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__nand4_4",
|
|
"sky130_fd_sc_hd__nand4_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"A",
|
|
"B",
|
|
"C",
|
|
"D"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"A",
|
|
"B",
|
|
"C",
|
|
"D"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a31o_4",
|
|
"sky130_fd_sc_hd__a31o_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 8 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 8 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"A3",
|
|
"VPB",
|
|
"B1",
|
|
"X",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"A3",
|
|
"VPB",
|
|
"B1",
|
|
"X",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__and4_4",
|
|
"sky130_fd_sc_hd__and4_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"X",
|
|
"C",
|
|
"D",
|
|
"B",
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"X",
|
|
"C",
|
|
"D",
|
|
"B",
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a22oi_4",
|
|
"sky130_fd_sc_hd__a22oi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"Y",
|
|
"VNB",
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"VGND",
|
|
"B2"
|
|
], [
|
|
"VPB",
|
|
"Y",
|
|
"VNB",
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"VGND",
|
|
"B2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o22ai_4",
|
|
"sky130_fd_sc_hd__o22ai_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"B2",
|
|
"A2",
|
|
"VGND",
|
|
"B1",
|
|
"A1",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"B2",
|
|
"A2",
|
|
"VGND",
|
|
"B1",
|
|
"A1",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a32oi_2",
|
|
"sky130_fd_sc_hd__a32oi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB",
|
|
"B1",
|
|
"A1",
|
|
"A3",
|
|
"A2",
|
|
"VGND",
|
|
"B2",
|
|
"Y"
|
|
], [
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB",
|
|
"B1",
|
|
"A1",
|
|
"A3",
|
|
"A2",
|
|
"VGND",
|
|
"B2",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o2bb2ai_4",
|
|
"sky130_fd_sc_hd__o2bb2ai_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"A1_N",
|
|
"B2",
|
|
"B1",
|
|
"A2_N"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"A1_N",
|
|
"B2",
|
|
"B1",
|
|
"A2_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or3b_2",
|
|
"sky130_fd_sc_hd__or3b_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"B",
|
|
"X",
|
|
"C_N",
|
|
"A"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"B",
|
|
"X",
|
|
"C_N",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or3b_4",
|
|
"sky130_fd_sc_hd__or3b_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"B",
|
|
"C_N",
|
|
"A"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"B",
|
|
"C_N",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or2_4",
|
|
"sky130_fd_sc_hd__or2_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"X",
|
|
"VPWR",
|
|
"A"
|
|
], [
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"X",
|
|
"VPWR",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a2bb2o_2",
|
|
"sky130_fd_sc_hd__a2bb2o_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"A1_N",
|
|
"X",
|
|
"B1",
|
|
"B2",
|
|
"A2_N",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"A1_N",
|
|
"X",
|
|
"B1",
|
|
"B2",
|
|
"A2_N",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a22o_4",
|
|
"sky130_fd_sc_hd__a22o_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"X",
|
|
"B2",
|
|
"A2",
|
|
"B1"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"X",
|
|
"B2",
|
|
"A2",
|
|
"B1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o311a_2",
|
|
"sky130_fd_sc_hd__o311a_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"A2",
|
|
"B1",
|
|
"A3",
|
|
"A1",
|
|
"C1"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"A2",
|
|
"B1",
|
|
"A3",
|
|
"A1",
|
|
"C1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o41ai_4",
|
|
"sky130_fd_sc_hd__o41ai_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"A3",
|
|
"A2",
|
|
"A4",
|
|
"VPWR",
|
|
"B1",
|
|
"VGND"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"A3",
|
|
"A2",
|
|
"A4",
|
|
"VPWR",
|
|
"B1",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a31oi_2",
|
|
"sky130_fd_sc_hd__a31oi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"Y",
|
|
"VPWR",
|
|
"VGND",
|
|
"A1",
|
|
"B1",
|
|
"A3",
|
|
"A2"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"Y",
|
|
"VPWR",
|
|
"VGND",
|
|
"A1",
|
|
"B1",
|
|
"A3",
|
|
"A2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o311ai_1",
|
|
"sky130_fd_sc_hd__o311ai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"Y",
|
|
"B1",
|
|
"C1",
|
|
"A3",
|
|
"A2",
|
|
"A1",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"Y",
|
|
"B1",
|
|
"C1",
|
|
"A3",
|
|
"A2",
|
|
"A1",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__nor4b_1",
|
|
"sky130_fd_sc_hd__nor4b_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"D_N",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"Y"
|
|
], [
|
|
"VPWR",
|
|
"D_N",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o22ai_1",
|
|
"sky130_fd_sc_hd__o22ai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"VPWR",
|
|
"B2",
|
|
"VGND",
|
|
"B1"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"VPWR",
|
|
"B2",
|
|
"VGND",
|
|
"B1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o21bai_4",
|
|
"sky130_fd_sc_hd__o21bai_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A1",
|
|
"A2",
|
|
"B1_N",
|
|
"VNB",
|
|
"VPB",
|
|
"Y",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"A1",
|
|
"A2",
|
|
"B1_N",
|
|
"VNB",
|
|
"VPB",
|
|
"Y",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a22oi_1",
|
|
"sky130_fd_sc_hd__a22oi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"B1",
|
|
"A2",
|
|
"VPWR",
|
|
"A1",
|
|
"VGND",
|
|
"B2",
|
|
"Y",
|
|
"VNB",
|
|
"VPB"
|
|
], [
|
|
"B1",
|
|
"A2",
|
|
"VPWR",
|
|
"A1",
|
|
"VGND",
|
|
"B2",
|
|
"Y",
|
|
"VNB",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o2111ai_4",
|
|
"sky130_fd_sc_hd__o2111ai_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VNB",
|
|
"Y",
|
|
"VPB",
|
|
"B1",
|
|
"C1",
|
|
"A1",
|
|
"VGND",
|
|
"A2",
|
|
"D1"
|
|
], [
|
|
"VPWR",
|
|
"VNB",
|
|
"Y",
|
|
"VPB",
|
|
"B1",
|
|
"C1",
|
|
"A1",
|
|
"VGND",
|
|
"A2",
|
|
"D1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a21bo_2",
|
|
"sky130_fd_sc_hd__a21bo_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
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12,
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12
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"pins": [
|
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[
|
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"VNB",
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"VPB",
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"X",
|
|
"A1",
|
|
"B1_N",
|
|
"A2",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"A1",
|
|
"B1_N",
|
|
"A2",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a41o_4",
|
|
"sky130_fd_sc_hd__a41o_4"
|
|
],
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"devices": [
|
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[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
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["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
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["sky130_fd_pr__pfet_01v8_hvt", 6 ]
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]
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],
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15,
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15
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[
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|
"VGND",
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"VPB",
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"VNB",
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"VPWR",
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|
"A3",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"X",
|
|
"A4"
|
|
], [
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"A3",
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|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"X",
|
|
"A4"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o311ai_4",
|
|
"sky130_fd_sc_hd__o311ai_4"
|
|
],
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"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
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|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
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],
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14,
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14
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],
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"pins": [
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[
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|
"Y",
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|
"VPB",
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"VNB",
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|
"VPWR",
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|
"VGND",
|
|
"A1",
|
|
"A3",
|
|
"A2",
|
|
"B1",
|
|
"C1"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND",
|
|
"A1",
|
|
"A3",
|
|
"A2",
|
|
"B1",
|
|
"C1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a22oi_2",
|
|
"sky130_fd_sc_hd__a22oi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
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12,
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|
12
|
|
],
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],
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|
],
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"pins": [
|
|
[
|
|
"VGND",
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|
"A2",
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|
"A1",
|
|
"VPWR",
|
|
"B1",
|
|
"B2",
|
|
"VNB",
|
|
"Y",
|
|
"VPB"
|
|
], [
|
|
"VGND",
|
|
"A2",
|
|
"A1",
|
|
"VPWR",
|
|
"B1",
|
|
"B2",
|
|
"VNB",
|
|
"Y",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o221ai_4",
|
|
"sky130_fd_sc_hd__o221ai_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
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|
"nets": [
|
|
14,
|
|
14
|
|
],
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],
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],
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"pins": [
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[
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|
"VPWR",
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|
"VPB",
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"VNB",
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|
"B2",
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|
"C1",
|
|
"B1",
|
|
"VGND",
|
|
"A2",
|
|
"A1",
|
|
"Y"
|
|
], [
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|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"B2",
|
|
"C1",
|
|
"B1",
|
|
"VGND",
|
|
"A2",
|
|
"A1",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o2bb2a_4",
|
|
"sky130_fd_sc_hd__o2bb2a_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
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14,
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|
14
|
|
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],
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|
],
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"pins": [
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[
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|
"VGND",
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|
"A2_N",
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|
"X",
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|
"A1_N",
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|
"B2",
|
|
"B1",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"A2_N",
|
|
"X",
|
|
"A1_N",
|
|
"B2",
|
|
"B1",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a32o_4",
|
|
"sky130_fd_sc_hd__a32o_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
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|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
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|
],
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15,
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|
15
|
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[
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"VPWR",
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"VPB",
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"VNB",
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"B2",
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"A1",
|
|
"B1",
|
|
"A3",
|
|
"A2",
|
|
"X",
|
|
"VGND"
|
|
], [
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|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"B2",
|
|
"A1",
|
|
"B1",
|
|
"A3",
|
|
"A2",
|
|
"X",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a311o_2",
|
|
"sky130_fd_sc_hd__a311o_2"
|
|
],
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"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
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["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
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|
],
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15,
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|
15
|
|
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[
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|
"VPWR",
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"VGND",
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"A2",
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|
"B1",
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|
"A3",
|
|
"C1",
|
|
"X",
|
|
"A1",
|
|
"VPB",
|
|
"VNB"
|
|
], [
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|
"VPWR",
|
|
"VGND",
|
|
"A2",
|
|
"B1",
|
|
"A3",
|
|
"C1",
|
|
"X",
|
|
"A1",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a311o_4",
|
|
"sky130_fd_sc_hd__a311o_4"
|
|
],
|
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|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
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|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
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15,
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|
15
|
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[
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|
"X",
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|
"A1",
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"B1",
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|
"A2",
|
|
"A3",
|
|
"C1",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"X",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"A3",
|
|
"C1",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o41a_4",
|
|
"sky130_fd_sc_hd__o41a_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
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|
|
15,
|
|
15
|
|
],
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|
],
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|
|
],
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"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A3",
|
|
"A4",
|
|
"B1",
|
|
"X",
|
|
"A1",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A3",
|
|
"A4",
|
|
"B1",
|
|
"X",
|
|
"A1",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o21bai_2",
|
|
"sky130_fd_sc_hd__o21bai_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
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|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"Y",
|
|
"VPWR",
|
|
"VGND",
|
|
"B1_N",
|
|
"A1",
|
|
"A2"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"Y",
|
|
"VPWR",
|
|
"VGND",
|
|
"B1_N",
|
|
"A1",
|
|
"A2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o41a_2",
|
|
"sky130_fd_sc_hd__o41a_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"A3",
|
|
"A2",
|
|
"A1",
|
|
"A4",
|
|
"X",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"A3",
|
|
"A2",
|
|
"A1",
|
|
"A4",
|
|
"X",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__xor2_4",
|
|
"sky130_fd_sc_hd__xor2_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"VPWR",
|
|
"A",
|
|
"VGND",
|
|
"B"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"VPWR",
|
|
"A",
|
|
"VGND",
|
|
"B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o211ai_2",
|
|
"sky130_fd_sc_hd__o211ai_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"C1",
|
|
"A1",
|
|
"B1",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"C1",
|
|
"A1",
|
|
"B1",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o22a_4",
|
|
"sky130_fd_sc_hd__o22a_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"X",
|
|
"B1",
|
|
"A1",
|
|
"B2",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"X",
|
|
"B1",
|
|
"A1",
|
|
"B2",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a2bb2oi_2",
|
|
"sky130_fd_sc_hd__a2bb2oi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"B2",
|
|
"A2_N",
|
|
"A1_N",
|
|
"B1",
|
|
"Y",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"B2",
|
|
"A2_N",
|
|
"A1_N",
|
|
"B1",
|
|
"Y",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a2bb2oi_4",
|
|
"sky130_fd_sc_hd__a2bb2oi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A1_N",
|
|
"A2_N",
|
|
"B2",
|
|
"B1",
|
|
"Y",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A1_N",
|
|
"A2_N",
|
|
"B2",
|
|
"B1",
|
|
"Y",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a41o_2",
|
|
"sky130_fd_sc_hd__a41o_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A3",
|
|
"A2",
|
|
"A4",
|
|
"B1",
|
|
"A1",
|
|
"X",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A3",
|
|
"A2",
|
|
"A4",
|
|
"B1",
|
|
"A1",
|
|
"X",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o221ai_1",
|
|
"sky130_fd_sc_hd__o221ai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"Y",
|
|
"B1",
|
|
"C1",
|
|
"VGND",
|
|
"A1",
|
|
"A2",
|
|
"B2",
|
|
"VPWR"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"Y",
|
|
"B1",
|
|
"C1",
|
|
"VGND",
|
|
"A1",
|
|
"A2",
|
|
"B2",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a221oi_2",
|
|
"sky130_fd_sc_hd__a221oi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"C1",
|
|
"B2",
|
|
"Y"
|
|
], [
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"C1",
|
|
"B2",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a41oi_2",
|
|
"sky130_fd_sc_hd__a41oi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"Y",
|
|
"A1",
|
|
"B1",
|
|
"VGND",
|
|
"A3",
|
|
"A2",
|
|
"A4",
|
|
"VNB",
|
|
"VPB"
|
|
], [
|
|
"VPWR",
|
|
"Y",
|
|
"A1",
|
|
"B1",
|
|
"VGND",
|
|
"A3",
|
|
"A2",
|
|
"A4",
|
|
"VNB",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o22ai_2",
|
|
"sky130_fd_sc_hd__o22ai_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"B2",
|
|
"VPWR",
|
|
"B1",
|
|
"A2",
|
|
"VGND",
|
|
"A1",
|
|
"Y",
|
|
"VNB",
|
|
"VPB"
|
|
], [
|
|
"B2",
|
|
"VPWR",
|
|
"B1",
|
|
"A2",
|
|
"VGND",
|
|
"A1",
|
|
"Y",
|
|
"VNB",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a2bb2oi_1",
|
|
"sky130_fd_sc_hd__a2bb2oi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"A2_N",
|
|
"B1",
|
|
"B2",
|
|
"A1_N",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"A2_N",
|
|
"B1",
|
|
"B2",
|
|
"A1_N",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__nor4b_4",
|
|
"sky130_fd_sc_hd__nor4b_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"C",
|
|
"A",
|
|
"B",
|
|
"D_N",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB"
|
|
], [
|
|
"C",
|
|
"A",
|
|
"B",
|
|
"D_N",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o32ai_1",
|
|
"sky130_fd_sc_hd__o32ai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"B2",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"A3",
|
|
"B1",
|
|
"VGND"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"B2",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"A3",
|
|
"B1",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__and4bb_4",
|
|
"sky130_fd_sc_hd__and4bb_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"X",
|
|
"C",
|
|
"D",
|
|
"B_N",
|
|
"A_N",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"X",
|
|
"C",
|
|
"D",
|
|
"B_N",
|
|
"A_N",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__nor3b_4",
|
|
"sky130_fd_sc_hd__nor3b_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"A",
|
|
"B",
|
|
"C_N",
|
|
"VPB",
|
|
"VGND",
|
|
"Y",
|
|
"VNB"
|
|
], [
|
|
"VPWR",
|
|
"A",
|
|
"B",
|
|
"C_N",
|
|
"VPB",
|
|
"VGND",
|
|
"Y",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o32ai_2",
|
|
"sky130_fd_sc_hd__o32ai_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VNB",
|
|
"VPB",
|
|
"A3",
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"B2",
|
|
"VGND"
|
|
], [
|
|
"Y",
|
|
"VNB",
|
|
"VPB",
|
|
"A3",
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"B2",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_RAM128",
|
|
"RAM128"
|
|
],
|
|
"devices": [
|
|
[
|
|
["I9_sky130_fd_sc_hd__ebufn_4", 4224],
|
|
["sky130_fd_pr__diode_pw2nd_05v5", 734],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5189],
|
|
["sky130_fd_pr__nfet_01v8", 5189],
|
|
["I9_sky130_fd_sc_hd__dlclkp_1", 512],
|
|
["I9_sky130_fd_sc_hd__dlxtp_1", 4096],
|
|
["I9_sky130_fd_sc_hd__inv_1", 1024],
|
|
["I9_sky130_fd_sc_hd__mux4_1", 32],
|
|
["sky130_fd_pr__res_generic_po", 17],
|
|
["I9_sky130_fd_sc_hd__nor4b_2", 16 ]
|
|
], [
|
|
["sky130_fd_sc_hd__ebufn_4", 4224 ],
|
|
["sky130_fd_pr__diode_pw2nd_05v5", 734 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5189 ],
|
|
["sky130_fd_pr__nfet_01v8", 5189 ],
|
|
["sky130_fd_sc_hd__dlclkp_1", 512 ],
|
|
["sky130_fd_sc_hd__dlxtp_1", 4096 ],
|
|
["sky130_fd_sc_hd__inv_1", 1024 ],
|
|
["sky130_fd_sc_hd__mux4_1", 32 ],
|
|
["sky130_fd_pr__res_generic_po", 17 ],
|
|
["sky130_fd_sc_hd__nor4b_2", 16 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11060,
|
|
11060
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Do0[1]",
|
|
"Do0[3]",
|
|
"Do0[5]",
|
|
"Do0[7]",
|
|
"Do0[0]",
|
|
"Do0[2]",
|
|
"Do0[4]",
|
|
"Do0[6]",
|
|
"Do0[9]",
|
|
"Do0[11]",
|
|
"Do0[13]",
|
|
"Do0[15]",
|
|
"Do0[8]",
|
|
"Do0[10]",
|
|
"Do0[12]",
|
|
"Do0[14]",
|
|
"Do0[18]",
|
|
"Do0[20]",
|
|
"Do0[19]",
|
|
"Do0[21]",
|
|
"Do0[22]",
|
|
"Do0[17]",
|
|
"Do0[23]",
|
|
"Do0[16]",
|
|
"Do0[24]",
|
|
"Do0[25]",
|
|
"Do0[30]",
|
|
"Do0[28]",
|
|
"Do0[27]",
|
|
"Do0[29]",
|
|
"Do0[31]",
|
|
"Do0[26]",
|
|
"A0[5]",
|
|
"A0[6]",
|
|
"EN0",
|
|
"CLK",
|
|
"WE0[0]",
|
|
"WE0[1]",
|
|
"A0[1]",
|
|
"WE0[2]",
|
|
"A0[3]",
|
|
"A0[4]",
|
|
"WE0[3]",
|
|
"A0[0]",
|
|
"A0[2]",
|
|
"Di0[18]",
|
|
"Di0[22]",
|
|
"Di0[17]",
|
|
"Di0[16]",
|
|
"Di0[23]",
|
|
"Di0[20]",
|
|
"Di0[24]",
|
|
"Di0[25]",
|
|
"Di0[30]",
|
|
"Di0[19]",
|
|
"Di0[21]",
|
|
"Di0[26]",
|
|
"Di0[29]",
|
|
"Di0[28]",
|
|
"Di0[31]",
|
|
"Di0[27]",
|
|
"Di0[9]",
|
|
"Di0[11]",
|
|
"Di0[12]",
|
|
"Di0[13]",
|
|
"Di0[15]",
|
|
"Di0[10]",
|
|
"Di0[14]",
|
|
"Di0[8]",
|
|
"Di0[1]",
|
|
"Di0[0]",
|
|
"Di0[4]",
|
|
"Di0[5]",
|
|
"Di0[6]",
|
|
"Di0[3]",
|
|
"Di0[7]",
|
|
"Di0[2]",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"Do0[1]",
|
|
"Do0[3]",
|
|
"Do0[5]",
|
|
"Do0[7]",
|
|
"Do0[0]",
|
|
"Do0[2]",
|
|
"Do0[4]",
|
|
"Do0[6]",
|
|
"Do0[9]",
|
|
"Do0[11]",
|
|
"Do0[13]",
|
|
"Do0[15]",
|
|
"Do0[8]",
|
|
"Do0[10]",
|
|
"Do0[12]",
|
|
"Do0[14]",
|
|
"Do0[18]",
|
|
"Do0[20]",
|
|
"Do0[19]",
|
|
"Do0[21]",
|
|
"Do0[22]",
|
|
"Do0[17]",
|
|
"Do0[23]",
|
|
"Do0[16]",
|
|
"Do0[24]",
|
|
"Do0[25]",
|
|
"Do0[30]",
|
|
"Do0[28]",
|
|
"Do0[27]",
|
|
"Do0[29]",
|
|
"Do0[31]",
|
|
"Do0[26]",
|
|
"A0[5]",
|
|
"A0[6]",
|
|
"EN0",
|
|
"CLK",
|
|
"WE0[0]",
|
|
"WE0[1]",
|
|
"A0[1]",
|
|
"WE0[2]",
|
|
"A0[3]",
|
|
"A0[4]",
|
|
"WE0[3]",
|
|
"A0[0]",
|
|
"A0[2]",
|
|
"Di0[18]",
|
|
"Di0[22]",
|
|
"Di0[17]",
|
|
"Di0[16]",
|
|
"Di0[23]",
|
|
"Di0[20]",
|
|
"Di0[24]",
|
|
"Di0[25]",
|
|
"Di0[30]",
|
|
"Di0[19]",
|
|
"Di0[21]",
|
|
"Di0[26]",
|
|
"Di0[29]",
|
|
"Di0[28]",
|
|
"Di0[31]",
|
|
"Di0[27]",
|
|
"Di0[9]",
|
|
"Di0[11]",
|
|
"Di0[12]",
|
|
"Di0[13]",
|
|
"Di0[15]",
|
|
"Di0[10]",
|
|
"Di0[14]",
|
|
"Di0[8]",
|
|
"Di0[1]",
|
|
"Di0[0]",
|
|
"Di0[4]",
|
|
"Di0[5]",
|
|
"Di0[6]",
|
|
"Di0[3]",
|
|
"Di0[7]",
|
|
"Di0[2]",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__xnor2_4",
|
|
"sky130_fd_sc_hd__xnor2_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"A",
|
|
"B",
|
|
"VPWR",
|
|
"VGND",
|
|
"Y"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"A",
|
|
"B",
|
|
"VPWR",
|
|
"VGND",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a2111oi_4",
|
|
"sky130_fd_sc_hd__a2111oi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"C1",
|
|
"D1",
|
|
"B1",
|
|
"VPB",
|
|
"Y",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"C1",
|
|
"D1",
|
|
"B1",
|
|
"VPB",
|
|
"Y",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o2111a_4",
|
|
"sky130_fd_sc_hd__o2111a_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 8],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 8 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 8 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 8 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
17,
|
|
17
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"X",
|
|
"D1",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"C1"
|
|
], [
|
|
"VPWR",
|
|
"X",
|
|
"D1",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"C1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o211a_4",
|
|
"sky130_fd_sc_hd__o211a_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 7],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 7 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"C1",
|
|
"A2",
|
|
"VGND",
|
|
"A1"
|
|
], [
|
|
"X",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"C1",
|
|
"A2",
|
|
"VGND",
|
|
"A1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o41ai_1",
|
|
"sky130_fd_sc_hd__o41ai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"A3",
|
|
"A4",
|
|
"VPWR",
|
|
"B1"
|
|
], [
|
|
"Y",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"A3",
|
|
"A4",
|
|
"VPWR",
|
|
"B1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o31ai_4",
|
|
"sky130_fd_sc_hd__o31ai_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"VPWR",
|
|
"B1",
|
|
"A3",
|
|
"VGND",
|
|
"Y"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"VPWR",
|
|
"B1",
|
|
"A3",
|
|
"VGND",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a32oi_4",
|
|
"sky130_fd_sc_hd__a32oi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB",
|
|
"Y",
|
|
"A1",
|
|
"B1",
|
|
"B2",
|
|
"A3",
|
|
"A2",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB",
|
|
"Y",
|
|
"A1",
|
|
"B1",
|
|
"B2",
|
|
"A3",
|
|
"A2",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__or4bb_2",
|
|
"sky130_fd_sc_hd__or4bb_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"X",
|
|
"B",
|
|
"D_N",
|
|
"C_N",
|
|
"A"
|
|
], [
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"X",
|
|
"B",
|
|
"D_N",
|
|
"C_N",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o311a_4",
|
|
"sky130_fd_sc_hd__o311a_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"C1",
|
|
"B1",
|
|
"A1",
|
|
"X",
|
|
"A2",
|
|
"A3",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"C1",
|
|
"B1",
|
|
"A1",
|
|
"X",
|
|
"A2",
|
|
"A3",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a32oi_1",
|
|
"sky130_fd_sc_hd__a32oi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"A2",
|
|
"A3",
|
|
"B1",
|
|
"VGND",
|
|
"B2",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"A2",
|
|
"A3",
|
|
"B1",
|
|
"VGND",
|
|
"B2",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a21boi_4",
|
|
"sky130_fd_sc_hd__a21boi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"A2",
|
|
"B1_N",
|
|
"Y",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"A2",
|
|
"B1_N",
|
|
"Y",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_RAM256",
|
|
"RAM256"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 10584],
|
|
["sky130_fd_pr__nfet_01v8", 10584],
|
|
["I9_sky130_fd_sc_hd__dlxtp_1", 8192],
|
|
["sky130_fd_pr__diode_pw2nd_05v5", 1342],
|
|
["I9_sky130_fd_sc_hd__ebufn_4", 8448],
|
|
["I9_sky130_fd_sc_hd__dlclkp_1", 1024],
|
|
["I9_sky130_fd_sc_hd__inv_1", 2048],
|
|
["I9_sky130_fd_sc_hd__mux4_1", 64],
|
|
["I9_sky130_fd_sc_hd__nor4b_2", 32],
|
|
["sky130_fd_pr__res_generic_po", 33 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 10584 ],
|
|
["sky130_fd_pr__nfet_01v8", 10584 ],
|
|
["sky130_fd_sc_hd__dlxtp_1", 8192 ],
|
|
["sky130_fd_pr__diode_pw2nd_05v5", 1342 ],
|
|
["sky130_fd_sc_hd__ebufn_4", 8448 ],
|
|
["sky130_fd_sc_hd__dlclkp_1", 1024 ],
|
|
["sky130_fd_sc_hd__inv_1", 2048 ],
|
|
["sky130_fd_sc_hd__mux4_1", 64 ],
|
|
["sky130_fd_sc_hd__nor4b_2", 32 ],
|
|
["sky130_fd_pr__res_generic_po", 33 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
22312,
|
|
22312
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A0[5]",
|
|
"A0[6]",
|
|
"CLK",
|
|
"WE0[1]",
|
|
"WE0[3]",
|
|
"A0[1]",
|
|
"A0[3]",
|
|
"A0[4]",
|
|
"WE0[2]",
|
|
"WE0[0]",
|
|
"Di0[11]",
|
|
"Di0[12]",
|
|
"Di0[13]",
|
|
"Di0[16]",
|
|
"Di0[17]",
|
|
"Di0[18]",
|
|
"Di0[19]",
|
|
"Di0[20]",
|
|
"Di0[21]",
|
|
"Di0[22]",
|
|
"Di0[23]",
|
|
"Di0[26]",
|
|
"Di0[24]",
|
|
"Di0[25]",
|
|
"Di0[28]",
|
|
"Di0[30]",
|
|
"Di0[27]",
|
|
"Di0[29]",
|
|
"Di0[31]",
|
|
"Di0[0]",
|
|
"Di0[1]",
|
|
"Di0[2]",
|
|
"Di0[3]",
|
|
"Di0[4]",
|
|
"Di0[5]",
|
|
"Di0[6]",
|
|
"Di0[7]",
|
|
"Di0[10]",
|
|
"Di0[14]",
|
|
"Di0[15]",
|
|
"Di0[8]",
|
|
"Di0[9]",
|
|
"A0[0]",
|
|
"A0[2]",
|
|
"EN0",
|
|
"A0[7]",
|
|
"Do0[11]",
|
|
"Do0[12]",
|
|
"Do0[13]",
|
|
"Do0[8]",
|
|
"Do0[9]",
|
|
"Do0[10]",
|
|
"Do0[14]",
|
|
"Do0[15]",
|
|
"Do0[0]",
|
|
"Do0[1]",
|
|
"Do0[2]",
|
|
"Do0[3]",
|
|
"Do0[4]",
|
|
"Do0[5]",
|
|
"Do0[6]",
|
|
"Do0[7]",
|
|
"Do0[16]",
|
|
"Do0[17]",
|
|
"Do0[18]",
|
|
"Do0[19]",
|
|
"Do0[20]",
|
|
"Do0[21]",
|
|
"Do0[22]",
|
|
"Do0[23]",
|
|
"Do0[26]",
|
|
"Do0[24]",
|
|
"Do0[25]",
|
|
"Do0[28]",
|
|
"Do0[30]",
|
|
"Do0[27]",
|
|
"Do0[29]",
|
|
"Do0[31]",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"A0[5]",
|
|
"A0[6]",
|
|
"CLK",
|
|
"WE0[1]",
|
|
"WE0[3]",
|
|
"A0[1]",
|
|
"A0[3]",
|
|
"A0[4]",
|
|
"WE0[2]",
|
|
"WE0[0]",
|
|
"Di0[11]",
|
|
"Di0[12]",
|
|
"Di0[13]",
|
|
"Di0[16]",
|
|
"Di0[17]",
|
|
"Di0[18]",
|
|
"Di0[19]",
|
|
"Di0[20]",
|
|
"Di0[21]",
|
|
"Di0[22]",
|
|
"Di0[23]",
|
|
"Di0[26]",
|
|
"Di0[24]",
|
|
"Di0[25]",
|
|
"Di0[28]",
|
|
"Di0[30]",
|
|
"Di0[27]",
|
|
"Di0[29]",
|
|
"Di0[31]",
|
|
"Di0[0]",
|
|
"Di0[1]",
|
|
"Di0[2]",
|
|
"Di0[3]",
|
|
"Di0[4]",
|
|
"Di0[5]",
|
|
"Di0[6]",
|
|
"Di0[7]",
|
|
"Di0[10]",
|
|
"Di0[14]",
|
|
"Di0[15]",
|
|
"Di0[8]",
|
|
"Di0[9]",
|
|
"A0[0]",
|
|
"A0[2]",
|
|
"EN0",
|
|
"A0[7]",
|
|
"Do0[11]",
|
|
"Do0[12]",
|
|
"Do0[13]",
|
|
"Do0[8]",
|
|
"Do0[9]",
|
|
"Do0[10]",
|
|
"Do0[14]",
|
|
"Do0[15]",
|
|
"Do0[0]",
|
|
"Do0[1]",
|
|
"Do0[2]",
|
|
"Do0[3]",
|
|
"Do0[4]",
|
|
"Do0[5]",
|
|
"Do0[6]",
|
|
"Do0[7]",
|
|
"Do0[16]",
|
|
"Do0[17]",
|
|
"Do0[18]",
|
|
"Do0[19]",
|
|
"Do0[20]",
|
|
"Do0[21]",
|
|
"Do0[22]",
|
|
"Do0[23]",
|
|
"Do0[26]",
|
|
"Do0[24]",
|
|
"Do0[25]",
|
|
"Do0[28]",
|
|
"Do0[30]",
|
|
"Do0[27]",
|
|
"Do0[29]",
|
|
"Do0[31]",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o2bb2ai_2",
|
|
"sky130_fd_sc_hd__o2bb2ai_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"A1_N",
|
|
"B2",
|
|
"A2_N",
|
|
"B1",
|
|
"VNB",
|
|
"VPB"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"A1_N",
|
|
"B2",
|
|
"A2_N",
|
|
"B1",
|
|
"VNB",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a2111oi_2",
|
|
"sky130_fd_sc_hd__a2111oi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
16,
|
|
16
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"B1",
|
|
"D1",
|
|
"A2",
|
|
"A1",
|
|
"C1"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"B1",
|
|
"D1",
|
|
"A2",
|
|
"A1",
|
|
"C1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o311ai_2",
|
|
"sky130_fd_sc_hd__o311ai_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VNB",
|
|
"VPB",
|
|
"A3",
|
|
"A1",
|
|
"B1",
|
|
"C1",
|
|
"A2",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"VNB",
|
|
"VPB",
|
|
"A3",
|
|
"A1",
|
|
"B1",
|
|
"C1",
|
|
"A2",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__o32ai_4",
|
|
"sky130_fd_sc_hd__o32ai_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A3",
|
|
"VPWR",
|
|
"B1",
|
|
"A2",
|
|
"A1",
|
|
"B2"
|
|
], [
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A3",
|
|
"VPWR",
|
|
"B1",
|
|
"A2",
|
|
"A1",
|
|
"B2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"I9_sky130_fd_sc_hd__a41oi_4",
|
|
"sky130_fd_sc_hd__a41oi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"VGND",
|
|
"B1",
|
|
"A3",
|
|
"A4",
|
|
"A2",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"VGND",
|
|
"B1",
|
|
"A3",
|
|
"A4",
|
|
"A2",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"LO_sky130_fd_sc_hvl__buf_8",
|
|
"sky130_fd_sc_hvl__buf_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 2],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 2 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"X",
|
|
"VGND",
|
|
"VNB"
|
|
], [
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"X",
|
|
"VGND",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"LO_sky130_fd_sc_hvl__inv_8",
|
|
"sky130_fd_sc_hvl__inv_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"A",
|
|
"Y"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"A",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"LO_sky130_fd_sc_hvl__schmittbuf_1",
|
|
"sky130_fd_sc_hvl__schmittbuf_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 4],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 4],
|
|
["sky130_fd_pr__res_generic_nd__hv", 1],
|
|
["sky130_fd_pr__res_generic_pd__hv", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 4 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 4 ],
|
|
["sky130_fd_pr__res_generic_nd__hv", 1 ],
|
|
["sky130_fd_pr__res_generic_pd__hv", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"VPWR",
|
|
"X"
|
|
], [
|
|
"A",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"VPWR",
|
|
"X"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dfrtp_1",
|
|
"sky130_fd_sc_hd__dfrtp_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 14],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 14 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
21,
|
|
21
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"RESET_B",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"D",
|
|
"Q",
|
|
"CLK"
|
|
], [
|
|
"VPWR",
|
|
"RESET_B",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"D",
|
|
"Q",
|
|
"CLK"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor2_1",
|
|
"sky130_fd_sc_hd__nor2_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"A",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"A",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand2_1",
|
|
"sky130_fd_sc_hd__nand2_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"B",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"B",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o21ai_1",
|
|
"sky130_fd_sc_hd__o21ai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A2",
|
|
"B1",
|
|
"VPWR",
|
|
"A1",
|
|
"VGND",
|
|
"Y",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"A2",
|
|
"B1",
|
|
"VPWR",
|
|
"A1",
|
|
"VGND",
|
|
"Y",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dfstp_2",
|
|
"sky130_fd_sc_hd__dfstp_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 16],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 16 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 16 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 16 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
24,
|
|
24
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"SET_B",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"Q",
|
|
"D",
|
|
"CLK",
|
|
"VGND"
|
|
], [
|
|
"SET_B",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"Q",
|
|
"D",
|
|
"CLK",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand2b_1",
|
|
"sky130_fd_sc_hd__nand2b_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 3],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 3 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A_N",
|
|
"VGND",
|
|
"B"
|
|
], [
|
|
"Y",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A_N",
|
|
"VGND",
|
|
"B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand4bb_1",
|
|
"sky130_fd_sc_hd__nand4bb_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"A_N",
|
|
"B_N",
|
|
"C",
|
|
"D",
|
|
"VGND"
|
|
], [
|
|
"Y",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"A_N",
|
|
"B_N",
|
|
"C",
|
|
"D",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dfstp_1",
|
|
"sky130_fd_sc_hd__dfstp_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 16],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 16 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 16 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 16 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
24,
|
|
24
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"SET_B",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"D",
|
|
"Q",
|
|
"CLK",
|
|
"VGND"
|
|
], [
|
|
"SET_B",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"D",
|
|
"Q",
|
|
"CLK",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o21a_1",
|
|
"sky130_fd_sc_hd__o21a_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"B1",
|
|
"X",
|
|
"A2",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"A1",
|
|
"B1",
|
|
"X",
|
|
"A2",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o2bb2ai_1",
|
|
"sky130_fd_sc_hd__o2bb2ai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A2_N",
|
|
"B2",
|
|
"B1",
|
|
"A1_N",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A2_N",
|
|
"B2",
|
|
"B1",
|
|
"A1_N",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor3_1",
|
|
"sky130_fd_sc_hd__nor3_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A",
|
|
"B",
|
|
"C",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A",
|
|
"B",
|
|
"C",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__buf_12",
|
|
"sky130_fd_sc_hd__buf_12"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 2],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 2 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"A"
|
|
], [
|
|
"X",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a21oi_1",
|
|
"sky130_fd_sc_hd__a21oi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 3],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 3 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"Y",
|
|
"A2",
|
|
"VGND",
|
|
"A1",
|
|
"VPWR",
|
|
"B1"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"Y",
|
|
"A2",
|
|
"VGND",
|
|
"A1",
|
|
"VPWR",
|
|
"B1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__xnor2_1",
|
|
"sky130_fd_sc_hd__xnor2_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"A",
|
|
"B"
|
|
], [
|
|
"Y",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"A",
|
|
"B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o2111ai_2",
|
|
"sky130_fd_sc_hd__o2111ai_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"D1",
|
|
"VGND",
|
|
"C1",
|
|
"Y",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"D1",
|
|
"VGND",
|
|
"C1",
|
|
"Y",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o31ai_2",
|
|
"sky130_fd_sc_hd__o31ai_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"Y",
|
|
"VGND",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"B1",
|
|
"A3"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"Y",
|
|
"VGND",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"B1",
|
|
"A3"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a41oi_1",
|
|
"sky130_fd_sc_hd__a41oi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB",
|
|
"A3",
|
|
"A2",
|
|
"A4",
|
|
"A1",
|
|
"VGND",
|
|
"B1"
|
|
], [
|
|
"Y",
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB",
|
|
"A3",
|
|
"A2",
|
|
"A4",
|
|
"A1",
|
|
"VGND",
|
|
"B1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__clkinv_4",
|
|
"sky130_fd_sc_hd__clkinv_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"A",
|
|
"Y"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"A",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dfrtn_1",
|
|
"sky130_fd_sc_hd__dfrtn_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 14],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 14 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 14 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
21,
|
|
21
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"RESET_B",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"D",
|
|
"Q",
|
|
"CLK_N"
|
|
], [
|
|
"VPWR",
|
|
"RESET_B",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"D",
|
|
"Q",
|
|
"CLK_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__inv_4",
|
|
"sky130_fd_sc_hd__inv_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"A",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"Y",
|
|
"A",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o2111ai_1",
|
|
"sky130_fd_sc_hd__o2111ai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"Y",
|
|
"VPB",
|
|
"B1",
|
|
"A2",
|
|
"VGND",
|
|
"A1",
|
|
"D1",
|
|
"C1",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"Y",
|
|
"VPB",
|
|
"B1",
|
|
"A2",
|
|
"VGND",
|
|
"A1",
|
|
"D1",
|
|
"C1",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand3_1",
|
|
"sky130_fd_sc_hd__nand3_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"A",
|
|
"B",
|
|
"C",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"A",
|
|
"B",
|
|
"C",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o31a_1",
|
|
"sky130_fd_sc_hd__o31a_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"A2",
|
|
"A1",
|
|
"X",
|
|
"B1",
|
|
"A3",
|
|
"VNB",
|
|
"VPB"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"A2",
|
|
"A1",
|
|
"X",
|
|
"B1",
|
|
"A3",
|
|
"VNB",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor3_2",
|
|
"sky130_fd_sc_hd__nor3_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"B",
|
|
"C",
|
|
"A",
|
|
"Y"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"B",
|
|
"C",
|
|
"A",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dlymetal6s2s_1",
|
|
"sky130_fd_sc_hd__dlymetal6s2s_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"X"
|
|
], [
|
|
"A",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"X"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o21bai_1",
|
|
"sky130_fd_sc_hd__o21bai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"B1_N"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"B1_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__buf_4",
|
|
"sky130_fd_sc_hd__buf_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A"
|
|
], [
|
|
"X",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand3b_1",
|
|
"sky130_fd_sc_hd__nand3b_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A_N",
|
|
"VGND",
|
|
"B",
|
|
"C",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"Y"
|
|
], [
|
|
"A_N",
|
|
"VGND",
|
|
"B",
|
|
"C",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a31o_1",
|
|
"sky130_fd_sc_hd__a31o_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"B1",
|
|
"X",
|
|
"A2",
|
|
"A1",
|
|
"A3",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"B1",
|
|
"X",
|
|
"A2",
|
|
"A1",
|
|
"A3",
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o22a_1",
|
|
"sky130_fd_sc_hd__o22a_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"X",
|
|
"B2",
|
|
"A1",
|
|
"A2"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"X",
|
|
"B2",
|
|
"A1",
|
|
"A2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o31ai_1",
|
|
"sky130_fd_sc_hd__o31ai_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"A3",
|
|
"B1",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"Y",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"A3",
|
|
"B1",
|
|
"VPWR",
|
|
"A1",
|
|
"A2",
|
|
"Y",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o211ai_4",
|
|
"sky130_fd_sc_hd__o211ai_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 8 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 8 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"Y",
|
|
"B1",
|
|
"C1",
|
|
"VPB",
|
|
"A1",
|
|
"VGND",
|
|
"A2",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"Y",
|
|
"B1",
|
|
"C1",
|
|
"VPB",
|
|
"A1",
|
|
"VGND",
|
|
"A2",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a21o_1",
|
|
"sky130_fd_sc_hd__a21o_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"VPWR",
|
|
"A2",
|
|
"X",
|
|
"B1",
|
|
"A1"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"VPWR",
|
|
"A2",
|
|
"X",
|
|
"B1",
|
|
"A1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor4_1",
|
|
"sky130_fd_sc_hd__nor4_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"D",
|
|
"Y"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"D",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a2bb2o_1",
|
|
"sky130_fd_sc_hd__a2bb2o_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"A1_N",
|
|
"A2_N",
|
|
"X",
|
|
"B2",
|
|
"B1",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"A1_N",
|
|
"A2_N",
|
|
"X",
|
|
"B2",
|
|
"B1",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dfbbp_1",
|
|
"sky130_fd_sc_hd__dfbbp_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 20],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 20 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 20 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 20 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
29,
|
|
29
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"SET_B",
|
|
"VGND",
|
|
"D",
|
|
"RESET_B",
|
|
"Q",
|
|
"Q_N",
|
|
"CLK",
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB"
|
|
], [
|
|
"SET_B",
|
|
"VGND",
|
|
"D",
|
|
"RESET_B",
|
|
"Q",
|
|
"Q_N",
|
|
"CLK",
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__inv_8",
|
|
"sky130_fd_sc_hd__inv_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A",
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"A",
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__buf_8",
|
|
"sky130_fd_sc_hd__buf_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 2],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 2 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A"
|
|
], [
|
|
"X",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__buf_6",
|
|
"sky130_fd_sc_hd__buf_6"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"X",
|
|
"VNB",
|
|
"A",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"VGND",
|
|
"X",
|
|
"VNB",
|
|
"A",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and2_4",
|
|
"sky130_fd_sc_hd__and2_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"B",
|
|
"A",
|
|
"VGND",
|
|
"X",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"B",
|
|
"A",
|
|
"VGND",
|
|
"X",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and3b_4",
|
|
"sky130_fd_sc_hd__and3b_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"X",
|
|
"C",
|
|
"B",
|
|
"A_N"
|
|
], [
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"X",
|
|
"C",
|
|
"B",
|
|
"A_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand2_8",
|
|
"sky130_fd_sc_hd__nand2_8"
|
|
],
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|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 2],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 2 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
]
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8,
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8
|
|
],
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],
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[
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|
"Y",
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"VGND",
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"A",
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"VPWR",
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"VPB",
|
|
"B",
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|
"VNB"
|
|
], [
|
|
"Y",
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|
"VGND",
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|
"A",
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|
"VPWR",
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|
"VPB",
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|
"B",
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|
"VNB"
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|
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|
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|
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|
|
{
|
|
"name": [
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|
"sky130_fd_sc_hd__nand2_4",
|
|
"sky130_fd_sc_hd__nand2_4"
|
|
],
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|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 2],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 2 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ]
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|
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8,
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8
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|
],
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],
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[
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|
"VGND",
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"Y",
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"A",
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|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"B"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"A",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__clkbuf_8",
|
|
"sky130_fd_sc_hd__clkbuf_8"
|
|
],
|
|
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|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
7,
|
|
7
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"VGND",
|
|
"VNB",
|
|
"A",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"X",
|
|
"VGND",
|
|
"VNB",
|
|
"A",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and3b_1",
|
|
"sky130_fd_sc_hd__and3b_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"X",
|
|
"A_N",
|
|
"C",
|
|
"B"
|
|
], [
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"X",
|
|
"A_N",
|
|
"C",
|
|
"B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__inv_12",
|
|
"sky130_fd_sc_hd__inv_12"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"A",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"Y",
|
|
"A",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"mprj2_logic_high",
|
|
"mprj2_logic_high"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__decap_6", 1],
|
|
["sky130_fd_sc_hd__conb_1", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__decap_6", 1 ],
|
|
["sky130_fd_sc_hd__conb_1", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"HI",
|
|
"vssd2",
|
|
"vccd2"
|
|
], [
|
|
"HI",
|
|
"vssd2",
|
|
"vccd2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"mprj_logic_high",
|
|
"mprj_logic_high"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__conb_1", 463],
|
|
["sky130_fd_sc_hd__decap_6", 1],
|
|
["sky130_fd_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__decap_8", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__conb_1", 463 ],
|
|
["sky130_fd_sc_hd__decap_6", 1 ],
|
|
["sky130_fd_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__decap_8", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
928,
|
|
928
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"vssd1",
|
|
"vccd1",
|
|
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|
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|
|
"HI[3]",
|
|
"HI[45]",
|
|
"HI[332]",
|
|
"HI[165]",
|
|
"HI[215]",
|
|
"HI[82]",
|
|
"HI[252]",
|
|
"HI[15]",
|
|
"HI[302]",
|
|
"HI[135]",
|
|
"HI[387]",
|
|
"HI[52]",
|
|
"HI[172]",
|
|
"HI[437]",
|
|
"HI[222]",
|
|
"HI[105]",
|
|
"HI[357]",
|
|
"HI[22]",
|
|
"HI[142]",
|
|
"HI[407]",
|
|
"HI[394]",
|
|
"HI[277]",
|
|
"HI[444]",
|
|
"HI[327]",
|
|
"HI[112]",
|
|
"HI[77]",
|
|
"HI[197]",
|
|
"HI[364]",
|
|
"HI[414]",
|
|
"HI[247]",
|
|
"HI[284]",
|
|
"HI[451]",
|
|
"HI[5]",
|
|
"HI[47]",
|
|
"HI[167]",
|
|
"HI[334]",
|
|
"HI[217]",
|
|
"HI[84]",
|
|
"HI[371]",
|
|
"HI[254]",
|
|
"HI[421]",
|
|
"HI[17]",
|
|
"HI[304]",
|
|
"HI[137]",
|
|
"HI[291]",
|
|
"HI[389]",
|
|
"HI[54]",
|
|
"HI[341]",
|
|
"HI[174]",
|
|
"HI[439]",
|
|
"HI[224]",
|
|
"HI[91]",
|
|
"HI[107]",
|
|
"HI[261]",
|
|
"HI[359]",
|
|
"HI[24]",
|
|
"HI[311]",
|
|
"HI[409]",
|
|
"HI[144]",
|
|
"HI[396]",
|
|
"HI[61]",
|
|
"HI[279]",
|
|
"HI[181]",
|
|
"HI[446]",
|
|
"HI[231]",
|
|
"HI[329]",
|
|
"HI[114]",
|
|
"HI[79]",
|
|
"HI[199]",
|
|
"HI[366]",
|
|
"HI[31]",
|
|
"HI[151]",
|
|
"HI[249]",
|
|
"HI[416]",
|
|
"HI[201]",
|
|
"HI[453]",
|
|
"HI[7]",
|
|
"HI[286]",
|
|
"HI[49]",
|
|
"HI[169]",
|
|
"HI[336]",
|
|
"HI[219]",
|
|
"HI[121]",
|
|
"HI[86]",
|
|
"HI[373]",
|
|
"HI[256]",
|
|
"HI[423]",
|
|
"HI[19]",
|
|
"HI[306]",
|
|
"HI[139]",
|
|
"HI[293]",
|
|
"HI[460]",
|
|
"HI[56]",
|
|
"HI[176]",
|
|
"HI[343]",
|
|
"HI[226]",
|
|
"HI[93]",
|
|
"HI[109]",
|
|
"HI[380]",
|
|
"HI[263]",
|
|
"HI[430]",
|
|
"HI[26]",
|
|
"HI[313]",
|
|
"HI[146]",
|
|
"HI[398]",
|
|
"HI[63]",
|
|
"HI[448]",
|
|
"HI[350]",
|
|
"HI[183]",
|
|
"HI[233]",
|
|
"HI[400]",
|
|
"HI[116]",
|
|
"HI[270]",
|
|
"HI[368]",
|
|
"HI[33]",
|
|
"HI[320]",
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"HI[153]",
|
|
"HI[418]",
|
|
"HI[203]",
|
|
"HI[70]",
|
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"HI[190]",
|
|
"HI[288]",
|
|
"HI[455]",
|
|
"HI[9]",
|
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"HI[240]",
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|
"HI[338]",
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"HI[123]",
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|
"HI[88]",
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"HI[375]",
|
|
"HI[40]",
|
|
"HI[258]",
|
|
"HI[160]",
|
|
"HI[425]",
|
|
"HI[308]",
|
|
"HI[210]"
|
|
], [
|
|
"vssd1",
|
|
"vccd1",
|
|
"HI[295]",
|
|
"HI[462]",
|
|
"HI[58]",
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|
"HI[345]",
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|
"HI[178]",
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"HI[10]",
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"HI[228]",
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"HI[130]",
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"HI[95]",
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"HI[382]",
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"HI[432]",
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"HI[265]",
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"HI[28]",
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"HI[315]",
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"HI[148]",
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"HI[100]",
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"HI[65]",
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"HI[185]",
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"HI[352]",
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"HI[235]",
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"HI[402]",
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"HI[118]",
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"HI[35]",
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"HI[72]",
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"HI[242]",
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"HI[125]",
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"HI[0]",
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"HI[347]",
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"HI[12]",
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"HI[97]",
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"HI[267]",
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"HI[317]",
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"HI[102]",
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"HI[67]",
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"HI[187]",
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"HI[354]",
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"HI[237]",
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"HI[404]",
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"HI[391]",
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"HI[274]",
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"HI[441]",
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"HI[37]",
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"HI[324]",
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"HI[157]",
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"HI[207]",
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"HI[74]",
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"HI[194]",
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"HI[361]",
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|
"HI[459]",
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"HI[244]",
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|
"HI[411]",
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|
"HI[127]",
|
|
"HI[281]",
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|
"HI[2]",
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|
"HI[379]",
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"HI[44]",
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|
"HI[331]",
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"HI[164]",
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"HI[429]",
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"HI[214]",
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"HI[81]",
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"HI[299]",
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"HI[251]",
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"HI[349]",
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"HI[14]",
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"HI[301]",
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"HI[134]",
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"HI[99]",
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"HI[51]",
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"HI[406]",
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"HI[393]",
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"HI[276]",
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"HI[443]",
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"HI[39]",
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"HI[76]",
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"HI[196]",
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"HI[413]",
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"HI[129]",
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"HI[4]",
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"HI[46]",
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"HI[166]",
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"HI[358]",
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"HI[23]",
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"HI[310]",
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"HI[143]",
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"HI[408]",
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"HI[60]",
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"HI[180]",
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"HI[278]",
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|
"HI[445]",
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|
"HI[328]",
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|
"HI[230]",
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|
"HI[113]",
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|
"HI[78]",
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|
"HI[198]",
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"HI[365]",
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|
"HI[30]",
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|
"HI[248]",
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|
"HI[150]",
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|
"HI[415]",
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|
"HI[200]",
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|
"HI[285]",
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|
"HI[452]",
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|
"HI[6]",
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"HI[48]",
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"HI[168]",
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|
"HI[335]",
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|
"HI[218]",
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|
"HI[120]",
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"HI[85]",
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|
"HI[372]",
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|
"HI[255]",
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|
"HI[422]",
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|
"HI[18]",
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"HI[305]",
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|
"HI[138]",
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|
"HI[292]",
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|
"HI[55]",
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"HI[175]",
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|
"HI[342]",
|
|
"HI[225]",
|
|
"HI[92]",
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|
"HI[108]",
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|
"HI[262]",
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|
"HI[25]",
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|
"HI[312]",
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|
"HI[145]",
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|
"HI[397]",
|
|
"HI[62]",
|
|
"HI[182]",
|
|
"HI[447]",
|
|
"HI[232]",
|
|
"HI[115]",
|
|
"HI[367]",
|
|
"HI[32]",
|
|
"HI[152]",
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|
"HI[417]",
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|
"HI[202]",
|
|
"HI[287]",
|
|
"HI[454]",
|
|
"HI[8]",
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|
"HI[337]",
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|
"HI[122]",
|
|
"HI[87]",
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|
"HI[374]",
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|
"HI[257]",
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|
"HI[424]",
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|
"HI[307]",
|
|
"HI[294]",
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|
"HI[461]",
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|
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|
"HI[177]",
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|
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"HI[264]",
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"HI[27]",
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"HI[147]",
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|
"HI[271]",
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"HI[369]",
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|
"HI[34]",
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"HI[154]",
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"HI[419]",
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|
"HI[204]",
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|
"HI[71]",
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|
"HI[191]",
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|
"HI[289]",
|
|
"HI[456]",
|
|
"HI[339]",
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|
"HI[241]",
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|
"HI[124]",
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|
"HI[89]",
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|
"HI[376]",
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|
"HI[41]",
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|
"HI[259]",
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|
"HI[161]",
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|
"HI[426]",
|
|
"HI[211]",
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|
"HI[309]",
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|
"HI[296]",
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"HI[59]",
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"HI[179]",
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"HI[346]",
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"HI[11]",
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|
"HI[131]",
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|
"HI[96]",
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|
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|
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|
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|
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"HI[273]",
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"HI[36]",
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|
"HI[323]",
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|
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|
"HI[73]",
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"HI[193]",
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|
"HI[360]",
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|
"HI[458]",
|
|
"HI[243]",
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|
"HI[410]",
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|
"HI[126]",
|
|
"HI[1]",
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|
"HI[280]",
|
|
"HI[378]",
|
|
"HI[43]",
|
|
"HI[163]",
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|
"HI[330]",
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|
"HI[428]",
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|
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|
"HI[80]",
|
|
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|
"HI[250]",
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|
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|
|
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|
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|
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|
"HI[98]",
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|
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"HI[50]",
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|
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|
"HI[435]",
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|
"HI[170]",
|
|
"HI[220]",
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|
"HI[318]",
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|
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"HI[68]",
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"HI[188]",
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"HI[355]",
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"HI[20]",
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|
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|
"HI[140]",
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|
"HI[405]",
|
|
"HI[392]",
|
|
"HI[275]",
|
|
"HI[442]",
|
|
"HI[38]",
|
|
"HI[325]",
|
|
"HI[158]",
|
|
"HI[208]",
|
|
"HI[110]",
|
|
"HI[75]",
|
|
"HI[195]",
|
|
"HI[362]",
|
|
"HI[245]",
|
|
"HI[412]",
|
|
"HI[128]",
|
|
"HI[282]",
|
|
"HI[3]",
|
|
"HI[45]",
|
|
"HI[332]",
|
|
"HI[165]",
|
|
"HI[215]",
|
|
"HI[82]",
|
|
"HI[252]",
|
|
"HI[15]",
|
|
"HI[302]",
|
|
"HI[135]",
|
|
"HI[387]",
|
|
"HI[52]",
|
|
"HI[172]",
|
|
"HI[437]",
|
|
"HI[222]",
|
|
"HI[105]",
|
|
"HI[357]",
|
|
"HI[22]",
|
|
"HI[142]",
|
|
"HI[407]",
|
|
"HI[394]",
|
|
"HI[277]",
|
|
"HI[444]",
|
|
"HI[327]",
|
|
"HI[112]",
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|
"HI[77]",
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|
"HI[197]",
|
|
"HI[364]",
|
|
"HI[414]",
|
|
"HI[247]",
|
|
"HI[284]",
|
|
"HI[451]",
|
|
"HI[5]",
|
|
"HI[47]",
|
|
"HI[167]",
|
|
"HI[334]",
|
|
"HI[217]",
|
|
"HI[84]",
|
|
"HI[371]",
|
|
"HI[254]",
|
|
"HI[421]",
|
|
"HI[17]",
|
|
"HI[304]",
|
|
"HI[137]",
|
|
"HI[291]",
|
|
"HI[389]",
|
|
"HI[54]",
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|
"HI[341]",
|
|
"HI[174]",
|
|
"HI[439]",
|
|
"HI[224]",
|
|
"HI[91]",
|
|
"HI[107]",
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|
"HI[261]",
|
|
"HI[359]",
|
|
"HI[24]",
|
|
"HI[311]",
|
|
"HI[409]",
|
|
"HI[144]",
|
|
"HI[396]",
|
|
"HI[61]",
|
|
"HI[279]",
|
|
"HI[181]",
|
|
"HI[446]",
|
|
"HI[231]",
|
|
"HI[329]",
|
|
"HI[114]",
|
|
"HI[79]",
|
|
"HI[199]",
|
|
"HI[366]",
|
|
"HI[31]",
|
|
"HI[151]",
|
|
"HI[249]",
|
|
"HI[416]",
|
|
"HI[201]",
|
|
"HI[453]",
|
|
"HI[7]",
|
|
"HI[286]",
|
|
"HI[49]",
|
|
"HI[169]",
|
|
"HI[336]",
|
|
"HI[219]",
|
|
"HI[121]",
|
|
"HI[86]",
|
|
"HI[373]",
|
|
"HI[256]",
|
|
"HI[423]",
|
|
"HI[19]",
|
|
"HI[306]",
|
|
"HI[139]",
|
|
"HI[293]",
|
|
"HI[460]",
|
|
"HI[56]",
|
|
"HI[176]",
|
|
"HI[343]",
|
|
"HI[226]",
|
|
"HI[93]",
|
|
"HI[109]",
|
|
"HI[380]",
|
|
"HI[263]",
|
|
"HI[430]",
|
|
"HI[26]",
|
|
"HI[313]",
|
|
"HI[146]",
|
|
"HI[398]",
|
|
"HI[63]",
|
|
"HI[448]",
|
|
"HI[350]",
|
|
"HI[183]",
|
|
"HI[233]",
|
|
"HI[400]",
|
|
"HI[116]",
|
|
"HI[270]",
|
|
"HI[368]",
|
|
"HI[33]",
|
|
"HI[320]",
|
|
"HI[153]",
|
|
"HI[418]",
|
|
"HI[203]",
|
|
"HI[70]",
|
|
"HI[190]",
|
|
"HI[288]",
|
|
"HI[455]",
|
|
"HI[9]",
|
|
"HI[240]",
|
|
"HI[338]",
|
|
"HI[123]",
|
|
"HI[88]",
|
|
"HI[375]",
|
|
"HI[40]",
|
|
"HI[258]",
|
|
"HI[160]",
|
|
"HI[425]",
|
|
"HI[308]",
|
|
"HI[210]"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"mgmt_protect_hv",
|
|
"mgmt_protect_hv"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hvl__conb_1", 2],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 4],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 8],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_sc_hvl__conb_1", 2 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 4 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 8 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
20,
|
|
20
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"vccd",
|
|
"vssd",
|
|
"vdda2",
|
|
"vdda1",
|
|
"vssa2",
|
|
"vssa1",
|
|
"mprj2_vdd_logic1",
|
|
"mprj_vdd_logic1"
|
|
], [
|
|
"vccd",
|
|
"vssd",
|
|
"vdda2",
|
|
"vdda1",
|
|
"vssa2",
|
|
"vssa1",
|
|
"mprj2_vdd_logic1",
|
|
"mprj_vdd_logic1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__bufbuf_8",
|
|
"sky130_fd_sc_hd__bufbuf_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"A",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"X",
|
|
"A",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and2b_4",
|
|
"sky130_fd_sc_hd__and2b_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"A_N",
|
|
"X",
|
|
"B"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"A_N",
|
|
"X",
|
|
"B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hvl__decap_4",
|
|
"sky130_fd_sc_hvl__decap_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hvl__decap_8",
|
|
"sky130_fd_sc_hvl__decap_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 1 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4,
|
|
4
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hvl__diode_2",
|
|
"sky130_fd_sc_hvl__diode_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__diode_pw2nd_11v0", 1 ]
|
|
], [
|
|
["sky130_fd_pr__diode_pw2nd_11v0", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
2,
|
|
2
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"DIODE",
|
|
"VGND",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"VNB",
|
|
"DIODE",
|
|
"VGND",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__dfstp_4",
|
|
"sky130_fd_sc_hd__dfstp_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 16],
|
|
["sky130_fd_pr__nfet_01v8", 16 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 16 ],
|
|
["sky130_fd_pr__nfet_01v8", 16 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
24,
|
|
24
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Q",
|
|
"D",
|
|
"CLK",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"SET_B"
|
|
], [
|
|
"Q",
|
|
"D",
|
|
"CLK",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"SET_B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a211o_1",
|
|
"sky130_fd_sc_hd__a211o_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A2",
|
|
"X",
|
|
"A1",
|
|
"B1",
|
|
"C1",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A2",
|
|
"X",
|
|
"A1",
|
|
"B1",
|
|
"C1",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o211a_1",
|
|
"sky130_fd_sc_hd__o211a_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"C1",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"X",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"C1",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"X",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o221a_1",
|
|
"sky130_fd_sc_hd__o221a_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"X",
|
|
"B1",
|
|
"A1",
|
|
"C1",
|
|
"B2",
|
|
"A2",
|
|
"VPWR"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"VGND",
|
|
"X",
|
|
"B1",
|
|
"A1",
|
|
"C1",
|
|
"B2",
|
|
"A2",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a221o_1",
|
|
"sky130_fd_sc_hd__a221o_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"B1",
|
|
"A1",
|
|
"C1",
|
|
"A2",
|
|
"B2"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"B1",
|
|
"A1",
|
|
"C1",
|
|
"A2",
|
|
"B2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o2111a_1",
|
|
"sky130_fd_sc_hd__o2111a_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"D1",
|
|
"C1",
|
|
"A1",
|
|
"A2",
|
|
"B1",
|
|
"X"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"D1",
|
|
"C1",
|
|
"A1",
|
|
"A2",
|
|
"B1",
|
|
"X"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a22o_1",
|
|
"sky130_fd_sc_hd__a22o_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"X",
|
|
"B2",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"X",
|
|
"B2",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand4_1",
|
|
"sky130_fd_sc_hd__nand4_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"D",
|
|
"Y"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"D",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and3_1",
|
|
"sky130_fd_sc_hd__and3_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"A",
|
|
"B",
|
|
"C",
|
|
"X",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"VGND",
|
|
"A",
|
|
"B",
|
|
"C",
|
|
"X",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o2bb2a_1",
|
|
"sky130_fd_sc_hd__o2bb2a_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A1_N",
|
|
"A2_N",
|
|
"X",
|
|
"B1",
|
|
"B2",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A1_N",
|
|
"A2_N",
|
|
"X",
|
|
"B1",
|
|
"B2",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor2_4",
|
|
"sky130_fd_sc_hd__nor2_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"B",
|
|
"VPB",
|
|
"A",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"B",
|
|
"VPB",
|
|
"A",
|
|
"VGND",
|
|
"VNB",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor2_8",
|
|
"sky130_fd_sc_hd__nor2_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 2 ],
|
|
["sky130_fd_pr__nfet_01v8", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
8,
|
|
8
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"A",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"A",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and4_1",
|
|
"sky130_fd_sc_hd__and4_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"X",
|
|
"D",
|
|
"B",
|
|
"C",
|
|
"A"
|
|
], [
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"X",
|
|
"D",
|
|
"B",
|
|
"C",
|
|
"A"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and3_4",
|
|
"sky130_fd_sc_hd__and3_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"VGND",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
], [
|
|
"X",
|
|
"VGND",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and4b_1",
|
|
"sky130_fd_sc_hd__and4b_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"D",
|
|
"A_N",
|
|
"C",
|
|
"B"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"D",
|
|
"A_N",
|
|
"C",
|
|
"B"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a221o_2",
|
|
"sky130_fd_sc_hd__a221o_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"X",
|
|
"B1",
|
|
"A1",
|
|
"C1",
|
|
"A2",
|
|
"B2",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"X",
|
|
"B1",
|
|
"A1",
|
|
"C1",
|
|
"A2",
|
|
"B2",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and2b_1",
|
|
"sky130_fd_sc_hd__and2b_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"B",
|
|
"X",
|
|
"A_N",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"B",
|
|
"X",
|
|
"A_N",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o31a_4",
|
|
"sky130_fd_sc_hd__o31a_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"A3",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"X",
|
|
"A3",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a32o_1",
|
|
"sky130_fd_sc_hd__a32o_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"B2",
|
|
"X",
|
|
"B1",
|
|
"A2",
|
|
"A3",
|
|
"A1",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"B2",
|
|
"X",
|
|
"B1",
|
|
"A2",
|
|
"A3",
|
|
"A1",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and4bb_1",
|
|
"sky130_fd_sc_hd__and4bb_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"C",
|
|
"A_N",
|
|
"B_N",
|
|
"X",
|
|
"D",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"C",
|
|
"A_N",
|
|
"B_N",
|
|
"X",
|
|
"D",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a41o_1",
|
|
"sky130_fd_sc_hd__a41o_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"B1",
|
|
"A4",
|
|
"A3",
|
|
"A2",
|
|
"A1",
|
|
"X"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"B1",
|
|
"A4",
|
|
"A3",
|
|
"A2",
|
|
"A1",
|
|
"X"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a2111o_1",
|
|
"sky130_fd_sc_hd__a2111o_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB",
|
|
"D1",
|
|
"X",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"C1",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB",
|
|
"D1",
|
|
"X",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"C1",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a2111oi_1",
|
|
"sky130_fd_sc_hd__a2111oi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"VNB",
|
|
"VPB",
|
|
"C1",
|
|
"B1",
|
|
"A1",
|
|
"D1",
|
|
"VPWR",
|
|
"A2"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"VNB",
|
|
"VPB",
|
|
"C1",
|
|
"B1",
|
|
"A1",
|
|
"D1",
|
|
"VPWR",
|
|
"A2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o41a_1",
|
|
"sky130_fd_sc_hd__o41a_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A3",
|
|
"A4",
|
|
"B1",
|
|
"A1",
|
|
"X",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A3",
|
|
"A4",
|
|
"B1",
|
|
"A1",
|
|
"X",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__mux2_8",
|
|
"sky130_fd_sc_hd__mux2_8"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"A0",
|
|
"A1",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"S",
|
|
"VPWR"
|
|
], [
|
|
"X",
|
|
"A0",
|
|
"A1",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"S",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a311o_1",
|
|
"sky130_fd_sc_hd__a311o_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"A1",
|
|
"A3",
|
|
"B1",
|
|
"C1",
|
|
"A2",
|
|
"X",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"A1",
|
|
"A3",
|
|
"B1",
|
|
"C1",
|
|
"A2",
|
|
"X",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o32a_1",
|
|
"sky130_fd_sc_hd__o32a_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"X",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"B2",
|
|
"A3",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"X",
|
|
"A1",
|
|
"B1",
|
|
"A2",
|
|
"B2",
|
|
"A3",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor4_4",
|
|
"sky130_fd_sc_hd__nor4_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"C",
|
|
"A",
|
|
"D",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"C",
|
|
"A",
|
|
"D",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand3_4",
|
|
"sky130_fd_sc_hd__nand3_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 3],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 3 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"Y",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A",
|
|
"B",
|
|
"C"
|
|
], [
|
|
"VGND",
|
|
"Y",
|
|
"VNB",
|
|
"VPWR",
|
|
"VPB",
|
|
"A",
|
|
"B",
|
|
"C"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand2b_4",
|
|
"sky130_fd_sc_hd__nand2b_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 3],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 3 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"B",
|
|
"VGND",
|
|
"A_N"
|
|
], [
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VNB",
|
|
"B",
|
|
"VGND",
|
|
"A_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a21boi_1",
|
|
"sky130_fd_sc_hd__a21boi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A1",
|
|
"A2",
|
|
"B1_N",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"Y",
|
|
"VPWR"
|
|
], [
|
|
"A1",
|
|
"A2",
|
|
"B1_N",
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"Y",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o21a_4",
|
|
"sky130_fd_sc_hd__o21a_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPWR",
|
|
"A2",
|
|
"VGND",
|
|
"A1",
|
|
"VPB",
|
|
"X",
|
|
"B1"
|
|
], [
|
|
"VNB",
|
|
"VPWR",
|
|
"A2",
|
|
"VGND",
|
|
"A1",
|
|
"VPB",
|
|
"X",
|
|
"B1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a31oi_1",
|
|
"sky130_fd_sc_hd__a31oi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"A1",
|
|
"VGND",
|
|
"A3",
|
|
"A2",
|
|
"Y",
|
|
"VPWR"
|
|
], [
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"A1",
|
|
"VGND",
|
|
"A3",
|
|
"A2",
|
|
"Y",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand4b_1",
|
|
"sky130_fd_sc_hd__nand4b_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A_N",
|
|
"C",
|
|
"D",
|
|
"B",
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"A_N",
|
|
"C",
|
|
"D",
|
|
"B",
|
|
"VGND",
|
|
"Y",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand3b_4",
|
|
"sky130_fd_sc_hd__nand3b_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"B",
|
|
"C",
|
|
"VGND",
|
|
"A_N"
|
|
], [
|
|
"VNB",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"B",
|
|
"C",
|
|
"VGND",
|
|
"A_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o21ba_1",
|
|
"sky130_fd_sc_hd__o21ba_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"A2",
|
|
"B1_N",
|
|
"A1",
|
|
"X",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"A2",
|
|
"B1_N",
|
|
"A1",
|
|
"X",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor4_2",
|
|
"sky130_fd_sc_hd__nor4_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ],
|
|
["sky130_fd_pr__nfet_01v8", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"D"
|
|
], [
|
|
"VPWR",
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A",
|
|
"C",
|
|
"B",
|
|
"D"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o311a_1",
|
|
"sky130_fd_sc_hd__o311a_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"VPWR",
|
|
"B1",
|
|
"A1",
|
|
"C1",
|
|
"A2",
|
|
"X",
|
|
"A3"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"VGND",
|
|
"VPWR",
|
|
"B1",
|
|
"A1",
|
|
"C1",
|
|
"A2",
|
|
"X",
|
|
"A3"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a2111o_2",
|
|
"sky130_fd_sc_hd__a2111o_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A1",
|
|
"X",
|
|
"A2",
|
|
"D1",
|
|
"C1",
|
|
"B1",
|
|
"VPWR"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"A1",
|
|
"X",
|
|
"A2",
|
|
"D1",
|
|
"C1",
|
|
"B1",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nand4b_4",
|
|
"sky130_fd_sc_hd__nand4b_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
13,
|
|
13
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VGND",
|
|
"D",
|
|
"B",
|
|
"C",
|
|
"A_N"
|
|
], [
|
|
"VNB",
|
|
"VPWR",
|
|
"Y",
|
|
"VPB",
|
|
"VGND",
|
|
"D",
|
|
"B",
|
|
"C",
|
|
"A_N"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a311oi_2",
|
|
"sky130_fd_sc_hd__a311oi_2"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"C1",
|
|
"B1",
|
|
"A3",
|
|
"Y"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"A2",
|
|
"A1",
|
|
"C1",
|
|
"B1",
|
|
"A3",
|
|
"Y"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__xor2_1",
|
|
"sky130_fd_sc_hd__xor2_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A",
|
|
"VGND",
|
|
"B",
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"VPWR"
|
|
], [
|
|
"A",
|
|
"VGND",
|
|
"B",
|
|
"VNB",
|
|
"VPB",
|
|
"X",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__o221a_4",
|
|
"sky130_fd_sc_hd__o221a_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"X",
|
|
"B2",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"C1",
|
|
"VGND"
|
|
], [
|
|
"VNB",
|
|
"VPB",
|
|
"VPWR",
|
|
"X",
|
|
"B2",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"C1",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a211o_4",
|
|
"sky130_fd_sc_hd__a211o_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 7 ],
|
|
["sky130_fd_pr__nfet_01v8", 7 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"C1",
|
|
"A2",
|
|
"VPWR",
|
|
"A1",
|
|
"B1",
|
|
"X"
|
|
], [
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"C1",
|
|
"A2",
|
|
"VPWR",
|
|
"A1",
|
|
"B1",
|
|
"X"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a21bo_1",
|
|
"sky130_fd_sc_hd__a21bo_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ],
|
|
["sky130_fd_pr__nfet_01v8", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"X",
|
|
"A2",
|
|
"A1",
|
|
"B1_N",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
], [
|
|
"X",
|
|
"A2",
|
|
"A1",
|
|
"B1_N",
|
|
"VPB",
|
|
"VNB",
|
|
"VPWR",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a221o_4",
|
|
"sky130_fd_sc_hd__a221o_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB",
|
|
"C1",
|
|
"B2",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"X",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"VNB",
|
|
"VPB",
|
|
"C1",
|
|
"B2",
|
|
"A2",
|
|
"A1",
|
|
"B1",
|
|
"X",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__and4b_4",
|
|
"sky130_fd_sc_hd__and4b_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"X",
|
|
"D",
|
|
"A_N",
|
|
"C",
|
|
"B",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
], [
|
|
"VGND",
|
|
"X",
|
|
"D",
|
|
"A_N",
|
|
"C",
|
|
"B",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor3b_1",
|
|
"sky130_fd_sc_hd__nor3b_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
11,
|
|
11
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"C_N",
|
|
"A",
|
|
"B",
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB"
|
|
], [
|
|
"VPWR",
|
|
"C_N",
|
|
"A",
|
|
"B",
|
|
"Y",
|
|
"VGND",
|
|
"VNB",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__nor3_4",
|
|
"sky130_fd_sc_hd__nor3_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"A",
|
|
"C",
|
|
"VPWR"
|
|
], [
|
|
"Y",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB",
|
|
"B",
|
|
"A",
|
|
"C",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a21oi_4",
|
|
"sky130_fd_sc_hd__a21oi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
10,
|
|
10
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A2",
|
|
"VGND",
|
|
"B1",
|
|
"VPWR",
|
|
"A1",
|
|
"VNB",
|
|
"Y",
|
|
"VPB"
|
|
], [
|
|
"A2",
|
|
"VGND",
|
|
"B1",
|
|
"VPWR",
|
|
"A1",
|
|
"VNB",
|
|
"Y",
|
|
"VPB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a21o_4",
|
|
"sky130_fd_sc_hd__a21o_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 6],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 6 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"VNB",
|
|
"X",
|
|
"B1",
|
|
"VPB",
|
|
"VGND"
|
|
], [
|
|
"VPWR",
|
|
"A2",
|
|
"A1",
|
|
"VNB",
|
|
"X",
|
|
"B1",
|
|
"VPB",
|
|
"VGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a31oi_4",
|
|
"sky130_fd_sc_hd__a31oi_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 4 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
12,
|
|
12
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"Y",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"A1",
|
|
"VGND",
|
|
"A3",
|
|
"A2"
|
|
], [
|
|
"Y",
|
|
"VPWR",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"A1",
|
|
"VGND",
|
|
"A3",
|
|
"A2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a2111o_4",
|
|
"sky130_fd_sc_hd__a2111o_4"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 6 ],
|
|
["sky130_fd_pr__nfet_01v8", 6 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
15,
|
|
15
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"A1",
|
|
"X",
|
|
"D1",
|
|
"C1",
|
|
"A2"
|
|
], [
|
|
"VPWR",
|
|
"VGND",
|
|
"VPB",
|
|
"VNB",
|
|
"B1",
|
|
"A1",
|
|
"X",
|
|
"D1",
|
|
"C1",
|
|
"A2"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__inv_6",
|
|
"sky130_fd_sc_hd__inv_6"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 1 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6,
|
|
6
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"A",
|
|
"Y",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB"
|
|
], [
|
|
"A",
|
|
"Y",
|
|
"VPWR",
|
|
"VPB",
|
|
"VGND",
|
|
"VNB"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"sky130_fd_sc_hd__a221oi_1",
|
|
"sky130_fd_sc_hd__a221oi_1"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_01v8", 5],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_01v8", 5 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 5 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
14,
|
|
14
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"Y",
|
|
"B2",
|
|
"A2",
|
|
"VPWR",
|
|
"A1",
|
|
"B1",
|
|
"C1"
|
|
], [
|
|
"VGND",
|
|
"VNB",
|
|
"VPB",
|
|
"Y",
|
|
"B2",
|
|
"A2",
|
|
"VPWR",
|
|
"A1",
|
|
"B1",
|
|
"C1"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"gpio_control_block",
|
|
"gpio_control_block"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__nand2b_2", 14],
|
|
["sky130_fd_sc_hd__dfrtp_4", 13],
|
|
["sky130_fd_sc_hd__dfbbn_2", 13],
|
|
["sky130_fd_sc_hd__inv_2", 14],
|
|
["sky130_fd_sc_hd__buf_16", 19],
|
|
["sky130_fd_sc_hd__mux2_4", 1],
|
|
["sky130_fd_sc_hd__clkbuf_16", 8],
|
|
["sky130_fd_sc_hd__and2_0", 1],
|
|
["sky130_fd_sc_hd__dlygate4sd3_1", 13],
|
|
["sky130_fd_sc_hd__diode_2", 23],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__conb_1", 1],
|
|
["sky130_fd_sc_hd__buf_2", 16],
|
|
["sky130_fd_sc_hd__or2_0", 13],
|
|
["sky130_fd_sc_hd__macro_sparecell", 1],
|
|
["gpio_logic_high", 1],
|
|
["sky130_fd_sc_hd__and2_2", 1],
|
|
["sky130_fd_sc_hd__o21ai_4", 1],
|
|
["sky130_fd_sc_hd__o21ai_2", 1],
|
|
["sky130_fd_sc_hd__and2b_2", 1],
|
|
["sky130_fd_sc_hd__and3b_2", 1],
|
|
["sky130_fd_sc_hd__dfrtp_2", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__nand2b_2", 14 ],
|
|
["sky130_fd_sc_hd__dfrtp_4", 13 ],
|
|
["sky130_fd_sc_hd__dfbbn_2", 13 ],
|
|
["sky130_fd_sc_hd__inv_2", 14 ],
|
|
["sky130_fd_sc_hd__buf_16", 19 ],
|
|
["sky130_fd_sc_hd__mux2_4", 1 ],
|
|
["sky130_fd_sc_hd__clkbuf_16", 8 ],
|
|
["sky130_fd_sc_hd__and2_0", 1 ],
|
|
["sky130_fd_sc_hd__dlygate4sd3_1", 13 ],
|
|
["sky130_fd_sc_hd__diode_2", 23 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__conb_1", 1 ],
|
|
["sky130_fd_sc_hd__buf_2", 16 ],
|
|
["sky130_fd_sc_hd__or2_0", 13 ],
|
|
["sky130_fd_sc_hd__macro_sparecell", 1 ],
|
|
["gpio_logic_high", 1 ],
|
|
["sky130_fd_sc_hd__and2_2", 1 ],
|
|
["sky130_fd_sc_hd__o21ai_4", 1 ],
|
|
["sky130_fd_sc_hd__o21ai_2", 1 ],
|
|
["sky130_fd_sc_hd__and2b_2", 1 ],
|
|
["sky130_fd_sc_hd__and3b_2", 1 ],
|
|
["sky130_fd_sc_hd__dfrtp_2", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
174,
|
|
174
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"vccd1",
|
|
"vssd1",
|
|
"pad_gpio_dm[2]",
|
|
"pad_gpio_dm[1]",
|
|
"serial_clock_out",
|
|
"serial_load_out",
|
|
"mgmt_gpio_in",
|
|
"zero",
|
|
"one",
|
|
"pad_gpio_outenb",
|
|
"pad_gpio_out",
|
|
"user_gpio_in",
|
|
"serial_data_out",
|
|
"pad_gpio_dm[0]",
|
|
"resetn_out",
|
|
"pad_gpio_holdover",
|
|
"pad_gpio_slow_sel",
|
|
"pad_gpio_vtrip_sel",
|
|
"pad_gpio_inenb",
|
|
"pad_gpio_ib_mode_sel",
|
|
"pad_gpio_ana_sel",
|
|
"pad_gpio_ana_pol",
|
|
"pad_gpio_ana_en",
|
|
"gpio_defaults[1]",
|
|
"gpio_defaults[10]",
|
|
"gpio_defaults[12]",
|
|
"gpio_defaults[11]",
|
|
"gpio_defaults[0]",
|
|
"gpio_defaults[7]",
|
|
"gpio_defaults[2]",
|
|
"gpio_defaults[3]",
|
|
"gpio_defaults[6]",
|
|
"gpio_defaults[5]",
|
|
"gpio_defaults[4]",
|
|
"gpio_defaults[8]",
|
|
"gpio_defaults[9]",
|
|
"vssd",
|
|
"vccd",
|
|
"user_gpio_oeb",
|
|
"user_gpio_out",
|
|
"serial_clock",
|
|
"serial_load",
|
|
"pad_gpio_in",
|
|
"mgmt_gpio_oeb",
|
|
"serial_data_in",
|
|
"mgmt_gpio_out",
|
|
"resetn"
|
|
], [
|
|
"vccd1",
|
|
"vssd1",
|
|
"pad_gpio_dm[2]",
|
|
"pad_gpio_dm[1]",
|
|
"serial_clock_out",
|
|
"serial_load_out",
|
|
"mgmt_gpio_in",
|
|
"zero",
|
|
"one",
|
|
"pad_gpio_outenb",
|
|
"pad_gpio_out",
|
|
"user_gpio_in",
|
|
"serial_data_out",
|
|
"pad_gpio_dm[0]",
|
|
"resetn_out",
|
|
"pad_gpio_holdover",
|
|
"pad_gpio_slow_sel",
|
|
"pad_gpio_vtrip_sel",
|
|
"pad_gpio_inenb",
|
|
"pad_gpio_ib_mode_sel",
|
|
"pad_gpio_ana_sel",
|
|
"pad_gpio_ana_pol",
|
|
"pad_gpio_ana_en",
|
|
"gpio_defaults[1]",
|
|
"gpio_defaults[10]",
|
|
"gpio_defaults[12]",
|
|
"gpio_defaults[11]",
|
|
"gpio_defaults[0]",
|
|
"gpio_defaults[7]",
|
|
"gpio_defaults[2]",
|
|
"gpio_defaults[3]",
|
|
"gpio_defaults[6]",
|
|
"gpio_defaults[5]",
|
|
"gpio_defaults[4]",
|
|
"gpio_defaults[8]",
|
|
"gpio_defaults[9]",
|
|
"vssd",
|
|
"vccd",
|
|
"user_gpio_oeb",
|
|
"user_gpio_out",
|
|
"serial_clock",
|
|
"serial_load",
|
|
"pad_gpio_in",
|
|
"mgmt_gpio_oeb",
|
|
"serial_data_in",
|
|
"mgmt_gpio_out",
|
|
"resetn"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"gpio_defaults_block_0403",
|
|
"gpio_defaults_block_0403"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__conb_1", 13],
|
|
["sky130_fd_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__decap_6", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__conb_1", 13 ],
|
|
["sky130_fd_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__decap_6", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
28,
|
|
28
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"gpio_defaults[1]",
|
|
"gpio_defaults[10]",
|
|
"gpio_defaults[0]",
|
|
"gpio_defaults[11]",
|
|
"gpio_defaults[3]",
|
|
"gpio_defaults[5]",
|
|
"gpio_defaults[7]",
|
|
"gpio_defaults[9]",
|
|
"gpio_defaults[12]",
|
|
"gpio_defaults[2]",
|
|
"gpio_defaults[4]",
|
|
"gpio_defaults[6]",
|
|
"gpio_defaults[8]"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"gpio_defaults[1]",
|
|
"gpio_defaults[10]",
|
|
"gpio_defaults[0]",
|
|
"gpio_defaults[11]",
|
|
"gpio_defaults[3]",
|
|
"gpio_defaults[5]",
|
|
"gpio_defaults[7]",
|
|
"gpio_defaults[9]",
|
|
"gpio_defaults[12]",
|
|
"gpio_defaults[2]",
|
|
"gpio_defaults[4]",
|
|
"gpio_defaults[6]",
|
|
"gpio_defaults[8]"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"digital_pll",
|
|
"digital_pll"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__nor2_2", 42],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__a211o_2", 3],
|
|
["sky130_fd_sc_hd__xnor2_2", 11],
|
|
["sky130_fd_sc_hd__clkinv_1", 13],
|
|
["sky130_fd_sc_hd__buf_2", 32],
|
|
["sky130_fd_sc_hd__o21ai_2", 6],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__o21a_2", 5],
|
|
["sky130_fd_sc_hd__einvp_2", 26],
|
|
["sky130_fd_sc_hd__diode_2", 37],
|
|
["sky130_fd_sc_hd__einvn_8", 13],
|
|
["sky130_fd_sc_hd__mux2_2", 11],
|
|
["sky130_fd_sc_hd__inv_2", 13],
|
|
["sky130_fd_sc_hd__o2111a_2", 2],
|
|
["sky130_fd_sc_hd__nand2_2", 20],
|
|
["sky130_fd_sc_hd__a21o_2", 14],
|
|
["sky130_fd_sc_hd__einvn_4", 13],
|
|
["sky130_fd_sc_hd__o31a_2", 4],
|
|
["sky130_fd_sc_hd__o211a_2", 7],
|
|
["sky130_fd_sc_hd__decap_6", 1],
|
|
["sky130_fd_sc_hd__and2_2", 14],
|
|
["sky130_fd_sc_hd__clkbuf_2", 12],
|
|
["sky130_fd_sc_hd__and3b_2", 2],
|
|
["sky130_fd_sc_hd__o22a_2", 4],
|
|
["sky130_fd_sc_hd__nand3b_2", 2],
|
|
["sky130_fd_sc_hd__clkbuf_1", 13],
|
|
["sky130_fd_sc_hd__nand4b_2", 1],
|
|
["sky130_fd_sc_hd__nand3_2", 3],
|
|
["sky130_fd_sc_hd__a22o_2", 7],
|
|
["sky130_fd_sc_hd__xor2_2", 4],
|
|
["sky130_fd_sc_hd__nand2b_2", 7],
|
|
["sky130_fd_sc_hd__a21boi_2", 1],
|
|
["sky130_fd_sc_hd__a32o_2", 6],
|
|
["sky130_fd_sc_hd__dfrtp_2", 23],
|
|
["sky130_fd_sc_hd__o2bb2a_2", 1],
|
|
["sky130_fd_sc_hd__einvp_1", 1],
|
|
["sky130_ef_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__a21oi_2", 5],
|
|
["sky130_fd_sc_hd__and4b_2", 2],
|
|
["sky130_fd_sc_hd__o221a_2", 1],
|
|
["sky130_fd_sc_hd__and3_2", 6],
|
|
["sky130_fd_sc_hd__and2b_2", 1],
|
|
["sky130_fd_sc_hd__o21ba_2", 1],
|
|
["sky130_fd_sc_hd__o32a_2", 1],
|
|
["sky130_fd_sc_hd__decap_8", 1],
|
|
["sky130_fd_sc_hd__clkbuf_16", 2],
|
|
["sky130_fd_sc_hd__a31o_2", 1],
|
|
["sky130_fd_sc_hd__clkinv_2", 2],
|
|
["sky130_fd_sc_hd__clkinv_8", 2],
|
|
["sky130_fd_sc_hd__conb_1", 1],
|
|
["sky130_fd_sc_hd__or2_2", 1],
|
|
["sky130_fd_sc_hd__nand4_2", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__nor2_2", 42 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__a211o_2", 3 ],
|
|
["sky130_fd_sc_hd__xnor2_2", 11 ],
|
|
["sky130_fd_sc_hd__clkinv_1", 13 ],
|
|
["sky130_fd_sc_hd__buf_2", 32 ],
|
|
["sky130_fd_sc_hd__o21ai_2", 6 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__o21a_2", 5 ],
|
|
["sky130_fd_sc_hd__einvp_2", 26 ],
|
|
["sky130_fd_sc_hd__diode_2", 37 ],
|
|
["sky130_fd_sc_hd__einvn_8", 13 ],
|
|
["sky130_fd_sc_hd__mux2_2", 11 ],
|
|
["sky130_fd_sc_hd__inv_2", 13 ],
|
|
["sky130_fd_sc_hd__o2111a_2", 2 ],
|
|
["sky130_fd_sc_hd__nand2_2", 20 ],
|
|
["sky130_fd_sc_hd__a21o_2", 14 ],
|
|
["sky130_fd_sc_hd__einvn_4", 13 ],
|
|
["sky130_fd_sc_hd__o31a_2", 4 ],
|
|
["sky130_fd_sc_hd__o211a_2", 7 ],
|
|
["sky130_fd_sc_hd__decap_6", 1 ],
|
|
["sky130_fd_sc_hd__and2_2", 14 ],
|
|
["sky130_fd_sc_hd__clkbuf_2", 12 ],
|
|
["sky130_fd_sc_hd__and3b_2", 2 ],
|
|
["sky130_fd_sc_hd__o22a_2", 4 ],
|
|
["sky130_fd_sc_hd__nand3b_2", 2 ],
|
|
["sky130_fd_sc_hd__clkbuf_1", 13 ],
|
|
["sky130_fd_sc_hd__nand4b_2", 1 ],
|
|
["sky130_fd_sc_hd__nand3_2", 3 ],
|
|
["sky130_fd_sc_hd__a22o_2", 7 ],
|
|
["sky130_fd_sc_hd__xor2_2", 4 ],
|
|
["sky130_fd_sc_hd__nand2b_2", 7 ],
|
|
["sky130_fd_sc_hd__a21boi_2", 1 ],
|
|
["sky130_fd_sc_hd__a32o_2", 6 ],
|
|
["sky130_fd_sc_hd__dfrtp_2", 23 ],
|
|
["sky130_fd_sc_hd__o2bb2a_2", 1 ],
|
|
["sky130_fd_sc_hd__einvp_1", 1 ],
|
|
["sky130_ef_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__a21oi_2", 5 ],
|
|
["sky130_fd_sc_hd__and4b_2", 2 ],
|
|
["sky130_fd_sc_hd__o221a_2", 1 ],
|
|
["sky130_fd_sc_hd__and3_2", 6 ],
|
|
["sky130_fd_sc_hd__and2b_2", 1 ],
|
|
["sky130_fd_sc_hd__o21ba_2", 1 ],
|
|
["sky130_fd_sc_hd__o32a_2", 1 ],
|
|
["sky130_fd_sc_hd__decap_8", 1 ],
|
|
["sky130_fd_sc_hd__clkbuf_16", 2 ],
|
|
["sky130_fd_sc_hd__a31o_2", 1 ],
|
|
["sky130_fd_sc_hd__clkinv_2", 2 ],
|
|
["sky130_fd_sc_hd__clkinv_8", 2 ],
|
|
["sky130_fd_sc_hd__conb_1", 1 ],
|
|
["sky130_fd_sc_hd__or2_2", 1 ],
|
|
["sky130_fd_sc_hd__nand4_2", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
374,
|
|
374
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"clockp[0]",
|
|
"clockp[1]",
|
|
"div[3]",
|
|
"div[1]",
|
|
"div[0]",
|
|
"div[4]",
|
|
"VGND",
|
|
"VPWR",
|
|
"dco",
|
|
"div[2]",
|
|
"ext_trim[0]",
|
|
"ext_trim[1]",
|
|
"ext_trim[2]",
|
|
"ext_trim[3]",
|
|
"ext_trim[5]",
|
|
"ext_trim[4]",
|
|
"ext_trim[6]",
|
|
"ext_trim[8]",
|
|
"ext_trim[10]",
|
|
"ext_trim[11]",
|
|
"ext_trim[7]",
|
|
"ext_trim[12]",
|
|
"ext_trim[14]",
|
|
"ext_trim[9]",
|
|
"ext_trim[15]",
|
|
"ext_trim[17]",
|
|
"ext_trim[18]",
|
|
"ext_trim[19]",
|
|
"ext_trim[20]",
|
|
"ext_trim[21]",
|
|
"ext_trim[13]",
|
|
"ext_trim[22]",
|
|
"ext_trim[16]",
|
|
"ext_trim[23]",
|
|
"ext_trim[24]",
|
|
"ext_trim[25]",
|
|
"enable",
|
|
"resetb",
|
|
"osc"
|
|
], [
|
|
"clockp[0]",
|
|
"clockp[1]",
|
|
"div[3]",
|
|
"div[1]",
|
|
"div[0]",
|
|
"div[4]",
|
|
"VGND",
|
|
"VPWR",
|
|
"dco",
|
|
"div[2]",
|
|
"ext_trim[0]",
|
|
"ext_trim[1]",
|
|
"ext_trim[2]",
|
|
"ext_trim[3]",
|
|
"ext_trim[5]",
|
|
"ext_trim[4]",
|
|
"ext_trim[6]",
|
|
"ext_trim[8]",
|
|
"ext_trim[10]",
|
|
"ext_trim[11]",
|
|
"ext_trim[7]",
|
|
"ext_trim[12]",
|
|
"ext_trim[14]",
|
|
"ext_trim[9]",
|
|
"ext_trim[15]",
|
|
"ext_trim[17]",
|
|
"ext_trim[18]",
|
|
"ext_trim[19]",
|
|
"ext_trim[20]",
|
|
"ext_trim[21]",
|
|
"ext_trim[13]",
|
|
"ext_trim[22]",
|
|
"ext_trim[16]",
|
|
"ext_trim[23]",
|
|
"ext_trim[24]",
|
|
"ext_trim[25]",
|
|
"enable",
|
|
"resetb",
|
|
"osc"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"chip_io_alt",
|
|
"chip_io_alt"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__nfet_05v0_nvt", 1126],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 9934],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 1122],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 12995],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 957],
|
|
["sky130_fd_pr__nfet_01v8", 1224],
|
|
["sky130_fd_io__com_cclat", 33],
|
|
["sky130_fd_io__gpiov2_octl_mux", 33],
|
|
["sky130_fd_pr__res_generic_m1", 2407],
|
|
["sky130_fd_pr__res_generic_po", 508],
|
|
["sky130_fd_pr__res_generic_m2", 1150],
|
|
["sky130_fd_io__res250only_small", 69],
|
|
["sky130_fd_io__res75only_small", 594],
|
|
["sky130_fd_io__inv_1", 496],
|
|
["sky130_fd_io__nor2_1", 132],
|
|
["sky130_fd_io__nand2_1", 132],
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 33],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 33],
|
|
["sky130_fd_pr__pfet_01v8", 309],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 70],
|
|
["sky130_fd_pr__res_generic_m3", 44],
|
|
["sky130_fd_pr__res_generic_m4", 33],
|
|
["sky130_fd_pr__res_generic_m5", 29],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 6],
|
|
["constant_block", 7],
|
|
["sky130_fd_pr__res_generic_nd__hv", 1],
|
|
["sky130_fd_pr__res_generic_nd", 68 ]
|
|
], [
|
|
["sky130_fd_pr__nfet_05v0_nvt", 1126 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 9934 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 1122 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 12995 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 957 ],
|
|
["sky130_fd_pr__nfet_01v8", 1224 ],
|
|
["sky130_fd_io__com_cclat", 33 ],
|
|
["sky130_fd_io__gpiov2_octl_mux", 33 ],
|
|
["sky130_fd_pr__res_generic_m1", 2407 ],
|
|
["sky130_fd_pr__res_generic_po", 508 ],
|
|
["sky130_fd_pr__res_generic_m2", 1150 ],
|
|
["sky130_fd_io__res250only_small", 69 ],
|
|
["sky130_fd_io__res75only_small", 594 ],
|
|
["sky130_fd_io__inv_1", 496 ],
|
|
["sky130_fd_io__nor2_1", 132 ],
|
|
["sky130_fd_io__nand2_1", 132 ],
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 33 ],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 33 ],
|
|
["sky130_fd_pr__pfet_01v8", 309 ],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 70 ],
|
|
["sky130_fd_pr__res_generic_m3", 44 ],
|
|
["sky130_fd_pr__res_generic_m4", 33 ],
|
|
["sky130_fd_pr__res_generic_m5", 29 ],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 6 ],
|
|
["constant_block", 7 ],
|
|
["sky130_fd_pr__res_generic_nd__hv", 1 ],
|
|
["sky130_fd_pr__res_generic_nd", 68 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
19333,
|
|
19333
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"vssd2",
|
|
"vssd1",
|
|
"resetb",
|
|
"vccd2",
|
|
"vccd1",
|
|
"vssa1",
|
|
"vdda1",
|
|
"xres_vss_loop",
|
|
"vssa2",
|
|
"vdda2",
|
|
"flash_io0_oeb_core",
|
|
"flash_io1_oeb_core",
|
|
"gpio_mode1_core",
|
|
"mprj_io_one[13]",
|
|
"mprj_io_one[9]",
|
|
"mprj_io_one[0]",
|
|
"mprj_io_one[2]",
|
|
"mprj_io_one[4]",
|
|
"mprj_io_one[10]",
|
|
"mprj_io_one[6]",
|
|
"mprj_io_one[12]",
|
|
"mprj_io_one[8]",
|
|
"mprj_io_one[1]",
|
|
"mprj_io_one[3]",
|
|
"mprj_io_one[5]",
|
|
"mprj_io_one[11]",
|
|
"mprj_io_one[7]",
|
|
"mprj_io_one[23]",
|
|
"mprj_io_one[14]",
|
|
"mprj_io_one[24]",
|
|
"mprj_io_one[16]",
|
|
"mprj_io_one[26]",
|
|
"mprj_io_one[18]",
|
|
"mprj_io_one[20]",
|
|
"mprj_io_one[22]",
|
|
"mprj_io_one[15]",
|
|
"mprj_io_one[25]",
|
|
"mprj_io_one[17]",
|
|
"mprj_io_one[19]",
|
|
"mprj_io_one[21]",
|
|
"mprj_clamp_high[1]",
|
|
"mprj_clamp_high[0]",
|
|
"mprj_clamp_high[2]",
|
|
"mprj_io_analog_en[13]",
|
|
"mprj_io_analog_en[9]",
|
|
"mprj_io_analog_en[0]",
|
|
"mprj_io_analog_en[2]",
|
|
"mprj_io_analog_en[4]",
|
|
"mprj_io_analog_en[10]",
|
|
"mprj_io_analog_en[6]",
|
|
"mprj_io_analog_en[12]",
|
|
"mprj_io_analog_en[8]",
|
|
"mprj_io_analog_en[1]",
|
|
"mprj_io_analog_en[3]",
|
|
"mprj_io_analog_en[5]",
|
|
"mprj_io_analog_en[11]",
|
|
"mprj_io_analog_en[7]",
|
|
"mprj_io_analog_en[23]",
|
|
"mprj_io_analog_en[14]",
|
|
"mprj_io_analog_en[24]",
|
|
"mprj_io_analog_en[16]",
|
|
"mprj_io_analog_en[26]",
|
|
"mprj_io_analog_en[18]",
|
|
"mprj_io_analog_en[20]",
|
|
"mprj_io_analog_en[22]",
|
|
"mprj_io_analog_en[15]",
|
|
"mprj_io_analog_en[25]",
|
|
"mprj_io_analog_en[17]",
|
|
"mprj_io_analog_en[19]",
|
|
"mprj_io_analog_en[21]",
|
|
"flash_clk_core",
|
|
"flash_csb_core",
|
|
"flash_io0_do_core",
|
|
"flash_io1_do_core",
|
|
"gpio_out_core",
|
|
"mprj_io_out[13]",
|
|
"mprj_io_out[9]",
|
|
"mprj_io_out[0]",
|
|
"mprj_io_out[2]",
|
|
"mprj_io_out[4]",
|
|
"mprj_io_out[10]",
|
|
"mprj_io_out[6]",
|
|
"mprj_io_out[12]",
|
|
"mprj_io_out[8]",
|
|
"mprj_io_out[1]",
|
|
"mprj_io_out[3]",
|
|
"mprj_io_out[5]",
|
|
"mprj_io_out[11]",
|
|
"mprj_io_out[7]",
|
|
"mprj_io_out[23]",
|
|
"mprj_io_out[14]",
|
|
"mprj_io_out[24]",
|
|
"mprj_io_out[16]",
|
|
"mprj_io_out[26]",
|
|
"mprj_io_out[18]",
|
|
"mprj_io_out[20]",
|
|
"mprj_io_out[22]",
|
|
"mprj_io_out[15]",
|
|
"mprj_io_out[25]",
|
|
"mprj_io_out[17]",
|
|
"mprj_io_out[19]",
|
|
"mprj_io_out[21]",
|
|
"vccd",
|
|
"vssd",
|
|
"vssio",
|
|
"mprj_clamp_low[1]",
|
|
"mprj_clamp_low[0]",
|
|
"mprj_clamp_low[2]",
|
|
"w_186552_23367#",
|
|
"w_349952_23367#",
|
|
"w_295152_23367#",
|
|
"w_404752_23367#",
|
|
"w_459552_23367#",
|
|
"w_514352_23367#",
|
|
"w_186552_21253#",
|
|
"w_349952_21253#",
|
|
"w_295152_21253#",
|
|
"w_404752_21253#",
|
|
"w_459552_21253#",
|
|
"w_514352_21253#",
|
|
"w_692355_100152#",
|
|
"w_692355_683352#",
|
|
"w_692355_728352#",
|
|
"w_692355_773352#",
|
|
"w_692355_862552#",
|
|
"w_692355_145352#",
|
|
"w_692355_190352#",
|
|
"w_692355_235552#",
|
|
"w_692355_280552#",
|
|
"w_692355_325552#",
|
|
"w_692355_370752#",
|
|
"w_692355_547952#",
|
|
"w_692355_593152#",
|
|
"w_692355_638152#",
|
|
"w_694469_100152#",
|
|
"w_694469_683352#",
|
|
"w_694469_728352#",
|
|
"w_694469_773352#",
|
|
"w_694469_862552#",
|
|
"w_694469_145352#",
|
|
"w_694469_190352#",
|
|
"w_694469_235552#",
|
|
"w_694469_280552#",
|
|
"w_694469_325552#",
|
|
"w_694469_370752#",
|
|
"w_694469_547952#",
|
|
"w_694469_593152#",
|
|
"w_694469_638152#",
|
|
"w_23367_797165#",
|
|
"w_23367_280765#",
|
|
"w_23367_237565#",
|
|
"w_23367_194365#",
|
|
"w_23367_753965#",
|
|
"w_23367_710765#",
|
|
"w_23367_667565#",
|
|
"w_23367_624365#",
|
|
"w_23367_581165#",
|
|
"w_23367_537965#",
|
|
"w_23367_410365#",
|
|
"w_23367_367165#",
|
|
"w_23367_323965#",
|
|
"w_21253_797165#",
|
|
"w_21253_280765#",
|
|
"w_21253_237565#",
|
|
"w_21253_194365#",
|
|
"w_21253_753965#",
|
|
"w_21253_710765#",
|
|
"w_21253_667565#",
|
|
"w_21253_624365#",
|
|
"w_21253_581165#",
|
|
"w_21253_537965#",
|
|
"w_21253_410365#",
|
|
"w_21253_367165#",
|
|
"w_21253_323965#",
|
|
"flash_clk",
|
|
"flash_csb",
|
|
"clock",
|
|
"flash_io0",
|
|
"flash_io1",
|
|
"gpio",
|
|
"mprj_io[13]",
|
|
"mprj_io[9]",
|
|
"mprj_io[0]",
|
|
"mprj_io[2]",
|
|
"mprj_io[4]",
|
|
"mprj_io[10]",
|
|
"mprj_io[6]",
|
|
"mprj_io[12]",
|
|
"mprj_io[8]",
|
|
"mprj_io[1]",
|
|
"mprj_io[3]",
|
|
"mprj_io[5]",
|
|
"mprj_io[11]",
|
|
"mprj_io[7]",
|
|
"mprj_io[34]",
|
|
"mprj_io[25]",
|
|
"mprj_io[35]",
|
|
"mprj_io[27]",
|
|
"mprj_io[37]",
|
|
"mprj_io[29]",
|
|
"mprj_io[31]",
|
|
"mprj_io[33]",
|
|
"mprj_io[26]",
|
|
"mprj_io[36]",
|
|
"mprj_io[28]",
|
|
"mprj_io[30]",
|
|
"mprj_io[32]",
|
|
"gpio_pad/VSSIO_Q",
|
|
"vssa",
|
|
"vddio",
|
|
"vdda",
|
|
"vccd_pad",
|
|
"vdda_pad",
|
|
"vddio_pad2",
|
|
"vddio_pad",
|
|
"vssa_pad",
|
|
"vssd_pad",
|
|
"vssio_pad",
|
|
"vssio_pad2",
|
|
"mprj_io_in_3v3[13]",
|
|
"mprj_io_in_3v3[9]",
|
|
"mprj_io_in_3v3[0]",
|
|
"mprj_io_in_3v3[2]",
|
|
"mprj_io_in_3v3[4]",
|
|
"mprj_io_in_3v3[10]",
|
|
"mprj_io_in_3v3[6]",
|
|
"mprj_io_in_3v3[12]",
|
|
"mprj_io_in_3v3[8]",
|
|
"mprj_io_in_3v3[1]",
|
|
"mprj_io_in_3v3[3]",
|
|
"mprj_io_in_3v3[5]",
|
|
"mprj_io_in_3v3[11]",
|
|
"mprj_io_in_3v3[7]",
|
|
"mprj_io_in_3v3[23]",
|
|
"mprj_io_in_3v3[14]",
|
|
"mprj_io_in_3v3[24]",
|
|
"mprj_io_in_3v3[16]",
|
|
"mprj_io_in_3v3[26]",
|
|
"mprj_io_in_3v3[18]",
|
|
"mprj_io_in_3v3[20]",
|
|
"mprj_io_in_3v3[22]",
|
|
"mprj_io_in_3v3[15]",
|
|
"mprj_io_in_3v3[25]",
|
|
"mprj_io_in_3v3[17]",
|
|
"mprj_io_in_3v3[19]",
|
|
"mprj_io_in_3v3[21]",
|
|
"mprj_gpio_analog[6]",
|
|
"mprj_gpio_analog[2]",
|
|
"mprj_gpio_analog[3]",
|
|
"mprj_gpio_analog[5]",
|
|
"mprj_gpio_analog[1]",
|
|
"mprj_gpio_analog[4]",
|
|
"mprj_gpio_analog[0]",
|
|
"mprj_gpio_analog[16]",
|
|
"mprj_gpio_analog[7]",
|
|
"mprj_gpio_analog[17]",
|
|
"mprj_gpio_analog[9]",
|
|
"mprj_gpio_analog[11]",
|
|
"mprj_gpio_analog[13]",
|
|
"mprj_gpio_analog[15]",
|
|
"mprj_gpio_analog[8]",
|
|
"mprj_gpio_analog[10]",
|
|
"mprj_gpio_analog[12]",
|
|
"mprj_gpio_analog[14]",
|
|
"mprj_io_analog_sel[13]",
|
|
"mprj_io_analog_sel[9]",
|
|
"mprj_io_analog_sel[0]",
|
|
"mprj_io_analog_sel[2]",
|
|
"mprj_io_analog_sel[4]",
|
|
"mprj_io_analog_sel[10]",
|
|
"mprj_io_analog_sel[6]",
|
|
"mprj_io_analog_sel[12]",
|
|
"mprj_io_analog_sel[8]",
|
|
"mprj_io_analog_sel[1]",
|
|
"mprj_io_analog_sel[3]",
|
|
"mprj_io_analog_sel[5]",
|
|
"mprj_io_analog_sel[11]",
|
|
"mprj_io_analog_sel[7]",
|
|
"mprj_io_analog_sel[23]",
|
|
"mprj_io_analog_sel[14]",
|
|
"mprj_io_analog_sel[24]",
|
|
"mprj_io_analog_sel[16]",
|
|
"mprj_io_analog_sel[26]",
|
|
"mprj_io_analog_sel[18]",
|
|
"mprj_io_analog_sel[20]",
|
|
"mprj_io_analog_sel[22]",
|
|
"mprj_io_analog_sel[15]",
|
|
"mprj_io_analog_sel[25]",
|
|
"mprj_io_analog_sel[17]",
|
|
"mprj_io_analog_sel[19]",
|
|
"mprj_io_analog_sel[21]",
|
|
"mprj_io_analog_pol[13]",
|
|
"mprj_io_analog_pol[9]",
|
|
"mprj_io_analog_pol[0]",
|
|
"mprj_io_analog_pol[2]",
|
|
"mprj_io_analog_pol[4]",
|
|
"mprj_io_analog_pol[10]",
|
|
"mprj_io_analog_pol[6]",
|
|
"mprj_io_analog_pol[12]",
|
|
"mprj_io_analog_pol[8]",
|
|
"mprj_io_analog_pol[1]",
|
|
"mprj_io_analog_pol[3]",
|
|
"mprj_io_analog_pol[5]",
|
|
"mprj_io_analog_pol[11]",
|
|
"mprj_io_analog_pol[7]",
|
|
"mprj_io_analog_pol[23]",
|
|
"mprj_io_analog_pol[14]",
|
|
"mprj_io_analog_pol[24]",
|
|
"mprj_io_analog_pol[16]",
|
|
"mprj_io_analog_pol[26]",
|
|
"mprj_io_analog_pol[18]",
|
|
"mprj_io_analog_pol[20]",
|
|
"mprj_io_analog_pol[22]",
|
|
"mprj_io_analog_pol[15]",
|
|
"mprj_io_analog_pol[25]",
|
|
"mprj_io_analog_pol[17]",
|
|
"mprj_io_analog_pol[19]",
|
|
"mprj_io_analog_pol[21]",
|
|
"vdda1_pad2",
|
|
"vdda1_pad",
|
|
"vssa1_pad",
|
|
"vssa1_pad2",
|
|
"mprj_io[15]",
|
|
"mprj_analog[1]",
|
|
"mprj_io[17]",
|
|
"mprj_analog[3]",
|
|
"mprj_io[22]",
|
|
"mprj_analog[8]",
|
|
"mprj_io[24]",
|
|
"mprj_analog[10]",
|
|
"mprj_io[16]",
|
|
"mprj_analog[2]",
|
|
"mprj_io[14]",
|
|
"mprj_analog[0]",
|
|
"mprj_io[21]",
|
|
"mprj_analog[7]",
|
|
"mprj_io[23]",
|
|
"mprj_analog[9]",
|
|
"mprj_io[19]",
|
|
"mprj_io[18]",
|
|
"mprj_io[20]",
|
|
"vccd1_pad",
|
|
"vccd2_pad",
|
|
"vdda2_pad",
|
|
"vssa2_pad",
|
|
"vssd2_pad",
|
|
"vssd1_pad",
|
|
"mprj_gpio_noesd[6]",
|
|
"mprj_gpio_noesd[2]",
|
|
"mprj_gpio_noesd[3]",
|
|
"mprj_gpio_noesd[5]",
|
|
"mprj_gpio_noesd[1]",
|
|
"mprj_gpio_noesd[4]",
|
|
"mprj_gpio_noesd[0]",
|
|
"mprj_gpio_noesd[16]",
|
|
"mprj_gpio_noesd[7]",
|
|
"mprj_gpio_noesd[17]",
|
|
"mprj_gpio_noesd[9]",
|
|
"mprj_gpio_noesd[11]",
|
|
"mprj_gpio_noesd[13]",
|
|
"mprj_gpio_noesd[15]",
|
|
"mprj_gpio_noesd[8]",
|
|
"mprj_gpio_noesd[10]",
|
|
"mprj_gpio_noesd[12]",
|
|
"mprj_gpio_noesd[14]",
|
|
"flash_io0_di_core",
|
|
"flash_io1_di_core",
|
|
"gpio_in_core",
|
|
"mprj_io_in[13]",
|
|
"mprj_io_in[9]",
|
|
"mprj_io_in[0]",
|
|
"mprj_io_in[2]",
|
|
"mprj_io_in[4]",
|
|
"mprj_io_in[10]",
|
|
"mprj_io_in[6]",
|
|
"mprj_io_in[12]",
|
|
"mprj_io_in[8]",
|
|
"mprj_io_in[1]",
|
|
"mprj_io_in[3]",
|
|
"mprj_io_in[5]",
|
|
"mprj_io_in[11]",
|
|
"mprj_io_in[7]",
|
|
"mprj_io_in[23]",
|
|
"mprj_io_in[14]",
|
|
"mprj_io_in[24]",
|
|
"mprj_io_in[16]",
|
|
"mprj_io_in[26]",
|
|
"mprj_io_in[18]",
|
|
"mprj_io_in[20]",
|
|
"mprj_io_in[22]",
|
|
"mprj_io_in[15]",
|
|
"mprj_io_in[25]",
|
|
"mprj_io_in[17]",
|
|
"mprj_io_in[19]",
|
|
"mprj_io_in[21]",
|
|
"clock_core",
|
|
"flash_clk_oeb_core",
|
|
"flash_csb_oeb_core",
|
|
"gpio_outenb_core",
|
|
"mprj_io_oeb[13]",
|
|
"mprj_io_oeb[9]",
|
|
"mprj_io_oeb[0]",
|
|
"mprj_io_oeb[2]",
|
|
"mprj_io_oeb[4]",
|
|
"mprj_io_oeb[10]",
|
|
"mprj_io_oeb[6]",
|
|
"mprj_io_oeb[12]",
|
|
"mprj_io_oeb[8]",
|
|
"mprj_io_oeb[1]",
|
|
"mprj_io_oeb[3]",
|
|
"mprj_io_oeb[5]",
|
|
"mprj_io_oeb[11]",
|
|
"mprj_io_oeb[7]",
|
|
"mprj_io_oeb[23]",
|
|
"mprj_io_oeb[14]",
|
|
"mprj_io_oeb[24]",
|
|
"mprj_io_oeb[16]",
|
|
"mprj_io_oeb[26]",
|
|
"mprj_io_oeb[18]",
|
|
"mprj_io_oeb[20]",
|
|
"mprj_io_oeb[22]",
|
|
"mprj_io_oeb[15]",
|
|
"mprj_io_oeb[25]",
|
|
"mprj_io_oeb[17]",
|
|
"mprj_io_oeb[19]",
|
|
"mprj_io_oeb[21]",
|
|
"mprj_io_holdover[13]",
|
|
"mprj_io_holdover[9]",
|
|
"mprj_io_holdover[0]",
|
|
"mprj_io_holdover[2]",
|
|
"mprj_io_holdover[4]",
|
|
"mprj_io_holdover[10]",
|
|
"mprj_io_holdover[6]",
|
|
"mprj_io_holdover[12]",
|
|
"mprj_io_holdover[8]",
|
|
"mprj_io_holdover[1]",
|
|
"mprj_io_holdover[3]",
|
|
"mprj_io_holdover[5]",
|
|
"mprj_io_holdover[11]",
|
|
"mprj_io_holdover[7]",
|
|
"mprj_io_holdover[23]",
|
|
"mprj_io_holdover[14]",
|
|
"mprj_io_holdover[24]",
|
|
"mprj_io_holdover[16]",
|
|
"mprj_io_holdover[26]",
|
|
"mprj_io_holdover[18]",
|
|
"mprj_io_holdover[20]",
|
|
"mprj_io_holdover[22]",
|
|
"mprj_io_holdover[15]",
|
|
"mprj_io_holdover[25]",
|
|
"mprj_io_holdover[17]",
|
|
"mprj_io_holdover[19]",
|
|
"mprj_io_holdover[21]",
|
|
"mprj_io_dm[40]",
|
|
"mprj_io_dm[28]",
|
|
"mprj_io_dm[1]",
|
|
"mprj_io_dm[7]",
|
|
"mprj_io_dm[13]",
|
|
"mprj_io_dm[31]",
|
|
"mprj_io_dm[19]",
|
|
"mprj_io_dm[37]",
|
|
"mprj_io_dm[25]",
|
|
"mprj_io_dm[4]",
|
|
"mprj_io_dm[10]",
|
|
"mprj_io_dm[16]",
|
|
"mprj_io_dm[34]",
|
|
"mprj_io_dm[22]",
|
|
"mprj_io_dm[70]",
|
|
"mprj_io_dm[43]",
|
|
"mprj_io_dm[73]",
|
|
"mprj_io_dm[49]",
|
|
"mprj_io_dm[79]",
|
|
"mprj_io_dm[55]",
|
|
"mprj_io_dm[61]",
|
|
"mprj_io_dm[67]",
|
|
"mprj_io_dm[46]",
|
|
"mprj_io_dm[76]",
|
|
"mprj_io_dm[52]",
|
|
"mprj_io_dm[58]",
|
|
"mprj_io_dm[64]",
|
|
"gpio_mode0_core",
|
|
"mprj_io_dm[39]",
|
|
"mprj_io_dm[27]",
|
|
"mprj_io_dm[0]",
|
|
"mprj_io_dm[6]",
|
|
"mprj_io_dm[12]",
|
|
"mprj_io_dm[30]",
|
|
"mprj_io_dm[18]",
|
|
"mprj_io_dm[36]",
|
|
"mprj_io_dm[24]",
|
|
"mprj_io_dm[3]",
|
|
"mprj_io_dm[9]",
|
|
"mprj_io_dm[15]",
|
|
"mprj_io_dm[33]",
|
|
"mprj_io_dm[21]",
|
|
"mprj_io_dm[69]",
|
|
"mprj_io_dm[42]",
|
|
"mprj_io_dm[72]",
|
|
"mprj_io_dm[48]",
|
|
"mprj_io_dm[78]",
|
|
"mprj_io_dm[54]",
|
|
"mprj_io_dm[60]",
|
|
"mprj_io_dm[66]",
|
|
"mprj_io_dm[45]",
|
|
"mprj_io_dm[75]",
|
|
"mprj_io_dm[51]",
|
|
"mprj_io_dm[57]",
|
|
"mprj_io_dm[63]",
|
|
"mprj_io_dm[41]",
|
|
"mprj_io_dm[29]",
|
|
"mprj_io_dm[2]",
|
|
"mprj_io_dm[8]",
|
|
"mprj_io_dm[14]",
|
|
"mprj_io_dm[32]",
|
|
"mprj_io_dm[20]",
|
|
"mprj_io_dm[38]",
|
|
"mprj_io_dm[26]",
|
|
"mprj_io_dm[5]",
|
|
"mprj_io_dm[11]",
|
|
"mprj_io_dm[17]",
|
|
"mprj_io_dm[35]",
|
|
"mprj_io_dm[23]",
|
|
"mprj_io_dm[71]",
|
|
"mprj_io_dm[44]",
|
|
"mprj_io_dm[74]",
|
|
"mprj_io_dm[50]",
|
|
"mprj_io_dm[80]",
|
|
"mprj_io_dm[56]",
|
|
"mprj_io_dm[62]",
|
|
"mprj_io_dm[68]",
|
|
"mprj_io_dm[47]",
|
|
"mprj_io_dm[77]",
|
|
"mprj_io_dm[53]",
|
|
"mprj_io_dm[59]",
|
|
"mprj_io_dm[65]",
|
|
"mprj_io_slow_sel[13]",
|
|
"mprj_io_slow_sel[9]",
|
|
"mprj_io_slow_sel[0]",
|
|
"mprj_io_slow_sel[2]",
|
|
"mprj_io_slow_sel[4]",
|
|
"mprj_io_slow_sel[10]",
|
|
"mprj_io_slow_sel[6]",
|
|
"mprj_io_slow_sel[12]",
|
|
"mprj_io_slow_sel[8]",
|
|
"mprj_io_slow_sel[1]",
|
|
"mprj_io_slow_sel[3]",
|
|
"mprj_io_slow_sel[5]",
|
|
"mprj_io_slow_sel[11]",
|
|
"mprj_io_slow_sel[7]",
|
|
"mprj_io_slow_sel[23]",
|
|
"mprj_io_slow_sel[14]",
|
|
"mprj_io_slow_sel[24]",
|
|
"mprj_io_slow_sel[16]",
|
|
"mprj_io_slow_sel[26]",
|
|
"mprj_io_slow_sel[18]",
|
|
"mprj_io_slow_sel[20]",
|
|
"mprj_io_slow_sel[22]",
|
|
"mprj_io_slow_sel[15]",
|
|
"mprj_io_slow_sel[25]",
|
|
"mprj_io_slow_sel[17]",
|
|
"mprj_io_slow_sel[19]",
|
|
"mprj_io_slow_sel[21]",
|
|
"mprj_io_vtrip_sel[13]",
|
|
"mprj_io_vtrip_sel[9]",
|
|
"mprj_io_vtrip_sel[0]",
|
|
"mprj_io_vtrip_sel[2]",
|
|
"mprj_io_vtrip_sel[4]",
|
|
"mprj_io_vtrip_sel[10]",
|
|
"mprj_io_vtrip_sel[6]",
|
|
"mprj_io_vtrip_sel[12]",
|
|
"mprj_io_vtrip_sel[8]",
|
|
"mprj_io_vtrip_sel[1]",
|
|
"mprj_io_vtrip_sel[3]",
|
|
"mprj_io_vtrip_sel[5]",
|
|
"mprj_io_vtrip_sel[11]",
|
|
"mprj_io_vtrip_sel[7]",
|
|
"mprj_io_vtrip_sel[23]",
|
|
"mprj_io_vtrip_sel[14]",
|
|
"mprj_io_vtrip_sel[24]",
|
|
"mprj_io_vtrip_sel[16]",
|
|
"mprj_io_vtrip_sel[26]",
|
|
"mprj_io_vtrip_sel[18]",
|
|
"mprj_io_vtrip_sel[20]",
|
|
"mprj_io_vtrip_sel[22]",
|
|
"mprj_io_vtrip_sel[15]",
|
|
"mprj_io_vtrip_sel[25]",
|
|
"mprj_io_vtrip_sel[17]",
|
|
"mprj_io_vtrip_sel[19]",
|
|
"mprj_io_vtrip_sel[21]",
|
|
"mprj_io_ib_mode_sel[13]",
|
|
"mprj_io_ib_mode_sel[9]",
|
|
"mprj_io_ib_mode_sel[0]",
|
|
"mprj_io_ib_mode_sel[2]",
|
|
"mprj_io_ib_mode_sel[4]",
|
|
"mprj_io_ib_mode_sel[10]",
|
|
"mprj_io_ib_mode_sel[6]",
|
|
"mprj_io_ib_mode_sel[12]",
|
|
"mprj_io_ib_mode_sel[8]",
|
|
"mprj_io_ib_mode_sel[1]",
|
|
"mprj_io_ib_mode_sel[3]",
|
|
"mprj_io_ib_mode_sel[5]",
|
|
"mprj_io_ib_mode_sel[11]",
|
|
"mprj_io_ib_mode_sel[7]",
|
|
"mprj_io_ib_mode_sel[23]",
|
|
"mprj_io_ib_mode_sel[14]",
|
|
"mprj_io_ib_mode_sel[24]",
|
|
"mprj_io_ib_mode_sel[16]",
|
|
"mprj_io_ib_mode_sel[26]",
|
|
"mprj_io_ib_mode_sel[18]",
|
|
"mprj_io_ib_mode_sel[20]",
|
|
"mprj_io_ib_mode_sel[22]",
|
|
"mprj_io_ib_mode_sel[15]",
|
|
"mprj_io_ib_mode_sel[25]",
|
|
"mprj_io_ib_mode_sel[17]",
|
|
"mprj_io_ib_mode_sel[19]",
|
|
"mprj_io_ib_mode_sel[21]",
|
|
"por",
|
|
"gpio_inenb_core",
|
|
"mprj_io_inp_dis[13]",
|
|
"mprj_io_inp_dis[9]",
|
|
"mprj_io_inp_dis[0]",
|
|
"mprj_io_inp_dis[2]",
|
|
"mprj_io_inp_dis[4]",
|
|
"mprj_io_inp_dis[10]",
|
|
"mprj_io_inp_dis[6]",
|
|
"mprj_io_inp_dis[12]",
|
|
"mprj_io_inp_dis[8]",
|
|
"mprj_io_inp_dis[1]",
|
|
"mprj_io_inp_dis[3]",
|
|
"mprj_io_inp_dis[5]",
|
|
"mprj_io_inp_dis[11]",
|
|
"mprj_io_inp_dis[7]",
|
|
"mprj_io_inp_dis[23]",
|
|
"mprj_io_inp_dis[14]",
|
|
"mprj_io_inp_dis[24]",
|
|
"mprj_io_inp_dis[16]",
|
|
"mprj_io_inp_dis[26]",
|
|
"mprj_io_inp_dis[18]",
|
|
"mprj_io_inp_dis[20]",
|
|
"mprj_io_inp_dis[22]",
|
|
"mprj_io_inp_dis[15]",
|
|
"mprj_io_inp_dis[25]",
|
|
"mprj_io_inp_dis[17]",
|
|
"mprj_io_inp_dis[19]",
|
|
"mprj_io_inp_dis[21]",
|
|
"xresloop",
|
|
"resetb_core_h",
|
|
"mprj_analog[5]",
|
|
"mprj_analog[4]",
|
|
"mprj_analog[6]",
|
|
"flash_io0_ieb_core",
|
|
"flash_io1_ieb_core",
|
|
"w_189869_23367#",
|
|
"w_353269_23367#",
|
|
"w_298469_23367#",
|
|
"w_408069_23367#",
|
|
"w_462869_23367#",
|
|
"w_517669_23367#",
|
|
"w_189869_21253#",
|
|
"w_353269_21253#",
|
|
"w_298469_21253#",
|
|
"w_408069_21253#",
|
|
"w_462869_21253#",
|
|
"w_517669_21253#",
|
|
"w_692253_865870#",
|
|
"w_692253_641470#",
|
|
"w_692253_103470#",
|
|
"w_692253_193670#",
|
|
"w_692253_283870#",
|
|
"w_692253_686670#",
|
|
"w_692253_374070#",
|
|
"w_692253_776670#",
|
|
"w_692253_596470#",
|
|
"w_692253_148670#",
|
|
"w_692253_238870#",
|
|
"w_692253_328870#",
|
|
"w_692253_731670#",
|
|
"w_692253_551270#",
|
|
"w_694469_865869#",
|
|
"w_694469_641469#",
|
|
"w_694469_103469#",
|
|
"w_694469_193669#",
|
|
"w_694469_283869#",
|
|
"w_694469_686669#",
|
|
"w_694469_374069#",
|
|
"w_694469_776669#",
|
|
"w_694469_596469#",
|
|
"w_694469_148669#",
|
|
"w_694469_238869#",
|
|
"w_694469_328869#",
|
|
"w_694469_731669#",
|
|
"w_694469_551269#",
|
|
"w_23367_320874#",
|
|
"w_23367_794074#",
|
|
"w_23367_277674#",
|
|
"w_23367_707674#",
|
|
"w_23367_191274#",
|
|
"w_23367_621274#",
|
|
"w_23367_534874#",
|
|
"w_23367_364074#",
|
|
"w_23367_750874#",
|
|
"w_23367_234474#",
|
|
"w_23367_664474#",
|
|
"w_23367_578074#",
|
|
"w_23367_407274#",
|
|
"w_21151_320874#",
|
|
"w_21151_794074#",
|
|
"w_21151_277674#",
|
|
"w_21151_707674#",
|
|
"w_21151_191274#",
|
|
"w_21151_621274#",
|
|
"w_21151_534874#",
|
|
"w_21151_364074#",
|
|
"w_21151_750874#",
|
|
"w_21151_234474#",
|
|
"w_21151_664474#",
|
|
"w_21151_578074#",
|
|
"w_21151_407274#",
|
|
"porb_h"
|
|
], [
|
|
"vssd2",
|
|
"vssd1",
|
|
"resetb",
|
|
"vccd2",
|
|
"vccd1",
|
|
"vssa1",
|
|
"vdda1",
|
|
"(no matching pin)",
|
|
"vssa2",
|
|
"vdda2",
|
|
"flash_io0_oeb_core",
|
|
"flash_io1_oeb_core",
|
|
"gpio_mode1_core",
|
|
"mprj_io_one[13]",
|
|
"mprj_io_one[9]",
|
|
"mprj_io_one[0]",
|
|
"mprj_io_one[2]",
|
|
"mprj_io_one[4]",
|
|
"mprj_io_one[10]",
|
|
"mprj_io_one[6]",
|
|
"mprj_io_one[12]",
|
|
"mprj_io_one[8]",
|
|
"mprj_io_one[1]",
|
|
"mprj_io_one[3]",
|
|
"mprj_io_one[5]",
|
|
"mprj_io_one[11]",
|
|
"mprj_io_one[7]",
|
|
"mprj_io_one[23]",
|
|
"mprj_io_one[14]",
|
|
"mprj_io_one[24]",
|
|
"mprj_io_one[16]",
|
|
"mprj_io_one[26]",
|
|
"mprj_io_one[18]",
|
|
"mprj_io_one[20]",
|
|
"mprj_io_one[22]",
|
|
"mprj_io_one[15]",
|
|
"mprj_io_one[25]",
|
|
"mprj_io_one[17]",
|
|
"mprj_io_one[19]",
|
|
"mprj_io_one[21]",
|
|
"mprj_clamp_high[1]",
|
|
"mprj_clamp_high[0]",
|
|
"mprj_clamp_high[2]",
|
|
"mprj_io_analog_en[13]",
|
|
"mprj_io_analog_en[9]",
|
|
"mprj_io_analog_en[0]",
|
|
"mprj_io_analog_en[2]",
|
|
"mprj_io_analog_en[4]",
|
|
"mprj_io_analog_en[10]",
|
|
"mprj_io_analog_en[6]",
|
|
"mprj_io_analog_en[12]",
|
|
"mprj_io_analog_en[8]",
|
|
"mprj_io_analog_en[1]",
|
|
"mprj_io_analog_en[3]",
|
|
"mprj_io_analog_en[5]",
|
|
"mprj_io_analog_en[11]",
|
|
"mprj_io_analog_en[7]",
|
|
"mprj_io_analog_en[23]",
|
|
"mprj_io_analog_en[14]",
|
|
"mprj_io_analog_en[24]",
|
|
"mprj_io_analog_en[16]",
|
|
"mprj_io_analog_en[26]",
|
|
"mprj_io_analog_en[18]",
|
|
"mprj_io_analog_en[20]",
|
|
"mprj_io_analog_en[22]",
|
|
"mprj_io_analog_en[15]",
|
|
"mprj_io_analog_en[25]",
|
|
"mprj_io_analog_en[17]",
|
|
"mprj_io_analog_en[19]",
|
|
"mprj_io_analog_en[21]",
|
|
"flash_clk_core",
|
|
"flash_csb_core",
|
|
"flash_io0_do_core",
|
|
"flash_io1_do_core",
|
|
"gpio_out_core",
|
|
"mprj_io_out[13]",
|
|
"mprj_io_out[9]",
|
|
"mprj_io_out[0]",
|
|
"mprj_io_out[2]",
|
|
"mprj_io_out[4]",
|
|
"mprj_io_out[10]",
|
|
"mprj_io_out[6]",
|
|
"mprj_io_out[12]",
|
|
"mprj_io_out[8]",
|
|
"mprj_io_out[1]",
|
|
"mprj_io_out[3]",
|
|
"mprj_io_out[5]",
|
|
"mprj_io_out[11]",
|
|
"mprj_io_out[7]",
|
|
"mprj_io_out[23]",
|
|
"mprj_io_out[14]",
|
|
"mprj_io_out[24]",
|
|
"mprj_io_out[16]",
|
|
"mprj_io_out[26]",
|
|
"mprj_io_out[18]",
|
|
"mprj_io_out[20]",
|
|
"mprj_io_out[22]",
|
|
"mprj_io_out[15]",
|
|
"mprj_io_out[25]",
|
|
"mprj_io_out[17]",
|
|
"mprj_io_out[19]",
|
|
"mprj_io_out[21]",
|
|
"vccd",
|
|
"vssd",
|
|
"vssio",
|
|
"mprj_clamp_low[1]",
|
|
"mprj_clamp_low[0]",
|
|
"mprj_clamp_low[2]",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"flash_clk",
|
|
"flash_csb",
|
|
"clock",
|
|
"flash_io0",
|
|
"flash_io1",
|
|
"gpio",
|
|
"mprj_io[13]",
|
|
"mprj_io[9]",
|
|
"mprj_io[0]",
|
|
"mprj_io[2]",
|
|
"mprj_io[4]",
|
|
"mprj_io[10]",
|
|
"mprj_io[6]",
|
|
"mprj_io[12]",
|
|
"mprj_io[8]",
|
|
"mprj_io[1]",
|
|
"mprj_io[3]",
|
|
"mprj_io[5]",
|
|
"mprj_io[11]",
|
|
"mprj_io[7]",
|
|
"mprj_io[34]",
|
|
"mprj_io[25]",
|
|
"mprj_io[35]",
|
|
"mprj_io[27]",
|
|
"mprj_io[37]",
|
|
"mprj_io[29]",
|
|
"mprj_io[31]",
|
|
"mprj_io[33]",
|
|
"mprj_io[26]",
|
|
"mprj_io[36]",
|
|
"mprj_io[28]",
|
|
"mprj_io[30]",
|
|
"mprj_io[32]",
|
|
"(no matching pin)",
|
|
"vssa",
|
|
"vddio",
|
|
"vdda",
|
|
"vccd_pad",
|
|
"vdda_pad",
|
|
"vddio_pad2",
|
|
"vddio_pad",
|
|
"vssa_pad",
|
|
"vssd_pad",
|
|
"vssio_pad",
|
|
"vssio_pad2",
|
|
"mprj_io_in_3v3[13]",
|
|
"mprj_io_in_3v3[9]",
|
|
"mprj_io_in_3v3[0]",
|
|
"mprj_io_in_3v3[2]",
|
|
"mprj_io_in_3v3[4]",
|
|
"mprj_io_in_3v3[10]",
|
|
"mprj_io_in_3v3[6]",
|
|
"mprj_io_in_3v3[12]",
|
|
"mprj_io_in_3v3[8]",
|
|
"mprj_io_in_3v3[1]",
|
|
"mprj_io_in_3v3[3]",
|
|
"mprj_io_in_3v3[5]",
|
|
"mprj_io_in_3v3[11]",
|
|
"mprj_io_in_3v3[7]",
|
|
"mprj_io_in_3v3[23]",
|
|
"mprj_io_in_3v3[14]",
|
|
"mprj_io_in_3v3[24]",
|
|
"mprj_io_in_3v3[16]",
|
|
"mprj_io_in_3v3[26]",
|
|
"mprj_io_in_3v3[18]",
|
|
"mprj_io_in_3v3[20]",
|
|
"mprj_io_in_3v3[22]",
|
|
"mprj_io_in_3v3[15]",
|
|
"mprj_io_in_3v3[25]",
|
|
"mprj_io_in_3v3[17]",
|
|
"mprj_io_in_3v3[19]",
|
|
"mprj_io_in_3v3[21]",
|
|
"mprj_gpio_analog[6]",
|
|
"mprj_gpio_analog[2]",
|
|
"mprj_gpio_analog[3]",
|
|
"mprj_gpio_analog[5]",
|
|
"mprj_gpio_analog[1]",
|
|
"mprj_gpio_analog[4]",
|
|
"mprj_gpio_analog[0]",
|
|
"mprj_gpio_analog[16]",
|
|
"mprj_gpio_analog[7]",
|
|
"mprj_gpio_analog[17]",
|
|
"mprj_gpio_analog[9]",
|
|
"mprj_gpio_analog[11]",
|
|
"mprj_gpio_analog[13]",
|
|
"mprj_gpio_analog[15]",
|
|
"mprj_gpio_analog[8]",
|
|
"mprj_gpio_analog[10]",
|
|
"mprj_gpio_analog[12]",
|
|
"mprj_gpio_analog[14]",
|
|
"mprj_io_analog_sel[13]",
|
|
"mprj_io_analog_sel[9]",
|
|
"mprj_io_analog_sel[0]",
|
|
"mprj_io_analog_sel[2]",
|
|
"mprj_io_analog_sel[4]",
|
|
"mprj_io_analog_sel[10]",
|
|
"mprj_io_analog_sel[6]",
|
|
"mprj_io_analog_sel[12]",
|
|
"mprj_io_analog_sel[8]",
|
|
"mprj_io_analog_sel[1]",
|
|
"mprj_io_analog_sel[3]",
|
|
"mprj_io_analog_sel[5]",
|
|
"mprj_io_analog_sel[11]",
|
|
"mprj_io_analog_sel[7]",
|
|
"mprj_io_analog_sel[23]",
|
|
"mprj_io_analog_sel[14]",
|
|
"mprj_io_analog_sel[24]",
|
|
"mprj_io_analog_sel[16]",
|
|
"mprj_io_analog_sel[26]",
|
|
"mprj_io_analog_sel[18]",
|
|
"mprj_io_analog_sel[20]",
|
|
"mprj_io_analog_sel[22]",
|
|
"mprj_io_analog_sel[15]",
|
|
"mprj_io_analog_sel[25]",
|
|
"mprj_io_analog_sel[17]",
|
|
"mprj_io_analog_sel[19]",
|
|
"mprj_io_analog_sel[21]",
|
|
"mprj_io_analog_pol[13]",
|
|
"mprj_io_analog_pol[9]",
|
|
"mprj_io_analog_pol[0]",
|
|
"mprj_io_analog_pol[2]",
|
|
"mprj_io_analog_pol[4]",
|
|
"mprj_io_analog_pol[10]",
|
|
"mprj_io_analog_pol[6]",
|
|
"mprj_io_analog_pol[12]",
|
|
"mprj_io_analog_pol[8]",
|
|
"mprj_io_analog_pol[1]",
|
|
"mprj_io_analog_pol[3]",
|
|
"mprj_io_analog_pol[5]",
|
|
"mprj_io_analog_pol[11]",
|
|
"mprj_io_analog_pol[7]",
|
|
"mprj_io_analog_pol[23]",
|
|
"mprj_io_analog_pol[14]",
|
|
"mprj_io_analog_pol[24]",
|
|
"mprj_io_analog_pol[16]",
|
|
"mprj_io_analog_pol[26]",
|
|
"mprj_io_analog_pol[18]",
|
|
"mprj_io_analog_pol[20]",
|
|
"mprj_io_analog_pol[22]",
|
|
"mprj_io_analog_pol[15]",
|
|
"mprj_io_analog_pol[25]",
|
|
"mprj_io_analog_pol[17]",
|
|
"mprj_io_analog_pol[19]",
|
|
"mprj_io_analog_pol[21]",
|
|
"vdda1_pad2",
|
|
"vdda1_pad",
|
|
"vssa1_pad",
|
|
"vssa1_pad2",
|
|
"mprj_io[15]",
|
|
"mprj_analog[1]",
|
|
"mprj_io[17]",
|
|
"mprj_analog[3]",
|
|
"mprj_io[22]",
|
|
"mprj_analog[8]",
|
|
"mprj_io[24]",
|
|
"mprj_analog[10]",
|
|
"mprj_io[16]",
|
|
"mprj_analog[2]",
|
|
"mprj_io[14]",
|
|
"mprj_analog[0]",
|
|
"mprj_io[21]",
|
|
"mprj_analog[7]",
|
|
"mprj_io[23]",
|
|
"mprj_analog[9]",
|
|
"mprj_io[19]",
|
|
"mprj_io[18]",
|
|
"mprj_io[20]",
|
|
"vccd1_pad",
|
|
"vccd2_pad",
|
|
"vdda2_pad",
|
|
"vssa2_pad",
|
|
"vssd2_pad",
|
|
"vssd1_pad",
|
|
"mprj_gpio_noesd[6]",
|
|
"mprj_gpio_noesd[2]",
|
|
"mprj_gpio_noesd[3]",
|
|
"mprj_gpio_noesd[5]",
|
|
"mprj_gpio_noesd[1]",
|
|
"mprj_gpio_noesd[4]",
|
|
"mprj_gpio_noesd[0]",
|
|
"mprj_gpio_noesd[16]",
|
|
"mprj_gpio_noesd[7]",
|
|
"mprj_gpio_noesd[17]",
|
|
"mprj_gpio_noesd[9]",
|
|
"mprj_gpio_noesd[11]",
|
|
"mprj_gpio_noesd[13]",
|
|
"mprj_gpio_noesd[15]",
|
|
"mprj_gpio_noesd[8]",
|
|
"mprj_gpio_noesd[10]",
|
|
"mprj_gpio_noesd[12]",
|
|
"mprj_gpio_noesd[14]",
|
|
"flash_io0_di_core",
|
|
"flash_io1_di_core",
|
|
"gpio_in_core",
|
|
"mprj_io_in[13]",
|
|
"mprj_io_in[9]",
|
|
"mprj_io_in[0]",
|
|
"mprj_io_in[2]",
|
|
"mprj_io_in[4]",
|
|
"mprj_io_in[10]",
|
|
"mprj_io_in[6]",
|
|
"mprj_io_in[12]",
|
|
"mprj_io_in[8]",
|
|
"mprj_io_in[1]",
|
|
"mprj_io_in[3]",
|
|
"mprj_io_in[5]",
|
|
"mprj_io_in[11]",
|
|
"mprj_io_in[7]",
|
|
"mprj_io_in[23]",
|
|
"mprj_io_in[14]",
|
|
"mprj_io_in[24]",
|
|
"mprj_io_in[16]",
|
|
"mprj_io_in[26]",
|
|
"mprj_io_in[18]",
|
|
"mprj_io_in[20]",
|
|
"mprj_io_in[22]",
|
|
"mprj_io_in[15]",
|
|
"mprj_io_in[25]",
|
|
"mprj_io_in[17]",
|
|
"mprj_io_in[19]",
|
|
"mprj_io_in[21]",
|
|
"clock_core",
|
|
"flash_clk_oeb_core",
|
|
"flash_csb_oeb_core",
|
|
"gpio_outenb_core",
|
|
"mprj_io_oeb[13]",
|
|
"mprj_io_oeb[9]",
|
|
"mprj_io_oeb[0]",
|
|
"mprj_io_oeb[2]",
|
|
"mprj_io_oeb[4]",
|
|
"mprj_io_oeb[10]",
|
|
"mprj_io_oeb[6]",
|
|
"mprj_io_oeb[12]",
|
|
"mprj_io_oeb[8]",
|
|
"mprj_io_oeb[1]",
|
|
"mprj_io_oeb[3]",
|
|
"mprj_io_oeb[5]",
|
|
"mprj_io_oeb[11]",
|
|
"mprj_io_oeb[7]",
|
|
"mprj_io_oeb[23]",
|
|
"mprj_io_oeb[14]",
|
|
"mprj_io_oeb[24]",
|
|
"mprj_io_oeb[16]",
|
|
"mprj_io_oeb[26]",
|
|
"mprj_io_oeb[18]",
|
|
"mprj_io_oeb[20]",
|
|
"mprj_io_oeb[22]",
|
|
"mprj_io_oeb[15]",
|
|
"mprj_io_oeb[25]",
|
|
"mprj_io_oeb[17]",
|
|
"mprj_io_oeb[19]",
|
|
"mprj_io_oeb[21]",
|
|
"mprj_io_holdover[13]",
|
|
"mprj_io_holdover[9]",
|
|
"mprj_io_holdover[0]",
|
|
"mprj_io_holdover[2]",
|
|
"mprj_io_holdover[4]",
|
|
"mprj_io_holdover[10]",
|
|
"mprj_io_holdover[6]",
|
|
"mprj_io_holdover[12]",
|
|
"mprj_io_holdover[8]",
|
|
"mprj_io_holdover[1]",
|
|
"mprj_io_holdover[3]",
|
|
"mprj_io_holdover[5]",
|
|
"mprj_io_holdover[11]",
|
|
"mprj_io_holdover[7]",
|
|
"mprj_io_holdover[23]",
|
|
"mprj_io_holdover[14]",
|
|
"mprj_io_holdover[24]",
|
|
"mprj_io_holdover[16]",
|
|
"mprj_io_holdover[26]",
|
|
"mprj_io_holdover[18]",
|
|
"mprj_io_holdover[20]",
|
|
"mprj_io_holdover[22]",
|
|
"mprj_io_holdover[15]",
|
|
"mprj_io_holdover[25]",
|
|
"mprj_io_holdover[17]",
|
|
"mprj_io_holdover[19]",
|
|
"mprj_io_holdover[21]",
|
|
"mprj_io_dm[40]",
|
|
"mprj_io_dm[28]",
|
|
"mprj_io_dm[1]",
|
|
"mprj_io_dm[7]",
|
|
"mprj_io_dm[13]",
|
|
"mprj_io_dm[31]",
|
|
"mprj_io_dm[19]",
|
|
"mprj_io_dm[37]",
|
|
"mprj_io_dm[25]",
|
|
"mprj_io_dm[4]",
|
|
"mprj_io_dm[10]",
|
|
"mprj_io_dm[16]",
|
|
"mprj_io_dm[34]",
|
|
"mprj_io_dm[22]",
|
|
"mprj_io_dm[70]",
|
|
"mprj_io_dm[43]",
|
|
"mprj_io_dm[73]",
|
|
"mprj_io_dm[49]",
|
|
"mprj_io_dm[79]",
|
|
"mprj_io_dm[55]",
|
|
"mprj_io_dm[61]",
|
|
"mprj_io_dm[67]",
|
|
"mprj_io_dm[46]",
|
|
"mprj_io_dm[76]",
|
|
"mprj_io_dm[52]",
|
|
"mprj_io_dm[58]",
|
|
"mprj_io_dm[64]",
|
|
"gpio_mode0_core",
|
|
"mprj_io_dm[39]",
|
|
"mprj_io_dm[27]",
|
|
"mprj_io_dm[0]",
|
|
"mprj_io_dm[6]",
|
|
"mprj_io_dm[12]",
|
|
"mprj_io_dm[30]",
|
|
"mprj_io_dm[18]",
|
|
"mprj_io_dm[36]",
|
|
"mprj_io_dm[24]",
|
|
"mprj_io_dm[3]",
|
|
"mprj_io_dm[9]",
|
|
"mprj_io_dm[15]",
|
|
"mprj_io_dm[33]",
|
|
"mprj_io_dm[21]",
|
|
"mprj_io_dm[69]",
|
|
"mprj_io_dm[42]",
|
|
"mprj_io_dm[72]",
|
|
"mprj_io_dm[48]",
|
|
"mprj_io_dm[78]",
|
|
"mprj_io_dm[54]",
|
|
"mprj_io_dm[60]",
|
|
"mprj_io_dm[66]",
|
|
"mprj_io_dm[45]",
|
|
"mprj_io_dm[75]",
|
|
"mprj_io_dm[51]",
|
|
"mprj_io_dm[57]",
|
|
"mprj_io_dm[63]",
|
|
"mprj_io_dm[41]",
|
|
"mprj_io_dm[29]",
|
|
"mprj_io_dm[2]",
|
|
"mprj_io_dm[8]",
|
|
"mprj_io_dm[14]",
|
|
"mprj_io_dm[32]",
|
|
"mprj_io_dm[20]",
|
|
"mprj_io_dm[38]",
|
|
"mprj_io_dm[26]",
|
|
"mprj_io_dm[5]",
|
|
"mprj_io_dm[11]",
|
|
"mprj_io_dm[17]",
|
|
"mprj_io_dm[35]",
|
|
"mprj_io_dm[23]",
|
|
"mprj_io_dm[71]",
|
|
"mprj_io_dm[44]",
|
|
"mprj_io_dm[74]",
|
|
"mprj_io_dm[50]",
|
|
"mprj_io_dm[80]",
|
|
"mprj_io_dm[56]",
|
|
"mprj_io_dm[62]",
|
|
"mprj_io_dm[68]",
|
|
"mprj_io_dm[47]",
|
|
"mprj_io_dm[77]",
|
|
"mprj_io_dm[53]",
|
|
"mprj_io_dm[59]",
|
|
"mprj_io_dm[65]",
|
|
"mprj_io_slow_sel[13]",
|
|
"mprj_io_slow_sel[9]",
|
|
"mprj_io_slow_sel[0]",
|
|
"mprj_io_slow_sel[2]",
|
|
"mprj_io_slow_sel[4]",
|
|
"mprj_io_slow_sel[10]",
|
|
"mprj_io_slow_sel[6]",
|
|
"mprj_io_slow_sel[12]",
|
|
"mprj_io_slow_sel[8]",
|
|
"mprj_io_slow_sel[1]",
|
|
"mprj_io_slow_sel[3]",
|
|
"mprj_io_slow_sel[5]",
|
|
"mprj_io_slow_sel[11]",
|
|
"mprj_io_slow_sel[7]",
|
|
"mprj_io_slow_sel[23]",
|
|
"mprj_io_slow_sel[14]",
|
|
"mprj_io_slow_sel[24]",
|
|
"mprj_io_slow_sel[16]",
|
|
"mprj_io_slow_sel[26]",
|
|
"mprj_io_slow_sel[18]",
|
|
"mprj_io_slow_sel[20]",
|
|
"mprj_io_slow_sel[22]",
|
|
"mprj_io_slow_sel[15]",
|
|
"mprj_io_slow_sel[25]",
|
|
"mprj_io_slow_sel[17]",
|
|
"mprj_io_slow_sel[19]",
|
|
"mprj_io_slow_sel[21]",
|
|
"mprj_io_vtrip_sel[13]",
|
|
"mprj_io_vtrip_sel[9]",
|
|
"mprj_io_vtrip_sel[0]",
|
|
"mprj_io_vtrip_sel[2]",
|
|
"mprj_io_vtrip_sel[4]",
|
|
"mprj_io_vtrip_sel[10]",
|
|
"mprj_io_vtrip_sel[6]",
|
|
"mprj_io_vtrip_sel[12]",
|
|
"mprj_io_vtrip_sel[8]",
|
|
"mprj_io_vtrip_sel[1]",
|
|
"mprj_io_vtrip_sel[3]",
|
|
"mprj_io_vtrip_sel[5]",
|
|
"mprj_io_vtrip_sel[11]",
|
|
"mprj_io_vtrip_sel[7]",
|
|
"mprj_io_vtrip_sel[23]",
|
|
"mprj_io_vtrip_sel[14]",
|
|
"mprj_io_vtrip_sel[24]",
|
|
"mprj_io_vtrip_sel[16]",
|
|
"mprj_io_vtrip_sel[26]",
|
|
"mprj_io_vtrip_sel[18]",
|
|
"mprj_io_vtrip_sel[20]",
|
|
"mprj_io_vtrip_sel[22]",
|
|
"mprj_io_vtrip_sel[15]",
|
|
"mprj_io_vtrip_sel[25]",
|
|
"mprj_io_vtrip_sel[17]",
|
|
"mprj_io_vtrip_sel[19]",
|
|
"mprj_io_vtrip_sel[21]",
|
|
"mprj_io_ib_mode_sel[13]",
|
|
"mprj_io_ib_mode_sel[9]",
|
|
"mprj_io_ib_mode_sel[0]",
|
|
"mprj_io_ib_mode_sel[2]",
|
|
"mprj_io_ib_mode_sel[4]",
|
|
"mprj_io_ib_mode_sel[10]",
|
|
"mprj_io_ib_mode_sel[6]",
|
|
"mprj_io_ib_mode_sel[12]",
|
|
"mprj_io_ib_mode_sel[8]",
|
|
"mprj_io_ib_mode_sel[1]",
|
|
"mprj_io_ib_mode_sel[3]",
|
|
"mprj_io_ib_mode_sel[5]",
|
|
"mprj_io_ib_mode_sel[11]",
|
|
"mprj_io_ib_mode_sel[7]",
|
|
"mprj_io_ib_mode_sel[23]",
|
|
"mprj_io_ib_mode_sel[14]",
|
|
"mprj_io_ib_mode_sel[24]",
|
|
"mprj_io_ib_mode_sel[16]",
|
|
"mprj_io_ib_mode_sel[26]",
|
|
"mprj_io_ib_mode_sel[18]",
|
|
"mprj_io_ib_mode_sel[20]",
|
|
"mprj_io_ib_mode_sel[22]",
|
|
"mprj_io_ib_mode_sel[15]",
|
|
"mprj_io_ib_mode_sel[25]",
|
|
"mprj_io_ib_mode_sel[17]",
|
|
"mprj_io_ib_mode_sel[19]",
|
|
"mprj_io_ib_mode_sel[21]",
|
|
"por",
|
|
"gpio_inenb_core",
|
|
"mprj_io_inp_dis[13]",
|
|
"mprj_io_inp_dis[9]",
|
|
"mprj_io_inp_dis[0]",
|
|
"mprj_io_inp_dis[2]",
|
|
"mprj_io_inp_dis[4]",
|
|
"mprj_io_inp_dis[10]",
|
|
"mprj_io_inp_dis[6]",
|
|
"mprj_io_inp_dis[12]",
|
|
"mprj_io_inp_dis[8]",
|
|
"mprj_io_inp_dis[1]",
|
|
"mprj_io_inp_dis[3]",
|
|
"mprj_io_inp_dis[5]",
|
|
"mprj_io_inp_dis[11]",
|
|
"mprj_io_inp_dis[7]",
|
|
"mprj_io_inp_dis[23]",
|
|
"mprj_io_inp_dis[14]",
|
|
"mprj_io_inp_dis[24]",
|
|
"mprj_io_inp_dis[16]",
|
|
"mprj_io_inp_dis[26]",
|
|
"mprj_io_inp_dis[18]",
|
|
"mprj_io_inp_dis[20]",
|
|
"mprj_io_inp_dis[22]",
|
|
"mprj_io_inp_dis[15]",
|
|
"mprj_io_inp_dis[25]",
|
|
"mprj_io_inp_dis[17]",
|
|
"mprj_io_inp_dis[19]",
|
|
"mprj_io_inp_dis[21]",
|
|
"(no matching pin)",
|
|
"resetb_core_h",
|
|
"mprj_analog[5]",
|
|
"mprj_analog[4]",
|
|
"mprj_analog[6]",
|
|
"flash_io0_ieb_core",
|
|
"flash_io1_ieb_core",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"(no matching pin)",
|
|
"porb_h"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"mgmt_core_wrapper",
|
|
"mgmt_core_wrapper"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_01v8_hvt", 114718],
|
|
["sky130_fd_pr__nfet_01v8", 114812],
|
|
["sky130_fd_pr__diode_pw2nd_05v5", 8642],
|
|
["I9_sky130_fd_sc_hd__a211oi_2", 11],
|
|
["I9_sky130_fd_sc_hd__dfxtp_2", 825],
|
|
["I9_sky130_fd_sc_hd__or4b_4", 35],
|
|
["I9_sky130_fd_sc_hd__a211oi_4", 6],
|
|
["I9_sky130_fd_sc_hd__dfxtp_4", 420],
|
|
["I9_sky130_fd_sc_hd__or3b_1", 156],
|
|
["I9_sky130_fd_sc_hd__a311oi_4", 29],
|
|
["I9_sky130_fd_sc_hd__mux4_1", 76],
|
|
["I9_sky130_fd_sc_hd__or4b_1", 168],
|
|
["I9_sky130_fd_sc_hd__a211oi_1", 42],
|
|
["I9_sky130_fd_sc_hd__clkinv_16", 6],
|
|
["I9_sky130_fd_sc_hd__or4b_2", 21],
|
|
["I9_sky130_fd_sc_hd__or4bb_1", 9],
|
|
["I9_sky130_fd_sc_hd__a221oi_4", 17],
|
|
["I9_sky130_fd_sc_hd__or2_1", 204],
|
|
["I9_sky130_fd_sc_hd__o211ai_1", 17],
|
|
["I9_sky130_fd_sc_hd__a311oi_1", 29],
|
|
["I9_sky130_fd_sc_hd__or4bb_4", 10],
|
|
["I9_sky130_fd_sc_hd__a2bb2o_4", 5],
|
|
["I9_sky130_fd_sc_hd__mux4_2", 18],
|
|
["I9_sky130_fd_sc_hd__nand4_4", 18],
|
|
["I9_sky130_fd_sc_hd__a31o_4", 17],
|
|
["I9_sky130_fd_sc_hd__and4_4", 32],
|
|
["I9_sky130_fd_sc_hd__a22oi_4", 22],
|
|
["I9_sky130_fd_sc_hd__o22ai_4", 8],
|
|
["I9_sky130_fd_sc_hd__a32oi_2", 4],
|
|
["I9_sky130_fd_sc_hd__o2bb2ai_4", 2],
|
|
["I9_sky130_fd_sc_hd__or3b_2", 11],
|
|
["I9_sky130_fd_sc_hd__or3b_4", 24],
|
|
["I9_sky130_fd_sc_hd__or2_4", 26],
|
|
["I9_sky130_fd_sc_hd__a2bb2o_2", 5],
|
|
["I9_sky130_fd_sc_hd__a22o_4", 47],
|
|
["I9_sky130_fd_sc_hd__o311a_2", 6],
|
|
["I9_sky130_fd_sc_hd__o41ai_4", 2],
|
|
["I9_sky130_fd_sc_hd__a31oi_2", 11],
|
|
["I9_sky130_fd_sc_hd__o311ai_1", 5],
|
|
["I9_sky130_fd_sc_hd__nor4b_1", 2],
|
|
["I9_sky130_fd_sc_hd__o22ai_1", 6],
|
|
["I9_sky130_fd_sc_hd__o21bai_4", 2],
|
|
["I9_sky130_fd_sc_hd__a22oi_1", 24],
|
|
["I9_sky130_fd_sc_hd__o2111ai_4", 13],
|
|
["I9_sky130_fd_sc_hd__a21bo_2", 1],
|
|
["I9_sky130_fd_sc_hd__a41o_4", 2],
|
|
["I9_sky130_fd_sc_hd__o311ai_4", 6],
|
|
["I9_sky130_fd_sc_hd__a22oi_2", 8],
|
|
["I9_sky130_fd_sc_hd__o221ai_4", 12],
|
|
["I9_sky130_fd_sc_hd__o2bb2a_4", 4],
|
|
["I9_sky130_fd_sc_hd__a32o_4", 8],
|
|
["I9_sky130_fd_sc_hd__a311o_2", 6],
|
|
["I9_sky130_fd_sc_hd__a311o_4", 5],
|
|
["I9_sky130_fd_sc_hd__o41a_4", 11],
|
|
["I9_sky130_fd_sc_hd__o21bai_2", 5],
|
|
["I9_sky130_fd_sc_hd__o41a_2", 9],
|
|
["sky130_fd_pr__res_generic_po", 13],
|
|
["I9_sky130_fd_sc_hd__xor2_4", 6],
|
|
["I9_sky130_fd_sc_hd__o211ai_2", 8],
|
|
["I9_sky130_fd_sc_hd__o22a_4", 3],
|
|
["I9_sky130_fd_sc_hd__a2bb2oi_2", 1],
|
|
["I9_sky130_fd_sc_hd__a2bb2oi_4", 1],
|
|
["I9_sky130_fd_sc_hd__a41o_2", 4],
|
|
["I9_sky130_fd_sc_hd__o221ai_1", 8],
|
|
["I9_sky130_fd_sc_hd__a221oi_2", 7],
|
|
["I9_sky130_fd_sc_hd__a41oi_2", 2],
|
|
["I9_sky130_fd_sc_hd__o22ai_2", 1],
|
|
["I9_sky130_fd_sc_hd__a2bb2oi_1", 3],
|
|
["I9_sky130_fd_sc_hd__nor4b_4", 5],
|
|
["I9_sky130_fd_sc_hd__o32ai_1", 1],
|
|
["I9_sky130_fd_sc_hd__and4bb_4", 14],
|
|
["I9_sky130_fd_sc_hd__nor3b_4", 2],
|
|
["I9_sky130_fd_sc_hd__o32ai_2", 1],
|
|
["I9_RAM128", 1],
|
|
["I9_sky130_fd_sc_hd__xnor2_4", 5],
|
|
["I9_sky130_fd_sc_hd__a2111oi_4", 1],
|
|
["I9_sky130_fd_sc_hd__o2111a_4", 1],
|
|
["I9_sky130_fd_sc_hd__o211a_4", 5],
|
|
["I9_sky130_fd_sc_hd__o41ai_1", 5],
|
|
["I9_sky130_fd_sc_hd__o31ai_4", 6],
|
|
["I9_sky130_fd_sc_hd__a32oi_4", 2],
|
|
["I9_sky130_fd_sc_hd__or4bb_2", 1],
|
|
["I9_sky130_fd_sc_hd__o311a_4", 2],
|
|
["I9_sky130_fd_sc_hd__a32oi_1", 1],
|
|
["I9_sky130_fd_sc_hd__a21boi_4", 1],
|
|
["I9_RAM256", 1],
|
|
["I9_sky130_fd_sc_hd__o2bb2ai_2", 3],
|
|
["I9_sky130_fd_sc_hd__a2111oi_2", 3],
|
|
["I9_sky130_fd_sc_hd__o311ai_2", 1],
|
|
["I9_sky130_fd_sc_hd__o32ai_4", 1],
|
|
["I9_sky130_fd_sc_hd__a41oi_4", 1 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_01v8_hvt", 114718 ],
|
|
["sky130_fd_pr__nfet_01v8", 114812 ],
|
|
["sky130_fd_pr__diode_pw2nd_05v5", 8642 ],
|
|
["sky130_fd_sc_hd__a211oi_2", 11 ],
|
|
["sky130_fd_sc_hd__dfxtp_2", 825 ],
|
|
["sky130_fd_sc_hd__or4b_4", 35 ],
|
|
["sky130_fd_sc_hd__a211oi_4", 6 ],
|
|
["sky130_fd_sc_hd__dfxtp_4", 420 ],
|
|
["sky130_fd_sc_hd__or3b_1", 156 ],
|
|
["sky130_fd_sc_hd__a311oi_4", 29 ],
|
|
["sky130_fd_sc_hd__mux4_1", 76 ],
|
|
["sky130_fd_sc_hd__or4b_1", 168 ],
|
|
["sky130_fd_sc_hd__a211oi_1", 42 ],
|
|
["sky130_fd_sc_hd__clkinv_16", 6 ],
|
|
["sky130_fd_sc_hd__or4b_2", 21 ],
|
|
["sky130_fd_sc_hd__or4bb_1", 9 ],
|
|
["sky130_fd_sc_hd__a221oi_4", 17 ],
|
|
["sky130_fd_sc_hd__or2_1", 204 ],
|
|
["sky130_fd_sc_hd__o211ai_1", 17 ],
|
|
["sky130_fd_sc_hd__a311oi_1", 29 ],
|
|
["sky130_fd_sc_hd__or4bb_4", 10 ],
|
|
["sky130_fd_sc_hd__a2bb2o_4", 5 ],
|
|
["sky130_fd_sc_hd__mux4_2", 18 ],
|
|
["sky130_fd_sc_hd__nand4_4", 18 ],
|
|
["sky130_fd_sc_hd__a31o_4", 17 ],
|
|
["sky130_fd_sc_hd__and4_4", 32 ],
|
|
["sky130_fd_sc_hd__a22oi_4", 22 ],
|
|
["sky130_fd_sc_hd__o22ai_4", 8 ],
|
|
["sky130_fd_sc_hd__a32oi_2", 4 ],
|
|
["sky130_fd_sc_hd__o2bb2ai_4", 2 ],
|
|
["sky130_fd_sc_hd__or3b_2", 11 ],
|
|
["sky130_fd_sc_hd__or3b_4", 24 ],
|
|
["sky130_fd_sc_hd__or2_4", 26 ],
|
|
["sky130_fd_sc_hd__a2bb2o_2", 5 ],
|
|
["sky130_fd_sc_hd__a22o_4", 47 ],
|
|
["sky130_fd_sc_hd__o311a_2", 6 ],
|
|
["sky130_fd_sc_hd__o41ai_4", 2 ],
|
|
["sky130_fd_sc_hd__a31oi_2", 11 ],
|
|
["sky130_fd_sc_hd__o311ai_1", 5 ],
|
|
["sky130_fd_sc_hd__nor4b_1", 2 ],
|
|
["sky130_fd_sc_hd__o22ai_1", 6 ],
|
|
["sky130_fd_sc_hd__o21bai_4", 2 ],
|
|
["sky130_fd_sc_hd__a22oi_1", 24 ],
|
|
["sky130_fd_sc_hd__o2111ai_4", 13 ],
|
|
["sky130_fd_sc_hd__a21bo_2", 1 ],
|
|
["sky130_fd_sc_hd__a41o_4", 2 ],
|
|
["sky130_fd_sc_hd__o311ai_4", 6 ],
|
|
["sky130_fd_sc_hd__a22oi_2", 8 ],
|
|
["sky130_fd_sc_hd__o221ai_4", 12 ],
|
|
["sky130_fd_sc_hd__o2bb2a_4", 4 ],
|
|
["sky130_fd_sc_hd__a32o_4", 8 ],
|
|
["sky130_fd_sc_hd__a311o_2", 6 ],
|
|
["sky130_fd_sc_hd__a311o_4", 5 ],
|
|
["sky130_fd_sc_hd__o41a_4", 11 ],
|
|
["sky130_fd_sc_hd__o21bai_2", 5 ],
|
|
["sky130_fd_sc_hd__o41a_2", 9 ],
|
|
["sky130_fd_pr__res_generic_po", 13 ],
|
|
["sky130_fd_sc_hd__xor2_4", 6 ],
|
|
["sky130_fd_sc_hd__o211ai_2", 8 ],
|
|
["sky130_fd_sc_hd__o22a_4", 3 ],
|
|
["sky130_fd_sc_hd__a2bb2oi_2", 1 ],
|
|
["sky130_fd_sc_hd__a2bb2oi_4", 1 ],
|
|
["sky130_fd_sc_hd__a41o_2", 4 ],
|
|
["sky130_fd_sc_hd__o221ai_1", 8 ],
|
|
["sky130_fd_sc_hd__a221oi_2", 7 ],
|
|
["sky130_fd_sc_hd__a41oi_2", 2 ],
|
|
["sky130_fd_sc_hd__o22ai_2", 1 ],
|
|
["sky130_fd_sc_hd__a2bb2oi_1", 3 ],
|
|
["sky130_fd_sc_hd__nor4b_4", 5 ],
|
|
["sky130_fd_sc_hd__o32ai_1", 1 ],
|
|
["sky130_fd_sc_hd__and4bb_4", 14 ],
|
|
["sky130_fd_sc_hd__nor3b_4", 2 ],
|
|
["sky130_fd_sc_hd__o32ai_2", 1 ],
|
|
["RAM128", 1 ],
|
|
["sky130_fd_sc_hd__xnor2_4", 5 ],
|
|
["sky130_fd_sc_hd__a2111oi_4", 1 ],
|
|
["sky130_fd_sc_hd__o2111a_4", 1 ],
|
|
["sky130_fd_sc_hd__o211a_4", 5 ],
|
|
["sky130_fd_sc_hd__o41ai_1", 5 ],
|
|
["sky130_fd_sc_hd__o31ai_4", 6 ],
|
|
["sky130_fd_sc_hd__a32oi_4", 2 ],
|
|
["sky130_fd_sc_hd__or4bb_2", 1 ],
|
|
["sky130_fd_sc_hd__o311a_4", 2 ],
|
|
["sky130_fd_sc_hd__a32oi_1", 1 ],
|
|
["sky130_fd_sc_hd__a21boi_4", 1 ],
|
|
["RAM256", 1 ],
|
|
["sky130_fd_sc_hd__o2bb2ai_2", 3 ],
|
|
["sky130_fd_sc_hd__a2111oi_2", 3 ],
|
|
["sky130_fd_sc_hd__o311ai_2", 1 ],
|
|
["sky130_fd_sc_hd__o32ai_4", 1 ],
|
|
["sky130_fd_sc_hd__a41oi_4", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
120851,
|
|
120851
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"debug_out",
|
|
"trap",
|
|
"qspi_enabled",
|
|
"mprj_adr_o[1]",
|
|
"mprj_adr_o[0]",
|
|
"flash_io3_do",
|
|
"flash_io2_do",
|
|
"flash_io1_do",
|
|
"flash_io3_oeb",
|
|
"flash_io2_oeb",
|
|
"flash_io1_oeb",
|
|
"la_input[22]",
|
|
"la_input[119]",
|
|
"mprj_dat_i[6]",
|
|
"mprj_dat_i[4]",
|
|
"mprj_dat_i[17]",
|
|
"mprj_dat_i[20]",
|
|
"mprj_dat_i[16]",
|
|
"mprj_dat_i[13]",
|
|
"rstb_l_in",
|
|
"core_clk",
|
|
"la_input[83]",
|
|
"la_input[49]",
|
|
"la_input[48]",
|
|
"la_input[29]",
|
|
"la_input[17]",
|
|
"la_input[15]",
|
|
"la_input[14]",
|
|
"la_input[122]",
|
|
"la_input[117]",
|
|
"la_input[31]",
|
|
"la_input[10]",
|
|
"la_input[104]",
|
|
"la_input[6]",
|
|
"la_input[2]",
|
|
"la_input[102]",
|
|
"irq[0]",
|
|
"mprj_dat_i[2]",
|
|
"mprj_dat_i[1]",
|
|
"mprj_dat_i[18]",
|
|
"mprj_dat_i[9]",
|
|
"mprj_dat_i[8]",
|
|
"mprj_dat_i[5]",
|
|
"mprj_dat_i[7]",
|
|
"mprj_dat_i[3]",
|
|
"mprj_dat_i[30]",
|
|
"mprj_dat_i[29]",
|
|
"mprj_dat_i[31]",
|
|
"mprj_dat_i[15]",
|
|
"mprj_dat_i[19]",
|
|
"mprj_dat_i[25]",
|
|
"mprj_dat_i[0]",
|
|
"mprj_dat_i[24]",
|
|
"mprj_dat_i[21]",
|
|
"mprj_dat_i[28]",
|
|
"mprj_dat_i[27]",
|
|
"mprj_dat_i[26]",
|
|
"mprj_dat_i[23]",
|
|
"mprj_dat_i[22]",
|
|
"mprj_ack_i",
|
|
"ser_rx",
|
|
"la_input[95]",
|
|
"la_input[93]",
|
|
"la_input[92]",
|
|
"la_input[90]",
|
|
"la_input[89]",
|
|
"la_input[86]",
|
|
"la_input[84]",
|
|
"la_input[82]",
|
|
"la_input[57]",
|
|
"la_input[54]",
|
|
"la_input[4]",
|
|
"la_input[46]",
|
|
"la_input[37]",
|
|
"la_input[35]",
|
|
"la_input[21]",
|
|
"la_input[65]",
|
|
"la_input[8]",
|
|
"la_input[68]",
|
|
"la_input[20]",
|
|
"la_input[16]",
|
|
"la_input[66]",
|
|
"la_input[60]",
|
|
"la_input[53]",
|
|
"la_input[12]",
|
|
"la_input[126]",
|
|
"la_input[42]",
|
|
"la_input[45]",
|
|
"la_input[99]",
|
|
"la_input[124]",
|
|
"la_input[91]",
|
|
"la_input[120]",
|
|
"la_input[110]",
|
|
"la_input[19]",
|
|
"la_input[36]",
|
|
"la_input[105]",
|
|
"la_input[101]",
|
|
"la_input[67]",
|
|
"la_input[56]",
|
|
"la_input[85]",
|
|
"irq[2]",
|
|
"la_input[115]",
|
|
"irq[1]",
|
|
"la_input[118]",
|
|
"la_input[94]",
|
|
"la_input[127]",
|
|
"la_input[125]",
|
|
"irq[3]",
|
|
"la_input[44]",
|
|
"serial_resetn_in",
|
|
"resetn_in",
|
|
"clk_in",
|
|
"por_l_in",
|
|
"spi_sdi",
|
|
"gpio_in_pad",
|
|
"serial_clock_in",
|
|
"serial_load_in",
|
|
"serial_data_2_in",
|
|
"porb_h_in",
|
|
"la_input[98]",
|
|
"la_input[97]",
|
|
"la_input[96]",
|
|
"la_input[32]",
|
|
"la_input[27]",
|
|
"la_input[24]",
|
|
"flash_io1_di",
|
|
"mprj_dat_i[14]",
|
|
"mprj_dat_i[12]",
|
|
"mprj_dat_i[11]",
|
|
"mprj_dat_i[10]",
|
|
"la_input[47]",
|
|
"la_input[18]",
|
|
"la_input[121]",
|
|
"la_input[114]",
|
|
"la_input[111]",
|
|
"la_input[0]",
|
|
"la_input[106]",
|
|
"la_input[109]",
|
|
"core_rstn",
|
|
"debug_in",
|
|
"la_input[116]",
|
|
"irq[4]",
|
|
"irq[5]",
|
|
"la_input[123]",
|
|
"la_input[1]",
|
|
"la_input[81]",
|
|
"hk_dat_i[29]",
|
|
"hk_dat_i[8]",
|
|
"hk_dat_i[15]",
|
|
"hk_ack_i",
|
|
"hk_dat_i[4]",
|
|
"hk_dat_i[3]",
|
|
"hk_dat_i[14]",
|
|
"hk_dat_i[10]",
|
|
"hk_dat_i[11]",
|
|
"hk_dat_i[12]",
|
|
"hk_dat_i[27]",
|
|
"hk_dat_i[26]",
|
|
"hk_dat_i[24]",
|
|
"hk_dat_i[25]",
|
|
"hk_dat_i[28]",
|
|
"hk_dat_i[16]",
|
|
"hk_dat_i[18]",
|
|
"hk_dat_i[30]",
|
|
"hk_dat_i[31]",
|
|
"hk_dat_i[13]",
|
|
"la_input[3]",
|
|
"hk_dat_i[9]",
|
|
"hk_dat_i[1]",
|
|
"hk_dat_i[2]",
|
|
"hk_dat_i[5]",
|
|
"hk_dat_i[6]",
|
|
"hk_dat_i[0]",
|
|
"hk_dat_i[7]",
|
|
"hk_dat_i[21]",
|
|
"hk_dat_i[19]",
|
|
"hk_dat_i[23]",
|
|
"hk_dat_i[22]",
|
|
"hk_dat_i[17]",
|
|
"hk_dat_i[20]",
|
|
"la_input[9]",
|
|
"la_input[72]",
|
|
"la_input[71]",
|
|
"la_input[76]",
|
|
"la_input[75]",
|
|
"la_input[74]",
|
|
"la_input[73]",
|
|
"la_input[70]",
|
|
"la_input[69]",
|
|
"la_input[64]",
|
|
"la_input[63]",
|
|
"la_input[7]",
|
|
"la_input[5]",
|
|
"la_input[80]",
|
|
"la_input[61]",
|
|
"la_input[62]",
|
|
"la_input[59]",
|
|
"la_input[79]",
|
|
"la_input[88]",
|
|
"la_input[58]",
|
|
"la_input[87]",
|
|
"la_input[77]",
|
|
"la_input[52]",
|
|
"la_input[50]",
|
|
"la_input[55]",
|
|
"la_input[78]",
|
|
"la_input[43]",
|
|
"la_input[40]",
|
|
"la_input[39]",
|
|
"la_input[38]",
|
|
"la_input[33]",
|
|
"la_input[23]",
|
|
"la_input[51]",
|
|
"la_input[13]",
|
|
"la_input[30]",
|
|
"la_input[28]",
|
|
"la_input[26]",
|
|
"la_input[41]",
|
|
"la_input[11]",
|
|
"la_input[34]",
|
|
"la_input[113]",
|
|
"la_input[107]",
|
|
"la_input[25]",
|
|
"la_input[112]",
|
|
"la_input[108]",
|
|
"la_input[103]",
|
|
"la_input[100]",
|
|
"mprj_adr_o[11]",
|
|
"mprj_adr_o[20]",
|
|
"mprj_adr_o[8]",
|
|
"mprj_adr_o[27]",
|
|
"mprj_adr_o[21]",
|
|
"mprj_adr_o[16]",
|
|
"mprj_adr_o[7]",
|
|
"mprj_adr_o[31]",
|
|
"mprj_adr_o[30]",
|
|
"mprj_adr_o[28]",
|
|
"mprj_adr_o[29]",
|
|
"mprj_adr_o[26]",
|
|
"mprj_we_o",
|
|
"la_output[84]",
|
|
"la_output[113]",
|
|
"mprj_adr_o[15]",
|
|
"mprj_adr_o[14]",
|
|
"mprj_adr_o[25]",
|
|
"mprj_adr_o[13]",
|
|
"mprj_adr_o[9]",
|
|
"mprj_adr_o[3]",
|
|
"mprj_adr_o[2]",
|
|
"mprj_adr_o[23]",
|
|
"mprj_adr_o[22]",
|
|
"mprj_adr_o[19]",
|
|
"mprj_adr_o[17]",
|
|
"la_output[7]",
|
|
"la_output[51]",
|
|
"la_output[17]",
|
|
"la_output[123]",
|
|
"mprj_adr_o[24]",
|
|
"mprj_adr_o[12]",
|
|
"mprj_dat_o[19]",
|
|
"mprj_dat_o[18]",
|
|
"mprj_dat_o[16]",
|
|
"mprj_dat_o[2]",
|
|
"mprj_dat_o[1]",
|
|
"mprj_dat_o[15]",
|
|
"mprj_adr_o[6]",
|
|
"spi_csb",
|
|
"mprj_adr_o[5]",
|
|
"mprj_adr_o[18]",
|
|
"mprj_adr_o[10]",
|
|
"la_output[99]",
|
|
"la_output[93]",
|
|
"la_output[92]",
|
|
"la_output[82]",
|
|
"la_output[79]",
|
|
"la_output[74]",
|
|
"la_output[73]",
|
|
"la_output[72]",
|
|
"la_output[71]",
|
|
"la_output[70]",
|
|
"la_output[65]",
|
|
"la_output[55]",
|
|
"la_output[39]",
|
|
"la_output[35]",
|
|
"la_output[42]",
|
|
"la_output[8]",
|
|
"la_output[10]",
|
|
"la_output[4]",
|
|
"mprj_wb_iena",
|
|
"la_output[97]",
|
|
"la_output[96]",
|
|
"la_output[95]",
|
|
"la_output[94]",
|
|
"la_output[91]",
|
|
"la_output[90]",
|
|
"la_output[88]",
|
|
"la_output[89]",
|
|
"la_output[78]",
|
|
"la_output[77]",
|
|
"la_output[76]",
|
|
"la_output[87]",
|
|
"la_output[85]",
|
|
"la_output[75]",
|
|
"la_output[83]",
|
|
"la_output[81]",
|
|
"la_output[6]",
|
|
"la_output[69]",
|
|
"la_output[67]",
|
|
"la_output[66]",
|
|
"la_output[64]",
|
|
"la_output[63]",
|
|
"la_output[62]",
|
|
"la_output[59]",
|
|
"la_output[58]",
|
|
"la_output[57]",
|
|
"la_output[56]",
|
|
"la_output[60]",
|
|
"la_output[50]",
|
|
"la_output[53]",
|
|
"la_output[52]",
|
|
"la_output[49]",
|
|
"la_output[47]",
|
|
"la_output[46]",
|
|
"la_output[61]",
|
|
"la_output[86]",
|
|
"la_output[45]",
|
|
"la_output[80]",
|
|
"la_output[43]",
|
|
"la_output[41]",
|
|
"la_output[68]",
|
|
"la_output[5]",
|
|
"la_output[3]",
|
|
"la_output[38]",
|
|
"la_output[37]",
|
|
"la_output[34]",
|
|
"la_output[33]",
|
|
"la_output[32]",
|
|
"la_output[40]",
|
|
"la_output[30]",
|
|
"la_output[2]",
|
|
"la_output[36]",
|
|
"la_output[25]",
|
|
"la_output[22]",
|
|
"la_output[31]",
|
|
"la_output[20]",
|
|
"la_output[28]",
|
|
"la_output[44]",
|
|
"la_output[1]",
|
|
"la_output[54]",
|
|
"la_output[14]",
|
|
"la_output[27]",
|
|
"la_output[26]",
|
|
"la_output[24]",
|
|
"la_output[13]",
|
|
"la_output[48]",
|
|
"la_output[9]",
|
|
"la_output[11]",
|
|
"la_output[23]",
|
|
"la_output[21]",
|
|
"la_output[29]",
|
|
"la_output[19]",
|
|
"la_output[18]",
|
|
"la_output[16]",
|
|
"la_output[15]",
|
|
"la_output[110]",
|
|
"la_output[109]",
|
|
"la_output[108]",
|
|
"la_output[107]",
|
|
"la_output[106]",
|
|
"la_output[98]",
|
|
"la_output[105]",
|
|
"la_output[104]",
|
|
"la_output[111]",
|
|
"la_output[103]",
|
|
"la_output[102]",
|
|
"la_output[101]",
|
|
"la_output[100]",
|
|
"la_output[0]",
|
|
"la_output[12]",
|
|
"uart_enabled",
|
|
"mprj_cyc_o",
|
|
"la_oenb[61]",
|
|
"la_oenb[60]",
|
|
"la_oenb[32]",
|
|
"la_oenb[125]",
|
|
"la_iena[37]",
|
|
"la_iena[122]",
|
|
"la_iena[127]",
|
|
"la_iena[116]",
|
|
"la_iena[14]",
|
|
"la_iena[10]",
|
|
"la_iena[0]",
|
|
"la_iena[13]",
|
|
"la_oenb[90]",
|
|
"la_iena[30]",
|
|
"la_oenb[100]",
|
|
"la_oenb[10]",
|
|
"la_iena[8]",
|
|
"la_oenb[127]",
|
|
"la_oenb[117]",
|
|
"la_oenb[126]",
|
|
"la_oenb[116]",
|
|
"la_oenb[122]",
|
|
"la_oenb[120]",
|
|
"la_oenb[14]",
|
|
"la_iena[107]",
|
|
"la_iena[126]",
|
|
"la_oenb[39]",
|
|
"la_iena[125]",
|
|
"la_iena[115]",
|
|
"la_iena[105]",
|
|
"la_oenb[38]",
|
|
"la_oenb[47]",
|
|
"la_oenb[58]",
|
|
"la_oenb[57]",
|
|
"la_oenb[41]",
|
|
"la_oenb[37]",
|
|
"la_iena[124]",
|
|
"la_iena[113]",
|
|
"la_iena[103]",
|
|
"la_oenb[56]",
|
|
"la_oenb[35]",
|
|
"la_iena[36]",
|
|
"la_oenb[54]",
|
|
"la_oenb[53]",
|
|
"la_oenb[45]",
|
|
"la_oenb[43]",
|
|
"la_oenb[62]",
|
|
"la_oenb[52]",
|
|
"la_oenb[50]",
|
|
"la_oenb[36]",
|
|
"la_oenb[34]",
|
|
"la_oenb[33]",
|
|
"spi_enabled",
|
|
"mprj_sel_o[0]",
|
|
"mprj_dat_o[20]",
|
|
"mprj_dat_o[29]",
|
|
"mprj_dat_o[22]",
|
|
"mprj_dat_o[17]",
|
|
"mprj_dat_o[24]",
|
|
"mprj_dat_o[21]",
|
|
"mprj_sel_o[2]",
|
|
"mprj_dat_o[30]",
|
|
"la_output[112]",
|
|
"mprj_stb_o",
|
|
"hk_stb_o",
|
|
"user_irq_ena[2]",
|
|
"user_irq_ena[1]",
|
|
"user_irq_ena[0]",
|
|
"mprj_sel_o[3]",
|
|
"mprj_sel_o[1]",
|
|
"mprj_dat_o[5]",
|
|
"gpio_out_pad",
|
|
"gpio_mode0_pad",
|
|
"debug_oeb",
|
|
"debug_mode",
|
|
"mprj_dat_o[9]",
|
|
"mprj_dat_o[8]",
|
|
"mprj_dat_o[7]",
|
|
"mprj_dat_o[6]",
|
|
"mprj_dat_o[4]",
|
|
"mprj_dat_o[3]",
|
|
"mprj_dat_o[28]",
|
|
"mprj_dat_o[25]",
|
|
"mprj_dat_o[26]",
|
|
"mprj_dat_o[27]",
|
|
"mprj_dat_o[23]",
|
|
"mprj_dat_o[14]",
|
|
"mprj_dat_o[13]",
|
|
"mprj_dat_o[12]",
|
|
"mprj_dat_o[11]",
|
|
"mprj_dat_o[10]",
|
|
"mprj_dat_o[0]",
|
|
"la_output[119]",
|
|
"la_output[126]",
|
|
"la_output[124]",
|
|
"la_output[120]",
|
|
"spi_sdo",
|
|
"rstb_l_out",
|
|
"porb_h_out",
|
|
"spi_sck",
|
|
"serial_resetn_out",
|
|
"serial_clock_out",
|
|
"serial_load_out",
|
|
"serial_data_2_out",
|
|
"la_output[125]",
|
|
"la_output[118]",
|
|
"la_output[117]",
|
|
"la_output[115]",
|
|
"la_output[114]",
|
|
"la_output[127]",
|
|
"la_output[121]",
|
|
"la_output[116]",
|
|
"la_output[122]",
|
|
"mprj_dat_o[31]",
|
|
"mprj_adr_o[4]",
|
|
"hk_cyc_o",
|
|
"la_oenb[55]",
|
|
"gpio_outenb_pad",
|
|
"gpio_mode1_pad",
|
|
"ser_tx",
|
|
"la_oenb[59]",
|
|
"la_oenb[49]",
|
|
"gpio_inenb_pad",
|
|
"la_oenb[63]",
|
|
"la_oenb[51]",
|
|
"la_oenb[31]",
|
|
"la_oenb[40]",
|
|
"la_iena[7]",
|
|
"la_oenb[6]",
|
|
"la_oenb[5]",
|
|
"la_oenb[3]",
|
|
"la_oenb[19]",
|
|
"la_oenb[9]",
|
|
"la_oenb[11]",
|
|
"la_oenb[96]",
|
|
"la_oenb[101]",
|
|
"la_iena[106]",
|
|
"la_oenb[82]",
|
|
"la_oenb[69]",
|
|
"la_oenb[67]",
|
|
"la_iena[94]",
|
|
"la_iena[83]",
|
|
"la_iena[78]",
|
|
"la_iena[66]",
|
|
"la_iena[62]",
|
|
"la_iena[61]",
|
|
"la_iena[58]",
|
|
"la_iena[56]",
|
|
"la_iena[55]",
|
|
"la_iena[46]",
|
|
"la_iena[44]",
|
|
"la_iena[43]",
|
|
"la_iena[41]",
|
|
"la_iena[40]",
|
|
"la_iena[23]",
|
|
"la_iena[18]",
|
|
"la_iena[45]",
|
|
"la_oenb[94]",
|
|
"la_oenb[87]",
|
|
"la_oenb[28]",
|
|
"la_oenb[18]",
|
|
"la_iena[15]",
|
|
"la_iena[11]",
|
|
"la_oenb[91]",
|
|
"la_iena[118]",
|
|
"la_oenb[70]",
|
|
"la_oenb[89]",
|
|
"la_oenb[79]",
|
|
"spi_sdoenb",
|
|
"la_iena[65]",
|
|
"la_iena[74]",
|
|
"la_iena[73]",
|
|
"la_iena[72]",
|
|
"la_iena[70]",
|
|
"la_oenb[118]",
|
|
"la_oenb[108]",
|
|
"la_oenb[124]",
|
|
"la_iena[84]",
|
|
"la_oenb[112]",
|
|
"la_iena[108]",
|
|
"la_oenb[2]",
|
|
"la_iena[123]",
|
|
"la_iena[112]",
|
|
"la_iena[102]",
|
|
"la_oenb[85]",
|
|
"la_iena[121]",
|
|
"la_iena[111]",
|
|
"la_oenb[88]",
|
|
"la_oenb[84]",
|
|
"la_iena[120]",
|
|
"la_oenb[92]",
|
|
"la_oenb[72]",
|
|
"la_oenb[22]",
|
|
"la_iena[109]",
|
|
"la_iena[24]",
|
|
"la_iena[12]",
|
|
"la_oenb[80]",
|
|
"la_iena[31]",
|
|
"la_iena[22]",
|
|
"la_iena[34]",
|
|
"la_iena[21]",
|
|
"la_oenb[8]",
|
|
"la_oenb[7]",
|
|
"la_oenb[4]",
|
|
"la_iena[3]",
|
|
"la_iena[2]",
|
|
"la_oenb[98]",
|
|
"la_oenb[78]",
|
|
"la_oenb[95]",
|
|
"la_iena[63]",
|
|
"la_iena[82]",
|
|
"la_iena[52]",
|
|
"la_iena[81]",
|
|
"la_iena[71]",
|
|
"la_oenb[0]",
|
|
"la_iena[80]",
|
|
"la_iena[60]",
|
|
"la_iena[50]",
|
|
"la_iena[9]",
|
|
"la_iena[6]",
|
|
"la_iena[5]",
|
|
"la_iena[4]",
|
|
"la_oenb[12]",
|
|
"la_iena[99]",
|
|
"la_iena[79]",
|
|
"la_iena[69]",
|
|
"la_iena[59]",
|
|
"la_iena[49]",
|
|
"la_iena[32]",
|
|
"la_oenb[21]",
|
|
"la_oenb[107]",
|
|
"la_oenb[109]",
|
|
"la_iena[97]",
|
|
"la_iena[77]",
|
|
"la_oenb[1]",
|
|
"la_oenb[115]",
|
|
"la_iena[86]",
|
|
"la_oenb[104]",
|
|
"la_iena[98]",
|
|
"la_iena[75]",
|
|
"la_oenb[123]",
|
|
"la_oenb[114]",
|
|
"la_oenb[113]",
|
|
"la_oenb[106]",
|
|
"la_oenb[103]",
|
|
"la_iena[93]",
|
|
"la_iena[92]",
|
|
"la_oenb[16]",
|
|
"la_oenb[121]",
|
|
"la_oenb[111]",
|
|
"la_oenb[15]",
|
|
"la_oenb[110]",
|
|
"la_oenb[13]",
|
|
"la_oenb[30]",
|
|
"la_oenb[97]",
|
|
"la_iena[96]",
|
|
"la_iena[117]",
|
|
"la_iena[29]",
|
|
"la_oenb[119]",
|
|
"la_iena[104]",
|
|
"la_iena[28]",
|
|
"la_oenb[76]",
|
|
"la_oenb[46]",
|
|
"la_iena[47]",
|
|
"la_iena[33]",
|
|
"la_oenb[25]",
|
|
"la_iena[95]",
|
|
"la_iena[91]",
|
|
"la_iena[89]",
|
|
"la_iena[90]",
|
|
"la_iena[88]",
|
|
"la_iena[87]",
|
|
"la_iena[85]",
|
|
"la_iena[76]",
|
|
"la_iena[68]",
|
|
"la_iena[64]",
|
|
"la_iena[67]",
|
|
"la_iena[57]",
|
|
"la_iena[54]",
|
|
"la_iena[53]",
|
|
"la_iena[51]",
|
|
"la_iena[48]",
|
|
"la_iena[42]",
|
|
"la_iena[39]",
|
|
"la_iena[38]",
|
|
"la_iena[27]",
|
|
"la_iena[26]",
|
|
"la_iena[20]",
|
|
"la_iena[16]",
|
|
"la_oenb[105]",
|
|
"la_iena[101]",
|
|
"la_oenb[44]",
|
|
"la_oenb[42]",
|
|
"la_oenb[29]",
|
|
"la_oenb[24]",
|
|
"la_oenb[17]",
|
|
"la_iena[35]",
|
|
"la_iena[25]",
|
|
"la_iena[119]",
|
|
"la_iena[114]",
|
|
"la_iena[110]",
|
|
"la_iena[1]",
|
|
"la_iena[100]",
|
|
"la_oenb[93]",
|
|
"la_oenb[81]",
|
|
"la_oenb[83]",
|
|
"la_oenb[77]",
|
|
"la_oenb[75]",
|
|
"la_oenb[74]",
|
|
"la_oenb[73]",
|
|
"la_oenb[71]",
|
|
"la_oenb[66]",
|
|
"la_oenb[68]",
|
|
"la_oenb[65]",
|
|
"la_oenb[64]",
|
|
"la_oenb[86]",
|
|
"la_oenb[48]",
|
|
"la_oenb[27]",
|
|
"la_oenb[26]",
|
|
"la_oenb[23]",
|
|
"la_oenb[20]",
|
|
"la_iena[19]",
|
|
"la_iena[17]",
|
|
"la_oenb[99]",
|
|
"la_oenb[102]",
|
|
"flash_io0_oeb",
|
|
"flash_io0_do",
|
|
"flash_csb",
|
|
"flash_clk",
|
|
"por_l_out",
|
|
"resetn_out",
|
|
"clk_out",
|
|
"VGND",
|
|
"VPWR",
|
|
"flash_io0_di",
|
|
"flash_io2_di",
|
|
"flash_io3_di"
|
|
], [
|
|
"debug_out",
|
|
"trap",
|
|
"qspi_enabled",
|
|
"mprj_adr_o[1]",
|
|
"mprj_adr_o[0]",
|
|
"flash_io3_do",
|
|
"flash_io2_do",
|
|
"flash_io1_do",
|
|
"flash_io3_oeb",
|
|
"flash_io2_oeb",
|
|
"flash_io1_oeb",
|
|
"la_input[22]",
|
|
"la_input[119]",
|
|
"mprj_dat_i[6]",
|
|
"mprj_dat_i[4]",
|
|
"mprj_dat_i[17]",
|
|
"mprj_dat_i[20]",
|
|
"mprj_dat_i[16]",
|
|
"mprj_dat_i[13]",
|
|
"rstb_l_in",
|
|
"core_clk",
|
|
"la_input[83]",
|
|
"la_input[49]",
|
|
"la_input[48]",
|
|
"la_input[29]",
|
|
"la_input[17]",
|
|
"la_input[15]",
|
|
"la_input[14]",
|
|
"la_input[122]",
|
|
"la_input[117]",
|
|
"la_input[31]",
|
|
"la_input[10]",
|
|
"la_input[104]",
|
|
"la_input[6]",
|
|
"la_input[2]",
|
|
"la_input[102]",
|
|
"irq[0]",
|
|
"mprj_dat_i[2]",
|
|
"mprj_dat_i[1]",
|
|
"mprj_dat_i[18]",
|
|
"mprj_dat_i[9]",
|
|
"mprj_dat_i[8]",
|
|
"mprj_dat_i[5]",
|
|
"mprj_dat_i[7]",
|
|
"mprj_dat_i[3]",
|
|
"mprj_dat_i[30]",
|
|
"mprj_dat_i[29]",
|
|
"mprj_dat_i[31]",
|
|
"mprj_dat_i[15]",
|
|
"mprj_dat_i[19]",
|
|
"mprj_dat_i[25]",
|
|
"mprj_dat_i[0]",
|
|
"mprj_dat_i[24]",
|
|
"mprj_dat_i[21]",
|
|
"mprj_dat_i[28]",
|
|
"mprj_dat_i[27]",
|
|
"mprj_dat_i[26]",
|
|
"mprj_dat_i[23]",
|
|
"mprj_dat_i[22]",
|
|
"mprj_ack_i",
|
|
"ser_rx",
|
|
"la_input[95]",
|
|
"la_input[93]",
|
|
"la_input[92]",
|
|
"la_input[90]",
|
|
"la_input[89]",
|
|
"la_input[86]",
|
|
"la_input[84]",
|
|
"la_input[82]",
|
|
"la_input[57]",
|
|
"la_input[54]",
|
|
"la_input[4]",
|
|
"la_input[46]",
|
|
"la_input[37]",
|
|
"la_input[35]",
|
|
"la_input[21]",
|
|
"la_input[65]",
|
|
"la_input[8]",
|
|
"la_input[68]",
|
|
"la_input[20]",
|
|
"la_input[16]",
|
|
"la_input[66]",
|
|
"la_input[60]",
|
|
"la_input[53]",
|
|
"la_input[12]",
|
|
"la_input[126]",
|
|
"la_input[42]",
|
|
"la_input[45]",
|
|
"la_input[99]",
|
|
"la_input[124]",
|
|
"la_input[91]",
|
|
"la_input[120]",
|
|
"la_input[110]",
|
|
"la_input[19]",
|
|
"la_input[36]",
|
|
"la_input[105]",
|
|
"la_input[101]",
|
|
"la_input[67]",
|
|
"la_input[56]",
|
|
"la_input[85]",
|
|
"irq[2]",
|
|
"la_input[115]",
|
|
"irq[1]",
|
|
"la_input[118]",
|
|
"la_input[94]",
|
|
"la_input[127]",
|
|
"la_input[125]",
|
|
"irq[3]",
|
|
"la_input[44]",
|
|
"serial_resetn_in",
|
|
"resetn_in",
|
|
"clk_in",
|
|
"por_l_in",
|
|
"spi_sdi",
|
|
"gpio_in_pad",
|
|
"serial_clock_in",
|
|
"serial_load_in",
|
|
"serial_data_2_in",
|
|
"porb_h_in",
|
|
"la_input[98]",
|
|
"la_input[97]",
|
|
"la_input[96]",
|
|
"la_input[32]",
|
|
"la_input[27]",
|
|
"la_input[24]",
|
|
"flash_io1_di",
|
|
"mprj_dat_i[14]",
|
|
"mprj_dat_i[12]",
|
|
"mprj_dat_i[11]",
|
|
"mprj_dat_i[10]",
|
|
"la_input[47]",
|
|
"la_input[18]",
|
|
"la_input[121]",
|
|
"la_input[114]",
|
|
"la_input[111]",
|
|
"la_input[0]",
|
|
"la_input[106]",
|
|
"la_input[109]",
|
|
"core_rstn",
|
|
"debug_in",
|
|
"la_input[116]",
|
|
"irq[4]",
|
|
"irq[5]",
|
|
"la_input[123]",
|
|
"la_input[1]",
|
|
"la_input[81]",
|
|
"hk_dat_i[29]",
|
|
"hk_dat_i[8]",
|
|
"hk_dat_i[15]",
|
|
"hk_ack_i",
|
|
"hk_dat_i[4]",
|
|
"hk_dat_i[3]",
|
|
"hk_dat_i[14]",
|
|
"hk_dat_i[10]",
|
|
"hk_dat_i[11]",
|
|
"hk_dat_i[12]",
|
|
"hk_dat_i[27]",
|
|
"hk_dat_i[26]",
|
|
"hk_dat_i[24]",
|
|
"hk_dat_i[25]",
|
|
"hk_dat_i[28]",
|
|
"hk_dat_i[16]",
|
|
"hk_dat_i[18]",
|
|
"hk_dat_i[30]",
|
|
"hk_dat_i[31]",
|
|
"hk_dat_i[13]",
|
|
"la_input[3]",
|
|
"hk_dat_i[9]",
|
|
"hk_dat_i[1]",
|
|
"hk_dat_i[2]",
|
|
"hk_dat_i[5]",
|
|
"hk_dat_i[6]",
|
|
"hk_dat_i[0]",
|
|
"hk_dat_i[7]",
|
|
"hk_dat_i[21]",
|
|
"hk_dat_i[19]",
|
|
"hk_dat_i[23]",
|
|
"hk_dat_i[22]",
|
|
"hk_dat_i[17]",
|
|
"hk_dat_i[20]",
|
|
"la_input[9]",
|
|
"la_input[72]",
|
|
"la_input[71]",
|
|
"la_input[76]",
|
|
"la_input[75]",
|
|
"la_input[74]",
|
|
"la_input[73]",
|
|
"la_input[70]",
|
|
"la_input[69]",
|
|
"la_input[64]",
|
|
"la_input[63]",
|
|
"la_input[7]",
|
|
"la_input[5]",
|
|
"la_input[80]",
|
|
"la_input[61]",
|
|
"la_input[62]",
|
|
"la_input[59]",
|
|
"la_input[79]",
|
|
"la_input[88]",
|
|
"la_input[58]",
|
|
"la_input[87]",
|
|
"la_input[77]",
|
|
"la_input[52]",
|
|
"la_input[50]",
|
|
"la_input[55]",
|
|
"la_input[78]",
|
|
"la_input[43]",
|
|
"la_input[40]",
|
|
"la_input[39]",
|
|
"la_input[38]",
|
|
"la_input[33]",
|
|
"la_input[23]",
|
|
"la_input[51]",
|
|
"la_input[13]",
|
|
"la_input[30]",
|
|
"la_input[28]",
|
|
"la_input[26]",
|
|
"la_input[41]",
|
|
"la_input[11]",
|
|
"la_input[34]",
|
|
"la_input[113]",
|
|
"la_input[107]",
|
|
"la_input[25]",
|
|
"la_input[112]",
|
|
"la_input[108]",
|
|
"la_input[103]",
|
|
"la_input[100]",
|
|
"mprj_adr_o[11]",
|
|
"mprj_adr_o[20]",
|
|
"mprj_adr_o[8]",
|
|
"mprj_adr_o[27]",
|
|
"mprj_adr_o[21]",
|
|
"mprj_adr_o[16]",
|
|
"mprj_adr_o[7]",
|
|
"mprj_adr_o[31]",
|
|
"mprj_adr_o[30]",
|
|
"mprj_adr_o[28]",
|
|
"mprj_adr_o[29]",
|
|
"mprj_adr_o[26]",
|
|
"mprj_we_o",
|
|
"la_output[84]",
|
|
"la_output[113]",
|
|
"mprj_adr_o[15]",
|
|
"mprj_adr_o[14]",
|
|
"mprj_adr_o[25]",
|
|
"mprj_adr_o[13]",
|
|
"mprj_adr_o[9]",
|
|
"mprj_adr_o[3]",
|
|
"mprj_adr_o[2]",
|
|
"mprj_adr_o[23]",
|
|
"mprj_adr_o[22]",
|
|
"mprj_adr_o[19]",
|
|
"mprj_adr_o[17]",
|
|
"la_output[7]",
|
|
"la_output[51]",
|
|
"la_output[17]",
|
|
"la_output[123]",
|
|
"mprj_adr_o[24]",
|
|
"mprj_adr_o[12]",
|
|
"mprj_dat_o[19]",
|
|
"mprj_dat_o[18]",
|
|
"mprj_dat_o[16]",
|
|
"mprj_dat_o[2]",
|
|
"mprj_dat_o[1]",
|
|
"mprj_dat_o[15]",
|
|
"mprj_adr_o[6]",
|
|
"spi_csb",
|
|
"mprj_adr_o[5]",
|
|
"mprj_adr_o[18]",
|
|
"mprj_adr_o[10]",
|
|
"la_output[99]",
|
|
"la_output[93]",
|
|
"la_output[92]",
|
|
"la_output[82]",
|
|
"la_output[79]",
|
|
"la_output[74]",
|
|
"la_output[73]",
|
|
"la_output[72]",
|
|
"la_output[71]",
|
|
"la_output[70]",
|
|
"la_output[65]",
|
|
"la_output[55]",
|
|
"la_output[39]",
|
|
"la_output[35]",
|
|
"la_output[42]",
|
|
"la_output[8]",
|
|
"la_output[10]",
|
|
"la_output[4]",
|
|
"mprj_wb_iena",
|
|
"la_output[97]",
|
|
"la_output[96]",
|
|
"la_output[95]",
|
|
"la_output[94]",
|
|
"la_output[91]",
|
|
"la_output[90]",
|
|
"la_output[88]",
|
|
"la_output[89]",
|
|
"la_output[78]",
|
|
"la_output[77]",
|
|
"la_output[76]",
|
|
"la_output[87]",
|
|
"la_output[85]",
|
|
"la_output[75]",
|
|
"la_output[83]",
|
|
"la_output[81]",
|
|
"la_output[6]",
|
|
"la_output[69]",
|
|
"la_output[67]",
|
|
"la_output[66]",
|
|
"la_output[64]",
|
|
"la_output[63]",
|
|
"la_output[62]",
|
|
"la_output[59]",
|
|
"la_output[58]",
|
|
"la_output[57]",
|
|
"la_output[56]",
|
|
"la_output[60]",
|
|
"la_output[50]",
|
|
"la_output[53]",
|
|
"la_output[52]",
|
|
"la_output[49]",
|
|
"la_output[47]",
|
|
"la_output[46]",
|
|
"la_output[61]",
|
|
"la_output[86]",
|
|
"la_output[45]",
|
|
"la_output[80]",
|
|
"la_output[43]",
|
|
"la_output[41]",
|
|
"la_output[68]",
|
|
"la_output[5]",
|
|
"la_output[3]",
|
|
"la_output[38]",
|
|
"la_output[37]",
|
|
"la_output[34]",
|
|
"la_output[33]",
|
|
"la_output[32]",
|
|
"la_output[40]",
|
|
"la_output[30]",
|
|
"la_output[2]",
|
|
"la_output[36]",
|
|
"la_output[25]",
|
|
"la_output[22]",
|
|
"la_output[31]",
|
|
"la_output[20]",
|
|
"la_output[28]",
|
|
"la_output[44]",
|
|
"la_output[1]",
|
|
"la_output[54]",
|
|
"la_output[14]",
|
|
"la_output[27]",
|
|
"la_output[26]",
|
|
"la_output[24]",
|
|
"la_output[13]",
|
|
"la_output[48]",
|
|
"la_output[9]",
|
|
"la_output[11]",
|
|
"la_output[23]",
|
|
"la_output[21]",
|
|
"la_output[29]",
|
|
"la_output[19]",
|
|
"la_output[18]",
|
|
"la_output[16]",
|
|
"la_output[15]",
|
|
"la_output[110]",
|
|
"la_output[109]",
|
|
"la_output[108]",
|
|
"la_output[107]",
|
|
"la_output[106]",
|
|
"la_output[98]",
|
|
"la_output[105]",
|
|
"la_output[104]",
|
|
"la_output[111]",
|
|
"la_output[103]",
|
|
"la_output[102]",
|
|
"la_output[101]",
|
|
"la_output[100]",
|
|
"la_output[0]",
|
|
"la_output[12]",
|
|
"uart_enabled",
|
|
"mprj_cyc_o",
|
|
"la_oenb[61]",
|
|
"la_oenb[60]",
|
|
"la_oenb[32]",
|
|
"la_oenb[125]",
|
|
"la_iena[37]",
|
|
"la_iena[122]",
|
|
"la_iena[127]",
|
|
"la_iena[116]",
|
|
"la_iena[14]",
|
|
"la_iena[10]",
|
|
"la_iena[0]",
|
|
"la_iena[13]",
|
|
"la_oenb[90]",
|
|
"la_iena[30]",
|
|
"la_oenb[100]",
|
|
"la_oenb[10]",
|
|
"la_iena[8]",
|
|
"la_oenb[127]",
|
|
"la_oenb[117]",
|
|
"la_oenb[126]",
|
|
"la_oenb[116]",
|
|
"la_oenb[122]",
|
|
"la_oenb[120]",
|
|
"la_oenb[14]",
|
|
"la_iena[107]",
|
|
"la_iena[126]",
|
|
"la_oenb[39]",
|
|
"la_iena[125]",
|
|
"la_iena[115]",
|
|
"la_iena[105]",
|
|
"la_oenb[38]",
|
|
"la_oenb[47]",
|
|
"la_oenb[58]",
|
|
"la_oenb[57]",
|
|
"la_oenb[41]",
|
|
"la_oenb[37]",
|
|
"la_iena[124]",
|
|
"la_iena[113]",
|
|
"la_iena[103]",
|
|
"la_oenb[56]",
|
|
"la_oenb[35]",
|
|
"la_iena[36]",
|
|
"la_oenb[54]",
|
|
"la_oenb[53]",
|
|
"la_oenb[45]",
|
|
"la_oenb[43]",
|
|
"la_oenb[62]",
|
|
"la_oenb[52]",
|
|
"la_oenb[50]",
|
|
"la_oenb[36]",
|
|
"la_oenb[34]",
|
|
"la_oenb[33]",
|
|
"spi_enabled",
|
|
"mprj_sel_o[0]",
|
|
"mprj_dat_o[20]",
|
|
"mprj_dat_o[29]",
|
|
"mprj_dat_o[22]",
|
|
"mprj_dat_o[17]",
|
|
"mprj_dat_o[24]",
|
|
"mprj_dat_o[21]",
|
|
"mprj_sel_o[2]",
|
|
"mprj_dat_o[30]",
|
|
"la_output[112]",
|
|
"mprj_stb_o",
|
|
"hk_stb_o",
|
|
"user_irq_ena[2]",
|
|
"user_irq_ena[1]",
|
|
"user_irq_ena[0]",
|
|
"mprj_sel_o[3]",
|
|
"mprj_sel_o[1]",
|
|
"mprj_dat_o[5]",
|
|
"gpio_out_pad",
|
|
"gpio_mode0_pad",
|
|
"debug_oeb",
|
|
"debug_mode",
|
|
"mprj_dat_o[9]",
|
|
"mprj_dat_o[8]",
|
|
"mprj_dat_o[7]",
|
|
"mprj_dat_o[6]",
|
|
"mprj_dat_o[4]",
|
|
"mprj_dat_o[3]",
|
|
"mprj_dat_o[28]",
|
|
"mprj_dat_o[25]",
|
|
"mprj_dat_o[26]",
|
|
"mprj_dat_o[27]",
|
|
"mprj_dat_o[23]",
|
|
"mprj_dat_o[14]",
|
|
"mprj_dat_o[13]",
|
|
"mprj_dat_o[12]",
|
|
"mprj_dat_o[11]",
|
|
"mprj_dat_o[10]",
|
|
"mprj_dat_o[0]",
|
|
"la_output[119]",
|
|
"la_output[126]",
|
|
"la_output[124]",
|
|
"la_output[120]",
|
|
"spi_sdo",
|
|
"rstb_l_out",
|
|
"porb_h_out",
|
|
"spi_sck",
|
|
"serial_resetn_out",
|
|
"serial_clock_out",
|
|
"serial_load_out",
|
|
"serial_data_2_out",
|
|
"la_output[125]",
|
|
"la_output[118]",
|
|
"la_output[117]",
|
|
"la_output[115]",
|
|
"la_output[114]",
|
|
"la_output[127]",
|
|
"la_output[121]",
|
|
"la_output[116]",
|
|
"la_output[122]",
|
|
"mprj_dat_o[31]",
|
|
"mprj_adr_o[4]",
|
|
"hk_cyc_o",
|
|
"la_oenb[55]",
|
|
"gpio_outenb_pad",
|
|
"gpio_mode1_pad",
|
|
"ser_tx",
|
|
"la_oenb[59]",
|
|
"la_oenb[49]",
|
|
"gpio_inenb_pad",
|
|
"la_oenb[63]",
|
|
"la_oenb[51]",
|
|
"la_oenb[31]",
|
|
"la_oenb[40]",
|
|
"la_iena[7]",
|
|
"la_oenb[6]",
|
|
"la_oenb[5]",
|
|
"la_oenb[3]",
|
|
"la_oenb[19]",
|
|
"la_oenb[9]",
|
|
"la_oenb[11]",
|
|
"la_oenb[96]",
|
|
"la_oenb[101]",
|
|
"la_iena[106]",
|
|
"la_oenb[82]",
|
|
"la_oenb[69]",
|
|
"la_oenb[67]",
|
|
"la_iena[94]",
|
|
"la_iena[83]",
|
|
"la_iena[78]",
|
|
"la_iena[66]",
|
|
"la_iena[62]",
|
|
"la_iena[61]",
|
|
"la_iena[58]",
|
|
"la_iena[56]",
|
|
"la_iena[55]",
|
|
"la_iena[46]",
|
|
"la_iena[44]",
|
|
"la_iena[43]",
|
|
"la_iena[41]",
|
|
"la_iena[40]",
|
|
"la_iena[23]",
|
|
"la_iena[18]",
|
|
"la_iena[45]",
|
|
"la_oenb[94]",
|
|
"la_oenb[87]",
|
|
"la_oenb[28]",
|
|
"la_oenb[18]",
|
|
"la_iena[15]",
|
|
"la_iena[11]",
|
|
"la_oenb[91]",
|
|
"la_iena[118]",
|
|
"la_oenb[70]",
|
|
"la_oenb[89]",
|
|
"la_oenb[79]",
|
|
"spi_sdoenb",
|
|
"la_iena[65]",
|
|
"la_iena[74]",
|
|
"la_iena[73]",
|
|
"la_iena[72]",
|
|
"la_iena[70]",
|
|
"la_oenb[118]",
|
|
"la_oenb[108]",
|
|
"la_oenb[124]",
|
|
"la_iena[84]",
|
|
"la_oenb[112]",
|
|
"la_iena[108]",
|
|
"la_oenb[2]",
|
|
"la_iena[123]",
|
|
"la_iena[112]",
|
|
"la_iena[102]",
|
|
"la_oenb[85]",
|
|
"la_iena[121]",
|
|
"la_iena[111]",
|
|
"la_oenb[88]",
|
|
"la_oenb[84]",
|
|
"la_iena[120]",
|
|
"la_oenb[92]",
|
|
"la_oenb[72]",
|
|
"la_oenb[22]",
|
|
"la_iena[109]",
|
|
"la_iena[24]",
|
|
"la_iena[12]",
|
|
"la_oenb[80]",
|
|
"la_iena[31]",
|
|
"la_iena[22]",
|
|
"la_iena[34]",
|
|
"la_iena[21]",
|
|
"la_oenb[8]",
|
|
"la_oenb[7]",
|
|
"la_oenb[4]",
|
|
"la_iena[3]",
|
|
"la_iena[2]",
|
|
"la_oenb[98]",
|
|
"la_oenb[78]",
|
|
"la_oenb[95]",
|
|
"la_iena[63]",
|
|
"la_iena[82]",
|
|
"la_iena[52]",
|
|
"la_iena[81]",
|
|
"la_iena[71]",
|
|
"la_oenb[0]",
|
|
"la_iena[80]",
|
|
"la_iena[60]",
|
|
"la_iena[50]",
|
|
"la_iena[9]",
|
|
"la_iena[6]",
|
|
"la_iena[5]",
|
|
"la_iena[4]",
|
|
"la_oenb[12]",
|
|
"la_iena[99]",
|
|
"la_iena[79]",
|
|
"la_iena[69]",
|
|
"la_iena[59]",
|
|
"la_iena[49]",
|
|
"la_iena[32]",
|
|
"la_oenb[21]",
|
|
"la_oenb[107]",
|
|
"la_oenb[109]",
|
|
"la_iena[97]",
|
|
"la_iena[77]",
|
|
"la_oenb[1]",
|
|
"la_oenb[115]",
|
|
"la_iena[86]",
|
|
"la_oenb[104]",
|
|
"la_iena[98]",
|
|
"la_iena[75]",
|
|
"la_oenb[123]",
|
|
"la_oenb[114]",
|
|
"la_oenb[113]",
|
|
"la_oenb[106]",
|
|
"la_oenb[103]",
|
|
"la_iena[93]",
|
|
"la_iena[92]",
|
|
"la_oenb[16]",
|
|
"la_oenb[121]",
|
|
"la_oenb[111]",
|
|
"la_oenb[15]",
|
|
"la_oenb[110]",
|
|
"la_oenb[13]",
|
|
"la_oenb[30]",
|
|
"la_oenb[97]",
|
|
"la_iena[96]",
|
|
"la_iena[117]",
|
|
"la_iena[29]",
|
|
"la_oenb[119]",
|
|
"la_iena[104]",
|
|
"la_iena[28]",
|
|
"la_oenb[76]",
|
|
"la_oenb[46]",
|
|
"la_iena[47]",
|
|
"la_iena[33]",
|
|
"la_oenb[25]",
|
|
"la_iena[95]",
|
|
"la_iena[91]",
|
|
"la_iena[89]",
|
|
"la_iena[90]",
|
|
"la_iena[88]",
|
|
"la_iena[87]",
|
|
"la_iena[85]",
|
|
"la_iena[76]",
|
|
"la_iena[68]",
|
|
"la_iena[64]",
|
|
"la_iena[67]",
|
|
"la_iena[57]",
|
|
"la_iena[54]",
|
|
"la_iena[53]",
|
|
"la_iena[51]",
|
|
"la_iena[48]",
|
|
"la_iena[42]",
|
|
"la_iena[39]",
|
|
"la_iena[38]",
|
|
"la_iena[27]",
|
|
"la_iena[26]",
|
|
"la_iena[20]",
|
|
"la_iena[16]",
|
|
"la_oenb[105]",
|
|
"la_iena[101]",
|
|
"la_oenb[44]",
|
|
"la_oenb[42]",
|
|
"la_oenb[29]",
|
|
"la_oenb[24]",
|
|
"la_oenb[17]",
|
|
"la_iena[35]",
|
|
"la_iena[25]",
|
|
"la_iena[119]",
|
|
"la_iena[114]",
|
|
"la_iena[110]",
|
|
"la_iena[1]",
|
|
"la_iena[100]",
|
|
"la_oenb[93]",
|
|
"la_oenb[81]",
|
|
"la_oenb[83]",
|
|
"la_oenb[77]",
|
|
"la_oenb[75]",
|
|
"la_oenb[74]",
|
|
"la_oenb[73]",
|
|
"la_oenb[71]",
|
|
"la_oenb[66]",
|
|
"la_oenb[68]",
|
|
"la_oenb[65]",
|
|
"la_oenb[64]",
|
|
"la_oenb[86]",
|
|
"la_oenb[48]",
|
|
"la_oenb[27]",
|
|
"la_oenb[26]",
|
|
"la_oenb[23]",
|
|
"la_oenb[20]",
|
|
"la_iena[19]",
|
|
"la_iena[17]",
|
|
"la_oenb[99]",
|
|
"la_oenb[102]",
|
|
"flash_io0_oeb",
|
|
"flash_io0_do",
|
|
"flash_csb",
|
|
"flash_clk",
|
|
"por_l_out",
|
|
"resetn_out",
|
|
"clk_out",
|
|
"VGND",
|
|
"VPWR",
|
|
"flash_io0_di",
|
|
"flash_io2_di",
|
|
"flash_io3_di"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"simple_por",
|
|
"simple_por"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 8],
|
|
["sky130_fd_pr__cap_mim_m3_2", 1],
|
|
["LO_sky130_fd_sc_hvl__buf_8", 2],
|
|
["LO_sky130_fd_sc_hvl__inv_8", 1],
|
|
["LO_sky130_fd_sc_hvl__schmittbuf_1", 1],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3],
|
|
["sky130_fd_pr__cap_mim_m3_1", 1],
|
|
["sky130_fd_pr__res_xhigh_po", 3 ]
|
|
], [
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 8 ],
|
|
["sky130_fd_pr__cap_mim_m3_2", 1 ],
|
|
["sky130_fd_sc_hvl__buf_8", 2 ],
|
|
["sky130_fd_sc_hvl__inv_8", 1 ],
|
|
["sky130_fd_sc_hvl__schmittbuf_1", 1 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 3 ],
|
|
["sky130_fd_pr__cap_mim_m3_1", 1 ],
|
|
["sky130_fd_pr__res_xhigh_po", 3 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
17,
|
|
17
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"porb_h",
|
|
"porb_l",
|
|
"por_l",
|
|
"vss3v3",
|
|
"vss1v8",
|
|
"vdd1v8",
|
|
"vdd3v3"
|
|
], [
|
|
"porb_h",
|
|
"porb_l",
|
|
"por_l",
|
|
"vss3v3",
|
|
"vss1v8",
|
|
"vdd1v8",
|
|
"vdd3v3"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"caravel_clocking",
|
|
"caravel_clocking"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__dfrtp_1", 17],
|
|
["sky130_fd_sc_hd__nor2_1", 13],
|
|
["sky130_fd_sc_hd__nand2_1", 10],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__o21ai_1", 18],
|
|
["sky130_fd_sc_hd__nor3b_2", 2],
|
|
["sky130_ef_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__clkbuf_16", 22],
|
|
["sky130_fd_sc_hd__dfstp_2", 4],
|
|
["sky130_fd_sc_hd__decap_8", 1],
|
|
["sky130_fd_sc_hd__nand2b_1", 14],
|
|
["sky130_fd_sc_hd__diode_2", 17],
|
|
["sky130_fd_sc_hd__decap_6", 1],
|
|
["sky130_fd_sc_hd__nand4bb_1", 2],
|
|
["sky130_fd_sc_hd__dfstp_1", 17],
|
|
["sky130_fd_sc_hd__mux2_1", 52],
|
|
["sky130_fd_sc_hd__o21a_1", 5],
|
|
["sky130_fd_sc_hd__dfrtp_2", 2],
|
|
["sky130_fd_sc_hd__o2bb2ai_1", 2],
|
|
["sky130_fd_sc_hd__inv_2", 8],
|
|
["sky130_fd_sc_hd__nor3_1", 6],
|
|
["sky130_fd_sc_hd__buf_12", 1],
|
|
["sky130_fd_sc_hd__a21oi_1", 4],
|
|
["sky130_fd_sc_hd__xnor2_1", 10],
|
|
["sky130_fd_sc_hd__o2111ai_2", 1],
|
|
["sky130_fd_sc_hd__o31ai_2", 2],
|
|
["sky130_fd_sc_hd__and2_1", 4],
|
|
["sky130_fd_sc_hd__a41oi_1", 2],
|
|
["sky130_fd_sc_hd__clkinv_4", 5],
|
|
["sky130_fd_sc_hd__nand2b_2", 2],
|
|
["sky130_fd_sc_hd__clkinv_2", 4],
|
|
["sky130_fd_sc_hd__clkbuf_2", 2],
|
|
["sky130_fd_sc_hd__dfrtn_1", 8],
|
|
["sky130_fd_sc_hd__inv_4", 9],
|
|
["sky130_fd_sc_hd__o2111ai_1", 1],
|
|
["sky130_fd_sc_hd__clkbuf_4", 4],
|
|
["sky130_fd_sc_hd__nand3_1", 2],
|
|
["sky130_fd_sc_hd__o31a_1", 2],
|
|
["sky130_fd_sc_hd__nor3_2", 2],
|
|
["sky130_fd_sc_hd__dlymetal6s2s_1", 1],
|
|
["sky130_fd_sc_hd__o21bai_1", 2],
|
|
["sky130_fd_sc_hd__dfrtp_4", 2],
|
|
["sky130_fd_sc_hd__clkbuf_1", 8],
|
|
["sky130_fd_sc_hd__buf_4", 10],
|
|
["sky130_fd_sc_hd__conb_1", 1],
|
|
["sky130_fd_sc_hd__dfxtp_1", 7],
|
|
["sky130_fd_sc_hd__nand3b_1", 4],
|
|
["sky130_fd_sc_hd__a31o_1", 2],
|
|
["sky130_fd_sc_hd__o22a_1", 2],
|
|
["sky130_fd_sc_hd__buf_2", 1],
|
|
["sky130_fd_sc_hd__o31ai_1", 2],
|
|
["sky130_fd_sc_hd__o211ai_4", 2],
|
|
["sky130_fd_sc_hd__o21ai_2", 2],
|
|
["sky130_fd_sc_hd__o21a_2", 1],
|
|
["sky130_fd_sc_hd__nor2_2", 2],
|
|
["sky130_fd_sc_hd__a21o_1", 2],
|
|
["sky130_fd_sc_hd__nor4_1", 2],
|
|
["sky130_fd_sc_hd__a2bb2o_1", 2 ]
|
|
], [
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__dfrtp_1", 17 ],
|
|
["sky130_fd_sc_hd__nor2_1", 13 ],
|
|
["sky130_fd_sc_hd__nand2_1", 10 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__o21ai_1", 18 ],
|
|
["sky130_fd_sc_hd__nor3b_2", 2 ],
|
|
["sky130_ef_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__clkbuf_16", 22 ],
|
|
["sky130_fd_sc_hd__dfstp_2", 4 ],
|
|
["sky130_fd_sc_hd__decap_8", 1 ],
|
|
["sky130_fd_sc_hd__nand2b_1", 14 ],
|
|
["sky130_fd_sc_hd__diode_2", 17 ],
|
|
["sky130_fd_sc_hd__decap_6", 1 ],
|
|
["sky130_fd_sc_hd__nand4bb_1", 2 ],
|
|
["sky130_fd_sc_hd__dfstp_1", 17 ],
|
|
["sky130_fd_sc_hd__mux2_1", 52 ],
|
|
["sky130_fd_sc_hd__o21a_1", 5 ],
|
|
["sky130_fd_sc_hd__dfrtp_2", 2 ],
|
|
["sky130_fd_sc_hd__o2bb2ai_1", 2 ],
|
|
["sky130_fd_sc_hd__inv_2", 8 ],
|
|
["sky130_fd_sc_hd__nor3_1", 6 ],
|
|
["sky130_fd_sc_hd__buf_12", 1 ],
|
|
["sky130_fd_sc_hd__a21oi_1", 4 ],
|
|
["sky130_fd_sc_hd__xnor2_1", 10 ],
|
|
["sky130_fd_sc_hd__o2111ai_2", 1 ],
|
|
["sky130_fd_sc_hd__o31ai_2", 2 ],
|
|
["sky130_fd_sc_hd__and2_1", 4 ],
|
|
["sky130_fd_sc_hd__a41oi_1", 2 ],
|
|
["sky130_fd_sc_hd__clkinv_4", 5 ],
|
|
["sky130_fd_sc_hd__nand2b_2", 2 ],
|
|
["sky130_fd_sc_hd__clkinv_2", 4 ],
|
|
["sky130_fd_sc_hd__clkbuf_2", 2 ],
|
|
["sky130_fd_sc_hd__dfrtn_1", 8 ],
|
|
["sky130_fd_sc_hd__inv_4", 9 ],
|
|
["sky130_fd_sc_hd__o2111ai_1", 1 ],
|
|
["sky130_fd_sc_hd__clkbuf_4", 4 ],
|
|
["sky130_fd_sc_hd__nand3_1", 2 ],
|
|
["sky130_fd_sc_hd__o31a_1", 2 ],
|
|
["sky130_fd_sc_hd__nor3_2", 2 ],
|
|
["sky130_fd_sc_hd__dlymetal6s2s_1", 1 ],
|
|
["sky130_fd_sc_hd__o21bai_1", 2 ],
|
|
["sky130_fd_sc_hd__dfrtp_4", 2 ],
|
|
["sky130_fd_sc_hd__clkbuf_1", 8 ],
|
|
["sky130_fd_sc_hd__buf_4", 10 ],
|
|
["sky130_fd_sc_hd__conb_1", 1 ],
|
|
["sky130_fd_sc_hd__dfxtp_1", 7 ],
|
|
["sky130_fd_sc_hd__nand3b_1", 4 ],
|
|
["sky130_fd_sc_hd__a31o_1", 2 ],
|
|
["sky130_fd_sc_hd__o22a_1", 2 ],
|
|
["sky130_fd_sc_hd__buf_2", 1 ],
|
|
["sky130_fd_sc_hd__o31ai_1", 2 ],
|
|
["sky130_fd_sc_hd__o211ai_4", 2 ],
|
|
["sky130_fd_sc_hd__o21ai_2", 2 ],
|
|
["sky130_fd_sc_hd__o21a_2", 1 ],
|
|
["sky130_fd_sc_hd__nor2_2", 2 ],
|
|
["sky130_fd_sc_hd__a21o_1", 2 ],
|
|
["sky130_fd_sc_hd__nor4_1", 2 ],
|
|
["sky130_fd_sc_hd__a2bb2o_1", 2 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
329,
|
|
329
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"user_clk",
|
|
"resetb_sync",
|
|
"core_clk",
|
|
"sel[0]",
|
|
"sel[2]",
|
|
"sel2[1]",
|
|
"resetb",
|
|
"ext_reset",
|
|
"sel2[0]",
|
|
"sel2[2]",
|
|
"sel[1]",
|
|
"ext_clk_sel",
|
|
"pll_clk90",
|
|
"ext_clk",
|
|
"pll_clk",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"user_clk",
|
|
"resetb_sync",
|
|
"core_clk",
|
|
"sel[0]",
|
|
"sel[2]",
|
|
"sel2[1]",
|
|
"resetb",
|
|
"ext_reset",
|
|
"sel2[0]",
|
|
"sel2[2]",
|
|
"sel[1]",
|
|
"ext_clk_sel",
|
|
"pll_clk90",
|
|
"ext_clk",
|
|
"pll_clk",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"gpio_defaults_block_1803",
|
|
"gpio_defaults_block_1803"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__conb_1", 13],
|
|
["sky130_fd_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__decap_6", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__conb_1", 13 ],
|
|
["sky130_fd_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__decap_6", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
28,
|
|
28
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"gpio_defaults[11]",
|
|
"gpio_defaults[1]",
|
|
"gpio_defaults[0]",
|
|
"gpio_defaults[12]",
|
|
"gpio_defaults[3]",
|
|
"gpio_defaults[5]",
|
|
"gpio_defaults[7]",
|
|
"gpio_defaults[9]",
|
|
"gpio_defaults[10]",
|
|
"gpio_defaults[2]",
|
|
"gpio_defaults[4]",
|
|
"gpio_defaults[6]",
|
|
"gpio_defaults[8]"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"gpio_defaults[11]",
|
|
"gpio_defaults[1]",
|
|
"gpio_defaults[0]",
|
|
"gpio_defaults[12]",
|
|
"gpio_defaults[3]",
|
|
"gpio_defaults[5]",
|
|
"gpio_defaults[7]",
|
|
"gpio_defaults[9]",
|
|
"gpio_defaults[10]",
|
|
"gpio_defaults[2]",
|
|
"gpio_defaults[4]",
|
|
"gpio_defaults[6]",
|
|
"gpio_defaults[8]"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"spare_logic_block",
|
|
"spare_logic_block"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__decap_6", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__conb_1", 27],
|
|
["sky130_fd_sc_hd__nor2_2", 2],
|
|
["sky130_fd_sc_hd__decap_8", 1],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__dfbbp_1", 2],
|
|
["sky130_fd_sc_hd__mux2_2", 2],
|
|
["sky130_fd_sc_hd__inv_2", 4],
|
|
["sky130_fd_sc_hd__nand2_2", 2],
|
|
["sky130_fd_sc_hd__inv_8", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__decap_6", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__conb_1", 27 ],
|
|
["sky130_fd_sc_hd__nor2_2", 2 ],
|
|
["sky130_fd_sc_hd__decap_8", 1 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__dfbbp_1", 2 ],
|
|
["sky130_fd_sc_hd__mux2_2", 2 ],
|
|
["sky130_fd_sc_hd__inv_2", 4 ],
|
|
["sky130_fd_sc_hd__nand2_2", 2 ],
|
|
["sky130_fd_sc_hd__inv_8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
71,
|
|
71
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"spare_xib",
|
|
"spare_xfq[0]",
|
|
"spare_xfq[1]",
|
|
"spare_xfqn[0]",
|
|
"spare_xfqn[1]",
|
|
"spare_xi[0]",
|
|
"spare_xi[1]",
|
|
"spare_xi[2]",
|
|
"spare_xi[3]",
|
|
"spare_xmx[0]",
|
|
"spare_xmx[1]",
|
|
"spare_xna[0]",
|
|
"spare_xna[1]",
|
|
"spare_xno[0]",
|
|
"spare_xno[1]",
|
|
"spare_xz[4]",
|
|
"spare_xz[11]",
|
|
"spare_xz[12]",
|
|
"spare_xz[13]",
|
|
"spare_xz[14]",
|
|
"spare_xz[15]",
|
|
"spare_xz[16]",
|
|
"spare_xz[17]",
|
|
"spare_xz[18]",
|
|
"spare_xz[19]",
|
|
"spare_xz[20]",
|
|
"spare_xz[21]",
|
|
"spare_xz[22]",
|
|
"spare_xz[23]",
|
|
"spare_xz[24]",
|
|
"spare_xz[25]",
|
|
"spare_xz[26]",
|
|
"spare_xz[0]",
|
|
"spare_xz[1]",
|
|
"spare_xz[2]",
|
|
"spare_xz[3]",
|
|
"spare_xz[5]",
|
|
"spare_xz[6]",
|
|
"spare_xz[7]",
|
|
"spare_xz[8]",
|
|
"spare_xz[10]",
|
|
"spare_xz[9]",
|
|
"vssd",
|
|
"vccd"
|
|
], [
|
|
"spare_xib",
|
|
"spare_xfq[0]",
|
|
"spare_xfq[1]",
|
|
"spare_xfqn[0]",
|
|
"spare_xfqn[1]",
|
|
"spare_xi[0]",
|
|
"spare_xi[1]",
|
|
"spare_xi[2]",
|
|
"spare_xi[3]",
|
|
"spare_xmx[0]",
|
|
"spare_xmx[1]",
|
|
"spare_xna[0]",
|
|
"spare_xna[1]",
|
|
"spare_xno[0]",
|
|
"spare_xno[1]",
|
|
"spare_xz[4]",
|
|
"spare_xz[11]",
|
|
"spare_xz[12]",
|
|
"spare_xz[13]",
|
|
"spare_xz[14]",
|
|
"spare_xz[15]",
|
|
"spare_xz[16]",
|
|
"spare_xz[17]",
|
|
"spare_xz[18]",
|
|
"spare_xz[19]",
|
|
"spare_xz[20]",
|
|
"spare_xz[21]",
|
|
"spare_xz[22]",
|
|
"spare_xz[23]",
|
|
"spare_xz[24]",
|
|
"spare_xz[25]",
|
|
"spare_xz[26]",
|
|
"spare_xz[0]",
|
|
"spare_xz[1]",
|
|
"spare_xz[2]",
|
|
"spare_xz[3]",
|
|
"spare_xz[5]",
|
|
"spare_xz[6]",
|
|
"spare_xz[7]",
|
|
"spare_xz[8]",
|
|
"spare_xz[10]",
|
|
"spare_xz[9]",
|
|
"vssd",
|
|
"vccd"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"user_id_programming",
|
|
"user_id_programming"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__conb_1", 32],
|
|
["sky130_fd_sc_hd__decap_8", 1],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__decap_6", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__conb_1", 32 ],
|
|
["sky130_fd_sc_hd__decap_8", 1 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__decap_6", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
66,
|
|
66
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"mask_rev[18]",
|
|
"mask_rev[25]",
|
|
"mask_rev[3]",
|
|
"mask_rev[27]",
|
|
"mask_rev[5]",
|
|
"mask_rev[0]",
|
|
"mask_rev[29]",
|
|
"mask_rev[7]",
|
|
"mask_rev[13]",
|
|
"mask_rev[20]",
|
|
"mask_rev[9]",
|
|
"mask_rev[15]",
|
|
"mask_rev[22]",
|
|
"mask_rev[11]",
|
|
"mask_rev[17]",
|
|
"mask_rev[24]",
|
|
"mask_rev[31]",
|
|
"mask_rev[2]",
|
|
"mask_rev[19]",
|
|
"mask_rev[26]",
|
|
"mask_rev[4]",
|
|
"mask_rev[10]",
|
|
"mask_rev[28]",
|
|
"mask_rev[6]",
|
|
"mask_rev[12]",
|
|
"mask_rev[8]",
|
|
"mask_rev[14]",
|
|
"mask_rev[21]",
|
|
"mask_rev[16]",
|
|
"mask_rev[23]",
|
|
"mask_rev[30]",
|
|
"mask_rev[1]"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"mask_rev[18]",
|
|
"mask_rev[25]",
|
|
"mask_rev[3]",
|
|
"mask_rev[27]",
|
|
"mask_rev[5]",
|
|
"mask_rev[0]",
|
|
"mask_rev[29]",
|
|
"mask_rev[7]",
|
|
"mask_rev[13]",
|
|
"mask_rev[20]",
|
|
"mask_rev[9]",
|
|
"mask_rev[15]",
|
|
"mask_rev[22]",
|
|
"mask_rev[11]",
|
|
"mask_rev[17]",
|
|
"mask_rev[24]",
|
|
"mask_rev[31]",
|
|
"mask_rev[2]",
|
|
"mask_rev[19]",
|
|
"mask_rev[26]",
|
|
"mask_rev[4]",
|
|
"mask_rev[10]",
|
|
"mask_rev[28]",
|
|
"mask_rev[6]",
|
|
"mask_rev[12]",
|
|
"mask_rev[8]",
|
|
"mask_rev[14]",
|
|
"mask_rev[21]",
|
|
"mask_rev[16]",
|
|
"mask_rev[23]",
|
|
"mask_rev[30]",
|
|
"mask_rev[1]"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"gpio_defaults_block_0801",
|
|
"gpio_defaults_block_0801"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__conb_1", 13],
|
|
["sky130_fd_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__decap_6", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__conb_1", 13 ],
|
|
["sky130_fd_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__decap_6", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
28,
|
|
28
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"gpio_defaults[11]",
|
|
"gpio_defaults[0]",
|
|
"gpio_defaults[1]",
|
|
"gpio_defaults[3]",
|
|
"gpio_defaults[5]",
|
|
"gpio_defaults[7]",
|
|
"gpio_defaults[9]",
|
|
"gpio_defaults[10]",
|
|
"gpio_defaults[12]",
|
|
"gpio_defaults[2]",
|
|
"gpio_defaults[4]",
|
|
"gpio_defaults[6]",
|
|
"gpio_defaults[8]"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"gpio_defaults[11]",
|
|
"gpio_defaults[0]",
|
|
"gpio_defaults[1]",
|
|
"gpio_defaults[3]",
|
|
"gpio_defaults[5]",
|
|
"gpio_defaults[7]",
|
|
"gpio_defaults[9]",
|
|
"gpio_defaults[10]",
|
|
"gpio_defaults[12]",
|
|
"gpio_defaults[2]",
|
|
"gpio_defaults[4]",
|
|
"gpio_defaults[6]",
|
|
"gpio_defaults[8]"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"gpio_signal_buffering_alt",
|
|
"gpio_signal_buffering_alt"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__buf_8", 102],
|
|
["sky130_ef_sc_hd__decap_12", 6 ]
|
|
], [
|
|
["sky130_fd_sc_hd__buf_8", 102 ],
|
|
["sky130_ef_sc_hd__decap_12", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
152,
|
|
147
|
|
],
|
|
"badnets": [
|
|
[
|
|
[
|
|
[
|
|
"vssd",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "VGND", 102 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VNB", 102 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VGND", 6 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VNB", 6 ]
|
|
]
|
|
],
|
|
[
|
|
"vccd_uq3",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "VPWR", 10 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPB", 10 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VPWR", 1 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VPB", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"vccd_uq1",
|
|
[
|
|
[ "sky130_ef_sc_hd__decap_12", "VPWR", 1 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VPB", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPWR", 14 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPB", 14 ]
|
|
]
|
|
],
|
|
[
|
|
"vccd_uq4",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "VPWR", 2 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPB", 2 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VPWR", 1 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VPB", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"vccd_uq2",
|
|
[
|
|
[ "sky130_ef_sc_hd__decap_12", "VPWR", 1 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VPB", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPWR", 18 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPB", 18 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"vccd",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "VPWR", 102 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPB", 102 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VPWR", 1 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VPB", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"vssd",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "VGND", 102 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VNB", 102 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VGND", 1 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VNB", 1 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"vccd",
|
|
[
|
|
[ "sky130_ef_sc_hd__decap_12", "VPWR", 1 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VPB", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPWR", 29 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPB", 29 ]
|
|
]
|
|
],
|
|
[
|
|
"vccd_uq0",
|
|
[
|
|
[ "sky130_ef_sc_hd__decap_12", "VPWR", 1 ],
|
|
[ "sky130_ef_sc_hd__decap_12", "VPB", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPWR", 29 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "VPB", 29 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
]
|
|
],
|
|
[
|
|
[
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_58/A",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_57/X",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_99/A",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_76/A",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_98/X",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_36/A",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_97/A",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_96/X",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_95/A",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ],
|
|
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[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
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[
|
|
"\\buf_in[57] ",
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[38] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[35] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[32] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[29] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[25] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[21] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[17] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[13] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[87] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[84] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[81] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[78] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[75] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[71] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[67] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[63] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[59] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[39] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[36] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[33] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[30] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[27] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[23] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[19] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[15] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[11] ",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[74] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[70] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[66] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[62] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[58] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[26] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[22] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[18] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"\\buf_in[14] ",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ],
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
|
],
|
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[
|
|
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|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ],
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|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
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]
|
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]
|
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]
|
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[
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[
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[
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[
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
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]
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],
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[
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[
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
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]
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],
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[
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[
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
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]
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],
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[
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[
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
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]
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],
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[
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[
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[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
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]
|
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],
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[
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[
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
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]
|
|
],
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[
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|
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[
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
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]
|
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],
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[
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[
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|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
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],
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[
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|
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|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
|
],
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[
|
|
"mgmt_io_out_unbuf[15]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
|
],
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[
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|
"mgmt_io_out_unbuf[9]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
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],
|
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[
|
|
"mgmt_io_out_unbuf[14]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
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[
|
|
"mgmt_io_out_unbuf[19]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
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[
|
|
"mgmt_io_in_unbuf[18]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
|
],
|
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[
|
|
"mgmt_io_in_unbuf[16]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_oeb_unbuf[1]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
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[
|
|
"mgmt_io_out_unbuf[13]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[19]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[8]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[12]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[12]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[15]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[14]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[13]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[7]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[8]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[9]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[10]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[11]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[12]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[15]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[14]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[13]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[7]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[8]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[9]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[10]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[11]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[12]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[16]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[11]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[18]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[10]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[17]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[18]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[17]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[9]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[15]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[16]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[19]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[8]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[14]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[19]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[7]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_oeb_buf[0]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[13]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_oeb_buf[1]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_oeb_buf[2]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[3]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[4]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[4]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[5]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[5]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[1]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[1]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[2]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[2]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[0]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[3]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[0]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[3]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[4]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[4]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[5]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[5]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[1]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[1]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[2]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[2]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[0]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[3]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[0]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
],
|
|
[
|
|
"(no matching net)",
|
|
[
|
|
[ "", "", 0 ]
|
|
]
|
|
]
|
|
], [
|
|
[
|
|
"mgmt_io_oeb_buf[1]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_oeb_buf[0]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[19]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[18]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[17]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[16]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[15]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[14]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[13]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[6]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[12]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[11]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[10]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[9]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[8]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[7]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_buf[6]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[19]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[18]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[17]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[16]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[15]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[14]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[13]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[12]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[11]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[10]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[9]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[8]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_buf[7]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_oeb_buf[2]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_oeb_unbuf[1]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_oeb_unbuf[0]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[19]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[18]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[17]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[7]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[16]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[15]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[14]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[13]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[12]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[11]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[6]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[10]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[9]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[8]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[7]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[6]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[19]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[18]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[17]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[16]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[15]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[14]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[13]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[12]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[11]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[10]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_in_unbuf[9]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
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],
|
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[
|
|
"mgmt_io_in_unbuf[8]",
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
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],
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[
|
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"mgmt_io_oeb_unbuf[2]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
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],
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[
|
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"mgmt_io_in_buf[5]",
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[
|
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[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
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]
|
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],
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[
|
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"mgmt_io_out_buf[5]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
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]
|
|
],
|
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[
|
|
"mgmt_io_out_buf[4]",
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
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]
|
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],
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[
|
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"mgmt_io_out_buf[3]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
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]
|
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],
|
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[
|
|
"mgmt_io_out_buf[2]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
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[
|
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"mgmt_io_in_buf[4]",
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
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]
|
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],
|
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[
|
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"mgmt_io_out_buf[1]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
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],
|
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[
|
|
"mgmt_io_out_buf[0]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
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]
|
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],
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[
|
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"mgmt_io_in_buf[3]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
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]
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[
|
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"mgmt_io_in_buf[2]",
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
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]
|
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],
|
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[
|
|
"mgmt_io_in_buf[1]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
|
]
|
|
],
|
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[
|
|
"mgmt_io_in_buf[0]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "X", 1 ]
|
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]
|
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|
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[
|
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"mgmt_io_in_unbuf[5]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
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],
|
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[
|
|
"mgmt_io_out_unbuf[5]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[4]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
|
[
|
|
"mgmt_io_out_unbuf[3]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
|
]
|
|
],
|
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[
|
|
"mgmt_io_out_unbuf[2]",
|
|
[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
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],
|
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[
|
|
"mgmt_io_in_unbuf[4]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
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|
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[
|
|
"mgmt_io_out_unbuf[1]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
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],
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[
|
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"mgmt_io_out_unbuf[0]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
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[
|
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"mgmt_io_in_unbuf[3]",
|
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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]
|
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],
|
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[
|
|
"mgmt_io_in_unbuf[2]",
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[
|
|
[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
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[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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"mgmt_io_in_unbuf[0]",
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[
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[ "sky130_fd_sc_hd__buf_8", "A", 1 ]
|
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|
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"badelements": [
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[
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[
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[
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[
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[
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|
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[
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"(no matching instance)",
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[
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[
|
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"(no matching instance)",
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[
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[ "", 0 ]
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[
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[
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[
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[
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[ "VNB", 216 ],
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|
|
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[
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"sky130_fd_sc_hd__buf_8_12",
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|
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[
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|
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|
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|
|
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|
|
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[
|
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"sky130_fd_sc_hd__buf_8_10",
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|
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|
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|
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|
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|
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|
|
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|
|
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[
|
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[
|
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|
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|
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|
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|
|
[ "VNB", 216 ],
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|
[ "VPB", 38 ]
|
|
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|
|
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[
|
|
"sky130_fd_sc_hd__buf_8_20",
|
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[
|
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|
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[ "X", 2 ],
|
|
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|
|
[ "VPWR", 38 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 38 ]
|
|
]
|
|
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|
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[
|
|
"sky130_fd_sc_hd__buf_8_29",
|
|
[
|
|
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|
|
[ "X", 2 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
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|
|
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|
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[
|
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"sky130_fd_sc_hd__buf_8_28",
|
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[
|
|
[ "A", 1 ],
|
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[ "X", 2 ],
|
|
[ "VGND", 216 ],
|
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[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
]
|
|
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|
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[
|
|
"sky130_fd_sc_hd__buf_8_39",
|
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[
|
|
[ "A", 1 ],
|
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[ "X", 2 ],
|
|
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[ "VPWR", 60 ],
|
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[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
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|
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|
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[
|
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"sky130_fd_sc_hd__buf_8_38",
|
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[
|
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[ "A", 1 ],
|
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|
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[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
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|
|
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|
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[
|
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"sky130_fd_sc_hd__buf_8_49",
|
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[
|
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|
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|
[ "VNB", 216 ],
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[ "VPB", 60 ]
|
|
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|
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[
|
|
"sky130_fd_sc_hd__buf_8_37",
|
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[
|
|
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|
|
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|
|
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|
|
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|
|
[ "VPB", 60 ]
|
|
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|
|
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[
|
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|
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[
|
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|
|
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|
|
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[
|
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"sky130_fd_sc_hd__buf_8_57",
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|
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|
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[
|
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"sky130_fd_sc_hd__buf_8_45",
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[
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|
|
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|
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[
|
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"sky130_fd_sc_hd__buf_8_56",
|
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[
|
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|
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|
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|
|
[ "VPB", 60 ]
|
|
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|
|
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[
|
|
"sky130_fd_sc_hd__buf_8_44",
|
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[
|
|
[ "A", 1 ],
|
|
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|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
]
|
|
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|
|
[
|
|
"sky130_fd_sc_hd__buf_8_55",
|
|
[
|
|
[ "A", 1 ],
|
|
[ "X", 2 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_32",
|
|
[
|
|
[ "A", 1 ],
|
|
[ "X", 2 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_98",
|
|
[
|
|
[ "A", 1 ],
|
|
[ "X", 2 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_100",
|
|
[
|
|
[ "A", 1 ],
|
|
[ "X", 2 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_30",
|
|
[
|
|
[ "A", 1 ],
|
|
[ "X", 2 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_52",
|
|
[
|
|
[ "A", 1 ],
|
|
[ "X", 2 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_96",
|
|
[
|
|
[ "A", 1 ],
|
|
[ "X", 2 ],
|
|
[ "VGND", 216 ],
|
|
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|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_40",
|
|
[
|
|
[ "A", 1 ],
|
|
[ "X", 2 ],
|
|
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|
|
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|
|
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|
|
[ "VPB", 60 ]
|
|
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|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_51",
|
|
[
|
|
[ "A", 1 ],
|
|
[ "X", 2 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 60 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 60 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_17",
|
|
[
|
|
[ "A", 2 ],
|
|
[ "X", 1 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 38 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 38 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_26",
|
|
[
|
|
[ "A", 2 ],
|
|
[ "X", 1 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 38 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 38 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_24",
|
|
[
|
|
[ "A", 2 ],
|
|
[ "X", 1 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 38 ],
|
|
[ "VNB", 216 ],
|
|
[ "VPB", 38 ]
|
|
]
|
|
],
|
|
[
|
|
"sky130_fd_sc_hd__buf_8_22",
|
|
[
|
|
[ "A", 2 ],
|
|
[ "X", 1 ],
|
|
[ "VGND", 216 ],
|
|
[ "VPWR", 38 ],
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|
|
["sky130_fd_sc_hd__diode_2", 3181],
|
|
["sky130_fd_sc_hd__decap_6", 1],
|
|
["sky130_ef_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__decap_8", 1],
|
|
["sky130_fd_sc_hd__buf_6", 1432],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__and2_4", 211],
|
|
["sky130_fd_sc_hd__and3b_4", 102],
|
|
["sky130_fd_sc_hd__and2_2", 101],
|
|
["sky130_fd_sc_hd__nand2_8", 51],
|
|
["sky130_fd_sc_hd__nand2_2", 34],
|
|
["sky130_fd_sc_hd__buf_8", 559],
|
|
["sky130_fd_sc_hd__clkinv_8", 19],
|
|
["sky130_fd_sc_hd__clkinv_2", 44],
|
|
["sky130_fd_sc_hd__clkbuf_4", 220],
|
|
["sky130_fd_sc_hd__buf_4", 85],
|
|
["sky130_fd_sc_hd__clkinv_4", 35],
|
|
["sky130_fd_sc_hd__and3b_2", 21],
|
|
["sky130_fd_sc_hd__and2_1", 21],
|
|
["sky130_fd_sc_hd__nand2_4", 66],
|
|
["sky130_fd_sc_hd__inv_2", 58],
|
|
["sky130_fd_sc_hd__clkbuf_8", 12],
|
|
["sky130_fd_sc_hd__and3b_1", 5],
|
|
["sky130_fd_sc_hd__nand2_1", 13],
|
|
["sky130_fd_sc_hd__inv_4", 3],
|
|
["sky130_fd_sc_hd__inv_12", 5],
|
|
["mprj2_logic_high", 1],
|
|
["mprj_logic_high", 1],
|
|
["mgmt_protect_hv", 1],
|
|
["sky130_fd_sc_hd__bufbuf_8", 4],
|
|
["sky130_fd_sc_hd__and2b_4", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__diode_2", 3181 ],
|
|
["sky130_fd_sc_hd__decap_6", 1 ],
|
|
["sky130_ef_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__decap_8", 1 ],
|
|
["sky130_fd_sc_hd__buf_6", 1432 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__and2_4", 211 ],
|
|
["sky130_fd_sc_hd__and3b_4", 102 ],
|
|
["sky130_fd_sc_hd__and2_2", 101 ],
|
|
["sky130_fd_sc_hd__nand2_8", 51 ],
|
|
["sky130_fd_sc_hd__nand2_2", 34 ],
|
|
["sky130_fd_sc_hd__buf_8", 559 ],
|
|
["sky130_fd_sc_hd__clkinv_8", 19 ],
|
|
["sky130_fd_sc_hd__clkinv_2", 44 ],
|
|
["sky130_fd_sc_hd__clkbuf_4", 220 ],
|
|
["sky130_fd_sc_hd__buf_4", 85 ],
|
|
["sky130_fd_sc_hd__clkinv_4", 35 ],
|
|
["sky130_fd_sc_hd__and3b_2", 21 ],
|
|
["sky130_fd_sc_hd__and2_1", 21 ],
|
|
["sky130_fd_sc_hd__nand2_4", 66 ],
|
|
["sky130_fd_sc_hd__inv_2", 58 ],
|
|
["sky130_fd_sc_hd__clkbuf_8", 12 ],
|
|
["sky130_fd_sc_hd__and3b_1", 5 ],
|
|
["sky130_fd_sc_hd__nand2_1", 13 ],
|
|
["sky130_fd_sc_hd__inv_4", 3 ],
|
|
["sky130_fd_sc_hd__inv_12", 5 ],
|
|
["mprj2_logic_high", 1 ],
|
|
["mprj_logic_high", 1 ],
|
|
["mgmt_protect_hv", 1 ],
|
|
["sky130_fd_sc_hd__bufbuf_8", 4 ],
|
|
["sky130_fd_sc_hd__and2b_4", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
4204,
|
|
4204
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"vccd2",
|
|
"vssd2",
|
|
"vccd1",
|
|
"vssd1",
|
|
"vdda1",
|
|
"vdda2",
|
|
"vssa2",
|
|
"vssa1",
|
|
"la_data_in_mprj[23]",
|
|
"la_data_in_mprj[7]",
|
|
"la_oenb_core[68]",
|
|
"la_data_in_mprj[22]",
|
|
"la_data_in_mprj[38]",
|
|
"la_oenb_core[36]",
|
|
"la_oenb_core[37]",
|
|
"la_oenb_core[47]",
|
|
"la_oenb_core[78]",
|
|
"mprj_adr_o_user[21]",
|
|
"mprj_adr_o_user[29]",
|
|
"mprj_adr_o_user[28]",
|
|
"mprj_adr_o_user[27]",
|
|
"mprj_adr_o_user[26]",
|
|
"mprj_adr_o_user[25]",
|
|
"mprj_adr_o_user[24]",
|
|
"mprj_adr_o_user[30]",
|
|
"mprj_adr_o_user[31]",
|
|
"mprj_adr_o_user[1]",
|
|
"mprj_adr_o_user[0]",
|
|
"mprj_adr_o_user[5]",
|
|
"mprj_adr_o_user[4]",
|
|
"mprj_adr_o_user[3]",
|
|
"mprj_adr_o_user[2]",
|
|
"la_data_in_mprj[105]",
|
|
"la_data_in_mprj[103]",
|
|
"la_data_in_mprj[104]",
|
|
"la_data_in_mprj[44]",
|
|
"la_data_in_mprj[30]",
|
|
"la_data_in_mprj[45]",
|
|
"la_data_in_mprj[70]",
|
|
"la_data_in_mprj[69]",
|
|
"la_data_in_mprj[68]",
|
|
"la_data_in_mprj[41]",
|
|
"la_data_in_mprj[32]",
|
|
"la_data_in_mprj[102]",
|
|
"la_data_in_mprj[71]",
|
|
"la_data_in_mprj[72]",
|
|
"la_data_in_mprj[73]",
|
|
"la_data_in_mprj[74]",
|
|
"la_data_in_mprj[91]",
|
|
"la_data_in_mprj[92]",
|
|
"la_data_in_mprj[95]",
|
|
"la_data_in_mprj[93]",
|
|
"la_data_in_mprj[101]",
|
|
"la_data_in_mprj[94]",
|
|
"user2_vdd_powergood",
|
|
"la_oenb_core[32]",
|
|
"la_oenb_core[35]",
|
|
"la_oenb_core[43]",
|
|
"la_oenb_core[46]",
|
|
"la_oenb_core[48]",
|
|
"user1_vdd_powergood",
|
|
"la_oenb_core[31]",
|
|
"la_oenb_core[40]",
|
|
"user_clock2",
|
|
"mprj_sel_o_user[3]",
|
|
"mprj_sel_o_user[2]",
|
|
"mprj_sel_o_user[0]",
|
|
"mprj_sel_o_user[1]",
|
|
"mprj_dat_o_user[22]",
|
|
"mprj_dat_o_user[24]",
|
|
"mprj_dat_o_user[23]",
|
|
"mprj_dat_o_user[31]",
|
|
"mprj_dat_o_user[26]",
|
|
"mprj_dat_o_user[27]",
|
|
"mprj_dat_o_user[25]",
|
|
"mprj_dat_i_core[3]",
|
|
"mprj_dat_o_user[28]",
|
|
"mprj_dat_o_user[29]",
|
|
"mprj_dat_o_user[30]",
|
|
"mprj_dat_i_core[7]",
|
|
"mprj_we_o_user",
|
|
"la_data_in_mprj[28]",
|
|
"la_data_in_mprj[127]",
|
|
"la_data_in_mprj[29]",
|
|
"la_data_in_mprj[27]",
|
|
"la_data_in_mprj[42]",
|
|
"la_data_in_mprj[31]",
|
|
"la_data_in_mprj[43]",
|
|
"la_data_in_mprj[21]",
|
|
"la_data_in_mprj[126]",
|
|
"la_data_in_mprj[39]",
|
|
"la_data_in_mprj[18]",
|
|
"la_data_in_mprj[49]",
|
|
"la_data_in_mprj[17]",
|
|
"la_data_in_mprj[125]",
|
|
"la_data_in_mprj[19]",
|
|
"la_data_in_mprj[20]",
|
|
"la_data_in_mprj[46]",
|
|
"la_data_in_mprj[67]",
|
|
"la_data_in_mprj[40]",
|
|
"la_data_in_mprj[33]",
|
|
"la_data_in_mprj[47]",
|
|
"la_data_in_mprj[48]",
|
|
"la_data_in_mprj[75]",
|
|
"la_data_in_mprj[89]",
|
|
"la_data_in_mprj[90]",
|
|
"la_data_in_mprj[106]",
|
|
"la_data_in_mprj[96]",
|
|
"la_data_in_mprj[107]",
|
|
"la_data_in_mprj[100]",
|
|
"la_data_in_mprj[76]",
|
|
"la_data_in_mprj[98]",
|
|
"la_data_in_mprj[88]",
|
|
"la_data_in_mprj[99]",
|
|
"la_data_in_mprj[77]",
|
|
"la_data_in_mprj[97]",
|
|
"la_data_in_mprj[123]",
|
|
"la_data_in_mprj[117]",
|
|
"la_data_in_mprj[115]",
|
|
"la_data_in_mprj[116]",
|
|
"la_data_in_mprj[122]",
|
|
"la_data_in_mprj[34]",
|
|
"la_data_in_mprj[50]",
|
|
"la_data_in_mprj[64]",
|
|
"la_data_in_mprj[66]",
|
|
"la_oenb_core[102]",
|
|
"la_oenb_core[103]",
|
|
"la_oenb_core[107]",
|
|
"la_oenb_core[106]",
|
|
"la_oenb_core[108]",
|
|
"la_oenb_core[109]",
|
|
"la_oenb_core[110]",
|
|
"la_oenb_core[111]",
|
|
"la_oenb_core[122]",
|
|
"la_oenb_core[101]",
|
|
"la_oenb_core[104]",
|
|
"la_oenb_core[105]",
|
|
"la_oenb_core[123]",
|
|
"la_oenb_core[124]",
|
|
"la_oenb_core[125]",
|
|
"la_oenb_core[27]",
|
|
"la_oenb_core[29]",
|
|
"la_oenb_core[51]",
|
|
"la_oenb_core[54]",
|
|
"la_oenb_core[59]",
|
|
"la_oenb_core[62]",
|
|
"la_oenb_core[100]",
|
|
"la_oenb_core[63]",
|
|
"la_oenb_core[74]",
|
|
"la_oenb_core[73]",
|
|
"la_oenb_core[80]",
|
|
"la_oenb_core[81]",
|
|
"la_oenb_core[72]",
|
|
"la_oenb_core[79]",
|
|
"la_oenb_core[75]",
|
|
"la_oenb_core[76]",
|
|
"la_oenb_core[77]",
|
|
"la_oenb_core[82]",
|
|
"la_oenb_core[83]",
|
|
"la_oenb_core[84]",
|
|
"la_oenb_core[85]",
|
|
"la_oenb_core[86]",
|
|
"la_oenb_core[116]",
|
|
"la_oenb_core[87]",
|
|
"la_oenb_core[88]",
|
|
"la_oenb_core[93]",
|
|
"la_oenb_core[92]",
|
|
"la_oenb_core[64]",
|
|
"la_oenb_core[97]",
|
|
"la_oenb_core[98]",
|
|
"la_oenb_core[94]",
|
|
"la_oenb_core[95]",
|
|
"la_oenb_core[117]",
|
|
"la_oenb_core[113]",
|
|
"la_oenb_core[118]",
|
|
"la_oenb_core[115]",
|
|
"la_oenb_core[114]",
|
|
"la_oenb_core[71]",
|
|
"la_oenb_core[112]",
|
|
"la_oenb_core[121]",
|
|
"la_oenb_core[120]",
|
|
"la_oenb_core[119]",
|
|
"la_oenb_core[96]",
|
|
"la_oenb_core[99]",
|
|
"la_data_in_core[32]",
|
|
"la_data_in_core[100]",
|
|
"la_data_in_core[107]",
|
|
"la_data_in_core[125]",
|
|
"la_data_in_core[33]",
|
|
"la_data_in_core[62]",
|
|
"la_data_in_core[31]",
|
|
"la_data_in_core[30]",
|
|
"la_data_in_core[29]",
|
|
"la_data_in_core[101]",
|
|
"la_data_in_core[124]",
|
|
"la_data_in_core[105]",
|
|
"la_data_in_core[104]",
|
|
"la_data_in_core[123]",
|
|
"la_data_in_core[122]",
|
|
"la_data_in_core[108]",
|
|
"la_data_in_core[106]",
|
|
"la_data_in_core[96]",
|
|
"la_data_in_core[99]",
|
|
"la_oenb_core[61]",
|
|
"la_oenb_core[8]",
|
|
"la_oenb_core[126]",
|
|
"la_oenb_core[57]",
|
|
"la_oenb_core[25]",
|
|
"la_oenb_core[15]",
|
|
"la_oenb_core[7]",
|
|
"la_oenb_core[44]",
|
|
"la_oenb_core[91]",
|
|
"la_oenb_core[12]",
|
|
"mprj_adr_o_user[18]",
|
|
"mprj_cyc_o_user",
|
|
"la_data_in_core[109]",
|
|
"la_data_in_core[110]",
|
|
"la_data_in_core[111]",
|
|
"la_data_in_core[117]",
|
|
"la_data_in_core[112]",
|
|
"la_data_in_core[120]",
|
|
"la_data_in_core[121]",
|
|
"la_data_in_core[119]",
|
|
"la_data_in_core[65]",
|
|
"la_data_in_core[69]",
|
|
"la_data_in_core[70]",
|
|
"la_data_in_core[67]",
|
|
"la_data_in_core[66]",
|
|
"la_data_in_core[71]",
|
|
"la_data_in_core[64]",
|
|
"la_data_in_core[63]",
|
|
"la_data_in_core[113]",
|
|
"la_data_in_core[118]",
|
|
"la_data_in_core[115]",
|
|
"la_data_in_core[114]",
|
|
"la_data_in_core[73]",
|
|
"la_data_in_core[78]",
|
|
"la_data_in_core[79]",
|
|
"la_data_in_core[77]",
|
|
"la_data_in_core[76]",
|
|
"la_data_in_core[75]",
|
|
"la_data_in_core[74]",
|
|
"la_data_in_core[72]",
|
|
"la_data_in_core[80]",
|
|
"la_data_in_core[81]",
|
|
"la_data_in_core[82]",
|
|
"la_data_in_core[84]",
|
|
"la_data_in_core[83]",
|
|
"la_data_in_core[116]",
|
|
"la_data_in_core[88]",
|
|
"la_data_in_core[87]",
|
|
"la_data_in_core[86]",
|
|
"la_data_in_core[85]",
|
|
"la_data_in_core[98]",
|
|
"la_data_in_core[97]",
|
|
"la_data_in_core[35]",
|
|
"la_data_in_core[13]",
|
|
"la_data_in_core[4]",
|
|
"la_data_in_core[39]",
|
|
"la_data_in_core[51]",
|
|
"la_data_in_core[38]",
|
|
"la_data_in_core[57]",
|
|
"la_data_in_core[37]",
|
|
"la_data_in_core[36]",
|
|
"la_data_in_core[11]",
|
|
"la_data_in_core[17]",
|
|
"la_data_in_core[127]",
|
|
"la_data_in_core[126]",
|
|
"la_data_in_core[42]",
|
|
"la_data_in_core[41]",
|
|
"la_data_in_core[60]",
|
|
"la_data_in_core[50]",
|
|
"la_data_in_core[19]",
|
|
"la_data_in_core[20]",
|
|
"la_data_in_core[93]",
|
|
"la_data_in_core[92]",
|
|
"la_data_in_core[91]",
|
|
"la_data_in_core[90]",
|
|
"la_data_in_core[102]",
|
|
"la_data_in_core[103]",
|
|
"la_data_in_core[12]",
|
|
"la_data_in_core[25]",
|
|
"la_data_in_core[44]",
|
|
"la_data_in_core[34]",
|
|
"la_data_in_core[43]",
|
|
"la_data_in_core[61]",
|
|
"la_data_in_core[40]",
|
|
"la_data_in_core[8]",
|
|
"la_data_in_core[15]",
|
|
"la_data_in_core[7]",
|
|
"la_data_in_core[21]",
|
|
"la_data_in_core[22]",
|
|
"la_data_in_core[24]",
|
|
"la_data_in_core[14]",
|
|
"la_data_in_core[0]",
|
|
"la_data_in_core[5]",
|
|
"la_data_in_core[3]",
|
|
"la_data_in_core[89]",
|
|
"la_data_in_core[59]",
|
|
"la_data_in_core[49]",
|
|
"la_data_in_core[48]",
|
|
"la_data_in_core[28]",
|
|
"la_data_in_core[23]",
|
|
"la_data_in_core[6]",
|
|
"la_data_in_core[2]",
|
|
"la_data_in_core[1]",
|
|
"la_data_in_core[18]",
|
|
"la_data_in_core[47]",
|
|
"la_data_in_core[27]",
|
|
"la_data_in_core[46]",
|
|
"la_data_in_core[45]",
|
|
"la_data_in_core[94]",
|
|
"la_data_in_core[95]",
|
|
"la_data_in_core[16]",
|
|
"la_data_in_core[10]",
|
|
"la_data_in_core[9]",
|
|
"la_oenb_core[60]",
|
|
"la_oenb_core[20]",
|
|
"la_oenb_core[19]",
|
|
"la_oenb_core[38]",
|
|
"la_oenb_core[26]",
|
|
"la_oenb_core[55]",
|
|
"la_oenb_core[45]",
|
|
"la_oenb_core[28]",
|
|
"la_oenb_core[34]",
|
|
"la_oenb_core[33]",
|
|
"la_oenb_core[18]",
|
|
"la_oenb_core[23]",
|
|
"la_oenb_core[2]",
|
|
"la_oenb_core[1]",
|
|
"la_oenb_core[6]",
|
|
"la_oenb_core[42]",
|
|
"la_oenb_core[14]",
|
|
"la_oenb_core[21]",
|
|
"la_oenb_core[22]",
|
|
"la_oenb_core[24]",
|
|
"la_oenb_core[5]",
|
|
"la_oenb_core[0]",
|
|
"la_oenb_core[3]",
|
|
"la_oenb_core[89]",
|
|
"la_oenb_core[127]",
|
|
"la_oenb_core[17]",
|
|
"la_oenb_core[90]",
|
|
"la_oenb_core[11]",
|
|
"la_oenb_core[10]",
|
|
"la_oenb_core[16]",
|
|
"la_oenb_core[9]",
|
|
"mprj_adr_o_user[20]",
|
|
"la_data_in_core[58]",
|
|
"la_data_in_core[26]",
|
|
"la_data_in_core[52]",
|
|
"la_data_in_core[53]",
|
|
"la_data_in_core[54]",
|
|
"la_data_in_core[55]",
|
|
"la_data_in_core[56]",
|
|
"la_oenb_core[41]",
|
|
"la_oenb_core[49]",
|
|
"la_oenb_core[53]",
|
|
"la_oenb_core[56]",
|
|
"mprj_adr_o_user[19]",
|
|
"mprj_adr_o_user[23]",
|
|
"mprj_adr_o_user[7]",
|
|
"mprj_adr_o_user[16]",
|
|
"mprj_adr_o_user[8]",
|
|
"mprj_adr_o_user[15]",
|
|
"la_oenb_core[39]",
|
|
"la_oenb_core[13]",
|
|
"la_oenb_core[4]",
|
|
"mprj_dat_i_core[1]",
|
|
"mprj_dat_i_core[8]",
|
|
"la_oenb_core[58]",
|
|
"mprj_adr_o_user[12]",
|
|
"mprj_adr_o_user[14]",
|
|
"mprj_adr_o_user[17]",
|
|
"mprj_adr_o_user[6]",
|
|
"mprj_adr_o_user[9]",
|
|
"mprj_dat_o_user[2]",
|
|
"mprj_adr_o_user[13]",
|
|
"mprj_adr_o_user[22]",
|
|
"mprj_dat_o_user[1]",
|
|
"mprj_dat_o_user[0]",
|
|
"mprj_adr_o_user[11]",
|
|
"mprj_dat_o_user[3]",
|
|
"mprj_dat_o_user[7]",
|
|
"mprj_dat_o_user[6]",
|
|
"la_oenb_core[50]",
|
|
"la_oenb_core[52]",
|
|
"mprj_adr_o_user[10]",
|
|
"mprj_dat_o_user[4]",
|
|
"mprj_dat_o_user[5]",
|
|
"mprj_dat_o_user[13]",
|
|
"mprj_dat_o_user[14]",
|
|
"mprj_stb_o_user",
|
|
"mprj_dat_o_user[12]",
|
|
"mprj_dat_o_user[11]",
|
|
"mprj_dat_o_user[10]",
|
|
"mprj_dat_o_user[9]",
|
|
"mprj_dat_o_user[8]",
|
|
"mprj_dat_o_user[17]",
|
|
"mprj_dat_o_user[18]",
|
|
"mprj_dat_o_user[19]",
|
|
"mprj_dat_o_user[20]",
|
|
"mprj_dat_o_user[21]",
|
|
"mprj_dat_o_user[15]",
|
|
"mprj_dat_o_user[16]",
|
|
"user1_vcc_powergood",
|
|
"mprj_dat_i_core[23]",
|
|
"mprj_dat_i_core[29]",
|
|
"mprj_dat_i_core[30]",
|
|
"mprj_dat_i_core[28]",
|
|
"mprj_dat_i_core[31]",
|
|
"mprj_dat_i_core[25]",
|
|
"mprj_dat_i_core[26]",
|
|
"mprj_dat_i_core[22]",
|
|
"mprj_dat_i_core[24]",
|
|
"mprj_dat_i_core[27]",
|
|
"mprj_dat_i_core[5]",
|
|
"mprj_dat_i_core[6]",
|
|
"mprj_dat_i_core[4]",
|
|
"mprj_dat_i_core[19]",
|
|
"mprj_dat_i_core[18]",
|
|
"mprj_dat_i_core[2]",
|
|
"mprj_dat_i_core[14]",
|
|
"mprj_dat_i_core[13]",
|
|
"mprj_dat_i_core[12]",
|
|
"mprj_dat_i_core[11]",
|
|
"mprj_dat_i_core[17]",
|
|
"mprj_dat_i_core[16]",
|
|
"mprj_dat_i_core[15]",
|
|
"mprj_dat_i_core[20]",
|
|
"mprj_dat_i_core[21]",
|
|
"mprj_dat_i_core[0]",
|
|
"mprj_ack_i_core",
|
|
"mprj_dat_i_core[10]",
|
|
"mprj_dat_i_core[9]",
|
|
"user2_vcc_powergood",
|
|
"user_clock",
|
|
"la_data_in_core[68]",
|
|
"la_data_in_mprj[57]",
|
|
"la_data_in_mprj[58]",
|
|
"la_data_in_mprj[59]",
|
|
"la_data_in_mprj[60]",
|
|
"la_data_in_mprj[6]",
|
|
"la_data_in_mprj[10]",
|
|
"la_data_in_mprj[1]",
|
|
"la_data_in_mprj[2]",
|
|
"la_data_in_mprj[3]",
|
|
"la_data_in_mprj[0]",
|
|
"la_data_in_mprj[5]",
|
|
"user_reset",
|
|
"la_data_in_mprj[118]",
|
|
"la_data_in_mprj[114]",
|
|
"la_data_in_mprj[119]",
|
|
"la_data_in_mprj[121]",
|
|
"la_data_in_mprj[120]",
|
|
"la_data_in_mprj[15]",
|
|
"la_data_in_mprj[13]",
|
|
"la_data_in_mprj[16]",
|
|
"la_data_in_mprj[51]",
|
|
"la_data_in_mprj[62]",
|
|
"la_data_in_mprj[63]",
|
|
"la_data_in_mprj[65]",
|
|
"la_data_in_mprj[78]",
|
|
"la_data_in_mprj[79]",
|
|
"la_data_in_mprj[87]",
|
|
"la_data_in_mprj[82]",
|
|
"la_data_in_mprj[83]",
|
|
"la_data_in_mprj[84]",
|
|
"la_data_in_mprj[85]",
|
|
"la_data_in_mprj[108]",
|
|
"la_data_in_mprj[8]",
|
|
"la_data_in_mprj[14]",
|
|
"la_data_in_mprj[124]",
|
|
"la_data_in_mprj[12]",
|
|
"la_data_in_mprj[35]",
|
|
"la_data_in_mprj[24]",
|
|
"la_data_in_mprj[4]",
|
|
"la_data_in_mprj[26]",
|
|
"la_data_in_mprj[25]",
|
|
"user_irq[0]",
|
|
"la_data_in_mprj[36]",
|
|
"la_data_in_mprj[37]",
|
|
"user_irq[2]",
|
|
"user_irq[1]",
|
|
"la_data_in_mprj[111]",
|
|
"la_data_in_mprj[110]",
|
|
"la_data_in_mprj[109]",
|
|
"la_data_in_mprj[113]",
|
|
"la_data_in_mprj[112]",
|
|
"la_data_in_mprj[52]",
|
|
"la_data_in_mprj[53]",
|
|
"la_data_in_mprj[54]",
|
|
"la_data_in_mprj[61]",
|
|
"la_data_in_mprj[80]",
|
|
"la_data_in_mprj[81]",
|
|
"la_data_in_mprj[86]",
|
|
"la_data_in_mprj[11]",
|
|
"la_data_in_mprj[55]",
|
|
"la_data_in_mprj[56]",
|
|
"la_data_in_mprj[9]",
|
|
"la_oenb_core[30]",
|
|
"la_oenb_core[69]",
|
|
"la_oenb_core[65]",
|
|
"la_oenb_core[70]",
|
|
"la_oenb_core[67]",
|
|
"la_oenb_core[66]",
|
|
"la_data_out_core[28]",
|
|
"la_data_out_core[29]",
|
|
"la_data_out_core[27]",
|
|
"la_data_out_core[127]",
|
|
"la_data_out_core[31]",
|
|
"la_data_out_core[43]",
|
|
"la_data_out_core[42]",
|
|
"la_data_out_core[38]",
|
|
"la_data_out_core[22]",
|
|
"la_data_out_core[24]",
|
|
"la_data_out_core[4]",
|
|
"la_data_out_core[23]",
|
|
"la_data_out_core[58]",
|
|
"la_data_out_core[59]",
|
|
"la_data_out_core[60]",
|
|
"la_data_out_core[36]",
|
|
"la_data_out_core[37]",
|
|
"la_data_out_core[26]",
|
|
"user_irq_core[0]",
|
|
"la_data_out_core[25]",
|
|
"la_data_out_core[126]",
|
|
"la_data_out_core[61]",
|
|
"la_data_out_core[21]",
|
|
"user_irq_core[2]",
|
|
"user_irq_core[1]",
|
|
"la_data_out_core[6]",
|
|
"la_data_out_core[10]",
|
|
"la_data_out_core[0]",
|
|
"la_data_out_core[5]",
|
|
"la_data_out_core[1]",
|
|
"la_data_out_core[2]",
|
|
"la_data_out_core[3]",
|
|
"la_data_out_core[13]",
|
|
"la_data_out_core[15]",
|
|
"la_data_out_core[44]",
|
|
"la_data_out_core[52]",
|
|
"la_data_out_core[53]",
|
|
"la_data_out_core[17]",
|
|
"la_data_out_core[125]",
|
|
"la_data_out_core[19]",
|
|
"la_data_out_core[20]",
|
|
"la_data_out_core[67]",
|
|
"la_data_out_core[46]",
|
|
"la_data_out_core[50]",
|
|
"la_data_out_core[64]",
|
|
"la_data_out_core[66]",
|
|
"la_data_out_core[30]",
|
|
"la_data_out_core[45]",
|
|
"la_data_out_core[68]",
|
|
"la_data_out_core[70]",
|
|
"la_data_out_core[69]",
|
|
"la_data_out_core[18]",
|
|
"la_data_out_core[49]",
|
|
"la_data_out_core[16]",
|
|
"la_data_out_core[51]",
|
|
"la_data_out_core[62]",
|
|
"la_data_out_core[63]",
|
|
"la_data_out_core[65]",
|
|
"la_data_out_core[57]",
|
|
"la_data_out_core[12]",
|
|
"la_data_out_core[7]",
|
|
"la_data_out_core[121]",
|
|
"la_data_out_core[122]",
|
|
"la_data_out_core[123]",
|
|
"la_data_out_core[97]",
|
|
"la_data_out_core[77]",
|
|
"la_data_out_core[95]",
|
|
"la_data_out_core[91]",
|
|
"la_data_out_core[92]",
|
|
"la_data_out_core[120]",
|
|
"la_data_out_core[35]",
|
|
"la_data_out_core[88]",
|
|
"la_data_out_core[99]",
|
|
"la_data_out_core[98]",
|
|
"la_data_out_core[9]",
|
|
"la_data_out_core[11]",
|
|
"la_data_out_core[39]",
|
|
"la_data_out_core[78]",
|
|
"la_data_out_core[55]",
|
|
"la_data_out_core[56]",
|
|
"mprj_dat_i_user[12]",
|
|
"mprj_dat_i_user[13]",
|
|
"mprj_dat_i_user[14]",
|
|
"la_data_out_core[105]",
|
|
"mprj_dat_i_user[23]",
|
|
"la_data_out_core[114]",
|
|
"la_data_out_core[118]",
|
|
"la_data_out_core[119]",
|
|
"la_data_out_core[106]",
|
|
"la_data_out_core[96]",
|
|
"la_data_out_core[117]",
|
|
"la_data_out_core[115]",
|
|
"la_data_out_core[116]",
|
|
"la_data_out_core[89]",
|
|
"la_data_out_core[90]",
|
|
"la_data_out_core[113]",
|
|
"la_data_out_core[112]",
|
|
"la_data_out_core[103]",
|
|
"la_data_out_core[104]",
|
|
"la_data_out_core[110]",
|
|
"la_data_out_core[109]",
|
|
"la_data_out_core[111]",
|
|
"la_data_out_core[84]",
|
|
"la_data_out_core[83]",
|
|
"la_data_out_core[82]",
|
|
"la_data_out_core[85]",
|
|
"la_data_out_core[86]",
|
|
"la_data_out_core[81]",
|
|
"la_data_out_core[107]",
|
|
"la_data_out_core[100]",
|
|
"la_data_out_core[76]",
|
|
"la_data_out_core[41]",
|
|
"la_data_out_core[93]",
|
|
"la_data_out_core[40]",
|
|
"la_data_out_core[54]",
|
|
"la_data_out_core[79]",
|
|
"la_data_out_core[80]",
|
|
"la_data_out_core[87]",
|
|
"mprj_dat_i_user[24]",
|
|
"la_data_out_core[14]",
|
|
"la_data_out_core[124]",
|
|
"la_data_out_core[101]",
|
|
"la_data_out_core[94]",
|
|
"la_data_out_core[108]",
|
|
"la_data_out_core[8]",
|
|
"la_data_out_core[32]",
|
|
"la_data_out_core[102]",
|
|
"la_data_out_core[71]",
|
|
"la_data_out_core[72]",
|
|
"la_data_out_core[73]",
|
|
"la_data_out_core[74]",
|
|
"la_data_out_core[33]",
|
|
"la_data_out_core[47]",
|
|
"la_data_out_core[48]",
|
|
"la_data_out_core[75]",
|
|
"la_data_out_core[34]",
|
|
"mprj_dat_i_user[22]",
|
|
"mprj_dat_i_user[26]",
|
|
"mprj_dat_i_user[25]",
|
|
"mprj_dat_i_user[19]",
|
|
"mprj_dat_i_user[18]",
|
|
"mprj_dat_i_user[2]",
|
|
"mprj_dat_i_user[29]",
|
|
"mprj_dat_i_user[28]",
|
|
"mprj_dat_i_user[30]",
|
|
"mprj_dat_i_user[31]",
|
|
"mprj_dat_i_user[3]",
|
|
"mprj_dat_i_user[27]",
|
|
"mprj_dat_i_user[5]",
|
|
"mprj_dat_i_user[4]",
|
|
"mprj_dat_i_user[6]",
|
|
"mprj_dat_i_user[11]",
|
|
"mprj_dat_i_user[7]",
|
|
"mprj_dat_i_user[17]",
|
|
"mprj_dat_i_user[16]",
|
|
"mprj_dat_i_user[15]",
|
|
"mprj_dat_i_user[20]",
|
|
"mprj_dat_i_user[21]",
|
|
"mprj_dat_i_user[8]",
|
|
"mprj_dat_i_user[0]",
|
|
"mprj_dat_i_user[10]",
|
|
"mprj_dat_i_user[9]",
|
|
"mprj_ack_i_user",
|
|
"mprj_dat_i_user[1]",
|
|
"la_oenb_mprj[46]",
|
|
"la_oenb_mprj[48]",
|
|
"la_oenb_mprj[54]",
|
|
"la_oenb_mprj[107]",
|
|
"la_oenb_mprj[7]",
|
|
"la_oenb_mprj[15]",
|
|
"la_oenb_mprj[12]",
|
|
"la_oenb_mprj[103]",
|
|
"la_oenb_mprj[102]",
|
|
"la_oenb_mprj[109]",
|
|
"la_oenb_mprj[110]",
|
|
"la_oenb_mprj[111]",
|
|
"la_oenb_mprj[27]",
|
|
"la_oenb_mprj[106]",
|
|
"la_oenb_mprj[108]",
|
|
"la_oenb_mprj[126]",
|
|
"la_oenb_mprj[38]",
|
|
"la_oenb_mprj[17]",
|
|
"la_oenb_mprj[127]",
|
|
"la_oenb_mprj[90]",
|
|
"la_oenb_mprj[125]",
|
|
"la_oenb_mprj[33]",
|
|
"la_oenb_mprj[19]",
|
|
"la_oenb_mprj[20]",
|
|
"la_oenb_mprj[42]",
|
|
"la_oenb_mprj[60]",
|
|
"la_oenb_mprj[61]",
|
|
"la_oenb_mprj[45]",
|
|
"la_oenb_mprj[14]",
|
|
"la_oenb_mprj[0]",
|
|
"la_oenb_mprj[3]",
|
|
"la_oenb_mprj[5]",
|
|
"la_oenb_mprj[89]",
|
|
"la_oenb_mprj[24]",
|
|
"la_oenb_mprj[22]",
|
|
"la_oenb_mprj[21]",
|
|
"la_oenb_mprj[57]",
|
|
"la_oenb_mprj[8]",
|
|
"la_oenb_mprj[47]",
|
|
"la_oenb_mprj[78]",
|
|
"la_oenb_mprj[59]",
|
|
"la_oenb_mprj[94]",
|
|
"la_oenb_mprj[95]",
|
|
"la_oenb_mprj[40]",
|
|
"la_oenb_mprj[43]",
|
|
"la_oenb_mprj[36]",
|
|
"la_oenb_mprj[37]",
|
|
"la_oenb_mprj[92]",
|
|
"la_oenb_mprj[93]",
|
|
"la_oenb_mprj[31]",
|
|
"la_oenb_mprj[122]",
|
|
"la_oenb_mprj[11]",
|
|
"la_oenb_mprj[50]",
|
|
"la_oenb_mprj[9]",
|
|
"la_oenb_mprj[10]",
|
|
"la_oenb_mprj[16]",
|
|
"la_oenb_mprj[101]",
|
|
"la_oenb_mprj[104]",
|
|
"la_oenb_mprj[105]",
|
|
"la_oenb_mprj[123]",
|
|
"la_oenb_mprj[124]",
|
|
"la_oenb_mprj[26]",
|
|
"la_oenb_mprj[55]",
|
|
"la_oenb_mprj[25]",
|
|
"la_oenb_mprj[44]",
|
|
"la_oenb_mprj[49]",
|
|
"la_oenb_mprj[53]",
|
|
"la_oenb_mprj[56]",
|
|
"la_oenb_mprj[52]",
|
|
"la_oenb_mprj[28]",
|
|
"la_oenb_mprj[34]",
|
|
"la_oenb_mprj[1]",
|
|
"la_oenb_mprj[2]",
|
|
"la_oenb_mprj[23]",
|
|
"la_oenb_mprj[18]",
|
|
"la_oenb_mprj[6]",
|
|
"la_oenb_mprj[91]",
|
|
"la_oenb_mprj[41]",
|
|
"la_iena_mprj[126]",
|
|
"la_data_out_mprj[52]",
|
|
"la_data_out_mprj[53]",
|
|
"la_data_out_mprj[54]",
|
|
"la_data_out_mprj[55]",
|
|
"la_data_out_mprj[56]",
|
|
"la_data_out_mprj[110]",
|
|
"la_data_out_mprj[111]",
|
|
"la_data_out_mprj[120]",
|
|
"la_data_out_mprj[119]",
|
|
"la_data_out_mprj[121]",
|
|
"la_data_out_mprj[79]",
|
|
"la_data_out_mprj[77]",
|
|
"la_data_out_mprj[76]",
|
|
"la_data_out_mprj[75]",
|
|
"la_data_out_mprj[74]",
|
|
"la_data_out_mprj[72]",
|
|
"la_iena_mprj[120]",
|
|
"la_iena_mprj[21]",
|
|
"la_iena_mprj[29]",
|
|
"la_iena_mprj[27]",
|
|
"la_iena_mprj[127]",
|
|
"la_iena_mprj[19]",
|
|
"la_iena_mprj[20]",
|
|
"la_iena_mprj[125]",
|
|
"la_iena_mprj[45]",
|
|
"la_iena_mprj[64]",
|
|
"la_iena_mprj[66]",
|
|
"la_iena_mprj[67]",
|
|
"la_iena_mprj[46]",
|
|
"la_iena_mprj[70]",
|
|
"la_iena_mprj[69]",
|
|
"la_iena_mprj[68]",
|
|
"la_iena_mprj[18]",
|
|
"la_iena_mprj[44]",
|
|
"la_iena_mprj[49]",
|
|
"la_data_out_mprj[58]",
|
|
"la_iena_mprj[101]",
|
|
"la_iena_mprj[119]",
|
|
"la_iena_mprj[121]",
|
|
"la_iena_mprj[122]",
|
|
"la_iena_mprj[123]",
|
|
"la_iena_mprj[47]",
|
|
"mprj_sel_o_core[3]",
|
|
"la_oenb_mprj[30]",
|
|
"la_oenb_mprj[32]",
|
|
"la_oenb_mprj[35]",
|
|
"la_oenb_mprj[51]",
|
|
"la_oenb_mprj[58]",
|
|
"la_oenb_mprj[100]",
|
|
"la_oenb_mprj[29]",
|
|
"la_oenb_mprj[62]",
|
|
"la_oenb_mprj[66]",
|
|
"la_oenb_mprj[67]",
|
|
"la_oenb_mprj[70]",
|
|
"la_oenb_mprj[117]",
|
|
"la_oenb_mprj[63]",
|
|
"la_oenb_mprj[97]",
|
|
"la_oenb_mprj[98]",
|
|
"la_oenb_mprj[112]",
|
|
"la_oenb_mprj[120]",
|
|
"la_oenb_mprj[119]",
|
|
"la_oenb_mprj[121]",
|
|
"la_oenb_mprj[113]",
|
|
"la_oenb_mprj[114]",
|
|
"la_oenb_mprj[115]",
|
|
"la_oenb_mprj[118]",
|
|
"la_oenb_mprj[64]",
|
|
"la_oenb_mprj[71]",
|
|
"la_oenb_mprj[96]",
|
|
"la_oenb_mprj[99]",
|
|
"la_oenb_mprj[73]",
|
|
"la_oenb_mprj[80]",
|
|
"la_oenb_mprj[81]",
|
|
"la_oenb_mprj[72]",
|
|
"la_oenb_mprj[74]",
|
|
"la_oenb_mprj[75]",
|
|
"la_oenb_mprj[76]",
|
|
"la_oenb_mprj[77]",
|
|
"la_oenb_mprj[79]",
|
|
"la_data_out_mprj[65]",
|
|
"la_data_out_mprj[66]",
|
|
"la_data_out_mprj[67]",
|
|
"la_data_out_mprj[70]",
|
|
"la_data_out_mprj[81]",
|
|
"la_data_out_mprj[80]",
|
|
"la_data_out_mprj[113]",
|
|
"la_data_out_mprj[114]",
|
|
"la_data_out_mprj[115]",
|
|
"la_data_out_mprj[118]",
|
|
"la_data_out_mprj[63]",
|
|
"la_data_out_mprj[64]",
|
|
"la_data_out_mprj[71]",
|
|
"la_iena_mprj[28]",
|
|
"mprj_dat_o_core[29]",
|
|
"mprj_dat_o_core[30]",
|
|
"caravel_rstn",
|
|
"mprj_adr_o_core[22]",
|
|
"mprj_adr_o_core[0]",
|
|
"mprj_adr_o_core[31]",
|
|
"mprj_adr_o_core[9]",
|
|
"mprj_adr_o_core[6]",
|
|
"mprj_iena_wb",
|
|
"mprj_dat_o_core[10]",
|
|
"mprj_dat_o_core[11]",
|
|
"mprj_dat_o_core[12]",
|
|
"mprj_dat_o_core[14]",
|
|
"mprj_dat_o_core[13]",
|
|
"mprj_dat_o_core[16]",
|
|
"mprj_dat_o_core[15]",
|
|
"mprj_dat_o_core[17]",
|
|
"mprj_dat_o_core[8]",
|
|
"mprj_dat_o_core[9]",
|
|
"mprj_stb_o_core",
|
|
"la_oenb_mprj[68]",
|
|
"la_oenb_mprj[69]",
|
|
"la_oenb_mprj[65]",
|
|
"la_oenb_mprj[84]",
|
|
"la_oenb_mprj[88]",
|
|
"la_oenb_mprj[116]",
|
|
"la_oenb_mprj[86]",
|
|
"la_oenb_mprj[85]",
|
|
"la_oenb_mprj[87]",
|
|
"la_oenb_mprj[83]",
|
|
"la_oenb_mprj[82]",
|
|
"la_data_out_mprj[68]",
|
|
"la_data_out_mprj[69]",
|
|
"la_data_out_mprj[83]",
|
|
"la_data_out_mprj[84]",
|
|
"la_data_out_mprj[116]",
|
|
"la_data_out_mprj[85]",
|
|
"la_data_out_mprj[86]",
|
|
"la_data_out_mprj[87]",
|
|
"la_data_out_mprj[88]",
|
|
"la_data_out_mprj[82]",
|
|
"la_data_out_mprj[117]",
|
|
"mprj_dat_o_core[23]",
|
|
"mprj_dat_o_core[24]",
|
|
"mprj_dat_o_core[28]",
|
|
"mprj_dat_o_core[25]",
|
|
"mprj_dat_o_core[27]",
|
|
"mprj_dat_o_core[26]",
|
|
"mprj_dat_o_core[31]",
|
|
"mprj_adr_o_core[13]",
|
|
"mprj_dat_o_core[2]",
|
|
"mprj_adr_o_core[11]",
|
|
"mprj_dat_o_core[3]",
|
|
"mprj_dat_o_core[6]",
|
|
"mprj_dat_o_core[7]",
|
|
"mprj_adr_o_core[10]",
|
|
"mprj_dat_o_core[4]",
|
|
"mprj_dat_o_core[5]",
|
|
"mprj_adr_o_core[14]",
|
|
"mprj_adr_o_core[17]",
|
|
"mprj_adr_o_core[12]",
|
|
"mprj_adr_o_core[20]",
|
|
"mprj_adr_o_core[23]",
|
|
"mprj_adr_o_core[19]",
|
|
"mprj_adr_o_core[18]",
|
|
"mprj_adr_o_core[16]",
|
|
"mprj_adr_o_core[7]",
|
|
"mprj_cyc_o_core",
|
|
"mprj_adr_o_core[1]",
|
|
"mprj_adr_o_core[2]",
|
|
"mprj_adr_o_core[3]",
|
|
"mprj_adr_o_core[4]",
|
|
"mprj_adr_o_core[5]",
|
|
"mprj_adr_o_core[15]",
|
|
"mprj_adr_o_core[21]",
|
|
"mprj_adr_o_core[8]",
|
|
"mprj_adr_o_core[24]",
|
|
"mprj_adr_o_core[25]",
|
|
"mprj_adr_o_core[26]",
|
|
"mprj_adr_o_core[27]",
|
|
"mprj_adr_o_core[28]",
|
|
"mprj_adr_o_core[29]",
|
|
"mprj_adr_o_core[30]",
|
|
"mprj_dat_o_core[0]",
|
|
"mprj_dat_o_core[1]",
|
|
"mprj_dat_o_core[18]",
|
|
"mprj_dat_o_core[19]",
|
|
"mprj_dat_o_core[20]",
|
|
"mprj_dat_o_core[21]",
|
|
"mprj_dat_o_core[22]",
|
|
"mprj_we_o_core",
|
|
"la_data_out_mprj[39]",
|
|
"la_data_out_mprj[13]",
|
|
"la_data_out_mprj[4]",
|
|
"la_iena_mprj[35]",
|
|
"la_iena_mprj[54]",
|
|
"la_iena_mprj[55]",
|
|
"la_iena_mprj[56]",
|
|
"la_iena_mprj[57]",
|
|
"la_iena_mprj[77]",
|
|
"la_iena_mprj[90]",
|
|
"la_iena_mprj[93]",
|
|
"la_data_out_mprj[51]",
|
|
"la_iena_mprj[4]",
|
|
"la_iena_mprj[1]",
|
|
"la_iena_mprj[2]",
|
|
"la_iena_mprj[3]",
|
|
"user_irq_ena[1]",
|
|
"la_iena_mprj[10]",
|
|
"la_iena_mprj[0]",
|
|
"la_iena_mprj[5]",
|
|
"la_data_out_mprj[102]",
|
|
"la_data_out_mprj[103]",
|
|
"la_data_out_mprj[11]",
|
|
"la_data_out_mprj[126]",
|
|
"la_data_out_mprj[127]",
|
|
"la_data_out_mprj[17]",
|
|
"la_data_out_mprj[19]",
|
|
"la_data_out_mprj[20]",
|
|
"la_data_out_mprj[41]",
|
|
"la_data_out_mprj[42]",
|
|
"la_data_out_mprj[50]",
|
|
"la_data_out_mprj[60]",
|
|
"la_data_out_mprj[90]",
|
|
"la_data_out_mprj[91]",
|
|
"la_data_out_mprj[92]",
|
|
"la_data_out_mprj[93]",
|
|
"la_iena_mprj[13]",
|
|
"la_iena_mprj[36]",
|
|
"la_iena_mprj[37]",
|
|
"la_iena_mprj[38]",
|
|
"la_iena_mprj[58]",
|
|
"la_iena_mprj[59]",
|
|
"la_iena_mprj[60]",
|
|
"la_iena_mprj[6]",
|
|
"la_iena_mprj[96]",
|
|
"la_data_out_mprj[112]",
|
|
"caravel_clk",
|
|
"caravel_clk2",
|
|
"la_iena_mprj[117]",
|
|
"la_iena_mprj[115]",
|
|
"la_iena_mprj[116]",
|
|
"la_iena_mprj[111]",
|
|
"la_iena_mprj[110]",
|
|
"la_iena_mprj[109]",
|
|
"la_iena_mprj[34]",
|
|
"la_iena_mprj[39]",
|
|
"la_iena_mprj[40]",
|
|
"la_iena_mprj[41]",
|
|
"la_iena_mprj[42]",
|
|
"la_iena_mprj[78]",
|
|
"la_iena_mprj[7]",
|
|
"la_iena_mprj[81]",
|
|
"la_iena_mprj[82]",
|
|
"la_iena_mprj[83]",
|
|
"la_iena_mprj[84]",
|
|
"la_iena_mprj[85]",
|
|
"la_iena_mprj[86]",
|
|
"la_iena_mprj[89]",
|
|
"la_iena_mprj[108]",
|
|
"la_iena_mprj[8]",
|
|
"la_iena_mprj[88]",
|
|
"la_iena_mprj[87]",
|
|
"la_iena_mprj[92]",
|
|
"la_iena_mprj[91]",
|
|
"la_iena_mprj[95]",
|
|
"la_iena_mprj[9]",
|
|
"la_data_out_mprj[32]",
|
|
"la_iena_mprj[79]",
|
|
"la_iena_mprj[80]",
|
|
"la_data_out_mprj[36]",
|
|
"la_data_out_mprj[37]",
|
|
"la_data_out_mprj[38]",
|
|
"la_data_out_mprj[57]",
|
|
"la_oenb_mprj[39]",
|
|
"la_oenb_mprj[4]",
|
|
"la_oenb_mprj[13]",
|
|
"la_iena_mprj[15]",
|
|
"la_data_out_mprj[35]",
|
|
"la_iena_mprj[118]",
|
|
"la_iena_mprj[107]",
|
|
"la_iena_mprj[113]",
|
|
"la_iena_mprj[103]",
|
|
"la_iena_mprj[104]",
|
|
"la_iena_mprj[112]",
|
|
"la_iena_mprj[114]",
|
|
"la_iena_mprj[100]",
|
|
"la_iena_mprj[31]",
|
|
"la_iena_mprj[43]",
|
|
"la_iena_mprj[48]",
|
|
"la_iena_mprj[71]",
|
|
"la_iena_mprj[72]",
|
|
"la_iena_mprj[73]",
|
|
"la_iena_mprj[74]",
|
|
"la_iena_mprj[75]",
|
|
"la_iena_mprj[76]",
|
|
"la_iena_mprj[94]",
|
|
"la_iena_mprj[124]",
|
|
"la_iena_mprj[102]",
|
|
"la_iena_mprj[32]",
|
|
"la_iena_mprj[14]",
|
|
"la_iena_mprj[33]",
|
|
"la_iena_mprj[12]",
|
|
"la_iena_mprj[97]",
|
|
"la_iena_mprj[98]",
|
|
"la_iena_mprj[11]",
|
|
"la_iena_mprj[99]",
|
|
"mprj_sel_o_core[0]",
|
|
"mprj_sel_o_core[1]",
|
|
"la_iena_mprj[61]",
|
|
"user_irq_ena[0]",
|
|
"la_iena_mprj[26]",
|
|
"la_iena_mprj[25]",
|
|
"la_iena_mprj[23]",
|
|
"user_irq_ena[2]",
|
|
"la_data_out_mprj[109]",
|
|
"la_data_out_mprj[12]",
|
|
"la_data_out_mprj[25]",
|
|
"la_data_out_mprj[27]",
|
|
"la_data_out_mprj[28]",
|
|
"la_data_out_mprj[34]",
|
|
"la_data_out_mprj[40]",
|
|
"la_data_out_mprj[43]",
|
|
"la_data_out_mprj[44]",
|
|
"la_data_out_mprj[45]",
|
|
"la_data_out_mprj[46]",
|
|
"la_data_out_mprj[47]",
|
|
"la_data_out_mprj[48]",
|
|
"la_data_out_mprj[49]",
|
|
"la_data_out_mprj[59]",
|
|
"la_data_out_mprj[61]",
|
|
"la_data_out_mprj[23]",
|
|
"la_data_out_mprj[18]",
|
|
"la_data_out_mprj[1]",
|
|
"la_data_out_mprj[2]",
|
|
"la_data_out_mprj[6]",
|
|
"la_data_out_mprj[73]",
|
|
"la_data_out_mprj[78]",
|
|
"la_data_out_mprj[15]",
|
|
"la_data_out_mprj[7]",
|
|
"la_data_out_mprj[21]",
|
|
"la_data_out_mprj[89]",
|
|
"la_data_out_mprj[0]",
|
|
"la_data_out_mprj[14]",
|
|
"la_data_out_mprj[3]",
|
|
"la_data_out_mprj[5]",
|
|
"la_data_out_mprj[22]",
|
|
"la_data_out_mprj[24]",
|
|
"la_data_out_mprj[8]",
|
|
"la_data_out_mprj[95]",
|
|
"la_data_out_mprj[94]",
|
|
"la_data_out_mprj[98]",
|
|
"la_data_out_mprj[97]",
|
|
"la_data_out_mprj[10]",
|
|
"la_data_out_mprj[16]",
|
|
"la_data_out_mprj[9]",
|
|
"la_iena_mprj[105]",
|
|
"la_iena_mprj[106]",
|
|
"la_iena_mprj[22]",
|
|
"la_iena_mprj[24]",
|
|
"la_iena_mprj[30]",
|
|
"la_iena_mprj[17]",
|
|
"la_iena_mprj[16]",
|
|
"la_iena_mprj[50]",
|
|
"la_iena_mprj[51]",
|
|
"la_iena_mprj[52]",
|
|
"la_iena_mprj[53]",
|
|
"la_iena_mprj[62]",
|
|
"la_iena_mprj[63]",
|
|
"la_iena_mprj[65]",
|
|
"mprj_sel_o_core[2]",
|
|
"la_data_out_mprj[100]",
|
|
"la_data_out_mprj[107]",
|
|
"la_data_out_mprj[125]",
|
|
"la_data_out_mprj[26]",
|
|
"la_data_out_mprj[101]",
|
|
"la_data_out_mprj[104]",
|
|
"la_data_out_mprj[105]",
|
|
"la_data_out_mprj[123]",
|
|
"la_data_out_mprj[124]",
|
|
"la_data_out_mprj[29]",
|
|
"la_data_out_mprj[30]",
|
|
"la_data_out_mprj[31]",
|
|
"la_data_out_mprj[33]",
|
|
"la_data_out_mprj[62]",
|
|
"la_data_out_mprj[106]",
|
|
"la_data_out_mprj[108]",
|
|
"la_data_out_mprj[122]",
|
|
"la_data_out_mprj[99]",
|
|
"la_data_out_mprj[96]",
|
|
"vssd",
|
|
"vccd"
|
|
], [
|
|
"vccd2",
|
|
"vssd2",
|
|
"vccd1",
|
|
"vssd1",
|
|
"vdda1",
|
|
"vdda2",
|
|
"vssa2",
|
|
"vssa1",
|
|
"la_data_in_mprj[23]",
|
|
"la_data_in_mprj[7]",
|
|
"la_oenb_core[68]",
|
|
"la_data_in_mprj[22]",
|
|
"la_data_in_mprj[38]",
|
|
"la_oenb_core[36]",
|
|
"la_oenb_core[37]",
|
|
"la_oenb_core[47]",
|
|
"la_oenb_core[78]",
|
|
"mprj_adr_o_user[21]",
|
|
"mprj_adr_o_user[29]",
|
|
"mprj_adr_o_user[28]",
|
|
"mprj_adr_o_user[27]",
|
|
"mprj_adr_o_user[26]",
|
|
"mprj_adr_o_user[25]",
|
|
"mprj_adr_o_user[24]",
|
|
"mprj_adr_o_user[30]",
|
|
"mprj_adr_o_user[31]",
|
|
"mprj_adr_o_user[1]",
|
|
"mprj_adr_o_user[0]",
|
|
"mprj_adr_o_user[5]",
|
|
"mprj_adr_o_user[4]",
|
|
"mprj_adr_o_user[3]",
|
|
"mprj_adr_o_user[2]",
|
|
"la_data_in_mprj[105]",
|
|
"la_data_in_mprj[103]",
|
|
"la_data_in_mprj[104]",
|
|
"la_data_in_mprj[44]",
|
|
"la_data_in_mprj[30]",
|
|
"la_data_in_mprj[45]",
|
|
"la_data_in_mprj[70]",
|
|
"la_data_in_mprj[69]",
|
|
"la_data_in_mprj[68]",
|
|
"la_data_in_mprj[41]",
|
|
"la_data_in_mprj[32]",
|
|
"la_data_in_mprj[102]",
|
|
"la_data_in_mprj[71]",
|
|
"la_data_in_mprj[72]",
|
|
"la_data_in_mprj[73]",
|
|
"la_data_in_mprj[74]",
|
|
"la_data_in_mprj[91]",
|
|
"la_data_in_mprj[92]",
|
|
"la_data_in_mprj[95]",
|
|
"la_data_in_mprj[93]",
|
|
"la_data_in_mprj[101]",
|
|
"la_data_in_mprj[94]",
|
|
"user2_vdd_powergood",
|
|
"la_oenb_core[32]",
|
|
"la_oenb_core[35]",
|
|
"la_oenb_core[43]",
|
|
"la_oenb_core[46]",
|
|
"la_oenb_core[48]",
|
|
"user1_vdd_powergood",
|
|
"la_oenb_core[31]",
|
|
"la_oenb_core[40]",
|
|
"user_clock2",
|
|
"mprj_sel_o_user[3]",
|
|
"mprj_sel_o_user[2]",
|
|
"mprj_sel_o_user[0]",
|
|
"mprj_sel_o_user[1]",
|
|
"mprj_dat_o_user[22]",
|
|
"mprj_dat_o_user[24]",
|
|
"mprj_dat_o_user[23]",
|
|
"mprj_dat_o_user[31]",
|
|
"mprj_dat_o_user[26]",
|
|
"mprj_dat_o_user[27]",
|
|
"mprj_dat_o_user[25]",
|
|
"mprj_dat_i_core[3]",
|
|
"mprj_dat_o_user[28]",
|
|
"mprj_dat_o_user[29]",
|
|
"mprj_dat_o_user[30]",
|
|
"mprj_dat_i_core[7]",
|
|
"mprj_we_o_user",
|
|
"la_data_in_mprj[28]",
|
|
"la_data_in_mprj[127]",
|
|
"la_data_in_mprj[29]",
|
|
"la_data_in_mprj[27]",
|
|
"la_data_in_mprj[42]",
|
|
"la_data_in_mprj[31]",
|
|
"la_data_in_mprj[43]",
|
|
"la_data_in_mprj[21]",
|
|
"la_data_in_mprj[126]",
|
|
"la_data_in_mprj[39]",
|
|
"la_data_in_mprj[18]",
|
|
"la_data_in_mprj[49]",
|
|
"la_data_in_mprj[17]",
|
|
"la_data_in_mprj[125]",
|
|
"la_data_in_mprj[19]",
|
|
"la_data_in_mprj[20]",
|
|
"la_data_in_mprj[46]",
|
|
"la_data_in_mprj[67]",
|
|
"la_data_in_mprj[40]",
|
|
"la_data_in_mprj[33]",
|
|
"la_data_in_mprj[47]",
|
|
"la_data_in_mprj[48]",
|
|
"la_data_in_mprj[75]",
|
|
"la_data_in_mprj[89]",
|
|
"la_data_in_mprj[90]",
|
|
"la_data_in_mprj[106]",
|
|
"la_data_in_mprj[96]",
|
|
"la_data_in_mprj[107]",
|
|
"la_data_in_mprj[100]",
|
|
"la_data_in_mprj[76]",
|
|
"la_data_in_mprj[98]",
|
|
"la_data_in_mprj[88]",
|
|
"la_data_in_mprj[99]",
|
|
"la_data_in_mprj[77]",
|
|
"la_data_in_mprj[97]",
|
|
"la_data_in_mprj[123]",
|
|
"la_data_in_mprj[117]",
|
|
"la_data_in_mprj[115]",
|
|
"la_data_in_mprj[116]",
|
|
"la_data_in_mprj[122]",
|
|
"la_data_in_mprj[34]",
|
|
"la_data_in_mprj[50]",
|
|
"la_data_in_mprj[64]",
|
|
"la_data_in_mprj[66]",
|
|
"la_oenb_core[102]",
|
|
"la_oenb_core[103]",
|
|
"la_oenb_core[107]",
|
|
"la_oenb_core[106]",
|
|
"la_oenb_core[108]",
|
|
"la_oenb_core[109]",
|
|
"la_oenb_core[110]",
|
|
"la_oenb_core[111]",
|
|
"la_oenb_core[122]",
|
|
"la_oenb_core[101]",
|
|
"la_oenb_core[104]",
|
|
"la_oenb_core[105]",
|
|
"la_oenb_core[123]",
|
|
"la_oenb_core[124]",
|
|
"la_oenb_core[125]",
|
|
"la_oenb_core[27]",
|
|
"la_oenb_core[29]",
|
|
"la_oenb_core[51]",
|
|
"la_oenb_core[54]",
|
|
"la_oenb_core[59]",
|
|
"la_oenb_core[62]",
|
|
"la_oenb_core[100]",
|
|
"la_oenb_core[63]",
|
|
"la_oenb_core[74]",
|
|
"la_oenb_core[73]",
|
|
"la_oenb_core[80]",
|
|
"la_oenb_core[81]",
|
|
"la_oenb_core[72]",
|
|
"la_oenb_core[79]",
|
|
"la_oenb_core[75]",
|
|
"la_oenb_core[76]",
|
|
"la_oenb_core[77]",
|
|
"la_oenb_core[82]",
|
|
"la_oenb_core[83]",
|
|
"la_oenb_core[84]",
|
|
"la_oenb_core[85]",
|
|
"la_oenb_core[86]",
|
|
"la_oenb_core[116]",
|
|
"la_oenb_core[87]",
|
|
"la_oenb_core[88]",
|
|
"la_oenb_core[93]",
|
|
"la_oenb_core[92]",
|
|
"la_oenb_core[64]",
|
|
"la_oenb_core[97]",
|
|
"la_oenb_core[98]",
|
|
"la_oenb_core[94]",
|
|
"la_oenb_core[95]",
|
|
"la_oenb_core[117]",
|
|
"la_oenb_core[113]",
|
|
"la_oenb_core[118]",
|
|
"la_oenb_core[115]",
|
|
"la_oenb_core[114]",
|
|
"la_oenb_core[71]",
|
|
"la_oenb_core[112]",
|
|
"la_oenb_core[121]",
|
|
"la_oenb_core[120]",
|
|
"la_oenb_core[119]",
|
|
"la_oenb_core[96]",
|
|
"la_oenb_core[99]",
|
|
"la_data_in_core[32]",
|
|
"la_data_in_core[100]",
|
|
"la_data_in_core[107]",
|
|
"la_data_in_core[125]",
|
|
"la_data_in_core[33]",
|
|
"la_data_in_core[62]",
|
|
"la_data_in_core[31]",
|
|
"la_data_in_core[30]",
|
|
"la_data_in_core[29]",
|
|
"la_data_in_core[101]",
|
|
"la_data_in_core[124]",
|
|
"la_data_in_core[105]",
|
|
"la_data_in_core[104]",
|
|
"la_data_in_core[123]",
|
|
"la_data_in_core[122]",
|
|
"la_data_in_core[108]",
|
|
"la_data_in_core[106]",
|
|
"la_data_in_core[96]",
|
|
"la_data_in_core[99]",
|
|
"la_oenb_core[61]",
|
|
"la_oenb_core[8]",
|
|
"la_oenb_core[126]",
|
|
"la_oenb_core[57]",
|
|
"la_oenb_core[25]",
|
|
"la_oenb_core[15]",
|
|
"la_oenb_core[7]",
|
|
"la_oenb_core[44]",
|
|
"la_oenb_core[91]",
|
|
"la_oenb_core[12]",
|
|
"mprj_adr_o_user[18]",
|
|
"mprj_cyc_o_user",
|
|
"la_data_in_core[109]",
|
|
"la_data_in_core[110]",
|
|
"la_data_in_core[111]",
|
|
"la_data_in_core[117]",
|
|
"la_data_in_core[112]",
|
|
"la_data_in_core[120]",
|
|
"la_data_in_core[121]",
|
|
"la_data_in_core[119]",
|
|
"la_data_in_core[65]",
|
|
"la_data_in_core[69]",
|
|
"la_data_in_core[70]",
|
|
"la_data_in_core[67]",
|
|
"la_data_in_core[66]",
|
|
"la_data_in_core[71]",
|
|
"la_data_in_core[64]",
|
|
"la_data_in_core[63]",
|
|
"la_data_in_core[113]",
|
|
"la_data_in_core[118]",
|
|
"la_data_in_core[115]",
|
|
"la_data_in_core[114]",
|
|
"la_data_in_core[73]",
|
|
"la_data_in_core[78]",
|
|
"la_data_in_core[79]",
|
|
"la_data_in_core[77]",
|
|
"la_data_in_core[76]",
|
|
"la_data_in_core[75]",
|
|
"la_data_in_core[74]",
|
|
"la_data_in_core[72]",
|
|
"la_data_in_core[80]",
|
|
"la_data_in_core[81]",
|
|
"la_data_in_core[82]",
|
|
"la_data_in_core[84]",
|
|
"la_data_in_core[83]",
|
|
"la_data_in_core[116]",
|
|
"la_data_in_core[88]",
|
|
"la_data_in_core[87]",
|
|
"la_data_in_core[86]",
|
|
"la_data_in_core[85]",
|
|
"la_data_in_core[98]",
|
|
"la_data_in_core[97]",
|
|
"la_data_in_core[35]",
|
|
"la_data_in_core[13]",
|
|
"la_data_in_core[4]",
|
|
"la_data_in_core[39]",
|
|
"la_data_in_core[51]",
|
|
"la_data_in_core[38]",
|
|
"la_data_in_core[57]",
|
|
"la_data_in_core[37]",
|
|
"la_data_in_core[36]",
|
|
"la_data_in_core[11]",
|
|
"la_data_in_core[17]",
|
|
"la_data_in_core[127]",
|
|
"la_data_in_core[126]",
|
|
"la_data_in_core[42]",
|
|
"la_data_in_core[41]",
|
|
"la_data_in_core[60]",
|
|
"la_data_in_core[50]",
|
|
"la_data_in_core[19]",
|
|
"la_data_in_core[20]",
|
|
"la_data_in_core[93]",
|
|
"la_data_in_core[92]",
|
|
"la_data_in_core[91]",
|
|
"la_data_in_core[90]",
|
|
"la_data_in_core[102]",
|
|
"la_data_in_core[103]",
|
|
"la_data_in_core[12]",
|
|
"la_data_in_core[25]",
|
|
"la_data_in_core[44]",
|
|
"la_data_in_core[34]",
|
|
"la_data_in_core[43]",
|
|
"la_data_in_core[61]",
|
|
"la_data_in_core[40]",
|
|
"la_data_in_core[8]",
|
|
"la_data_in_core[15]",
|
|
"la_data_in_core[7]",
|
|
"la_data_in_core[21]",
|
|
"la_data_in_core[22]",
|
|
"la_data_in_core[24]",
|
|
"la_data_in_core[14]",
|
|
"la_data_in_core[0]",
|
|
"la_data_in_core[5]",
|
|
"la_data_in_core[3]",
|
|
"la_data_in_core[89]",
|
|
"la_data_in_core[59]",
|
|
"la_data_in_core[49]",
|
|
"la_data_in_core[48]",
|
|
"la_data_in_core[28]",
|
|
"la_data_in_core[23]",
|
|
"la_data_in_core[6]",
|
|
"la_data_in_core[2]",
|
|
"la_data_in_core[1]",
|
|
"la_data_in_core[18]",
|
|
"la_data_in_core[47]",
|
|
"la_data_in_core[27]",
|
|
"la_data_in_core[46]",
|
|
"la_data_in_core[45]",
|
|
"la_data_in_core[94]",
|
|
"la_data_in_core[95]",
|
|
"la_data_in_core[16]",
|
|
"la_data_in_core[10]",
|
|
"la_data_in_core[9]",
|
|
"la_oenb_core[60]",
|
|
"la_oenb_core[20]",
|
|
"la_oenb_core[19]",
|
|
"la_oenb_core[38]",
|
|
"la_oenb_core[26]",
|
|
"la_oenb_core[55]",
|
|
"la_oenb_core[45]",
|
|
"la_oenb_core[28]",
|
|
"la_oenb_core[34]",
|
|
"la_oenb_core[33]",
|
|
"la_oenb_core[18]",
|
|
"la_oenb_core[23]",
|
|
"la_oenb_core[2]",
|
|
"la_oenb_core[1]",
|
|
"la_oenb_core[6]",
|
|
"la_oenb_core[42]",
|
|
"la_oenb_core[14]",
|
|
"la_oenb_core[21]",
|
|
"la_oenb_core[22]",
|
|
"la_oenb_core[24]",
|
|
"la_oenb_core[5]",
|
|
"la_oenb_core[0]",
|
|
"la_oenb_core[3]",
|
|
"la_oenb_core[89]",
|
|
"la_oenb_core[127]",
|
|
"la_oenb_core[17]",
|
|
"la_oenb_core[90]",
|
|
"la_oenb_core[11]",
|
|
"la_oenb_core[10]",
|
|
"la_oenb_core[16]",
|
|
"la_oenb_core[9]",
|
|
"mprj_adr_o_user[20]",
|
|
"la_data_in_core[58]",
|
|
"la_data_in_core[26]",
|
|
"la_data_in_core[52]",
|
|
"la_data_in_core[53]",
|
|
"la_data_in_core[54]",
|
|
"la_data_in_core[55]",
|
|
"la_data_in_core[56]",
|
|
"la_oenb_core[41]",
|
|
"la_oenb_core[49]",
|
|
"la_oenb_core[53]",
|
|
"la_oenb_core[56]",
|
|
"mprj_adr_o_user[19]",
|
|
"mprj_adr_o_user[23]",
|
|
"mprj_adr_o_user[7]",
|
|
"mprj_adr_o_user[16]",
|
|
"mprj_adr_o_user[8]",
|
|
"mprj_adr_o_user[15]",
|
|
"la_oenb_core[39]",
|
|
"la_oenb_core[13]",
|
|
"la_oenb_core[4]",
|
|
"mprj_dat_i_core[1]",
|
|
"mprj_dat_i_core[8]",
|
|
"la_oenb_core[58]",
|
|
"mprj_adr_o_user[12]",
|
|
"mprj_adr_o_user[14]",
|
|
"mprj_adr_o_user[17]",
|
|
"mprj_adr_o_user[6]",
|
|
"mprj_adr_o_user[9]",
|
|
"mprj_dat_o_user[2]",
|
|
"mprj_adr_o_user[13]",
|
|
"mprj_adr_o_user[22]",
|
|
"mprj_dat_o_user[1]",
|
|
"mprj_dat_o_user[0]",
|
|
"mprj_adr_o_user[11]",
|
|
"mprj_dat_o_user[3]",
|
|
"mprj_dat_o_user[7]",
|
|
"mprj_dat_o_user[6]",
|
|
"la_oenb_core[50]",
|
|
"la_oenb_core[52]",
|
|
"mprj_adr_o_user[10]",
|
|
"mprj_dat_o_user[4]",
|
|
"mprj_dat_o_user[5]",
|
|
"mprj_dat_o_user[13]",
|
|
"mprj_dat_o_user[14]",
|
|
"mprj_stb_o_user",
|
|
"mprj_dat_o_user[12]",
|
|
"mprj_dat_o_user[11]",
|
|
"mprj_dat_o_user[10]",
|
|
"mprj_dat_o_user[9]",
|
|
"mprj_dat_o_user[8]",
|
|
"mprj_dat_o_user[17]",
|
|
"mprj_dat_o_user[18]",
|
|
"mprj_dat_o_user[19]",
|
|
"mprj_dat_o_user[20]",
|
|
"mprj_dat_o_user[21]",
|
|
"mprj_dat_o_user[15]",
|
|
"mprj_dat_o_user[16]",
|
|
"user1_vcc_powergood",
|
|
"mprj_dat_i_core[23]",
|
|
"mprj_dat_i_core[29]",
|
|
"mprj_dat_i_core[30]",
|
|
"mprj_dat_i_core[28]",
|
|
"mprj_dat_i_core[31]",
|
|
"mprj_dat_i_core[25]",
|
|
"mprj_dat_i_core[26]",
|
|
"mprj_dat_i_core[22]",
|
|
"mprj_dat_i_core[24]",
|
|
"mprj_dat_i_core[27]",
|
|
"mprj_dat_i_core[5]",
|
|
"mprj_dat_i_core[6]",
|
|
"mprj_dat_i_core[4]",
|
|
"mprj_dat_i_core[19]",
|
|
"mprj_dat_i_core[18]",
|
|
"mprj_dat_i_core[2]",
|
|
"mprj_dat_i_core[14]",
|
|
"mprj_dat_i_core[13]",
|
|
"mprj_dat_i_core[12]",
|
|
"mprj_dat_i_core[11]",
|
|
"mprj_dat_i_core[17]",
|
|
"mprj_dat_i_core[16]",
|
|
"mprj_dat_i_core[15]",
|
|
"mprj_dat_i_core[20]",
|
|
"mprj_dat_i_core[21]",
|
|
"mprj_dat_i_core[0]",
|
|
"mprj_ack_i_core",
|
|
"mprj_dat_i_core[10]",
|
|
"mprj_dat_i_core[9]",
|
|
"user2_vcc_powergood",
|
|
"user_clock",
|
|
"la_data_in_core[68]",
|
|
"la_data_in_mprj[57]",
|
|
"la_data_in_mprj[58]",
|
|
"la_data_in_mprj[59]",
|
|
"la_data_in_mprj[60]",
|
|
"la_data_in_mprj[6]",
|
|
"la_data_in_mprj[10]",
|
|
"la_data_in_mprj[1]",
|
|
"la_data_in_mprj[2]",
|
|
"la_data_in_mprj[3]",
|
|
"la_data_in_mprj[0]",
|
|
"la_data_in_mprj[5]",
|
|
"user_reset",
|
|
"la_data_in_mprj[118]",
|
|
"la_data_in_mprj[114]",
|
|
"la_data_in_mprj[119]",
|
|
"la_data_in_mprj[121]",
|
|
"la_data_in_mprj[120]",
|
|
"la_data_in_mprj[15]",
|
|
"la_data_in_mprj[13]",
|
|
"la_data_in_mprj[16]",
|
|
"la_data_in_mprj[51]",
|
|
"la_data_in_mprj[62]",
|
|
"la_data_in_mprj[63]",
|
|
"la_data_in_mprj[65]",
|
|
"la_data_in_mprj[78]",
|
|
"la_data_in_mprj[79]",
|
|
"la_data_in_mprj[87]",
|
|
"la_data_in_mprj[82]",
|
|
"la_data_in_mprj[83]",
|
|
"la_data_in_mprj[84]",
|
|
"la_data_in_mprj[85]",
|
|
"la_data_in_mprj[108]",
|
|
"la_data_in_mprj[8]",
|
|
"la_data_in_mprj[14]",
|
|
"la_data_in_mprj[124]",
|
|
"la_data_in_mprj[12]",
|
|
"la_data_in_mprj[35]",
|
|
"la_data_in_mprj[24]",
|
|
"la_data_in_mprj[4]",
|
|
"la_data_in_mprj[26]",
|
|
"la_data_in_mprj[25]",
|
|
"user_irq[0]",
|
|
"la_data_in_mprj[36]",
|
|
"la_data_in_mprj[37]",
|
|
"user_irq[2]",
|
|
"user_irq[1]",
|
|
"la_data_in_mprj[111]",
|
|
"la_data_in_mprj[110]",
|
|
"la_data_in_mprj[109]",
|
|
"la_data_in_mprj[113]",
|
|
"la_data_in_mprj[112]",
|
|
"la_data_in_mprj[52]",
|
|
"la_data_in_mprj[53]",
|
|
"la_data_in_mprj[54]",
|
|
"la_data_in_mprj[61]",
|
|
"la_data_in_mprj[80]",
|
|
"la_data_in_mprj[81]",
|
|
"la_data_in_mprj[86]",
|
|
"la_data_in_mprj[11]",
|
|
"la_data_in_mprj[55]",
|
|
"la_data_in_mprj[56]",
|
|
"la_data_in_mprj[9]",
|
|
"la_oenb_core[30]",
|
|
"la_oenb_core[69]",
|
|
"la_oenb_core[65]",
|
|
"la_oenb_core[70]",
|
|
"la_oenb_core[67]",
|
|
"la_oenb_core[66]",
|
|
"la_data_out_core[28]",
|
|
"la_data_out_core[29]",
|
|
"la_data_out_core[27]",
|
|
"la_data_out_core[127]",
|
|
"la_data_out_core[31]",
|
|
"la_data_out_core[43]",
|
|
"la_data_out_core[42]",
|
|
"la_data_out_core[38]",
|
|
"la_data_out_core[22]",
|
|
"la_data_out_core[24]",
|
|
"la_data_out_core[4]",
|
|
"la_data_out_core[23]",
|
|
"la_data_out_core[58]",
|
|
"la_data_out_core[59]",
|
|
"la_data_out_core[60]",
|
|
"la_data_out_core[36]",
|
|
"la_data_out_core[37]",
|
|
"la_data_out_core[26]",
|
|
"user_irq_core[0]",
|
|
"la_data_out_core[25]",
|
|
"la_data_out_core[126]",
|
|
"la_data_out_core[61]",
|
|
"la_data_out_core[21]",
|
|
"user_irq_core[2]",
|
|
"user_irq_core[1]",
|
|
"la_data_out_core[6]",
|
|
"la_data_out_core[10]",
|
|
"la_data_out_core[0]",
|
|
"la_data_out_core[5]",
|
|
"la_data_out_core[1]",
|
|
"la_data_out_core[2]",
|
|
"la_data_out_core[3]",
|
|
"la_data_out_core[13]",
|
|
"la_data_out_core[15]",
|
|
"la_data_out_core[44]",
|
|
"la_data_out_core[52]",
|
|
"la_data_out_core[53]",
|
|
"la_data_out_core[17]",
|
|
"la_data_out_core[125]",
|
|
"la_data_out_core[19]",
|
|
"la_data_out_core[20]",
|
|
"la_data_out_core[67]",
|
|
"la_data_out_core[46]",
|
|
"la_data_out_core[50]",
|
|
"la_data_out_core[64]",
|
|
"la_data_out_core[66]",
|
|
"la_data_out_core[30]",
|
|
"la_data_out_core[45]",
|
|
"la_data_out_core[68]",
|
|
"la_data_out_core[70]",
|
|
"la_data_out_core[69]",
|
|
"la_data_out_core[18]",
|
|
"la_data_out_core[49]",
|
|
"la_data_out_core[16]",
|
|
"la_data_out_core[51]",
|
|
"la_data_out_core[62]",
|
|
"la_data_out_core[63]",
|
|
"la_data_out_core[65]",
|
|
"la_data_out_core[57]",
|
|
"la_data_out_core[12]",
|
|
"la_data_out_core[7]",
|
|
"la_data_out_core[121]",
|
|
"la_data_out_core[122]",
|
|
"la_data_out_core[123]",
|
|
"la_data_out_core[97]",
|
|
"la_data_out_core[77]",
|
|
"la_data_out_core[95]",
|
|
"la_data_out_core[91]",
|
|
"la_data_out_core[92]",
|
|
"la_data_out_core[120]",
|
|
"la_data_out_core[35]",
|
|
"la_data_out_core[88]",
|
|
"la_data_out_core[99]",
|
|
"la_data_out_core[98]",
|
|
"la_data_out_core[9]",
|
|
"la_data_out_core[11]",
|
|
"la_data_out_core[39]",
|
|
"la_data_out_core[78]",
|
|
"la_data_out_core[55]",
|
|
"la_data_out_core[56]",
|
|
"mprj_dat_i_user[12]",
|
|
"mprj_dat_i_user[13]",
|
|
"mprj_dat_i_user[14]",
|
|
"la_data_out_core[105]",
|
|
"mprj_dat_i_user[23]",
|
|
"la_data_out_core[114]",
|
|
"la_data_out_core[118]",
|
|
"la_data_out_core[119]",
|
|
"la_data_out_core[106]",
|
|
"la_data_out_core[96]",
|
|
"la_data_out_core[117]",
|
|
"la_data_out_core[115]",
|
|
"la_data_out_core[116]",
|
|
"la_data_out_core[89]",
|
|
"la_data_out_core[90]",
|
|
"la_data_out_core[113]",
|
|
"la_data_out_core[112]",
|
|
"la_data_out_core[103]",
|
|
"la_data_out_core[104]",
|
|
"la_data_out_core[110]",
|
|
"la_data_out_core[109]",
|
|
"la_data_out_core[111]",
|
|
"la_data_out_core[84]",
|
|
"la_data_out_core[83]",
|
|
"la_data_out_core[82]",
|
|
"la_data_out_core[85]",
|
|
"la_data_out_core[86]",
|
|
"la_data_out_core[81]",
|
|
"la_data_out_core[107]",
|
|
"la_data_out_core[100]",
|
|
"la_data_out_core[76]",
|
|
"la_data_out_core[41]",
|
|
"la_data_out_core[93]",
|
|
"la_data_out_core[40]",
|
|
"la_data_out_core[54]",
|
|
"la_data_out_core[79]",
|
|
"la_data_out_core[80]",
|
|
"la_data_out_core[87]",
|
|
"mprj_dat_i_user[24]",
|
|
"la_data_out_core[14]",
|
|
"la_data_out_core[124]",
|
|
"la_data_out_core[101]",
|
|
"la_data_out_core[94]",
|
|
"la_data_out_core[108]",
|
|
"la_data_out_core[8]",
|
|
"la_data_out_core[32]",
|
|
"la_data_out_core[102]",
|
|
"la_data_out_core[71]",
|
|
"la_data_out_core[72]",
|
|
"la_data_out_core[73]",
|
|
"la_data_out_core[74]",
|
|
"la_data_out_core[33]",
|
|
"la_data_out_core[47]",
|
|
"la_data_out_core[48]",
|
|
"la_data_out_core[75]",
|
|
"la_data_out_core[34]",
|
|
"mprj_dat_i_user[22]",
|
|
"mprj_dat_i_user[26]",
|
|
"mprj_dat_i_user[25]",
|
|
"mprj_dat_i_user[19]",
|
|
"mprj_dat_i_user[18]",
|
|
"mprj_dat_i_user[2]",
|
|
"mprj_dat_i_user[29]",
|
|
"mprj_dat_i_user[28]",
|
|
"mprj_dat_i_user[30]",
|
|
"mprj_dat_i_user[31]",
|
|
"mprj_dat_i_user[3]",
|
|
"mprj_dat_i_user[27]",
|
|
"mprj_dat_i_user[5]",
|
|
"mprj_dat_i_user[4]",
|
|
"mprj_dat_i_user[6]",
|
|
"mprj_dat_i_user[11]",
|
|
"mprj_dat_i_user[7]",
|
|
"mprj_dat_i_user[17]",
|
|
"mprj_dat_i_user[16]",
|
|
"mprj_dat_i_user[15]",
|
|
"mprj_dat_i_user[20]",
|
|
"mprj_dat_i_user[21]",
|
|
"mprj_dat_i_user[8]",
|
|
"mprj_dat_i_user[0]",
|
|
"mprj_dat_i_user[10]",
|
|
"mprj_dat_i_user[9]",
|
|
"mprj_ack_i_user",
|
|
"mprj_dat_i_user[1]",
|
|
"la_oenb_mprj[46]",
|
|
"la_oenb_mprj[48]",
|
|
"la_oenb_mprj[54]",
|
|
"la_oenb_mprj[107]",
|
|
"la_oenb_mprj[7]",
|
|
"la_oenb_mprj[15]",
|
|
"la_oenb_mprj[12]",
|
|
"la_oenb_mprj[103]",
|
|
"la_oenb_mprj[102]",
|
|
"la_oenb_mprj[109]",
|
|
"la_oenb_mprj[110]",
|
|
"la_oenb_mprj[111]",
|
|
"la_oenb_mprj[27]",
|
|
"la_oenb_mprj[106]",
|
|
"la_oenb_mprj[108]",
|
|
"la_oenb_mprj[126]",
|
|
"la_oenb_mprj[38]",
|
|
"la_oenb_mprj[17]",
|
|
"la_oenb_mprj[127]",
|
|
"la_oenb_mprj[90]",
|
|
"la_oenb_mprj[125]",
|
|
"la_oenb_mprj[33]",
|
|
"la_oenb_mprj[19]",
|
|
"la_oenb_mprj[20]",
|
|
"la_oenb_mprj[42]",
|
|
"la_oenb_mprj[60]",
|
|
"la_oenb_mprj[61]",
|
|
"la_oenb_mprj[45]",
|
|
"la_oenb_mprj[14]",
|
|
"la_oenb_mprj[0]",
|
|
"la_oenb_mprj[3]",
|
|
"la_oenb_mprj[5]",
|
|
"la_oenb_mprj[89]",
|
|
"la_oenb_mprj[24]",
|
|
"la_oenb_mprj[22]",
|
|
"la_oenb_mprj[21]",
|
|
"la_oenb_mprj[57]",
|
|
"la_oenb_mprj[8]",
|
|
"la_oenb_mprj[47]",
|
|
"la_oenb_mprj[78]",
|
|
"la_oenb_mprj[59]",
|
|
"la_oenb_mprj[94]",
|
|
"la_oenb_mprj[95]",
|
|
"la_oenb_mprj[40]",
|
|
"la_oenb_mprj[43]",
|
|
"la_oenb_mprj[36]",
|
|
"la_oenb_mprj[37]",
|
|
"la_oenb_mprj[92]",
|
|
"la_oenb_mprj[93]",
|
|
"la_oenb_mprj[31]",
|
|
"la_oenb_mprj[122]",
|
|
"la_oenb_mprj[11]",
|
|
"la_oenb_mprj[50]",
|
|
"la_oenb_mprj[9]",
|
|
"la_oenb_mprj[10]",
|
|
"la_oenb_mprj[16]",
|
|
"la_oenb_mprj[101]",
|
|
"la_oenb_mprj[104]",
|
|
"la_oenb_mprj[105]",
|
|
"la_oenb_mprj[123]",
|
|
"la_oenb_mprj[124]",
|
|
"la_oenb_mprj[26]",
|
|
"la_oenb_mprj[55]",
|
|
"la_oenb_mprj[25]",
|
|
"la_oenb_mprj[44]",
|
|
"la_oenb_mprj[49]",
|
|
"la_oenb_mprj[53]",
|
|
"la_oenb_mprj[56]",
|
|
"la_oenb_mprj[52]",
|
|
"la_oenb_mprj[28]",
|
|
"la_oenb_mprj[34]",
|
|
"la_oenb_mprj[1]",
|
|
"la_oenb_mprj[2]",
|
|
"la_oenb_mprj[23]",
|
|
"la_oenb_mprj[18]",
|
|
"la_oenb_mprj[6]",
|
|
"la_oenb_mprj[91]",
|
|
"la_oenb_mprj[41]",
|
|
"la_iena_mprj[126]",
|
|
"la_data_out_mprj[52]",
|
|
"la_data_out_mprj[53]",
|
|
"la_data_out_mprj[54]",
|
|
"la_data_out_mprj[55]",
|
|
"la_data_out_mprj[56]",
|
|
"la_data_out_mprj[110]",
|
|
"la_data_out_mprj[111]",
|
|
"la_data_out_mprj[120]",
|
|
"la_data_out_mprj[119]",
|
|
"la_data_out_mprj[121]",
|
|
"la_data_out_mprj[79]",
|
|
"la_data_out_mprj[77]",
|
|
"la_data_out_mprj[76]",
|
|
"la_data_out_mprj[75]",
|
|
"la_data_out_mprj[74]",
|
|
"la_data_out_mprj[72]",
|
|
"la_iena_mprj[120]",
|
|
"la_iena_mprj[21]",
|
|
"la_iena_mprj[29]",
|
|
"la_iena_mprj[27]",
|
|
"la_iena_mprj[127]",
|
|
"la_iena_mprj[19]",
|
|
"la_iena_mprj[20]",
|
|
"la_iena_mprj[125]",
|
|
"la_iena_mprj[45]",
|
|
"la_iena_mprj[64]",
|
|
"la_iena_mprj[66]",
|
|
"la_iena_mprj[67]",
|
|
"la_iena_mprj[46]",
|
|
"la_iena_mprj[70]",
|
|
"la_iena_mprj[69]",
|
|
"la_iena_mprj[68]",
|
|
"la_iena_mprj[18]",
|
|
"la_iena_mprj[44]",
|
|
"la_iena_mprj[49]",
|
|
"la_data_out_mprj[58]",
|
|
"la_iena_mprj[101]",
|
|
"la_iena_mprj[119]",
|
|
"la_iena_mprj[121]",
|
|
"la_iena_mprj[122]",
|
|
"la_iena_mprj[123]",
|
|
"la_iena_mprj[47]",
|
|
"mprj_sel_o_core[3]",
|
|
"la_oenb_mprj[30]",
|
|
"la_oenb_mprj[32]",
|
|
"la_oenb_mprj[35]",
|
|
"la_oenb_mprj[51]",
|
|
"la_oenb_mprj[58]",
|
|
"la_oenb_mprj[100]",
|
|
"la_oenb_mprj[29]",
|
|
"la_oenb_mprj[62]",
|
|
"la_oenb_mprj[66]",
|
|
"la_oenb_mprj[67]",
|
|
"la_oenb_mprj[70]",
|
|
"la_oenb_mprj[117]",
|
|
"la_oenb_mprj[63]",
|
|
"la_oenb_mprj[97]",
|
|
"la_oenb_mprj[98]",
|
|
"la_oenb_mprj[112]",
|
|
"la_oenb_mprj[120]",
|
|
"la_oenb_mprj[119]",
|
|
"la_oenb_mprj[121]",
|
|
"la_oenb_mprj[113]",
|
|
"la_oenb_mprj[114]",
|
|
"la_oenb_mprj[115]",
|
|
"la_oenb_mprj[118]",
|
|
"la_oenb_mprj[64]",
|
|
"la_oenb_mprj[71]",
|
|
"la_oenb_mprj[96]",
|
|
"la_oenb_mprj[99]",
|
|
"la_oenb_mprj[73]",
|
|
"la_oenb_mprj[80]",
|
|
"la_oenb_mprj[81]",
|
|
"la_oenb_mprj[72]",
|
|
"la_oenb_mprj[74]",
|
|
"la_oenb_mprj[75]",
|
|
"la_oenb_mprj[76]",
|
|
"la_oenb_mprj[77]",
|
|
"la_oenb_mprj[79]",
|
|
"la_data_out_mprj[65]",
|
|
"la_data_out_mprj[66]",
|
|
"la_data_out_mprj[67]",
|
|
"la_data_out_mprj[70]",
|
|
"la_data_out_mprj[81]",
|
|
"la_data_out_mprj[80]",
|
|
"la_data_out_mprj[113]",
|
|
"la_data_out_mprj[114]",
|
|
"la_data_out_mprj[115]",
|
|
"la_data_out_mprj[118]",
|
|
"la_data_out_mprj[63]",
|
|
"la_data_out_mprj[64]",
|
|
"la_data_out_mprj[71]",
|
|
"la_iena_mprj[28]",
|
|
"mprj_dat_o_core[29]",
|
|
"mprj_dat_o_core[30]",
|
|
"caravel_rstn",
|
|
"mprj_adr_o_core[22]",
|
|
"mprj_adr_o_core[0]",
|
|
"mprj_adr_o_core[31]",
|
|
"mprj_adr_o_core[9]",
|
|
"mprj_adr_o_core[6]",
|
|
"mprj_iena_wb",
|
|
"mprj_dat_o_core[10]",
|
|
"mprj_dat_o_core[11]",
|
|
"mprj_dat_o_core[12]",
|
|
"mprj_dat_o_core[14]",
|
|
"mprj_dat_o_core[13]",
|
|
"mprj_dat_o_core[16]",
|
|
"mprj_dat_o_core[15]",
|
|
"mprj_dat_o_core[17]",
|
|
"mprj_dat_o_core[8]",
|
|
"mprj_dat_o_core[9]",
|
|
"mprj_stb_o_core",
|
|
"la_oenb_mprj[68]",
|
|
"la_oenb_mprj[69]",
|
|
"la_oenb_mprj[65]",
|
|
"la_oenb_mprj[84]",
|
|
"la_oenb_mprj[88]",
|
|
"la_oenb_mprj[116]",
|
|
"la_oenb_mprj[86]",
|
|
"la_oenb_mprj[85]",
|
|
"la_oenb_mprj[87]",
|
|
"la_oenb_mprj[83]",
|
|
"la_oenb_mprj[82]",
|
|
"la_data_out_mprj[68]",
|
|
"la_data_out_mprj[69]",
|
|
"la_data_out_mprj[83]",
|
|
"la_data_out_mprj[84]",
|
|
"la_data_out_mprj[116]",
|
|
"la_data_out_mprj[85]",
|
|
"la_data_out_mprj[86]",
|
|
"la_data_out_mprj[87]",
|
|
"la_data_out_mprj[88]",
|
|
"la_data_out_mprj[82]",
|
|
"la_data_out_mprj[117]",
|
|
"mprj_dat_o_core[23]",
|
|
"mprj_dat_o_core[24]",
|
|
"mprj_dat_o_core[28]",
|
|
"mprj_dat_o_core[25]",
|
|
"mprj_dat_o_core[27]",
|
|
"mprj_dat_o_core[26]",
|
|
"mprj_dat_o_core[31]",
|
|
"mprj_adr_o_core[13]",
|
|
"mprj_dat_o_core[2]",
|
|
"mprj_adr_o_core[11]",
|
|
"mprj_dat_o_core[3]",
|
|
"mprj_dat_o_core[6]",
|
|
"mprj_dat_o_core[7]",
|
|
"mprj_adr_o_core[10]",
|
|
"mprj_dat_o_core[4]",
|
|
"mprj_dat_o_core[5]",
|
|
"mprj_adr_o_core[14]",
|
|
"mprj_adr_o_core[17]",
|
|
"mprj_adr_o_core[12]",
|
|
"mprj_adr_o_core[20]",
|
|
"mprj_adr_o_core[23]",
|
|
"mprj_adr_o_core[19]",
|
|
"mprj_adr_o_core[18]",
|
|
"mprj_adr_o_core[16]",
|
|
"mprj_adr_o_core[7]",
|
|
"mprj_cyc_o_core",
|
|
"mprj_adr_o_core[1]",
|
|
"mprj_adr_o_core[2]",
|
|
"mprj_adr_o_core[3]",
|
|
"mprj_adr_o_core[4]",
|
|
"mprj_adr_o_core[5]",
|
|
"mprj_adr_o_core[15]",
|
|
"mprj_adr_o_core[21]",
|
|
"mprj_adr_o_core[8]",
|
|
"mprj_adr_o_core[24]",
|
|
"mprj_adr_o_core[25]",
|
|
"mprj_adr_o_core[26]",
|
|
"mprj_adr_o_core[27]",
|
|
"mprj_adr_o_core[28]",
|
|
"mprj_adr_o_core[29]",
|
|
"mprj_adr_o_core[30]",
|
|
"mprj_dat_o_core[0]",
|
|
"mprj_dat_o_core[1]",
|
|
"mprj_dat_o_core[18]",
|
|
"mprj_dat_o_core[19]",
|
|
"mprj_dat_o_core[20]",
|
|
"mprj_dat_o_core[21]",
|
|
"mprj_dat_o_core[22]",
|
|
"mprj_we_o_core",
|
|
"la_data_out_mprj[39]",
|
|
"la_data_out_mprj[13]",
|
|
"la_data_out_mprj[4]",
|
|
"la_iena_mprj[35]",
|
|
"la_iena_mprj[54]",
|
|
"la_iena_mprj[55]",
|
|
"la_iena_mprj[56]",
|
|
"la_iena_mprj[57]",
|
|
"la_iena_mprj[77]",
|
|
"la_iena_mprj[90]",
|
|
"la_iena_mprj[93]",
|
|
"la_data_out_mprj[51]",
|
|
"la_iena_mprj[4]",
|
|
"la_iena_mprj[1]",
|
|
"la_iena_mprj[2]",
|
|
"la_iena_mprj[3]",
|
|
"user_irq_ena[1]",
|
|
"la_iena_mprj[10]",
|
|
"la_iena_mprj[0]",
|
|
"la_iena_mprj[5]",
|
|
"la_data_out_mprj[102]",
|
|
"la_data_out_mprj[103]",
|
|
"la_data_out_mprj[11]",
|
|
"la_data_out_mprj[126]",
|
|
"la_data_out_mprj[127]",
|
|
"la_data_out_mprj[17]",
|
|
"la_data_out_mprj[19]",
|
|
"la_data_out_mprj[20]",
|
|
"la_data_out_mprj[41]",
|
|
"la_data_out_mprj[42]",
|
|
"la_data_out_mprj[50]",
|
|
"la_data_out_mprj[60]",
|
|
"la_data_out_mprj[90]",
|
|
"la_data_out_mprj[91]",
|
|
"la_data_out_mprj[92]",
|
|
"la_data_out_mprj[93]",
|
|
"la_iena_mprj[13]",
|
|
"la_iena_mprj[36]",
|
|
"la_iena_mprj[37]",
|
|
"la_iena_mprj[38]",
|
|
"la_iena_mprj[58]",
|
|
"la_iena_mprj[59]",
|
|
"la_iena_mprj[60]",
|
|
"la_iena_mprj[6]",
|
|
"la_iena_mprj[96]",
|
|
"la_data_out_mprj[112]",
|
|
"caravel_clk",
|
|
"caravel_clk2",
|
|
"la_iena_mprj[117]",
|
|
"la_iena_mprj[115]",
|
|
"la_iena_mprj[116]",
|
|
"la_iena_mprj[111]",
|
|
"la_iena_mprj[110]",
|
|
"la_iena_mprj[109]",
|
|
"la_iena_mprj[34]",
|
|
"la_iena_mprj[39]",
|
|
"la_iena_mprj[40]",
|
|
"la_iena_mprj[41]",
|
|
"la_iena_mprj[42]",
|
|
"la_iena_mprj[78]",
|
|
"la_iena_mprj[7]",
|
|
"la_iena_mprj[81]",
|
|
"la_iena_mprj[82]",
|
|
"la_iena_mprj[83]",
|
|
"la_iena_mprj[84]",
|
|
"la_iena_mprj[85]",
|
|
"la_iena_mprj[86]",
|
|
"la_iena_mprj[89]",
|
|
"la_iena_mprj[108]",
|
|
"la_iena_mprj[8]",
|
|
"la_iena_mprj[88]",
|
|
"la_iena_mprj[87]",
|
|
"la_iena_mprj[92]",
|
|
"la_iena_mprj[91]",
|
|
"la_iena_mprj[95]",
|
|
"la_iena_mprj[9]",
|
|
"la_data_out_mprj[32]",
|
|
"la_iena_mprj[79]",
|
|
"la_iena_mprj[80]",
|
|
"la_data_out_mprj[36]",
|
|
"la_data_out_mprj[37]",
|
|
"la_data_out_mprj[38]",
|
|
"la_data_out_mprj[57]",
|
|
"la_oenb_mprj[39]",
|
|
"la_oenb_mprj[4]",
|
|
"la_oenb_mprj[13]",
|
|
"la_iena_mprj[15]",
|
|
"la_data_out_mprj[35]",
|
|
"la_iena_mprj[118]",
|
|
"la_iena_mprj[107]",
|
|
"la_iena_mprj[113]",
|
|
"la_iena_mprj[103]",
|
|
"la_iena_mprj[104]",
|
|
"la_iena_mprj[112]",
|
|
"la_iena_mprj[114]",
|
|
"la_iena_mprj[100]",
|
|
"la_iena_mprj[31]",
|
|
"la_iena_mprj[43]",
|
|
"la_iena_mprj[48]",
|
|
"la_iena_mprj[71]",
|
|
"la_iena_mprj[72]",
|
|
"la_iena_mprj[73]",
|
|
"la_iena_mprj[74]",
|
|
"la_iena_mprj[75]",
|
|
"la_iena_mprj[76]",
|
|
"la_iena_mprj[94]",
|
|
"la_iena_mprj[124]",
|
|
"la_iena_mprj[102]",
|
|
"la_iena_mprj[32]",
|
|
"la_iena_mprj[14]",
|
|
"la_iena_mprj[33]",
|
|
"la_iena_mprj[12]",
|
|
"la_iena_mprj[97]",
|
|
"la_iena_mprj[98]",
|
|
"la_iena_mprj[11]",
|
|
"la_iena_mprj[99]",
|
|
"mprj_sel_o_core[0]",
|
|
"mprj_sel_o_core[1]",
|
|
"la_iena_mprj[61]",
|
|
"user_irq_ena[0]",
|
|
"la_iena_mprj[26]",
|
|
"la_iena_mprj[25]",
|
|
"la_iena_mprj[23]",
|
|
"user_irq_ena[2]",
|
|
"la_data_out_mprj[109]",
|
|
"la_data_out_mprj[12]",
|
|
"la_data_out_mprj[25]",
|
|
"la_data_out_mprj[27]",
|
|
"la_data_out_mprj[28]",
|
|
"la_data_out_mprj[34]",
|
|
"la_data_out_mprj[40]",
|
|
"la_data_out_mprj[43]",
|
|
"la_data_out_mprj[44]",
|
|
"la_data_out_mprj[45]",
|
|
"la_data_out_mprj[46]",
|
|
"la_data_out_mprj[47]",
|
|
"la_data_out_mprj[48]",
|
|
"la_data_out_mprj[49]",
|
|
"la_data_out_mprj[59]",
|
|
"la_data_out_mprj[61]",
|
|
"la_data_out_mprj[23]",
|
|
"la_data_out_mprj[18]",
|
|
"la_data_out_mprj[1]",
|
|
"la_data_out_mprj[2]",
|
|
"la_data_out_mprj[6]",
|
|
"la_data_out_mprj[73]",
|
|
"la_data_out_mprj[78]",
|
|
"la_data_out_mprj[15]",
|
|
"la_data_out_mprj[7]",
|
|
"la_data_out_mprj[21]",
|
|
"la_data_out_mprj[89]",
|
|
"la_data_out_mprj[0]",
|
|
"la_data_out_mprj[14]",
|
|
"la_data_out_mprj[3]",
|
|
"la_data_out_mprj[5]",
|
|
"la_data_out_mprj[22]",
|
|
"la_data_out_mprj[24]",
|
|
"la_data_out_mprj[8]",
|
|
"la_data_out_mprj[95]",
|
|
"la_data_out_mprj[94]",
|
|
"la_data_out_mprj[98]",
|
|
"la_data_out_mprj[97]",
|
|
"la_data_out_mprj[10]",
|
|
"la_data_out_mprj[16]",
|
|
"la_data_out_mprj[9]",
|
|
"la_iena_mprj[105]",
|
|
"la_iena_mprj[106]",
|
|
"la_iena_mprj[22]",
|
|
"la_iena_mprj[24]",
|
|
"la_iena_mprj[30]",
|
|
"la_iena_mprj[17]",
|
|
"la_iena_mprj[16]",
|
|
"la_iena_mprj[50]",
|
|
"la_iena_mprj[51]",
|
|
"la_iena_mprj[52]",
|
|
"la_iena_mprj[53]",
|
|
"la_iena_mprj[62]",
|
|
"la_iena_mprj[63]",
|
|
"la_iena_mprj[65]",
|
|
"mprj_sel_o_core[2]",
|
|
"la_data_out_mprj[100]",
|
|
"la_data_out_mprj[107]",
|
|
"la_data_out_mprj[125]",
|
|
"la_data_out_mprj[26]",
|
|
"la_data_out_mprj[101]",
|
|
"la_data_out_mprj[104]",
|
|
"la_data_out_mprj[105]",
|
|
"la_data_out_mprj[123]",
|
|
"la_data_out_mprj[124]",
|
|
"la_data_out_mprj[29]",
|
|
"la_data_out_mprj[30]",
|
|
"la_data_out_mprj[31]",
|
|
"la_data_out_mprj[33]",
|
|
"la_data_out_mprj[62]",
|
|
"la_data_out_mprj[106]",
|
|
"la_data_out_mprj[108]",
|
|
"la_data_out_mprj[122]",
|
|
"la_data_out_mprj[99]",
|
|
"la_data_out_mprj[96]",
|
|
"vssd",
|
|
"vccd"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"xres_buf",
|
|
"xres_buf"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hvl__decap_4", 1],
|
|
["sky130_fd_sc_hvl__decap_8", 1],
|
|
["sky130_fd_sc_hvl__diode_2", 1],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 2],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 4],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hvl__decap_4", 1 ],
|
|
["sky130_fd_sc_hvl__decap_8", 1 ],
|
|
["sky130_fd_sc_hvl__diode_2", 1 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 2 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 4 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 3 ],
|
|
["sky130_fd_pr__nfet_01v8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
9,
|
|
9
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"LVPWR",
|
|
"X",
|
|
"A",
|
|
"VPWR",
|
|
"VGND",
|
|
"LVGND"
|
|
], [
|
|
"LVPWR",
|
|
"X",
|
|
"A",
|
|
"VPWR",
|
|
"VGND",
|
|
"LVGND"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"housekeeping",
|
|
"housekeeping"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_ef_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__dfstp_4", 15],
|
|
["sky130_fd_sc_hd__dfrtp_4", 196],
|
|
["sky130_fd_sc_hd__dfrtp_1", 256],
|
|
["sky130_fd_sc_hd__mux2_1", 757],
|
|
["sky130_fd_sc_hd__a211o_1", 50],
|
|
["sky130_fd_sc_hd__decap_6", 1],
|
|
["sky130_fd_sc_hd__and3b_4", 17],
|
|
["sky130_fd_sc_hd__nand2b_2", 6],
|
|
["sky130_fd_sc_hd__and2b_4", 13],
|
|
["sky130_fd_sc_hd__dlygate4sd3_1", 1544],
|
|
["sky130_fd_sc_hd__decap_8", 1],
|
|
["sky130_fd_sc_hd__diode_2", 135],
|
|
["sky130_fd_sc_hd__o211a_1", 43],
|
|
["sky130_fd_sc_hd__a31o_1", 29],
|
|
["sky130_fd_sc_hd__o221a_1", 41],
|
|
["sky130_fd_sc_hd__dfrtp_2", 121],
|
|
["sky130_fd_sc_hd__inv_2", 84],
|
|
["sky130_fd_sc_hd__nor3_1", 24],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__and2_2", 66],
|
|
["sky130_fd_sc_hd__nand2_8", 46],
|
|
["sky130_fd_sc_hd__a21oi_1", 38],
|
|
["sky130_fd_sc_hd__a221o_1", 333],
|
|
["sky130_fd_sc_hd__o2111a_1", 24],
|
|
["sky130_fd_sc_hd__dfstp_2", 71],
|
|
["sky130_fd_sc_hd__a22o_2", 22],
|
|
["sky130_fd_sc_hd__clkbuf_8", 42],
|
|
["sky130_fd_sc_hd__buf_12", 231],
|
|
["sky130_fd_sc_hd__clkbuf_1", 125],
|
|
["sky130_fd_sc_hd__buf_4", 14],
|
|
["sky130_fd_sc_hd__and2_1", 90],
|
|
["sky130_fd_sc_hd__a22o_1", 375],
|
|
["sky130_fd_sc_hd__and2_4", 53],
|
|
["sky130_fd_sc_hd__nand4_1", 9],
|
|
["sky130_fd_sc_hd__and3_1", 83],
|
|
["sky130_fd_sc_hd__nor4_1", 50],
|
|
["sky130_fd_sc_hd__nand2_1", 99],
|
|
["sky130_fd_sc_hd__o22a_1", 57],
|
|
["sky130_fd_sc_hd__o21a_1", 32],
|
|
["sky130_fd_sc_hd__o2bb2a_1", 14],
|
|
["sky130_fd_sc_hd__nor2_4", 43],
|
|
["sky130_fd_sc_hd__nor2_8", 76],
|
|
["sky130_fd_sc_hd__and4_1", 58],
|
|
["sky130_fd_sc_hd__and3_4", 57],
|
|
["sky130_fd_sc_hd__nand2_2", 19],
|
|
["sky130_fd_sc_hd__clkbuf_16", 100],
|
|
["sky130_fd_sc_hd__nor2_1", 79],
|
|
["sky130_fd_sc_hd__nor2_2", 23],
|
|
["sky130_fd_sc_hd__and4b_1", 17],
|
|
["sky130_fd_sc_hd__clkbuf_4", 15],
|
|
["sky130_fd_sc_hd__nand2_4", 28],
|
|
["sky130_fd_sc_hd__a221o_2", 24],
|
|
["sky130_fd_sc_hd__and3b_2", 3],
|
|
["sky130_fd_sc_hd__and2b_1", 10],
|
|
["sky130_fd_sc_hd__and3_2", 6],
|
|
["sky130_fd_sc_hd__o31a_4", 1],
|
|
["sky130_fd_sc_hd__a32o_1", 11],
|
|
["sky130_fd_sc_hd__buf_8", 52],
|
|
["sky130_fd_sc_hd__and4bb_1", 5],
|
|
["sky130_fd_sc_hd__a21o_1", 48],
|
|
["sky130_fd_sc_hd__o21ai_1", 14],
|
|
["sky130_fd_sc_hd__a41o_1", 3],
|
|
["sky130_fd_sc_hd__a2111o_1", 16],
|
|
["sky130_fd_sc_hd__nand2b_1", 18],
|
|
["sky130_fd_sc_hd__a2111oi_1", 2],
|
|
["sky130_fd_sc_hd__clkbuf_2", 35],
|
|
["sky130_fd_sc_hd__dfstp_1", 70],
|
|
["sky130_fd_sc_hd__o41a_1", 5],
|
|
["sky130_fd_sc_hd__mux2_8", 9],
|
|
["sky130_fd_sc_hd__buf_6", 56],
|
|
["sky130_fd_sc_hd__o21ai_2", 1],
|
|
["sky130_fd_sc_hd__clkinv_2", 9],
|
|
["sky130_fd_sc_hd__a311o_1", 3],
|
|
["sky130_fd_sc_hd__o2111ai_1", 1],
|
|
["sky130_fd_sc_hd__o32a_1", 13],
|
|
["sky130_fd_sc_hd__nand3_1", 17],
|
|
["sky130_fd_sc_hd__nor4_4", 3],
|
|
["sky130_fd_sc_hd__dlymetal6s2s_1", 17],
|
|
["sky130_fd_sc_hd__and2b_2", 10],
|
|
["sky130_fd_sc_hd__mux2_2", 16],
|
|
["sky130_fd_sc_hd__nand3_4", 8],
|
|
["sky130_fd_sc_hd__and3b_1", 8],
|
|
["sky130_fd_sc_hd__nand2b_4", 5],
|
|
["sky130_fd_sc_hd__a21boi_1", 3],
|
|
["sky130_fd_sc_hd__nor3_2", 6],
|
|
["sky130_fd_sc_hd__dfxtp_1", 32],
|
|
["sky130_fd_sc_hd__buf_2", 16],
|
|
["sky130_fd_sc_hd__o31a_2", 1],
|
|
["sky130_fd_sc_hd__o21a_4", 1],
|
|
["sky130_fd_sc_hd__dfrtn_1", 9],
|
|
["sky130_fd_sc_hd__mux2_4", 6],
|
|
["sky130_fd_sc_hd__a31oi_1", 2],
|
|
["sky130_fd_sc_hd__o211a_2", 2],
|
|
["sky130_fd_sc_hd__nand4b_1", 3],
|
|
["sky130_fd_sc_hd__nand3b_4", 2],
|
|
["sky130_fd_sc_hd__o21ba_1", 7],
|
|
["sky130_fd_sc_hd__a31o_2", 1],
|
|
["sky130_fd_sc_hd__a2bb2o_1", 4],
|
|
["sky130_fd_sc_hd__nor4_2", 2],
|
|
["sky130_fd_sc_hd__and4b_2", 4],
|
|
["sky130_fd_sc_hd__nand4_2", 3],
|
|
["sky130_fd_sc_hd__a211o_2", 2],
|
|
["sky130_fd_sc_hd__xnor2_1", 4],
|
|
["sky130_fd_sc_hd__o311a_1", 8],
|
|
["sky130_fd_sc_hd__a2111o_2", 5],
|
|
["sky130_fd_sc_hd__a21o_2", 1],
|
|
["sky130_fd_sc_hd__conb_1", 1],
|
|
["sky130_fd_sc_hd__nand4b_4", 2],
|
|
["sky130_fd_sc_hd__nand3_2", 10],
|
|
["sky130_fd_sc_hd__a311oi_2", 1],
|
|
["sky130_fd_sc_hd__xor2_1", 1],
|
|
["sky130_fd_sc_hd__o221a_4", 3],
|
|
["sky130_fd_sc_hd__a211o_4", 1],
|
|
["sky130_fd_sc_hd__o31a_1", 4],
|
|
["sky130_fd_sc_hd__xnor2_2", 2],
|
|
["sky130_fd_sc_hd__o31ai_1", 1],
|
|
["sky130_fd_sc_hd__a21bo_1", 6],
|
|
["sky130_fd_sc_hd__a221o_4", 1],
|
|
["sky130_fd_sc_hd__and4b_4", 1],
|
|
["sky130_fd_sc_hd__nor3b_1", 2],
|
|
["sky130_fd_sc_hd__a21oi_2", 2],
|
|
["sky130_fd_sc_hd__nor3_4", 2],
|
|
["sky130_fd_sc_hd__a21oi_4", 1],
|
|
["sky130_fd_sc_hd__a21o_4", 1],
|
|
["sky130_fd_sc_hd__a31oi_4", 1],
|
|
["sky130_fd_sc_hd__and4_2", 1],
|
|
["sky130_fd_sc_hd__o21a_2", 1],
|
|
["sky130_fd_sc_hd__a2111o_4", 1],
|
|
["sky130_fd_sc_hd__inv_6", 1],
|
|
["sky130_fd_sc_hd__a221oi_1", 1],
|
|
["sky130_fd_sc_hd__and4bb_2", 1 ]
|
|
], [
|
|
["sky130_ef_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__dfstp_4", 15 ],
|
|
["sky130_fd_sc_hd__dfrtp_4", 196 ],
|
|
["sky130_fd_sc_hd__dfrtp_1", 256 ],
|
|
["sky130_fd_sc_hd__mux2_1", 757 ],
|
|
["sky130_fd_sc_hd__a211o_1", 50 ],
|
|
["sky130_fd_sc_hd__decap_6", 1 ],
|
|
["sky130_fd_sc_hd__and3b_4", 17 ],
|
|
["sky130_fd_sc_hd__nand2b_2", 6 ],
|
|
["sky130_fd_sc_hd__and2b_4", 13 ],
|
|
["sky130_fd_sc_hd__dlygate4sd3_1", 1544 ],
|
|
["sky130_fd_sc_hd__decap_8", 1 ],
|
|
["sky130_fd_sc_hd__diode_2", 135 ],
|
|
["sky130_fd_sc_hd__o211a_1", 43 ],
|
|
["sky130_fd_sc_hd__a31o_1", 29 ],
|
|
["sky130_fd_sc_hd__o221a_1", 41 ],
|
|
["sky130_fd_sc_hd__dfrtp_2", 121 ],
|
|
["sky130_fd_sc_hd__inv_2", 84 ],
|
|
["sky130_fd_sc_hd__nor3_1", 24 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__and2_2", 66 ],
|
|
["sky130_fd_sc_hd__nand2_8", 46 ],
|
|
["sky130_fd_sc_hd__a21oi_1", 38 ],
|
|
["sky130_fd_sc_hd__a221o_1", 333 ],
|
|
["sky130_fd_sc_hd__o2111a_1", 24 ],
|
|
["sky130_fd_sc_hd__dfstp_2", 71 ],
|
|
["sky130_fd_sc_hd__a22o_2", 22 ],
|
|
["sky130_fd_sc_hd__clkbuf_8", 42 ],
|
|
["sky130_fd_sc_hd__buf_12", 231 ],
|
|
["sky130_fd_sc_hd__clkbuf_1", 125 ],
|
|
["sky130_fd_sc_hd__buf_4", 14 ],
|
|
["sky130_fd_sc_hd__and2_1", 90 ],
|
|
["sky130_fd_sc_hd__a22o_1", 375 ],
|
|
["sky130_fd_sc_hd__and2_4", 53 ],
|
|
["sky130_fd_sc_hd__nand4_1", 9 ],
|
|
["sky130_fd_sc_hd__and3_1", 83 ],
|
|
["sky130_fd_sc_hd__nor4_1", 50 ],
|
|
["sky130_fd_sc_hd__nand2_1", 99 ],
|
|
["sky130_fd_sc_hd__o22a_1", 57 ],
|
|
["sky130_fd_sc_hd__o21a_1", 32 ],
|
|
["sky130_fd_sc_hd__o2bb2a_1", 14 ],
|
|
["sky130_fd_sc_hd__nor2_4", 43 ],
|
|
["sky130_fd_sc_hd__nor2_8", 76 ],
|
|
["sky130_fd_sc_hd__and4_1", 58 ],
|
|
["sky130_fd_sc_hd__and3_4", 57 ],
|
|
["sky130_fd_sc_hd__nand2_2", 19 ],
|
|
["sky130_fd_sc_hd__clkbuf_16", 100 ],
|
|
["sky130_fd_sc_hd__nor2_1", 79 ],
|
|
["sky130_fd_sc_hd__nor2_2", 23 ],
|
|
["sky130_fd_sc_hd__and4b_1", 17 ],
|
|
["sky130_fd_sc_hd__clkbuf_4", 15 ],
|
|
["sky130_fd_sc_hd__nand2_4", 28 ],
|
|
["sky130_fd_sc_hd__a221o_2", 24 ],
|
|
["sky130_fd_sc_hd__and3b_2", 3 ],
|
|
["sky130_fd_sc_hd__and2b_1", 10 ],
|
|
["sky130_fd_sc_hd__and3_2", 6 ],
|
|
["sky130_fd_sc_hd__o31a_4", 1 ],
|
|
["sky130_fd_sc_hd__a32o_1", 11 ],
|
|
["sky130_fd_sc_hd__buf_8", 52 ],
|
|
["sky130_fd_sc_hd__and4bb_1", 5 ],
|
|
["sky130_fd_sc_hd__a21o_1", 48 ],
|
|
["sky130_fd_sc_hd__o21ai_1", 14 ],
|
|
["sky130_fd_sc_hd__a41o_1", 3 ],
|
|
["sky130_fd_sc_hd__a2111o_1", 16 ],
|
|
["sky130_fd_sc_hd__nand2b_1", 18 ],
|
|
["sky130_fd_sc_hd__a2111oi_1", 2 ],
|
|
["sky130_fd_sc_hd__clkbuf_2", 35 ],
|
|
["sky130_fd_sc_hd__dfstp_1", 70 ],
|
|
["sky130_fd_sc_hd__o41a_1", 5 ],
|
|
["sky130_fd_sc_hd__mux2_8", 9 ],
|
|
["sky130_fd_sc_hd__buf_6", 56 ],
|
|
["sky130_fd_sc_hd__o21ai_2", 1 ],
|
|
["sky130_fd_sc_hd__clkinv_2", 9 ],
|
|
["sky130_fd_sc_hd__a311o_1", 3 ],
|
|
["sky130_fd_sc_hd__o2111ai_1", 1 ],
|
|
["sky130_fd_sc_hd__o32a_1", 13 ],
|
|
["sky130_fd_sc_hd__nand3_1", 17 ],
|
|
["sky130_fd_sc_hd__nor4_4", 3 ],
|
|
["sky130_fd_sc_hd__dlymetal6s2s_1", 17 ],
|
|
["sky130_fd_sc_hd__and2b_2", 10 ],
|
|
["sky130_fd_sc_hd__mux2_2", 16 ],
|
|
["sky130_fd_sc_hd__nand3_4", 8 ],
|
|
["sky130_fd_sc_hd__and3b_1", 8 ],
|
|
["sky130_fd_sc_hd__nand2b_4", 5 ],
|
|
["sky130_fd_sc_hd__a21boi_1", 3 ],
|
|
["sky130_fd_sc_hd__nor3_2", 6 ],
|
|
["sky130_fd_sc_hd__dfxtp_1", 32 ],
|
|
["sky130_fd_sc_hd__buf_2", 16 ],
|
|
["sky130_fd_sc_hd__o31a_2", 1 ],
|
|
["sky130_fd_sc_hd__o21a_4", 1 ],
|
|
["sky130_fd_sc_hd__dfrtn_1", 9 ],
|
|
["sky130_fd_sc_hd__mux2_4", 6 ],
|
|
["sky130_fd_sc_hd__a31oi_1", 2 ],
|
|
["sky130_fd_sc_hd__o211a_2", 2 ],
|
|
["sky130_fd_sc_hd__nand4b_1", 3 ],
|
|
["sky130_fd_sc_hd__nand3b_4", 2 ],
|
|
["sky130_fd_sc_hd__o21ba_1", 7 ],
|
|
["sky130_fd_sc_hd__a31o_2", 1 ],
|
|
["sky130_fd_sc_hd__a2bb2o_1", 4 ],
|
|
["sky130_fd_sc_hd__nor4_2", 2 ],
|
|
["sky130_fd_sc_hd__and4b_2", 4 ],
|
|
["sky130_fd_sc_hd__nand4_2", 3 ],
|
|
["sky130_fd_sc_hd__a211o_2", 2 ],
|
|
["sky130_fd_sc_hd__xnor2_1", 4 ],
|
|
["sky130_fd_sc_hd__o311a_1", 8 ],
|
|
["sky130_fd_sc_hd__a2111o_2", 5 ],
|
|
["sky130_fd_sc_hd__a21o_2", 1 ],
|
|
["sky130_fd_sc_hd__conb_1", 1 ],
|
|
["sky130_fd_sc_hd__nand4b_4", 2 ],
|
|
["sky130_fd_sc_hd__nand3_2", 10 ],
|
|
["sky130_fd_sc_hd__a311oi_2", 1 ],
|
|
["sky130_fd_sc_hd__xor2_1", 1 ],
|
|
["sky130_fd_sc_hd__o221a_4", 3 ],
|
|
["sky130_fd_sc_hd__a211o_4", 1 ],
|
|
["sky130_fd_sc_hd__o31a_1", 4 ],
|
|
["sky130_fd_sc_hd__xnor2_2", 2 ],
|
|
["sky130_fd_sc_hd__o31ai_1", 1 ],
|
|
["sky130_fd_sc_hd__a21bo_1", 6 ],
|
|
["sky130_fd_sc_hd__a221o_4", 1 ],
|
|
["sky130_fd_sc_hd__and4b_4", 1 ],
|
|
["sky130_fd_sc_hd__nor3b_1", 2 ],
|
|
["sky130_fd_sc_hd__a21oi_2", 2 ],
|
|
["sky130_fd_sc_hd__nor3_4", 2 ],
|
|
["sky130_fd_sc_hd__a21oi_4", 1 ],
|
|
["sky130_fd_sc_hd__a21o_4", 1 ],
|
|
["sky130_fd_sc_hd__a31oi_4", 1 ],
|
|
["sky130_fd_sc_hd__and4_2", 1 ],
|
|
["sky130_fd_sc_hd__o21a_2", 1 ],
|
|
["sky130_fd_sc_hd__a2111o_4", 1 ],
|
|
["sky130_fd_sc_hd__inv_6", 1 ],
|
|
["sky130_fd_sc_hd__a221oi_1", 1 ],
|
|
["sky130_fd_sc_hd__and4bb_2", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
6433,
|
|
6433
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"mgmt_gpio_out[9]",
|
|
"mgmt_gpio_out[14]",
|
|
"pad_flash_clk",
|
|
"mgmt_gpio_out[15]",
|
|
"wb_adr_i[0]",
|
|
"spimemio_flash_io1_oeb",
|
|
"spi_enabled",
|
|
"qspi_enabled",
|
|
"pad_flash_io1_di",
|
|
"mgmt_gpio_in[3]",
|
|
"mgmt_gpio_in[37]",
|
|
"trap",
|
|
"mgmt_gpio_in[34]",
|
|
"mgmt_gpio_in[2]",
|
|
"mgmt_gpio_in[18]",
|
|
"mgmt_gpio_in[35]",
|
|
"spimemio_flash_io3_oeb",
|
|
"mgmt_gpio_in[12]",
|
|
"mgmt_gpio_in[19]",
|
|
"mgmt_gpio_in[11]",
|
|
"mgmt_gpio_in[5]",
|
|
"mgmt_gpio_in[36]",
|
|
"mgmt_gpio_in[7]",
|
|
"mgmt_gpio_in[0]",
|
|
"mask_rev_in[9]",
|
|
"mask_rev_in[28]",
|
|
"mask_rev_in[18]",
|
|
"mask_rev_in[14]",
|
|
"mgmt_gpio_in[27]",
|
|
"mask_rev_in[12]",
|
|
"spimemio_flash_io0_do",
|
|
"mask_rev_in[4]",
|
|
"spimemio_flash_csb",
|
|
"mgmt_gpio_in[33]",
|
|
"spimemio_flash_clk",
|
|
"mgmt_gpio_in[22]",
|
|
"mgmt_gpio_in[31]",
|
|
"mgmt_gpio_in[21]",
|
|
"mgmt_gpio_in[20]",
|
|
"mgmt_gpio_in[10]",
|
|
"mgmt_gpio_in[1]",
|
|
"mgmt_gpio_in[28]",
|
|
"mgmt_gpio_in[17]",
|
|
"mask_rev_in[7]",
|
|
"mask_rev_in[26]",
|
|
"usr2_vdd_pwrgood",
|
|
"mask_rev_in[25]",
|
|
"mask_rev_in[17]",
|
|
"mgmt_gpio_in[25]",
|
|
"mask_rev_in[24]",
|
|
"mask_rev_in[10]",
|
|
"mgmt_gpio_in[23]",
|
|
"mgmt_gpio_in[8]",
|
|
"spimemio_flash_io2_do",
|
|
"spimemio_flash_io3_do",
|
|
"mask_rev_in[20]",
|
|
"spi_csb",
|
|
"mask_rev_in[27]",
|
|
"mask_rev_in[16]",
|
|
"mask_rev_in[6]",
|
|
"usr2_vcc_pwrgood",
|
|
"mask_rev_in[11]",
|
|
"usr1_vdd_pwrgood",
|
|
"mask_rev_in[0]",
|
|
"mgmt_gpio_in[9]",
|
|
"spi_sdoenb",
|
|
"spi_sdo",
|
|
"spi_sck",
|
|
"spimemio_flash_io2_oeb",
|
|
"wb_adr_i[1]",
|
|
"wb_adr_i[20]",
|
|
"wb_adr_i[23]",
|
|
"wb_adr_i[22]",
|
|
"debug_mode",
|
|
"wb_adr_i[2]",
|
|
"wb_adr_i[3]",
|
|
"wb_adr_i[4]",
|
|
"wb_adr_i[5]",
|
|
"wb_adr_i[6]",
|
|
"wb_adr_i[7]",
|
|
"mgmt_gpio_in[30]",
|
|
"spimemio_flash_io1_do",
|
|
"spimemio_flash_io0_oeb",
|
|
"mgmt_gpio_in[24]",
|
|
"usr1_vcc_pwrgood",
|
|
"wb_rstn_i",
|
|
"wb_dat_i[9]",
|
|
"wb_dat_i[17]",
|
|
"mask_rev_in[23]",
|
|
"mask_rev_in[3]",
|
|
"mask_rev_in[22]",
|
|
"mask_rev_in[31]",
|
|
"mask_rev_in[21]",
|
|
"mask_rev_in[30]",
|
|
"mask_rev_in[1]",
|
|
"mgmt_gpio_in[6]",
|
|
"mask_rev_in[29]",
|
|
"mask_rev_in[19]",
|
|
"mgmt_gpio_in[29]",
|
|
"mask_rev_in[8]",
|
|
"ser_tx",
|
|
"mask_rev_in[13]",
|
|
"mgmt_gpio_in[26]",
|
|
"mgmt_gpio_in[16]",
|
|
"mask_rev_in[2]",
|
|
"mask_rev_in[15]",
|
|
"porb",
|
|
"mgmt_gpio_in[15]",
|
|
"mask_rev_in[5]",
|
|
"mgmt_gpio_in[14]",
|
|
"pad_flash_io0_di",
|
|
"mgmt_gpio_in[13]",
|
|
"mgmt_gpio_in[32]",
|
|
"debug_out",
|
|
"debug_oeb",
|
|
"wb_adr_i[28]",
|
|
"wb_adr_i[27]",
|
|
"wb_dat_i[16]",
|
|
"wb_dat_i[18]",
|
|
"wb_adr_i[26]",
|
|
"wb_dat_i[25]",
|
|
"wb_adr_i[25]",
|
|
"wb_dat_i[26]",
|
|
"wb_dat_i[24]",
|
|
"wb_adr_i[24]",
|
|
"wb_dat_i[7]",
|
|
"wb_dat_i[6]",
|
|
"wb_dat_i[5]",
|
|
"wb_dat_i[4]",
|
|
"wb_dat_i[3]",
|
|
"wb_dat_i[11]",
|
|
"wb_dat_i[12]",
|
|
"wb_dat_i[13]",
|
|
"wb_dat_i[14]",
|
|
"wb_dat_i[15]",
|
|
"wb_adr_i[31]",
|
|
"wb_dat_i[8]",
|
|
"wb_dat_i[10]",
|
|
"wb_adr_i[30]",
|
|
"wb_sel_i[0]",
|
|
"wb_dat_i[1]",
|
|
"wb_dat_i[0]",
|
|
"wb_dat_i[2]",
|
|
"wb_dat_i[27]",
|
|
"wb_dat_i[28]",
|
|
"wb_dat_i[29]",
|
|
"wb_dat_i[30]",
|
|
"wb_dat_i[31]",
|
|
"wb_dat_i[23]",
|
|
"wb_dat_i[22]",
|
|
"wb_dat_i[21]",
|
|
"wb_dat_i[20]",
|
|
"wb_dat_i[19]",
|
|
"wb_cyc_i",
|
|
"wb_adr_i[29]",
|
|
"wb_adr_i[9]",
|
|
"uart_enabled",
|
|
"wb_adr_i[19]",
|
|
"wb_adr_i[18]",
|
|
"wb_adr_i[8]",
|
|
"wb_adr_i[13]",
|
|
"wb_adr_i[17]",
|
|
"wb_sel_i[3]",
|
|
"wb_adr_i[12]",
|
|
"wb_adr_i[16]",
|
|
"wb_sel_i[2]",
|
|
"wb_adr_i[11]",
|
|
"wb_adr_i[15]",
|
|
"wb_sel_i[1]",
|
|
"wb_adr_i[10]",
|
|
"wb_adr_i[14]",
|
|
"wb_stb_i",
|
|
"wb_we_i",
|
|
"wb_adr_i[21]",
|
|
"pll_trim[10]",
|
|
"pll_trim[21]",
|
|
"pll_trim[6]",
|
|
"pll90_sel[2]",
|
|
"pll_trim[15]",
|
|
"pll_trim[14]",
|
|
"pll_trim[13]",
|
|
"pll_div[2]",
|
|
"pll_trim[9]",
|
|
"pll_trim[22]",
|
|
"pll_trim[12]",
|
|
"pll_div[1]",
|
|
"pll_trim[8]",
|
|
"pll_trim[11]",
|
|
"pll_div[0]",
|
|
"pll_trim[7]",
|
|
"pll_trim[20]",
|
|
"pll_dco_ena",
|
|
"pll_trim[1]",
|
|
"pll_trim[0]",
|
|
"pll_bypass",
|
|
"pll_trim[5]",
|
|
"pll_trim[19]",
|
|
"pll_sel[2]",
|
|
"pll_trim[4]",
|
|
"pll_trim[18]",
|
|
"pll_trim[3]",
|
|
"pwr_ctrl_out[3]",
|
|
"pll_sel[1]",
|
|
"pll90_sel[1]",
|
|
"pll_trim[17]",
|
|
"pll_sel[0]",
|
|
"pll90_sel[0]",
|
|
"pll_trim[2]",
|
|
"pll_trim[16]",
|
|
"pll_ena",
|
|
"pll_trim[25]",
|
|
"pll_div[4]",
|
|
"pwr_ctrl_out[1]",
|
|
"pwr_ctrl_out[2]",
|
|
"pll_trim[24]",
|
|
"pll_div[3]",
|
|
"pwr_ctrl_out[0]",
|
|
"pll_trim[23]",
|
|
"serial_clock",
|
|
"pad_flash_io0_ieb",
|
|
"serial_data_2",
|
|
"serial_data_1",
|
|
"reset",
|
|
"mgmt_gpio_oeb[16]",
|
|
"mgmt_gpio_out[32]",
|
|
"mgmt_gpio_out[35]",
|
|
"pad_flash_io1_ieb",
|
|
"mgmt_gpio_in[4]",
|
|
"pad_flash_io0_do",
|
|
"mgmt_gpio_out[37]",
|
|
"mgmt_gpio_out[36]",
|
|
"pad_flash_csb_oeb",
|
|
"spimemio_flash_io0_di",
|
|
"spi_sdi",
|
|
"serial_resetn",
|
|
"serial_load",
|
|
"wb_ack_o",
|
|
"ser_rx",
|
|
"mgmt_gpio_oeb[1]",
|
|
"mgmt_gpio_oeb[0]",
|
|
"irq[2]",
|
|
"spimemio_flash_io2_di",
|
|
"irq[1]",
|
|
"spimemio_flash_io1_di",
|
|
"irq[0]",
|
|
"debug_in",
|
|
"wb_dat_o[22]",
|
|
"wb_dat_o[19]",
|
|
"wb_dat_o[23]",
|
|
"wb_dat_o[21]",
|
|
"wb_dat_o[30]",
|
|
"wb_dat_o[18]",
|
|
"wb_dat_o[10]",
|
|
"wb_dat_o[8]",
|
|
"wb_dat_o[11]",
|
|
"wb_dat_o[6]",
|
|
"wb_dat_o[7]",
|
|
"wb_dat_o[5]",
|
|
"wb_dat_o[9]",
|
|
"wb_dat_o[13]",
|
|
"wb_dat_o[15]",
|
|
"wb_dat_o[14]",
|
|
"wb_dat_o[17]",
|
|
"wb_dat_o[12]",
|
|
"wb_dat_o[4]",
|
|
"wb_dat_o[16]",
|
|
"wb_dat_o[26]",
|
|
"wb_dat_o[2]",
|
|
"wb_dat_o[0]",
|
|
"wb_dat_o[24]",
|
|
"wb_dat_o[20]",
|
|
"wb_dat_o[28]",
|
|
"wb_dat_o[27]",
|
|
"wb_dat_o[31]",
|
|
"wb_dat_o[29]",
|
|
"wb_dat_o[25]",
|
|
"wb_dat_o[1]",
|
|
"wb_dat_o[3]",
|
|
"mgmt_gpio_oeb[19]",
|
|
"mgmt_gpio_oeb[4]",
|
|
"mgmt_gpio_out[13]",
|
|
"pad_flash_csb",
|
|
"mgmt_gpio_oeb[37]",
|
|
"pad_flash_clk_oeb",
|
|
"mgmt_gpio_out[33]",
|
|
"mgmt_gpio_oeb[36]",
|
|
"mgmt_gpio_out[8]",
|
|
"mgmt_gpio_out[10]",
|
|
"mgmt_gpio_oeb[35]",
|
|
"mgmt_gpio_out[0]",
|
|
"mgmt_gpio_out[6]",
|
|
"mgmt_gpio_out[1]",
|
|
"mgmt_gpio_oeb[10]",
|
|
"mgmt_gpio_oeb[17]",
|
|
"mgmt_gpio_oeb[20]",
|
|
"mgmt_gpio_oeb[29]",
|
|
"mgmt_gpio_oeb[3]",
|
|
"mgmt_gpio_oeb[6]",
|
|
"mgmt_gpio_oeb[8]",
|
|
"mgmt_gpio_oeb[32]",
|
|
"mgmt_gpio_oeb[33]",
|
|
"mgmt_gpio_oeb[34]",
|
|
"pad_flash_io1_do",
|
|
"mgmt_gpio_oeb[11]",
|
|
"mgmt_gpio_oeb[12]",
|
|
"mgmt_gpio_oeb[13]",
|
|
"mgmt_gpio_oeb[14]",
|
|
"mgmt_gpio_oeb[15]",
|
|
"mgmt_gpio_oeb[18]",
|
|
"mgmt_gpio_oeb[21]",
|
|
"mgmt_gpio_oeb[22]",
|
|
"mgmt_gpio_oeb[23]",
|
|
"mgmt_gpio_oeb[24]",
|
|
"mgmt_gpio_oeb[25]",
|
|
"mgmt_gpio_oeb[26]",
|
|
"mgmt_gpio_oeb[27]",
|
|
"mgmt_gpio_oeb[28]",
|
|
"mgmt_gpio_oeb[2]",
|
|
"mgmt_gpio_oeb[30]",
|
|
"mgmt_gpio_oeb[31]",
|
|
"mgmt_gpio_oeb[5]",
|
|
"mgmt_gpio_oeb[7]",
|
|
"mgmt_gpio_oeb[9]",
|
|
"pad_flash_io0_oeb",
|
|
"pad_flash_io1_oeb",
|
|
"mgmt_gpio_out[11]",
|
|
"mgmt_gpio_out[12]",
|
|
"mgmt_gpio_out[4]",
|
|
"mgmt_gpio_out[3]",
|
|
"mgmt_gpio_out[7]",
|
|
"mgmt_gpio_out[16]",
|
|
"mgmt_gpio_out[17]",
|
|
"mgmt_gpio_out[19]",
|
|
"mgmt_gpio_out[18]",
|
|
"mgmt_gpio_out[24]",
|
|
"mgmt_gpio_out[20]",
|
|
"mgmt_gpio_out[25]",
|
|
"mgmt_gpio_out[26]",
|
|
"mgmt_gpio_out[23]",
|
|
"mgmt_gpio_out[22]",
|
|
"mgmt_gpio_out[21]",
|
|
"mgmt_gpio_out[28]",
|
|
"mgmt_gpio_out[2]",
|
|
"mgmt_gpio_out[27]",
|
|
"mgmt_gpio_out[31]",
|
|
"mgmt_gpio_out[30]",
|
|
"mgmt_gpio_out[29]",
|
|
"mgmt_gpio_out[34]",
|
|
"mgmt_gpio_out[5]",
|
|
"spimemio_flash_io3_di",
|
|
"wb_clk_i",
|
|
"user_clock",
|
|
"VGND",
|
|
"VPWR"
|
|
], [
|
|
"mgmt_gpio_out[9]",
|
|
"mgmt_gpio_out[14]",
|
|
"pad_flash_clk",
|
|
"mgmt_gpio_out[15]",
|
|
"wb_adr_i[0]",
|
|
"spimemio_flash_io1_oeb",
|
|
"spi_enabled",
|
|
"qspi_enabled",
|
|
"pad_flash_io1_di",
|
|
"mgmt_gpio_in[3]",
|
|
"mgmt_gpio_in[37]",
|
|
"trap",
|
|
"mgmt_gpio_in[34]",
|
|
"mgmt_gpio_in[2]",
|
|
"mgmt_gpio_in[18]",
|
|
"mgmt_gpio_in[35]",
|
|
"spimemio_flash_io3_oeb",
|
|
"mgmt_gpio_in[12]",
|
|
"mgmt_gpio_in[19]",
|
|
"mgmt_gpio_in[11]",
|
|
"mgmt_gpio_in[5]",
|
|
"mgmt_gpio_in[36]",
|
|
"mgmt_gpio_in[7]",
|
|
"mgmt_gpio_in[0]",
|
|
"mask_rev_in[9]",
|
|
"mask_rev_in[28]",
|
|
"mask_rev_in[18]",
|
|
"mask_rev_in[14]",
|
|
"mgmt_gpio_in[27]",
|
|
"mask_rev_in[12]",
|
|
"spimemio_flash_io0_do",
|
|
"mask_rev_in[4]",
|
|
"spimemio_flash_csb",
|
|
"mgmt_gpio_in[33]",
|
|
"spimemio_flash_clk",
|
|
"mgmt_gpio_in[22]",
|
|
"mgmt_gpio_in[31]",
|
|
"mgmt_gpio_in[21]",
|
|
"mgmt_gpio_in[20]",
|
|
"mgmt_gpio_in[10]",
|
|
"mgmt_gpio_in[1]",
|
|
"mgmt_gpio_in[28]",
|
|
"mgmt_gpio_in[17]",
|
|
"mask_rev_in[7]",
|
|
"mask_rev_in[26]",
|
|
"usr2_vdd_pwrgood",
|
|
"mask_rev_in[25]",
|
|
"mask_rev_in[17]",
|
|
"mgmt_gpio_in[25]",
|
|
"mask_rev_in[24]",
|
|
"mask_rev_in[10]",
|
|
"mgmt_gpio_in[23]",
|
|
"mgmt_gpio_in[8]",
|
|
"spimemio_flash_io2_do",
|
|
"spimemio_flash_io3_do",
|
|
"mask_rev_in[20]",
|
|
"spi_csb",
|
|
"mask_rev_in[27]",
|
|
"mask_rev_in[16]",
|
|
"mask_rev_in[6]",
|
|
"usr2_vcc_pwrgood",
|
|
"mask_rev_in[11]",
|
|
"usr1_vdd_pwrgood",
|
|
"mask_rev_in[0]",
|
|
"mgmt_gpio_in[9]",
|
|
"spi_sdoenb",
|
|
"spi_sdo",
|
|
"spi_sck",
|
|
"spimemio_flash_io2_oeb",
|
|
"wb_adr_i[1]",
|
|
"wb_adr_i[20]",
|
|
"wb_adr_i[23]",
|
|
"wb_adr_i[22]",
|
|
"debug_mode",
|
|
"wb_adr_i[2]",
|
|
"wb_adr_i[3]",
|
|
"wb_adr_i[4]",
|
|
"wb_adr_i[5]",
|
|
"wb_adr_i[6]",
|
|
"wb_adr_i[7]",
|
|
"mgmt_gpio_in[30]",
|
|
"spimemio_flash_io1_do",
|
|
"spimemio_flash_io0_oeb",
|
|
"mgmt_gpio_in[24]",
|
|
"usr1_vcc_pwrgood",
|
|
"wb_rstn_i",
|
|
"wb_dat_i[9]",
|
|
"wb_dat_i[17]",
|
|
"mask_rev_in[23]",
|
|
"mask_rev_in[3]",
|
|
"mask_rev_in[22]",
|
|
"mask_rev_in[31]",
|
|
"mask_rev_in[21]",
|
|
"mask_rev_in[30]",
|
|
"mask_rev_in[1]",
|
|
"mgmt_gpio_in[6]",
|
|
"mask_rev_in[29]",
|
|
"mask_rev_in[19]",
|
|
"mgmt_gpio_in[29]",
|
|
"mask_rev_in[8]",
|
|
"ser_tx",
|
|
"mask_rev_in[13]",
|
|
"mgmt_gpio_in[26]",
|
|
"mgmt_gpio_in[16]",
|
|
"mask_rev_in[2]",
|
|
"mask_rev_in[15]",
|
|
"porb",
|
|
"mgmt_gpio_in[15]",
|
|
"mask_rev_in[5]",
|
|
"mgmt_gpio_in[14]",
|
|
"pad_flash_io0_di",
|
|
"mgmt_gpio_in[13]",
|
|
"mgmt_gpio_in[32]",
|
|
"debug_out",
|
|
"debug_oeb",
|
|
"wb_adr_i[28]",
|
|
"wb_adr_i[27]",
|
|
"wb_dat_i[16]",
|
|
"wb_dat_i[18]",
|
|
"wb_adr_i[26]",
|
|
"wb_dat_i[25]",
|
|
"wb_adr_i[25]",
|
|
"wb_dat_i[26]",
|
|
"wb_dat_i[24]",
|
|
"wb_adr_i[24]",
|
|
"wb_dat_i[7]",
|
|
"wb_dat_i[6]",
|
|
"wb_dat_i[5]",
|
|
"wb_dat_i[4]",
|
|
"wb_dat_i[3]",
|
|
"wb_dat_i[11]",
|
|
"wb_dat_i[12]",
|
|
"wb_dat_i[13]",
|
|
"wb_dat_i[14]",
|
|
"wb_dat_i[15]",
|
|
"wb_adr_i[31]",
|
|
"wb_dat_i[8]",
|
|
"wb_dat_i[10]",
|
|
"wb_adr_i[30]",
|
|
"wb_sel_i[0]",
|
|
"wb_dat_i[1]",
|
|
"wb_dat_i[0]",
|
|
"wb_dat_i[2]",
|
|
"wb_dat_i[27]",
|
|
"wb_dat_i[28]",
|
|
"wb_dat_i[29]",
|
|
"wb_dat_i[30]",
|
|
"wb_dat_i[31]",
|
|
"wb_dat_i[23]",
|
|
"wb_dat_i[22]",
|
|
"wb_dat_i[21]",
|
|
"wb_dat_i[20]",
|
|
"wb_dat_i[19]",
|
|
"wb_cyc_i",
|
|
"wb_adr_i[29]",
|
|
"wb_adr_i[9]",
|
|
"uart_enabled",
|
|
"wb_adr_i[19]",
|
|
"wb_adr_i[18]",
|
|
"wb_adr_i[8]",
|
|
"wb_adr_i[13]",
|
|
"wb_adr_i[17]",
|
|
"wb_sel_i[3]",
|
|
"wb_adr_i[12]",
|
|
"wb_adr_i[16]",
|
|
"wb_sel_i[2]",
|
|
"wb_adr_i[11]",
|
|
"wb_adr_i[15]",
|
|
"wb_sel_i[1]",
|
|
"wb_adr_i[10]",
|
|
"wb_adr_i[14]",
|
|
"wb_stb_i",
|
|
"wb_we_i",
|
|
"wb_adr_i[21]",
|
|
"pll_trim[10]",
|
|
"pll_trim[21]",
|
|
"pll_trim[6]",
|
|
"pll90_sel[2]",
|
|
"pll_trim[15]",
|
|
"pll_trim[14]",
|
|
"pll_trim[13]",
|
|
"pll_div[2]",
|
|
"pll_trim[9]",
|
|
"pll_trim[22]",
|
|
"pll_trim[12]",
|
|
"pll_div[1]",
|
|
"pll_trim[8]",
|
|
"pll_trim[11]",
|
|
"pll_div[0]",
|
|
"pll_trim[7]",
|
|
"pll_trim[20]",
|
|
"pll_dco_ena",
|
|
"pll_trim[1]",
|
|
"pll_trim[0]",
|
|
"pll_bypass",
|
|
"pll_trim[5]",
|
|
"pll_trim[19]",
|
|
"pll_sel[2]",
|
|
"pll_trim[4]",
|
|
"pll_trim[18]",
|
|
"pll_trim[3]",
|
|
"pwr_ctrl_out[3]",
|
|
"pll_sel[1]",
|
|
"pll90_sel[1]",
|
|
"pll_trim[17]",
|
|
"pll_sel[0]",
|
|
"pll90_sel[0]",
|
|
"pll_trim[2]",
|
|
"pll_trim[16]",
|
|
"pll_ena",
|
|
"pll_trim[25]",
|
|
"pll_div[4]",
|
|
"pwr_ctrl_out[1]",
|
|
"pwr_ctrl_out[2]",
|
|
"pll_trim[24]",
|
|
"pll_div[3]",
|
|
"pwr_ctrl_out[0]",
|
|
"pll_trim[23]",
|
|
"serial_clock",
|
|
"pad_flash_io0_ieb",
|
|
"serial_data_2",
|
|
"serial_data_1",
|
|
"reset",
|
|
"mgmt_gpio_oeb[16]",
|
|
"mgmt_gpio_out[32]",
|
|
"mgmt_gpio_out[35]",
|
|
"pad_flash_io1_ieb",
|
|
"mgmt_gpio_in[4]",
|
|
"pad_flash_io0_do",
|
|
"mgmt_gpio_out[37]",
|
|
"mgmt_gpio_out[36]",
|
|
"pad_flash_csb_oeb",
|
|
"spimemio_flash_io0_di",
|
|
"spi_sdi",
|
|
"serial_resetn",
|
|
"serial_load",
|
|
"wb_ack_o",
|
|
"ser_rx",
|
|
"mgmt_gpio_oeb[1]",
|
|
"mgmt_gpio_oeb[0]",
|
|
"irq[2]",
|
|
"spimemio_flash_io2_di",
|
|
"irq[1]",
|
|
"spimemio_flash_io1_di",
|
|
"irq[0]",
|
|
"debug_in",
|
|
"wb_dat_o[22]",
|
|
"wb_dat_o[19]",
|
|
"wb_dat_o[23]",
|
|
"wb_dat_o[21]",
|
|
"wb_dat_o[30]",
|
|
"wb_dat_o[18]",
|
|
"wb_dat_o[10]",
|
|
"wb_dat_o[8]",
|
|
"wb_dat_o[11]",
|
|
"wb_dat_o[6]",
|
|
"wb_dat_o[7]",
|
|
"wb_dat_o[5]",
|
|
"wb_dat_o[9]",
|
|
"wb_dat_o[13]",
|
|
"wb_dat_o[15]",
|
|
"wb_dat_o[14]",
|
|
"wb_dat_o[17]",
|
|
"wb_dat_o[12]",
|
|
"wb_dat_o[4]",
|
|
"wb_dat_o[16]",
|
|
"wb_dat_o[26]",
|
|
"wb_dat_o[2]",
|
|
"wb_dat_o[0]",
|
|
"wb_dat_o[24]",
|
|
"wb_dat_o[20]",
|
|
"wb_dat_o[28]",
|
|
"wb_dat_o[27]",
|
|
"wb_dat_o[31]",
|
|
"wb_dat_o[29]",
|
|
"wb_dat_o[25]",
|
|
"wb_dat_o[1]",
|
|
"wb_dat_o[3]",
|
|
"mgmt_gpio_oeb[19]",
|
|
"mgmt_gpio_oeb[4]",
|
|
"mgmt_gpio_out[13]",
|
|
"pad_flash_csb",
|
|
"mgmt_gpio_oeb[37]",
|
|
"pad_flash_clk_oeb",
|
|
"mgmt_gpio_out[33]",
|
|
"mgmt_gpio_oeb[36]",
|
|
"mgmt_gpio_out[8]",
|
|
"mgmt_gpio_out[10]",
|
|
"mgmt_gpio_oeb[35]",
|
|
"mgmt_gpio_out[0]",
|
|
"mgmt_gpio_out[6]",
|
|
"mgmt_gpio_out[1]",
|
|
"mgmt_gpio_oeb[10]",
|
|
"mgmt_gpio_oeb[17]",
|
|
"mgmt_gpio_oeb[20]",
|
|
"mgmt_gpio_oeb[29]",
|
|
"mgmt_gpio_oeb[3]",
|
|
"mgmt_gpio_oeb[6]",
|
|
"mgmt_gpio_oeb[8]",
|
|
"mgmt_gpio_oeb[32]",
|
|
"mgmt_gpio_oeb[33]",
|
|
"mgmt_gpio_oeb[34]",
|
|
"pad_flash_io1_do",
|
|
"mgmt_gpio_oeb[11]",
|
|
"mgmt_gpio_oeb[12]",
|
|
"mgmt_gpio_oeb[13]",
|
|
"mgmt_gpio_oeb[14]",
|
|
"mgmt_gpio_oeb[15]",
|
|
"mgmt_gpio_oeb[18]",
|
|
"mgmt_gpio_oeb[21]",
|
|
"mgmt_gpio_oeb[22]",
|
|
"mgmt_gpio_oeb[23]",
|
|
"mgmt_gpio_oeb[24]",
|
|
"mgmt_gpio_oeb[25]",
|
|
"mgmt_gpio_oeb[26]",
|
|
"mgmt_gpio_oeb[27]",
|
|
"mgmt_gpio_oeb[28]",
|
|
"mgmt_gpio_oeb[2]",
|
|
"mgmt_gpio_oeb[30]",
|
|
"mgmt_gpio_oeb[31]",
|
|
"mgmt_gpio_oeb[5]",
|
|
"mgmt_gpio_oeb[7]",
|
|
"mgmt_gpio_oeb[9]",
|
|
"pad_flash_io0_oeb",
|
|
"pad_flash_io1_oeb",
|
|
"mgmt_gpio_out[11]",
|
|
"mgmt_gpio_out[12]",
|
|
"mgmt_gpio_out[4]",
|
|
"mgmt_gpio_out[3]",
|
|
"mgmt_gpio_out[7]",
|
|
"mgmt_gpio_out[16]",
|
|
"mgmt_gpio_out[17]",
|
|
"mgmt_gpio_out[19]",
|
|
"mgmt_gpio_out[18]",
|
|
"mgmt_gpio_out[24]",
|
|
"mgmt_gpio_out[20]",
|
|
"mgmt_gpio_out[25]",
|
|
"mgmt_gpio_out[26]",
|
|
"mgmt_gpio_out[23]",
|
|
"mgmt_gpio_out[22]",
|
|
"mgmt_gpio_out[21]",
|
|
"mgmt_gpio_out[28]",
|
|
"mgmt_gpio_out[2]",
|
|
"mgmt_gpio_out[27]",
|
|
"mgmt_gpio_out[31]",
|
|
"mgmt_gpio_out[30]",
|
|
"mgmt_gpio_out[29]",
|
|
"mgmt_gpio_out[34]",
|
|
"mgmt_gpio_out[5]",
|
|
"spimemio_flash_io3_di",
|
|
"wb_clk_i",
|
|
"user_clock",
|
|
"VGND",
|
|
"VPWR"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"buff_flash_clkrst",
|
|
"buff_flash_clkrst"
|
|
],
|
|
"devices": [
|
|
[
|
|
["sky130_fd_sc_hd__clkbuf_8", 15],
|
|
["sky130_ef_sc_hd__decap_12", 1],
|
|
["sky130_fd_sc_hd__decap_4", 1],
|
|
["sky130_fd_sc_hd__decap_3", 1],
|
|
["sky130_fd_sc_hd__decap_8", 1 ]
|
|
], [
|
|
["sky130_fd_sc_hd__clkbuf_8", 15 ],
|
|
["sky130_ef_sc_hd__decap_12", 1 ],
|
|
["sky130_fd_sc_hd__decap_4", 1 ],
|
|
["sky130_fd_sc_hd__decap_3", 1 ],
|
|
["sky130_fd_sc_hd__decap_8", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
32,
|
|
32
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"VGND",
|
|
"VPWR",
|
|
"in_n[4]",
|
|
"in_n[9]",
|
|
"in_n[11]",
|
|
"in_n[6]",
|
|
"in_s[0]",
|
|
"in_s[2]",
|
|
"in_n[1]",
|
|
"in_n[8]",
|
|
"in_n[3]",
|
|
"in_n[5]",
|
|
"in_n[10]",
|
|
"in_s[1]",
|
|
"in_n[0]",
|
|
"in_n[2]",
|
|
"in_n[7]",
|
|
"out_s[4]",
|
|
"out_s[9]",
|
|
"out_s[11]",
|
|
"out_s[6]",
|
|
"out_n[0]",
|
|
"out_n[2]",
|
|
"out_s[1]",
|
|
"out_s[8]",
|
|
"out_s[3]",
|
|
"out_s[5]",
|
|
"out_s[10]",
|
|
"out_n[1]",
|
|
"out_s[0]",
|
|
"out_s[2]",
|
|
"out_s[7]"
|
|
], [
|
|
"VGND",
|
|
"VPWR",
|
|
"in_n[4]",
|
|
"in_n[9]",
|
|
"in_n[11]",
|
|
"in_n[6]",
|
|
"in_s[0]",
|
|
"in_s[2]",
|
|
"in_n[1]",
|
|
"in_n[8]",
|
|
"in_n[3]",
|
|
"in_n[5]",
|
|
"in_n[10]",
|
|
"in_s[1]",
|
|
"in_n[0]",
|
|
"in_n[2]",
|
|
"in_n[7]",
|
|
"out_s[4]",
|
|
"out_s[9]",
|
|
"out_s[11]",
|
|
"out_s[6]",
|
|
"out_n[0]",
|
|
"out_n[2]",
|
|
"out_s[1]",
|
|
"out_s[8]",
|
|
"out_s[3]",
|
|
"out_s[5]",
|
|
"out_s[10]",
|
|
"out_n[1]",
|
|
"out_s[0]",
|
|
"out_s[2]",
|
|
"out_s[7]"
|
|
]
|
|
]
|
|
},
|
|
{
|
|
"name": [
|
|
"caravan",
|
|
"caravan"
|
|
],
|
|
"devices": [
|
|
[
|
|
["gpio_control_block", 27],
|
|
["gpio_defaults_block_0403", 24],
|
|
["digital_pll", 1],
|
|
["sky130_fd_pr__nfet_05v0_nvt", 1126],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 9934],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 1122],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 12995],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 957],
|
|
["sky130_fd_pr__nfet_01v8", 1224],
|
|
["sky130_fd_io__com_cclat", 33],
|
|
["sky130_fd_io__gpiov2_octl_mux", 33],
|
|
["sky130_fd_pr__res_generic_m1", 2407],
|
|
["sky130_fd_pr__res_generic_po", 508],
|
|
["sky130_fd_pr__res_generic_m2", 1150],
|
|
["sky130_fd_io__res250only_small", 69],
|
|
["sky130_fd_io__res75only_small", 594],
|
|
["sky130_fd_io__inv_1", 496],
|
|
["sky130_fd_io__nor2_1", 132],
|
|
["sky130_fd_io__nand2_1", 132],
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 33],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 33],
|
|
["sky130_fd_pr__pfet_01v8", 309],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 70],
|
|
["sky130_fd_pr__res_generic_m3", 44],
|
|
["sky130_fd_pr__res_generic_m4", 33],
|
|
["sky130_fd_pr__res_generic_m5", 29],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 6],
|
|
["constant_block", 7],
|
|
["sky130_fd_pr__res_generic_nd__hv", 1],
|
|
["sky130_fd_pr__res_generic_nd", 68],
|
|
["mgmt_core_wrapper", 1],
|
|
["simple_por", 1],
|
|
["caravel_clocking", 1],
|
|
["gpio_defaults_block_1803", 2],
|
|
["spare_logic_block", 4],
|
|
["user_id_programming", 1],
|
|
["gpio_defaults_block_0801", 1],
|
|
["sky130_fd_sc_hd__buf_8", 102],
|
|
["sky130_ef_sc_hd__decap_12", 1],
|
|
["mgmt_protect", 1],
|
|
["xres_buf", 1],
|
|
["housekeeping", 1],
|
|
["buff_flash_clkrst", 1 ]
|
|
], [
|
|
["gpio_control_block", 27 ],
|
|
["gpio_defaults_block_0403", 24 ],
|
|
["digital_pll", 1 ],
|
|
["sky130_fd_pr__nfet_05v0_nvt", 1126 ],
|
|
["sky130_fd_pr__pfet_g5v0d10v5", 9934 ],
|
|
["sky130_fd_pr__nfet_01v8_lvt", 1122 ],
|
|
["sky130_fd_pr__nfet_g5v0d10v5", 12995 ],
|
|
["sky130_fd_pr__pfet_01v8_hvt", 957 ],
|
|
["sky130_fd_pr__nfet_01v8", 1224 ],
|
|
["sky130_fd_io__com_cclat", 33 ],
|
|
["sky130_fd_io__gpiov2_octl_mux", 33 ],
|
|
["sky130_fd_pr__res_generic_m1", 2407 ],
|
|
["sky130_fd_pr__res_generic_po", 508 ],
|
|
["sky130_fd_pr__res_generic_m2", 1150 ],
|
|
["sky130_fd_io__res250only_small", 69 ],
|
|
["sky130_fd_io__res75only_small", 594 ],
|
|
["sky130_fd_io__inv_1", 496 ],
|
|
["sky130_fd_io__nor2_1", 132 ],
|
|
["sky130_fd_io__nand2_1", 132 ],
|
|
["sky130_fd_io__gpiov2_ipath_hvls", 33 ],
|
|
["sky130_fd_io__gpiov2_vcchib_in_buf", 33 ],
|
|
["sky130_fd_pr__pfet_01v8", 309 ],
|
|
["sky130_fd_io__signal_5_sym_hv_local_5term", 70 ],
|
|
["sky130_fd_pr__res_generic_m3", 44 ],
|
|
["sky130_fd_pr__res_generic_m4", 33 ],
|
|
["sky130_fd_pr__res_generic_m5", 29 ],
|
|
["sky130_fd_pr__diode_pd2nw_05v5", 6 ],
|
|
["constant_block", 7 ],
|
|
["sky130_fd_pr__res_generic_nd__hv", 1 ],
|
|
["sky130_fd_pr__res_generic_nd", 68 ],
|
|
["mgmt_core_wrapper", 1 ],
|
|
["simple_por", 1 ],
|
|
["caravel_clocking", 1 ],
|
|
["gpio_defaults_block_1803", 2 ],
|
|
["spare_logic_block", 4 ],
|
|
["user_id_programming", 1 ],
|
|
["gpio_defaults_block_0801", 1 ],
|
|
["sky130_fd_sc_hd__buf_8", 102 ],
|
|
["sky130_ef_sc_hd__decap_12", 1 ],
|
|
["mgmt_protect", 1 ],
|
|
["xres_buf", 1 ],
|
|
["housekeeping", 1 ],
|
|
["buff_flash_clkrst", 1 ]
|
|
]
|
|
],
|
|
"nets": [
|
|
21574,
|
|
21574
|
|
],
|
|
"badnets": [
|
|
],
|
|
"badelements": [
|
|
],
|
|
"pins": [
|
|
[
|
|
"resetb",
|
|
"flash_clk",
|
|
"flash_csb",
|
|
"clock",
|
|
"flash_io0",
|
|
"flash_io1",
|
|
"gpio",
|
|
"mprj_io[37]",
|
|
"mprj_io[36]",
|
|
"mprj_io[35]",
|
|
"mprj_io[25]",
|
|
"mprj_io[34]",
|
|
"mprj_io[33]",
|
|
"mprj_io[27]",
|
|
"mprj_io[32]",
|
|
"mprj_io[29]",
|
|
"mprj_io[31]",
|
|
"mprj_io[30]",
|
|
"mprj_io[28]",
|
|
"mprj_io[26]",
|
|
"mprj_io[13]",
|
|
"mprj_io[12]",
|
|
"mprj_io[11]",
|
|
"mprj_io[9]",
|
|
"mprj_io[10]",
|
|
"mprj_io[8]",
|
|
"mprj_io[7]",
|
|
"mprj_io[6]",
|
|
"mprj_io[5]",
|
|
"mprj_io[4]",
|
|
"mprj_io[3]",
|
|
"mprj_io[2]",
|
|
"mprj_io[1]",
|
|
"mprj_io[0]",
|
|
"mprj_io[19]",
|
|
"mprj_io[20]",
|
|
"mprj_io[18]",
|
|
"mprj_io[22]",
|
|
"mprj_io[16]",
|
|
"mprj_io[14]",
|
|
"mprj_io[23]",
|
|
"mprj_io[21]",
|
|
"mprj_io[24]",
|
|
"mprj_io[17]",
|
|
"mprj_io[15]",
|
|
"vccd1",
|
|
"vccd2",
|
|
"vccd",
|
|
"vdda1",
|
|
"vdda1_2",
|
|
"vdda2",
|
|
"vdda",
|
|
"vddio_2",
|
|
"vddio",
|
|
"vssa1_2",
|
|
"vssa1",
|
|
"vssa2",
|
|
"vssa",
|
|
"vssd1",
|
|
"vssd2",
|
|
"vssd",
|
|
"vssio_2",
|
|
"vssio"
|
|
], [
|
|
"resetb",
|
|
"flash_clk",
|
|
"flash_csb",
|
|
"clock",
|
|
"flash_io0",
|
|
"flash_io1",
|
|
"gpio",
|
|
"mprj_io[37]",
|
|
"mprj_io[36]",
|
|
"mprj_io[35]",
|
|
"mprj_io[25]",
|
|
"mprj_io[34]",
|
|
"mprj_io[33]",
|
|
"mprj_io[27]",
|
|
"mprj_io[32]",
|
|
"mprj_io[29]",
|
|
"mprj_io[31]",
|
|
"mprj_io[30]",
|
|
"mprj_io[28]",
|
|
"mprj_io[26]",
|
|
"mprj_io[13]",
|
|
"mprj_io[12]",
|
|
"mprj_io[11]",
|
|
"mprj_io[9]",
|
|
"mprj_io[10]",
|
|
"mprj_io[8]",
|
|
"mprj_io[7]",
|
|
"mprj_io[6]",
|
|
"mprj_io[5]",
|
|
"mprj_io[4]",
|
|
"mprj_io[3]",
|
|
"mprj_io[2]",
|
|
"mprj_io[1]",
|
|
"mprj_io[0]",
|
|
"mprj_io[19]",
|
|
"mprj_io[20]",
|
|
"mprj_io[18]",
|
|
"mprj_io[22]",
|
|
"mprj_io[16]",
|
|
"mprj_io[14]",
|
|
"mprj_io[23]",
|
|
"mprj_io[21]",
|
|
"mprj_io[24]",
|
|
"mprj_io[17]",
|
|
"mprj_io[15]",
|
|
"vccd1",
|
|
"vccd2",
|
|
"vccd",
|
|
"vdda1",
|
|
"vdda1_2",
|
|
"vdda2",
|
|
"vdda",
|
|
"vddio_2",
|
|
"vddio",
|
|
"vssa1_2",
|
|
"vssa1",
|
|
"vssa2",
|
|
"vssa",
|
|
"vssd1",
|
|
"vssd2",
|
|
"vssd",
|
|
"vssio_2",
|
|
"vssio"
|
|
]
|
|
]
|
|
}
|
|
]
|