caravel/verilog
kareem 2a3493ed65 Merge branch 'fix_top_buffers_again' into caravel_redesign-top-level 2022-10-16 10:03:54 -07:00
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dv fix script to not create directory annotation_logs 2022-10-15 02:54:35 -07:00
gl reharden: caravel 2022-10-16 06:58:46 -07:00
rtl Once again. . . Rewrote the RTL verilog so that only signals 2022-10-16 12:49:44 -04:00
stubs [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00