caravel/verilog
R. Timothy Edwards 30d35947f1
Added decap cells to the gate-level verilog for the (#343)
gpio_signal_buffering_alt cell (caravan chip).  This was
previously done for gpio_signal_buffering (caravel chip) but
the same thing had not previously been done for caravan.
2022-10-22 12:12:06 -07:00
..
dv cocotb - updates related to enable simulating caraval using iverilog (#320) 2022-10-21 07:43:34 -07:00
gl Added decap cells to the gate-level verilog for the (#343) 2022-10-22 12:12:06 -07:00
rtl Fixes to caravan for LVS and ERC (#330) 2022-10-21 14:28:53 -07:00
stubs [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00