mirror of https://github.com/efabless/caravel.git
2066 lines
45 KiB
Verilog
2066 lines
45 KiB
Verilog
module gpio_control_block (mgmt_gpio_in,
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mgmt_gpio_oeb,
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mgmt_gpio_out,
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one,
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pad_gpio_ana_en,
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pad_gpio_ana_pol,
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pad_gpio_ana_sel,
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pad_gpio_holdover,
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pad_gpio_ib_mode_sel,
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pad_gpio_in,
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pad_gpio_inenb,
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pad_gpio_out,
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pad_gpio_outenb,
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pad_gpio_slow_sel,
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pad_gpio_vtrip_sel,
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resetn,
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resetn_out,
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serial_clock,
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serial_clock_out,
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serial_data_in,
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serial_data_out,
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serial_load,
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serial_load_out,
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user_gpio_in,
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user_gpio_oeb,
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user_gpio_out,
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vccd,
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vccd1,
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vssd,
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vssd1,
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zero,
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gpio_defaults,
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pad_gpio_dm);
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output mgmt_gpio_in;
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input mgmt_gpio_oeb;
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input mgmt_gpio_out;
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output one;
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output pad_gpio_ana_en;
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output pad_gpio_ana_pol;
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output pad_gpio_ana_sel;
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output pad_gpio_holdover;
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output pad_gpio_ib_mode_sel;
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input pad_gpio_in;
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output pad_gpio_inenb;
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output pad_gpio_out;
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output pad_gpio_outenb;
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output pad_gpio_slow_sel;
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output pad_gpio_vtrip_sel;
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input resetn;
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output resetn_out;
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input serial_clock;
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output serial_clock_out;
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input serial_data_in;
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output serial_data_out;
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input serial_load;
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output serial_load_out;
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output user_gpio_in;
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input user_gpio_oeb;
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input user_gpio_out;
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input vccd;
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input vccd1;
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input vssd;
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input vssd1;
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output zero;
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input [12:0] gpio_defaults;
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output [2:0] pad_gpio_dm;
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wire _000_;
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wire _001_;
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wire _002_;
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wire _003_;
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wire _004_;
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wire _005_;
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wire _006_;
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wire _007_;
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wire _008_;
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wire _009_;
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wire _010_;
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wire _011_;
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wire _012_;
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wire _013_;
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wire _014_;
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wire _015_;
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wire _016_;
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wire _017_;
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wire _018_;
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wire _019_;
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wire _020_;
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wire _021_;
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wire _022_;
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wire _023_;
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wire _024_;
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wire _025_;
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wire _026_;
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wire _027_;
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wire _028_;
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wire _029_;
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wire _030_;
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wire _031_;
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wire _032_;
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wire _033_;
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wire _034_;
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wire _035_;
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wire _036_;
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wire _037_;
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wire _038_;
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wire _039_;
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wire _040_;
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wire _041_;
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wire _042_;
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wire _043_;
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wire _044_;
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wire _045_;
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wire _046_;
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wire _047_;
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wire _048_;
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wire _049_;
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wire _050_;
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wire _051_;
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wire _052_;
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wire _053_;
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wire _054_;
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wire _055_;
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wire _056_;
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wire _057_;
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wire _058_;
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wire _059_;
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wire _060_;
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wire _061_;
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wire _062_;
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wire _063_;
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wire _064_;
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wire _065_;
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wire _066_;
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wire _067_;
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wire _068_;
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wire _069_;
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wire _070_;
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wire _071_;
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wire _072_;
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wire _073_;
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wire _074_;
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wire _076_;
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wire _077_;
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wire _078_;
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wire _079_;
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wire _080_;
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wire _081_;
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wire _082_;
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wire _083_;
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wire _084_;
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wire _085_;
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wire _086_;
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wire _087_;
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wire _088_;
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wire _089_;
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wire _090_;
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wire _091_;
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wire _092_;
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wire _093_;
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wire _094_;
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wire _095_;
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wire _096_;
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wire _097_;
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wire _098_;
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wire _099_;
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wire _100_;
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wire _101_;
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wire clknet_0_serial_clock;
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wire clknet_1_0_0_serial_clock;
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wire clknet_1_1_0_serial_clock;
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wire gpio_logic1;
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wire gpio_outenb;
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wire mgmt_ena;
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wire net1;
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wire net10;
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wire net11;
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wire net12;
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wire net13;
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wire net14;
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wire net15;
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wire net16;
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wire net17;
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wire net18;
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wire net19;
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wire net2;
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wire net20;
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wire net21;
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wire net22;
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wire net23;
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wire net24;
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wire net25;
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wire net26;
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wire net27;
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wire net28;
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wire net29;
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wire net3;
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wire net30;
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wire net31;
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wire net32;
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wire net33;
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wire net34;
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wire net35;
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wire net36;
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wire net37;
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wire net38;
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wire net39;
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wire net4;
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wire net40;
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wire net41;
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wire net42;
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wire net43;
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wire net44;
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wire net45;
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wire net46;
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wire net47;
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wire net48;
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wire net49;
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wire net5;
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wire net50;
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wire net51;
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wire net52;
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wire net53;
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wire net54;
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wire net55;
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wire net56;
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wire net57;
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wire net58;
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wire net59;
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wire net6;
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wire net60;
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wire net61;
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wire net62;
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wire net63;
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wire net64;
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wire net65;
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wire net66;
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wire net7;
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wire net8;
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wire net9;
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wire serial_data_pre;
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wire \shift_register[0] ;
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wire \shift_register[10] ;
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wire \shift_register[11] ;
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wire \shift_register[1] ;
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wire \shift_register[2] ;
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wire \shift_register[3] ;
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wire \shift_register[4] ;
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wire \shift_register[5] ;
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wire \shift_register[6] ;
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wire \shift_register[7] ;
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wire \shift_register[8] ;
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wire \shift_register[9] ;
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sky130_fd_sc_hd__diode_2 ANTENNA__106__1_A (.DIODE(serial_load),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA__106__2_A (.DIODE(serial_load),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA__106__3_A (.DIODE(serial_load),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA__106__4_A (.DIODE(serial_load),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA__106__5_A (.DIODE(serial_load),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA__192__A (.DIODE(serial_load),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_clkbuf_0_serial_clock_A (.DIODE(serial_clock),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input10_A (.DIODE(gpio_defaults[6]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input11_A (.DIODE(gpio_defaults[7]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input12_A (.DIODE(gpio_defaults[8]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input13_A (.DIODE(gpio_defaults[9]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input14_A (.DIODE(mgmt_gpio_oeb),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input15_A (.DIODE(mgmt_gpio_out),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input16_A (.DIODE(pad_gpio_in),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input17_A (.DIODE(resetn),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input18_A (.DIODE(serial_data_in),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input19_A (.DIODE(user_gpio_oeb),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input1_A (.DIODE(gpio_defaults[0]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input20_A (.DIODE(user_gpio_out),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input2_A (.DIODE(gpio_defaults[10]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input3_A (.DIODE(gpio_defaults[11]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input4_A (.DIODE(gpio_defaults[12]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input5_A (.DIODE(gpio_defaults[1]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input6_A (.DIODE(gpio_defaults[2]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input7_A (.DIODE(gpio_defaults[3]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input8_A (.DIODE(gpio_defaults[4]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__diode_2 ANTENNA_input9_A (.DIODE(gpio_defaults[5]),
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.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__decap_8 FILLER_0_42 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_0_50 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__decap_12 FILLER_0_52 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__decap_8 FILLER_0_64 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__decap_3 FILLER_0_72 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_0_83 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_0_93 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_2 FILLER_10_3 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_2 FILLER_11_16 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_11_3 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_11_93 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_12_37 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_12_93 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_13_3 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_13_55 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_14_19 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_14_3 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_14_93 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_16_29 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_17_27 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
|
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_2 FILLER_17_49 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_17_93 (.VGND(vssd),
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.VNB(vssd),
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.VPB(vccd),
|
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.VPWR(vccd));
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sky130_fd_sc_hd__fill_1 FILLER_18_3 (.VGND(vssd),
|
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.VNB(vssd),
|
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.VPB(vccd),
|
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.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_2 FILLER_18_46 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_18_57 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_18_68 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_18_79 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_12 FILLER_1_50 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_8 FILLER_1_65 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_1_89 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_2_63 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_3_35 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_2 FILLER_3_62 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_3_93 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_4_40 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_4_93 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_5_93 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_6_26 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_6_36 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_6_57 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_6_93 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_7_46 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_2 FILLER_7_92 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_2 FILLER_8_3 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_8_35 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_8_57 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_8_93 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_9_3 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_9_44 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__fill_1 FILLER_9_63 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_0 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_1 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_10 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_11 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_12 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_13 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_14 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_15 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_16 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_17 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_18 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_19 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_2 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_20 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_21 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_22 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_23 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_24 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_25 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_26 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_27 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_28 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_29 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_3 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_30 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_31 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_32 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_33 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_34 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_35 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_36 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_37 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_4 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_5 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_6 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_7 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_8 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__decap_3 PHY_9 (.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_38 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_39 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_40 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_41 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_42 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_43 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_44 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_45 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_46 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_47 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_48 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_49 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_50 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_51 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_52 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_53 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_54 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_55 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_56 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_57 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_58 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_59 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_60 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_61 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_62 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_63 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_64 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__tapvpwrvgnd_1 TAP_65 (.VGND(vssd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _102_ (.A(net17),
|
|
.B_N(net11),
|
|
.X(_073_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _103_ (.A(_073_),
|
|
.X(_043_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _104_ (.A(net17),
|
|
.B(net11),
|
|
.X(_074_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _105_ (.A(_074_),
|
|
.X(_042_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__inv_2 _106__1 (.A(serial_load),
|
|
.Y(net40),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__inv_2 _106__2 (.A(serial_load),
|
|
.Y(net41),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__inv_2 _106__3 (.A(serial_load),
|
|
.Y(net42),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__inv_2 _106__4 (.A(serial_load),
|
|
.Y(net43),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__inv_2 _106__5 (.A(serial_load),
|
|
.Y(net44),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _107_ (.A(net44),
|
|
.X(_041_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _108_ (.A(net17),
|
|
.B_N(net10),
|
|
.X(_076_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _109_ (.A(_076_),
|
|
.X(_040_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _110_ (.A(net17),
|
|
.B(net10),
|
|
.X(_077_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _111_ (.A(_077_),
|
|
.X(_039_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _112_ (.A(_041_),
|
|
.X(_078_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _113_ (.A(_078_),
|
|
.X(_038_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _114_ (.A(net17),
|
|
.B_N(net9),
|
|
.X(_079_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _115_ (.A(_079_),
|
|
.X(_037_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _116_ (.A(net17),
|
|
.B(net9),
|
|
.X(_080_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _117_ (.A(_080_),
|
|
.X(_036_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _118_ (.A(_041_),
|
|
.X(_081_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _119_ (.A(_081_),
|
|
.X(_035_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _120_ (.A(net17),
|
|
.B_N(net4),
|
|
.X(_082_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _121_ (.A(_082_),
|
|
.X(_034_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _122_ (.A(net17),
|
|
.B(net4),
|
|
.X(_083_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _123_ (.A(_083_),
|
|
.X(_033_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _124_ (.A(_041_),
|
|
.X(_084_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _125_ (.A(_084_),
|
|
.X(_032_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _126_ (.A(net17),
|
|
.B_N(net3),
|
|
.X(_085_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _127_ (.A(_085_),
|
|
.X(_031_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _128_ (.A(net17),
|
|
.B(net3),
|
|
.X(_086_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _129_ (.A(_086_),
|
|
.X(_030_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _130_ (.A(_041_),
|
|
.X(_087_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _131_ (.A(_087_),
|
|
.X(_029_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _132_ (.A(net17),
|
|
.B_N(net2),
|
|
.X(_088_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _133_ (.A(_088_),
|
|
.X(_028_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _134_ (.A(net17),
|
|
.B(net2),
|
|
.X(_045_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _135_ (.A(_045_),
|
|
.X(_027_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _136_ (.A(net43),
|
|
.X(_046_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _137_ (.A(_046_),
|
|
.X(_047_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _138_ (.A(_047_),
|
|
.X(_026_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _139_ (.A(net17),
|
|
.B_N(net5),
|
|
.X(_048_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _140_ (.A(_048_),
|
|
.X(_025_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _141_ (.A(net17),
|
|
.B(net5),
|
|
.X(_049_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _142_ (.A(_049_),
|
|
.X(_024_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _143_ (.A(_046_),
|
|
.X(_050_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _144_ (.A(_050_),
|
|
.X(_023_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _145_ (.A(net17),
|
|
.B_N(net8),
|
|
.X(_051_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _146_ (.A(_051_),
|
|
.X(_022_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _147_ (.A(net17),
|
|
.B(net8),
|
|
.X(_052_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _148_ (.A(_052_),
|
|
.X(_021_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _149_ (.A(_046_),
|
|
.X(_053_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _150_ (.A(_053_),
|
|
.X(_020_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _151_ (.A(net17),
|
|
.B_N(net7),
|
|
.X(_054_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _152_ (.A(_054_),
|
|
.X(_019_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _153_ (.A(net17),
|
|
.B(net7),
|
|
.X(_055_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _154_ (.A(_055_),
|
|
.X(_018_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _155_ (.A(_046_),
|
|
.X(_056_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _156_ (.A(_056_),
|
|
.X(_017_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _157_ (.A(net17),
|
|
.B_N(net13),
|
|
.X(_057_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _158_ (.A(_057_),
|
|
.X(_016_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _159_ (.A(net17),
|
|
.B(net13),
|
|
.X(_058_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _160_ (.A(_058_),
|
|
.X(_015_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _161_ (.A(_046_),
|
|
.X(_059_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _162_ (.A(_059_),
|
|
.X(_014_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _163_ (.A(net17),
|
|
.B_N(net12),
|
|
.X(_060_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _164_ (.A(_060_),
|
|
.X(_013_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _165_ (.A(net17),
|
|
.B(net12),
|
|
.X(_061_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _166_ (.A(_061_),
|
|
.X(_012_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _167_ (.A(net42),
|
|
.X(_062_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _168_ (.A(_062_),
|
|
.X(_011_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _169_ (.A(net17),
|
|
.B_N(net6),
|
|
.X(_063_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _170_ (.A(_063_),
|
|
.X(_010_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _171_ (.A(net17),
|
|
.B(net6),
|
|
.X(_064_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _172_ (.A(_064_),
|
|
.X(_009_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _173_ (.A(net41),
|
|
.X(_065_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _174_ (.A(_065_),
|
|
.X(_008_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _175_ (.A(net17),
|
|
.B_N(net1),
|
|
.X(_066_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _176_ (.A(_066_),
|
|
.X(_007_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2_1 _177_ (.A(net1),
|
|
.B(net17),
|
|
.X(_067_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _178_ (.A(_067_),
|
|
.X(_006_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _179_ (.A(net30),
|
|
.B_N(gpio_outenb),
|
|
.X(_068_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _180_ (.A(_068_),
|
|
.X(_089_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__and2_1 _181_ (.A(gpio_outenb),
|
|
.B(net14),
|
|
.X(_069_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _182_ (.A(_069_),
|
|
.X(_000_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__or2b_1 _183_ (.A(net27),
|
|
.B_N(net26),
|
|
.X(_070_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _184_ (.A(_070_),
|
|
.X(_002_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__inv_2 _185_ (.A(net16),
|
|
.Y(_005_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__and2_1 _186_ (.A(one),
|
|
.B(serial_data_pre),
|
|
.X(_071_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _187_ (.A(_071_),
|
|
.X(net37),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _188_ (.A(net40),
|
|
.X(_072_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_1 _189_ (.A(_072_),
|
|
.X(_044_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 _190_ (.A(net17),
|
|
.X(net35),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 _191_ (.A(clknet_1_1_0_serial_clock),
|
|
.X(net36),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 _192_ (.A(serial_load),
|
|
.X(net38),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__mux2_1 _193_ (.A0(net19),
|
|
.A1(_000_),
|
|
.S(mgmt_ena),
|
|
.X(net32),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__mux2_1 _194_ (.A0(_001_),
|
|
.A1(net15),
|
|
.S(_002_),
|
|
.X(_003_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__mux2_1 _195_ (.A0(net15),
|
|
.A1(_003_),
|
|
.S(net14),
|
|
.X(_004_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__mux2_1 _196_ (.A0(net20),
|
|
.A1(_004_),
|
|
.S(mgmt_ena),
|
|
.X(net31),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__ebufn_1 _197_ (.A(net16),
|
|
.TE_B(_089_),
|
|
.Z(mgmt_gpio_in),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _198_ (.D(net56),
|
|
.Q(mgmt_ena),
|
|
.Q_N(_090_),
|
|
.RESET_B(_006_),
|
|
.SET_B(_007_),
|
|
.CLK_N(_008_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _199_ (.D(net55),
|
|
.Q(net28),
|
|
.Q_N(_091_),
|
|
.RESET_B(_009_),
|
|
.SET_B(_010_),
|
|
.CLK_N(_011_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _200_ (.D(net47),
|
|
.Q(net33),
|
|
.Q_N(_092_),
|
|
.RESET_B(_012_),
|
|
.SET_B(_013_),
|
|
.CLK_N(_014_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _201_ (.D(net46),
|
|
.Q(net34),
|
|
.Q_N(_093_),
|
|
.RESET_B(_015_),
|
|
.SET_B(_016_),
|
|
.CLK_N(_017_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _202_ (.D(net48),
|
|
.Q(net30),
|
|
.Q_N(_094_),
|
|
.RESET_B(_018_),
|
|
.SET_B(_019_),
|
|
.CLK_N(_020_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _203_ (.D(net45),
|
|
.Q(net29),
|
|
.Q_N(_095_),
|
|
.RESET_B(_021_),
|
|
.SET_B(_022_),
|
|
.CLK_N(_023_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _204_ (.D(net63),
|
|
.Q(gpio_outenb),
|
|
.Q_N(_096_),
|
|
.RESET_B(_024_),
|
|
.SET_B(_025_),
|
|
.CLK_N(_026_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _205_ (.D(net52),
|
|
.Q(net25),
|
|
.Q_N(_001_),
|
|
.RESET_B(_027_),
|
|
.SET_B(_028_),
|
|
.CLK_N(_029_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _206_ (.D(net51),
|
|
.Q(net26),
|
|
.Q_N(_097_),
|
|
.RESET_B(_030_),
|
|
.SET_B(_031_),
|
|
.CLK_N(_032_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _207_ (.D(net62),
|
|
.Q(net27),
|
|
.Q_N(_098_),
|
|
.RESET_B(_033_),
|
|
.SET_B(_034_),
|
|
.CLK_N(_035_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _208_ (.D(net66),
|
|
.Q(net22),
|
|
.Q_N(_099_),
|
|
.RESET_B(_036_),
|
|
.SET_B(_037_),
|
|
.CLK_N(_038_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _209_ (.D(net57),
|
|
.Q(net24),
|
|
.Q_N(_100_),
|
|
.RESET_B(_039_),
|
|
.SET_B(_040_),
|
|
.CLK_N(_041_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfbbn_1 _210_ (.D(net54),
|
|
.Q(net23),
|
|
.Q_N(_101_),
|
|
.RESET_B(_042_),
|
|
.SET_B(_043_),
|
|
.CLK_N(_044_),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _211_ (.D(net18),
|
|
.Q(\shift_register[0] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_1_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _212_ (.D(\shift_register[0] ),
|
|
.Q(\shift_register[1] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_0_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _213_ (.D(\shift_register[1] ),
|
|
.Q(\shift_register[2] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_0_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _214_ (.D(\shift_register[2] ),
|
|
.Q(\shift_register[3] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_0_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _215_ (.D(\shift_register[3] ),
|
|
.Q(\shift_register[4] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_0_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _216_ (.D(\shift_register[4] ),
|
|
.Q(\shift_register[5] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_0_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _217_ (.D(\shift_register[5] ),
|
|
.Q(\shift_register[6] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_0_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _218_ (.D(\shift_register[6] ),
|
|
.Q(\shift_register[7] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_0_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _219_ (.D(\shift_register[7] ),
|
|
.Q(\shift_register[8] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_1_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _220_ (.D(\shift_register[8] ),
|
|
.Q(\shift_register[9] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_1_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _221_ (.D(\shift_register[9] ),
|
|
.Q(\shift_register[10] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_1_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _222_ (.D(net65),
|
|
.Q(\shift_register[11] ),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_0_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__dfrtp_1 _223_ (.D(\shift_register[11] ),
|
|
.Q(serial_data_pre),
|
|
.RESET_B(net17),
|
|
.CLK(clknet_1_1_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_16 clkbuf_0_serial_clock (.A(serial_clock),
|
|
.X(clknet_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_2 clkbuf_1_0_0_serial_clock (.A(clknet_0_serial_clock),
|
|
.X(clknet_1_0_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_2 clkbuf_1_1_0_serial_clock (.A(clknet_0_serial_clock),
|
|
.X(clknet_1_1_0_serial_clock),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__conb_1 const_source (.HI(one),
|
|
.LO(zero),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__einvp_2 gpio_in_buf (.A(_005_),
|
|
.TE(gpio_logic1),
|
|
.Z(net39),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
gpio_logic_high gpio_logic_high (.gpio_logic1(gpio_logic1),
|
|
.vccd1(vccd1),
|
|
.vssd1(vssd1));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold1 (.A(net58),
|
|
.X(net45),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold10 (.A(\shift_register[7] ),
|
|
.X(net54),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold11 (.A(\shift_register[2] ),
|
|
.X(net55),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold12 (.A(\shift_register[0] ),
|
|
.X(net56),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold13 (.A(\shift_register[6] ),
|
|
.X(net57),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold14 (.A(\shift_register[4] ),
|
|
.X(net58),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold15 (.A(\shift_register[8] ),
|
|
.X(net59),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold16 (.A(\shift_register[9] ),
|
|
.X(net60),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold17 (.A(\shift_register[3] ),
|
|
.X(net61),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold18 (.A(net50),
|
|
.X(net62),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold19 (.A(net49),
|
|
.X(net63),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold2 (.A(net60),
|
|
.X(net46),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold20 (.A(\shift_register[11] ),
|
|
.X(net64),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s50_1 hold21 (.A(\shift_register[10] ),
|
|
.X(net65),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold22 (.A(net53),
|
|
.X(net66),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold3 (.A(net59),
|
|
.X(net47),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold4 (.A(net61),
|
|
.X(net48),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold5 (.A(\shift_register[1] ),
|
|
.X(net49),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold6 (.A(serial_data_pre),
|
|
.X(net50),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold7 (.A(net64),
|
|
.X(net51),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold8 (.A(net65),
|
|
.X(net52),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkdlybuf4s25_1 hold9 (.A(\shift_register[5] ),
|
|
.X(net53),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input1 (.A(gpio_defaults[0]),
|
|
.X(net1),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input10 (.A(gpio_defaults[6]),
|
|
.X(net10),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input11 (.A(gpio_defaults[7]),
|
|
.X(net11),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input12 (.A(gpio_defaults[8]),
|
|
.X(net12),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input13 (.A(gpio_defaults[9]),
|
|
.X(net13),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input14 (.A(mgmt_gpio_oeb),
|
|
.X(net14),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input15 (.A(mgmt_gpio_out),
|
|
.X(net15),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input16 (.A(pad_gpio_in),
|
|
.X(net16),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_12 input17 (.A(resetn),
|
|
.X(net17),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input18 (.A(serial_data_in),
|
|
.X(net18),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input19 (.A(user_gpio_oeb),
|
|
.X(net19),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input2 (.A(gpio_defaults[10]),
|
|
.X(net2),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input20 (.A(user_gpio_out),
|
|
.X(net20),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input3 (.A(gpio_defaults[11]),
|
|
.X(net3),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input4 (.A(gpio_defaults[12]),
|
|
.X(net4),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input5 (.A(gpio_defaults[1]),
|
|
.X(net5),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input6 (.A(gpio_defaults[2]),
|
|
.X(net6),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input7 (.A(gpio_defaults[3]),
|
|
.X(net7),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input8 (.A(gpio_defaults[4]),
|
|
.X(net8),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 input9 (.A(gpio_defaults[5]),
|
|
.X(net9),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output22 (.A(net22),
|
|
.X(pad_gpio_ana_en),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output23 (.A(net23),
|
|
.X(pad_gpio_ana_pol),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output24 (.A(net24),
|
|
.X(pad_gpio_ana_sel),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output25 (.A(net25),
|
|
.X(pad_gpio_dm[0]),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output26 (.A(net26),
|
|
.X(pad_gpio_dm[1]),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output27 (.A(net27),
|
|
.X(pad_gpio_dm[2]),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output28 (.A(net28),
|
|
.X(pad_gpio_holdover),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output29 (.A(net29),
|
|
.X(pad_gpio_ib_mode_sel),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output30 (.A(net30),
|
|
.X(pad_gpio_inenb),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output31 (.A(net31),
|
|
.X(pad_gpio_out),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output32 (.A(net32),
|
|
.X(pad_gpio_outenb),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output33 (.A(net33),
|
|
.X(pad_gpio_slow_sel),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output34 (.A(net34),
|
|
.X(pad_gpio_vtrip_sel),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output35 (.A(net35),
|
|
.X(resetn_out),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 output36 (.A(net36),
|
|
.X(serial_clock_out),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output37 (.A(net37),
|
|
.X(serial_data_out),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__clkbuf_1 output38 (.A(net38),
|
|
.X(serial_load_out),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
sky130_fd_sc_hd__buf_2 output39 (.A(net39),
|
|
.X(user_gpio_in),
|
|
.VGND(vssd),
|
|
.VNB(vssd),
|
|
.VPB(vccd),
|
|
.VPWR(vccd));
|
|
endmodule
|