mirror of https://github.com/efabless/caravel.git
42 lines
1.9 KiB
Python
42 lines
1.9 KiB
Python
import random
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import cocotb
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from cocotb.triggers import FallingEdge,RisingEdge,ClockCycles,Timer
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import cocotb.log
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from interfaces.cpu import RiskV
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from interfaces.defsParser import Regs
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from cocotb.result import TestSuccess
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from tests.common_functions.test_functions import *
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from tests.spi_master.SPI_VIP import read_mem ,SPI_VIP
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from tests.housekeeping.housekeeping_spi.spi_access_functions import *
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bit_time_ns = 0
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reg = Regs()
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@cocotb.test()
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@repot_test
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async def spi_rd_wr_nbyte(dut):
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caravelEnv,clock = await test_configure(dut,timeout_cycles=14833)
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cpu = RiskV(dut)
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cpu.cpu_force_reset()
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cpu.cpu_release_reset()
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cocotb.log.info (f"[TEST] start spi_rd_wr_nbyte test")
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nbytes_limits= 8
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# writing to the random number(1 to 8) of bits after 0x1E (gpio_configure[4]) address avoid changing gpio 3
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for j in range(3):
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address = random.randint(0x26 , 0x67-nbytes_limits)
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n_bytes = random.randint(1,nbytes_limits)
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await write_reg_spi_nbytes(caravelEnv,address,[0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F,0x1F],nbytes_limits)
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await write_reg_spi_nbytes(caravelEnv,address,[0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0],n_bytes)
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data = await read_reg_spi_nbytes(caravelEnv,address,nbytes_limits)
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for i in range(nbytes_limits):
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if i >= n_bytes:
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if data[i] != 0x1F:
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cocotb.log.error(f"[TEST] register {i} has returned value {data[i]} while it should return value 0x1F n_bytes = {n_bytes}")
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else: cocotb.log.info(f"[TEST] successful read 0 from register {i} n_bytes = {n_bytes}")
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else:
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if data[i] != 0:
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cocotb.log.error(f"[TEST] register number {i} has returned value {data[i]} > 0 while it should return value == 0 n_bytes = {n_bytes}")
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else: cocotb.log.info(f"[TEST] successful read {data[i]} from register {i} n_bytes = {n_bytes}")
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await ClockCycles(caravelEnv.clk,200) |