caravel/verilog
M0stafaRady 71d53b9958 added netlist for vcs gl_caravel_vcs.list rtl_caravel_vcs.list 2022-10-10 06:23:47 -07:00
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dv added netlist for vcs gl_caravel_vcs.list rtl_caravel_vcs.list 2022-10-10 06:23:47 -07:00
gl added constant_block view 2022-10-08 12:05:53 -07:00
rtl merge with caravel_redesign 2022-10-10 05:04:44 -07:00
stubs [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00