mirror of https://github.com/efabless/caravel.git
28 lines
1.4 KiB
Tcl
28 lines
1.4 KiB
Tcl
create_clock [get_pins {"ringosc.ibufp01/Y"} ] -name "pll_control_clock" -period 6.6666666666667
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set_propagated_clock [get_clocks {pll_control_clock}]
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set input_delay_value [expr $::env(CLOCK_PERIOD) * $::env(IO_PCT)]
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set output_delay_value [expr $::env(CLOCK_PERIOD) * $::env(IO_PCT)]
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puts "\[INFO\]: Setting output delay to: $output_delay_value"
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puts "\[INFO\]: Setting input delay to: $input_delay_value"
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set_max_fanout $::env(SYNTH_MAX_FANOUT) [current_design]
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set_input_delay $input_delay_value -clock [get_clocks $::env(CLOCK_PORT)] [all_inputs]
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set_output_delay $output_delay_value -clock [get_clocks $::env(CLOCK_PORT)] [all_outputs]
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# TODO set this as parameter
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set_driving_cell -lib_cell $::env(SYNTH_DRIVING_CELL) -pin $::env(SYNTH_DRIVING_CELL_PIN) [all_inputs]
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set cap_load [expr $::env(SYNTH_CAP_LOAD) / 1000.0]
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puts "\[INFO\]: Setting load to: $cap_load"
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set_load $cap_load [all_outputs]
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puts "\[INFO\]: Setting timing derate to: [expr {$::env(SYNTH_TIMING_DERATE) * 10}] %"
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set_timing_derate -early [expr {1-$::env(SYNTH_TIMING_DERATE)}]
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set_timing_derate -late [expr {1+$::env(SYNTH_TIMING_DERATE)}]
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puts "\[INFO\]: Setting clock uncertainity to: $::env(SYNTH_CLOCK_UNCERTAINITY)"
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set_clock_uncertainty $::env(SYNTH_CLOCK_UNCERTAINITY) [get_clocks {pll_control_clock}]
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puts "\[INFO\]: Setting clock transition to: $::env(SYNTH_CLOCK_TRANSITION)"
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set_clock_transition $::env(SYNTH_CLOCK_TRANSITION) [get_clocks {pll_control_clock}] |