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riscv
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caravel
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https://github.com/efabless/caravel.git
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1035e8b469
caravel
/
openlane
/
caravel_clocking
History
manarabdelaty
8b1c5df909
[DATA] Update caravel_clocking module (timing clean)
2021-11-25 15:23:01 +02:00
..
base.sdc
[DATA] Update caravel_clocking module (timing clean)
2021-11-25 15:23:01 +02:00
config.tcl
[DATA] Update caravel_clocking module (timing clean)
2021-11-25 15:23:01 +02:00
no_synth.list
[DATA] Add views for caravel_clocking and updated digital_pll clock after constraining clock to 150 MHz
2021-11-15 15:50:43 +02:00
pin_order.cfg
[DATA] Update caravel_clocking module floorplan
2021-11-19 01:26:29 +02:00