caravel/verilog
mo-hosni 0c78dbb954 Revert "reharden `caravan_core` to reduce the long wirelengths"
This reverts commit de16ffc6b9.
2023-05-30 04:35:59 -07:00
..
dv Update cocotb README file to include PDK export requirements 2022-10-30 01:47:46 -07:00
gl Revert "reharden `caravan_core` to reduce the long wirelengths" 2023-05-30 04:35:59 -07:00
rtl add `/// sta-blackbox` in the modules that will be blackboxed in STA 2023-05-22 05:52:27 -07:00
stubs [DATA] Add spare_logic_block 2021-11-24 20:36:23 +02:00