mirror of https://github.com/efabless/caravel.git
113 lines
3.2 KiB
C
113 lines
3.2 KiB
C
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#include <defs.h>
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#include <stub.c>
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void main(){
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unsigned int i, j, k;
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reg_wb_enable =1; // for enable writing to reg_debug_1 and reg_debug_2
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reg_debug_1 = 0x0;
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reg_debug_2 = 0x0;
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reg_hkspi_disable = 1;
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// Configure LA probes [63:32] and [127:96] as inputs to the cpu
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// Configure LA probes [31:0] and [63:32] as outputs from the cpu
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reg_la0_oenb = reg_la0_iena = 0xFFFFFFFF; // [31:0]
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reg_la1_oenb = reg_la1_iena = 0x00000000; // [63:32]
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reg_la2_oenb = reg_la2_iena = 0xFFFFFFFF; // [95:64]
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reg_la3_oenb = reg_la3_iena = 0x00000000; // [127:96]
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reg_la0_data = 0xAAAAAAAA;
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reg_la2_data = 0xAAAAAAAA;
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reg_debug_2 = reg_la1_data_in;
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if (reg_la1_data_in != 0xAAAAAAAA)
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reg_debug_1 = 0x1E;
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else
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reg_debug_1 = 0x1B;
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reg_debug_2 = reg_la3_data_in;
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if (reg_la3_data_in != 0xAAAAAAAA)
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reg_debug_1 = 0x2E;
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else
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reg_debug_1 = 0x2B;
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reg_la0_data = 0x55555555;
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reg_la2_data = 0x55555555;
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reg_debug_2 = reg_la1_data_in;
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if (reg_la1_data_in != 0x55555555)
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reg_debug_1 = 0x3E;
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else
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reg_debug_1 = 0x3B;
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reg_debug_2 = reg_la3_data_in;
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if (reg_la3_data_in != 0x55555555)
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reg_debug_1 = 0x4E;
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else
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reg_debug_1 = 0x4B;
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// Configure LA probes [31:0] and [63:32] as inputs to the cpu
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// Configure LA probes [63:32] and [127:96] as outputs from the cpu
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reg_la0_oenb = reg_la0_iena = 0x00000000; // [31:0]
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reg_la1_oenb = reg_la1_iena = 0xFFFFFFFF; // [63:32]
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reg_la2_oenb = reg_la2_iena = 0x00000000; // [95:64]
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reg_la3_oenb = reg_la3_iena = 0xFFFFFFFF; // [127:96]
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reg_la1_data = 0xAAAAAAAA;
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reg_la3_data = 0xAAAAAAAA;
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reg_debug_2 = reg_la0_data_in;
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if (reg_la0_data_in != 0xAAAAAAAA)
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reg_debug_1 = 0x5E;
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else
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reg_debug_1 = 0x5B;
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reg_debug_2 = reg_la2_data_in;
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if (reg_la2_data_in != 0xAAAAAAAA)
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reg_debug_1 = 0x6E;
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else
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reg_debug_1 = 0x6B;
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reg_la1_data = 0x55555555;
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reg_la3_data = 0x55555555;
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reg_debug_2 = reg_la0_data_in;
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if (reg_la0_data_in != 0x55555555)
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reg_debug_1 = 0x7E;
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else
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reg_debug_1 = 0x7B;
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reg_debug_2 = reg_la2_data_in;
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if (reg_la2_data_in != 0x55555555)
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reg_debug_1 = 0x8E;
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else
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reg_debug_1 = 0x8B;
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// Configure LA probes [31:0] and [63:32] as inputs to the cpu
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// Configure LA probes [63:32] and [127:96] as disabled input and output
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reg_la0_oenb = reg_la0_iena = 0x00000000; // [31:0]
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reg_la1_oenb = reg_la1_iena = 0xFFFFFFFF; // [63:32]
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reg_la2_oenb = reg_la2_iena = 0x00000000; // [95:64]
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reg_la3_oenb = reg_la3_iena = 0xFFFFFFFF; // [127:96]
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reg_la1_iena = reg_la3_iena = 0x00000000; // disable input for la1 and la3
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reg_la1_data = 0xAAAAAAAA;
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reg_la3_data = 0xAAAAAAAA;
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reg_debug_2 = reg_la0_data_in;
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if (reg_la0_data == 0xAAAAAAAA)
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reg_debug_1 = 0x9E;
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else
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reg_debug_1 = 0x9B;
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reg_debug_2 = reg_la2_data_in;
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if (reg_la2_data == 0xAAAAAAAA)
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reg_debug_1 = 0xaE;
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else
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reg_debug_1 = 0xaB;
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reg_debug_2 = 0xFF;
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print("adding a very very long delay because cpu produces X's when code finish and this break the simulation");
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}
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