mirror of https://github.com/efabless/caravel.git
102 lines
7.9 KiB
Plaintext
102 lines
7.9 KiB
Plaintext
****************************************
|
|
Report : analysis_coverage
|
|
-status_details {untested}
|
|
-sort_by slack
|
|
Design : digital_pll
|
|
Version: T-2022.03-SP3
|
|
Date : Tue Oct 18 15:35:15 2022
|
|
****************************************
|
|
|
|
Type of Check Total Met Violated Untested
|
|
--------------------------------------------------------------------------------
|
|
setup 23 22 ( 96%) 0 ( 0%) 1 ( 4%)
|
|
hold 23 22 ( 96%) 0 ( 0%) 1 ( 4%)
|
|
recovery 23 0 ( 0%) 0 ( 0%) 23 (100%)
|
|
removal 23 0 ( 0%) 0 ( 0%) 23 (100%)
|
|
min_pulse_width 69 46 ( 67%) 0 ( 0%) 23 ( 33%)
|
|
out_setup 2 0 ( 0%) 0 ( 0%) 2 (100%)
|
|
out_hold 2 0 ( 0%) 0 ( 0%) 2 (100%)
|
|
--------------------------------------------------------------------------------
|
|
All Checks 165 90 ( 55%) 0 ( 0%) 75 ( 45%)
|
|
|
|
|
|
Constrained Related Check
|
|
Pin Pin Clock Type Slack Reason
|
|
--------------------------------------------------------------------------------
|
|
_470_/D CLK(rise) pll_control_clock hold untested no_startpoint_clock
|
|
_470_/D CLK(rise) pll_control_clock setup untested no_startpoint_clock
|
|
_470_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_470_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_470_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_472_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_472_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_472_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_471_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_471_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_471_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_455_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_455_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_455_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_456_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_456_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_456_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_475_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_475_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_475_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_476_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_476_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_476_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_462_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_462_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_462_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_474_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_474_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_474_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_457_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_457_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_457_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_473_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_473_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_473_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_459_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_459_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_459_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_477_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_477_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_477_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_458_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_458_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_458_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_461_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_461_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_461_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_460_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_460_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_460_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_465_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_465_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_465_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_466_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_466_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_466_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_467_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_467_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_467_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_468_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_468_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_468_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_463_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_463_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_463_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_464_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_464_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_464_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
_469_/RESET_B(low) - - min_pulse_width untested no_clock
|
|
_469_/RESET_B(rise) CLK(rise) pll_control_clock recovery untested no_startpoint_clock
|
|
_469_/RESET_B(rise) CLK(rise) pll_control_clock removal untested no_startpoint_clock
|
|
clockp[0] - - out_hold untested no_endpoint_clock
|
|
clockp[0] - - out_setup untested no_endpoint_clock
|
|
clockp[1] - - out_hold untested no_endpoint_clock
|
|
clockp[1] - - out_setup untested no_endpoint_clock
|
|
1
|