mirror of https://github.com/efabless/caravel.git
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228 lines
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<!---
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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-->
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.. raw:: html
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<!---
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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-->
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.. raw:: html
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<!---
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# SPDX-FileCopyrightText: 2020 Efabless Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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# SPDX-License-Identifier: Apache-2.0
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-->
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.. _caravel-with-openlane:
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Using OpenLANE to Harden Your Design
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====================================
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You can utilize the Makefile existing here in this directory to do that.
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But, first you need to specify 2 things:
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.. code:: bash
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export PDK_ROOT=<The location where the pdk is installed>
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export OPENLANE_ROOT=<the absolute path to the openlane directory cloned or to be cloned>
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If you don't have openlane already, then you can get it from
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`here <https://github.com/efabless/openlane>`__.
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**NOTE:**
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We are developing caravel using the latest openlane release v0.12. This will be continuously updated to the latest openlane tag until we reach a stable version of caravel.
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Then, you have two options:
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#. Create a macro for your design and harden it, then insert it into
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`user_project_wrapper`.
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#. Flatten your design with the `user_project_wrapper` and harden them
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as one.
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**NOTE:**
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The OpenLANE documentation should cover everything you might
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need to create your design. You can find that
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`here <https://openlane.readthedocs.io/en/latest/>`__.
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Option 1: Inserting your design macro into the wrapper
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----------------------------------------------------------
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This could be done by creating a directory for your design under the ``<your_user_project_root>/openlane/<my-design>`` and adding a configuration file for it under the same
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directory. You can follow the instructions given
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`here <https://openlane.readthedocs.io/en/latest/#adding-a-design>`__ to
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generate an initial configuration file for your design, or you can start
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with the following:
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.. code:: tcl
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set script_dir [file dirname [file normalize [info script]]]
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set ::env(DESIGN_NAME) <Your Design Name>
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set ::env(DESIGN_IS_CORE) 0
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set ::env(FP_PDN_CORE_RING) 0
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set ::env(GLB_RT_MAXLAYER) 5
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set ::env(VERILOG_FILES) "$script_dir/../../verilog/rtl/<Your RTL.v>"
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set ::env(CLOCK_PORT) <Clock port name if it exists>
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set ::env(CLOCK_PERIOD) <Desired clock period>
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Then you can add any other configurations as you see fit to get the desired DRC/LVS clean
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outcome.
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After that, run the following command from your ``<your_user_project_root>/openlane/``:
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.. code:: bash
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make <your design directory name>
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Then, follow the instructions given in Option 2.
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**NOTE:**
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You might have other macros inside your design. In which case,
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you may need to have some special power configurations. This is covered
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`here <https://openlane.readthedocs.io/en/latest/docs/source/hardening_macros.html#power-grid-pdn>`__.
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Option 2: Flattening your design with the wrapper
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------------------------------------------------
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#. Add your design to the RTL of the
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`user_project_wrapper <https://github.com/efabless/caravel_user_project/blob/main/verilog/rtl/user_project_wrapper.v>`__.
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#. Modify the configuration file `here <https://github.com/efabless/caravel_user_project/blob/main/openlane/user_project_wrapper/config.tcl>`__ to include any extra
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files you may need. Make sure to change these accordingly:
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.. code:: tcl
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set ::env(CLOCK_NET) "mprj.clk"
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set ::env(VERILOG_FILES) " \
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$script_dir/../../verilog/rtl/defines.v \
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$script_dir/../../verilog/rtl/user_project_wrapper.v"
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set ::env(VERILOG_FILES_BLACKBOX) " \
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$script_dir/../../verilog/rtl/defines.v \
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$script_dir/../../verilog/rtl/user_proj_example.v"
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set ::env(EXTRA_LEFS) " \
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$script_dir/../../lef/user_proj_example.lef"
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set ::env(EXTRA_GDS_FILES) " \
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$script_dir/../../gds/user_proj_example.gds"
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#. If your design has standard cells then you need to modify the
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configuration file `here <https://github.com/efabless/caravel_user_project/blob/main/openlane/user_project_wrapper/config.tcl>`__ to
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remove or change these configs accordingly:
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.. code:: tcl
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# The following is because there are no std cells in the example wrapper project.
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set ::env(SYNTH_TOP_LEVEL) 1
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set ::env(PL_RANDOM_GLB_PLACEMENT) 1
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set ::env(PL_OPENPHYSYN_OPTIMIZATIONS) 0
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set ::env(DIODE_INSERTION_STRATEGY) 0
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set ::env(FILL_INSERTION) 0
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set ::env(TAP_DECAP_INSERTION) 0
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set ::env(CLOCK_TREE_SYNTH) 0
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#. Remove this line
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``set ::env(MACRO_PLACEMENT_CFG) $script_dir/macro.cfg`` from the
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configuration file `here <https://github.com/efabless/caravel_user_project/blob/main/openlane/user_project_wrapper/config.tcl>`__
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entirely if you have no macros. Alternatively, if you do have macros
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inside your design, then control their placement by modifying `this
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file <https://github.com/efabless/caravel_user_project/blob/main/openlane/user_project_wrapper/macro.cfg>`__
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#. Run your design through the flow: ``make user_project_wrapper``
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#. You may want to take a look at the `Extra
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Pointers <#extra-pointers>`__ to apply any necessary changes to the
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interactive script.
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#. Re-iterate until you have what you want.
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**NOTE:**
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In both cases you might have other macros inside your design.
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In which case, you may need to have some special power configurations.
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This is covered `here <https://openlane.readthedocs.io/en/latest/docs/source/hardening_macros.html#power-grid-pdn>`__.
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**WARNING:**
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Don't change the size or the pin order!
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Extra Pointers
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--------------
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- The OpenLANE documentation should cover everything you might need to
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create your design. You can find that
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`here <https://openlane.readthedocs.io/en/latest/>`__.
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- The OpenLANE `FAQs <https://github.com/efabless/openlane/wiki>`__ can
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guide through your troubles.
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- `Here <https://openlane.readthedocs.io/en/latest/configuration/README.html>`__
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you can find all the configurations and how to use them.
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- `Here <https://openlane.readthedocs.io/en/latest/docs/source/advanced_readme.html>`__
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you can learn how to write an interactive script.
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- `Here <https://openlane.readthedocs.io/en/latest/docs/source/OpenLANE_commands.html>`__
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you can find a full documentation for all OpenLANE commands.
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- `This
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documentation <https://openlane.readthedocs.io/en/latest/regression_results/README.html>`__
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describes how to use the exploration script to achieve an LVS/DRC
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clean design.
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- `This
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documentation <https://openlane.readthedocs.io/en/latest/docs/source/hardening_macros.html>`__
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walks you through hardening a macro and all the decisions you should
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make.
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